Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, |
| 3 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker |
| 4 | <mdsxyz123@yahoo.com> |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 5 | Copyright (C) 2007 - 2014 Jean Delvare <jdelvare@suse.de> |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 6 | Copyright (C) 2010 Intel Corporation, |
| 7 | David Woodhouse <dwmw2@infradead.org> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 2 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | */ |
| 19 | |
| 20 | /* |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 21 | * Supports the following Intel I/O Controller Hubs (ICH): |
| 22 | * |
| 23 | * I/O Block I2C |
| 24 | * region SMBus Block proc. block |
| 25 | * Chip name PCI ID size PEC buffer call read |
| 26 | * --------------------------------------------------------------------------- |
| 27 | * 82801AA (ICH) 0x2413 16 no no no no |
| 28 | * 82801AB (ICH0) 0x2423 16 no no no no |
| 29 | * 82801BA (ICH2) 0x2443 16 no no no no |
| 30 | * 82801CA (ICH3) 0x2483 32 soft no no no |
| 31 | * 82801DB (ICH4) 0x24c3 32 hard yes no no |
| 32 | * 82801E (ICH5) 0x24d3 32 hard yes yes yes |
| 33 | * 6300ESB 0x25a4 32 hard yes yes yes |
| 34 | * 82801F (ICH6) 0x266a 32 hard yes yes yes |
| 35 | * 6310ESB/6320ESB 0x269b 32 hard yes yes yes |
| 36 | * 82801G (ICH7) 0x27da 32 hard yes yes yes |
| 37 | * 82801H (ICH8) 0x283e 32 hard yes yes yes |
| 38 | * 82801I (ICH9) 0x2930 32 hard yes yes yes |
| 39 | * EP80579 (Tolapai) 0x5032 32 hard yes yes yes |
| 40 | * ICH10 0x3a30 32 hard yes yes yes |
| 41 | * ICH10 0x3a60 32 hard yes yes yes |
| 42 | * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes |
| 43 | * 6 Series (PCH) 0x1c22 32 hard yes yes yes |
| 44 | * Patsburg (PCH) 0x1d22 32 hard yes yes yes |
| 45 | * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes |
| 46 | * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes |
| 47 | * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes |
| 48 | * DH89xxCC (PCH) 0x2330 32 hard yes yes yes |
| 49 | * Panther Point (PCH) 0x1e22 32 hard yes yes yes |
| 50 | * Lynx Point (PCH) 0x8c22 32 hard yes yes yes |
| 51 | * Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes |
| 52 | * Avoton (SOC) 0x1f3c 32 hard yes yes yes |
| 53 | * Wellsburg (PCH) 0x8d22 32 hard yes yes yes |
| 54 | * Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes |
| 55 | * Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes |
| 56 | * Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes |
| 57 | * Coleto Creek (PCH) 0x23b0 32 hard yes yes yes |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 58 | * Wildcat Point (PCH) 0x8ca2 32 hard yes yes yes |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 59 | * Wildcat Point-LP (PCH) 0x9ca2 32 hard yes yes yes |
| 60 | * BayTrail (SOC) 0x0f12 32 hard yes yes yes |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 61 | * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 62 | * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 63 | * |
| 64 | * Features supported by this driver: |
| 65 | * Software PEC no |
| 66 | * Hardware PEC yes |
| 67 | * Block buffer yes |
| 68 | * Block process call transaction no |
| 69 | * I2C block read transaction yes (doesn't use the block buffer) |
| 70 | * Slave mode no |
| 71 | * Interrupt processing yes |
| 72 | * |
| 73 | * See the file Documentation/i2c/busses/i2c-i801 for details. |
| 74 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 76 | #include <linux/interrupt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | #include <linux/module.h> |
| 78 | #include <linux/pci.h> |
| 79 | #include <linux/kernel.h> |
| 80 | #include <linux/stddef.h> |
| 81 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | #include <linux/ioport.h> |
| 83 | #include <linux/init.h> |
| 84 | #include <linux/i2c.h> |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 85 | #include <linux/acpi.h> |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 86 | #include <linux/io.h> |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 87 | #include <linux/dmi.h> |
Ben Hutchings | 665a96b | 2011-01-10 22:11:22 +0100 | [diff] [blame] | 88 | #include <linux/slab.h> |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 89 | #include <linux/wait.h> |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 90 | #include <linux/err.h> |
| 91 | |
Jean Delvare | 79e3e5b | 2012-10-28 21:37:01 +0100 | [diff] [blame] | 92 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
| 93 | defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 94 | #include <linux/gpio.h> |
| 95 | #include <linux/i2c-mux-gpio.h> |
| 96 | #include <linux/platform_device.h> |
| 97 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | /* I801 SMBus address offsets */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 100 | #define SMBHSTSTS(p) (0 + (p)->smba) |
| 101 | #define SMBHSTCNT(p) (2 + (p)->smba) |
| 102 | #define SMBHSTCMD(p) (3 + (p)->smba) |
| 103 | #define SMBHSTADD(p) (4 + (p)->smba) |
| 104 | #define SMBHSTDAT0(p) (5 + (p)->smba) |
| 105 | #define SMBHSTDAT1(p) (6 + (p)->smba) |
| 106 | #define SMBBLKDAT(p) (7 + (p)->smba) |
| 107 | #define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ |
| 108 | #define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ |
| 109 | #define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
| 111 | /* PCI Address Constants */ |
Jean Delvare | 6dcc19d | 2006-06-12 21:53:02 +0200 | [diff] [blame] | 112 | #define SMBBAR 4 |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 113 | #define SMBPCICTL 0x004 |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 114 | #define SMBPCISTS 0x006 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | #define SMBHSTCFG 0x040 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 117 | /* Host status bits for SMBPCISTS */ |
| 118 | #define SMBPCISTS_INTS 0x08 |
| 119 | |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 120 | /* Control bits for SMBPCICTL */ |
| 121 | #define SMBPCICTL_INTDIS 0x0400 |
| 122 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | /* Host configuration bits for SMBHSTCFG */ |
| 124 | #define SMBHSTCFG_HST_EN 1 |
| 125 | #define SMBHSTCFG_SMB_SMI_EN 2 |
| 126 | #define SMBHSTCFG_I2C_EN 4 |
| 127 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 128 | /* Auxiliary control register bits, ICH4+ only */ |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 129 | #define SMBAUXCTL_CRC 1 |
| 130 | #define SMBAUXCTL_E32B 2 |
| 131 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | /* Other settings */ |
Jean Delvare | 84c1af4 | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 133 | #define MAX_RETRIES 400 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | |
| 135 | /* I801 command constants */ |
| 136 | #define I801_QUICK 0x00 |
| 137 | #define I801_BYTE 0x04 |
| 138 | #define I801_BYTE_DATA 0x08 |
| 139 | #define I801_WORD_DATA 0x0C |
Jean Delvare | ae7b049 | 2008-01-27 18:14:49 +0100 | [diff] [blame] | 140 | #define I801_PROC_CALL 0x10 /* unimplemented */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | #define I801_BLOCK_DATA 0x14 |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 142 | #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 143 | |
| 144 | /* I801 Host Control register bits */ |
| 145 | #define SMBHSTCNT_INTREN 0x01 |
| 146 | #define SMBHSTCNT_KILL 0x02 |
| 147 | #define SMBHSTCNT_LAST_BYTE 0x20 |
| 148 | #define SMBHSTCNT_START 0x40 |
| 149 | #define SMBHSTCNT_PEC_EN 0x80 /* ICH3 and later */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 151 | /* I801 Hosts Status register bits */ |
| 152 | #define SMBHSTSTS_BYTE_DONE 0x80 |
| 153 | #define SMBHSTSTS_INUSE_STS 0x40 |
| 154 | #define SMBHSTSTS_SMBALERT_STS 0x20 |
| 155 | #define SMBHSTSTS_FAILED 0x10 |
| 156 | #define SMBHSTSTS_BUS_ERR 0x08 |
| 157 | #define SMBHSTSTS_DEV_ERR 0x04 |
| 158 | #define SMBHSTSTS_INTR 0x02 |
| 159 | #define SMBHSTSTS_HOST_BUSY 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | |
Daniel Kurtz | 70a1cc1 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 161 | #define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \ |
| 162 | SMBHSTSTS_DEV_ERR) |
| 163 | |
| 164 | #define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \ |
| 165 | STATUS_ERROR_FLAGS) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 166 | |
Jean Delvare | a6e5e2b | 2011-05-01 18:18:49 +0200 | [diff] [blame] | 167 | /* Older devices have their ID defined in <linux/pci_ids.h> */ |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 168 | #define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 |
Alan Cox | 39e8e30 | 2014-08-19 17:37:28 +0300 | [diff] [blame] | 169 | #define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 170 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 |
| 171 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 172 | /* Patsburg also has three 'Integrated Device Function' SMBus controllers */ |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 173 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 |
| 174 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 |
| 175 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 |
| 176 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 |
| 177 | #define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c |
| 178 | #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330 |
| 179 | #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0 |
| 180 | #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 |
| 181 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 182 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 183 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 |
| 184 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d |
| 185 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e |
| 186 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f |
| 187 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22 |
James Ralston | afc6592 | 2013-11-04 09:29:48 -0800 | [diff] [blame] | 188 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 189 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 190 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 191 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 192 | struct i801_mux_config { |
| 193 | char *gpio_chip; |
| 194 | unsigned values[3]; |
| 195 | int n_values; |
| 196 | unsigned classes[3]; |
| 197 | unsigned gpios[2]; /* Relative to gpio_chip->base */ |
| 198 | int n_gpios; |
| 199 | }; |
| 200 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 201 | struct i801_priv { |
| 202 | struct i2c_adapter adapter; |
| 203 | unsigned long smba; |
| 204 | unsigned char original_hstcfg; |
| 205 | struct pci_dev *pci_dev; |
| 206 | unsigned int features; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 207 | |
| 208 | /* isr processing */ |
| 209 | wait_queue_head_t waitq; |
| 210 | u8 status; |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 211 | |
| 212 | /* Command state used by isr for byte-by-byte block transactions */ |
| 213 | u8 cmd; |
| 214 | bool is_read; |
| 215 | int count; |
| 216 | int len; |
| 217 | u8 *data; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 218 | |
Jean Delvare | 79e3e5b | 2012-10-28 21:37:01 +0100 | [diff] [blame] | 219 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
| 220 | defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 221 | const struct i801_mux_config *mux_drvdata; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 222 | struct platform_device *mux_pdev; |
| 223 | #endif |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 224 | }; |
| 225 | |
Jean Delvare | 369f6f4 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 226 | #define FEATURE_SMBUS_PEC (1 << 0) |
| 227 | #define FEATURE_BLOCK_BUFFER (1 << 1) |
| 228 | #define FEATURE_BLOCK_PROC (1 << 2) |
| 229 | #define FEATURE_I2C_BLOCK_READ (1 << 3) |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 230 | #define FEATURE_IRQ (1 << 4) |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 231 | /* Not really a feature, but it's convenient to handle it as such */ |
| 232 | #define FEATURE_IDF (1 << 15) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 234 | static const char *i801_feature_names[] = { |
| 235 | "SMBus PEC", |
| 236 | "Block buffer", |
| 237 | "Block process call", |
| 238 | "I2C block read", |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 239 | "Interrupt", |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 240 | }; |
| 241 | |
| 242 | static unsigned int disable_features; |
| 243 | module_param(disable_features, uint, S_IRUGO | S_IWUSR); |
Jean Delvare | 5322934 | 2013-05-15 02:44:10 +0000 | [diff] [blame] | 244 | MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n" |
| 245 | "\t\t 0x01 disable SMBus PEC\n" |
| 246 | "\t\t 0x02 disable the block buffer\n" |
| 247 | "\t\t 0x08 disable the I2C block read functionality\n" |
| 248 | "\t\t 0x10 don't use interrupts "); |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 249 | |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 250 | /* Make sure the SMBus host is ready to start transmitting. |
| 251 | Return 0 if it is, -EBUSY if it is not. */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 252 | static int i801_check_pre(struct i801_priv *priv) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 253 | { |
| 254 | int status; |
| 255 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 256 | status = inb_p(SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 257 | if (status & SMBHSTSTS_HOST_BUSY) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 258 | dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 259 | return -EBUSY; |
| 260 | } |
| 261 | |
| 262 | status &= STATUS_FLAGS; |
| 263 | if (status) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 264 | dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n", |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 265 | status); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 266 | outb_p(status, SMBHSTSTS(priv)); |
| 267 | status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 268 | if (status) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 269 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 270 | "Failed clearing status flags (%02x)\n", |
| 271 | status); |
| 272 | return -EBUSY; |
| 273 | } |
| 274 | } |
| 275 | |
| 276 | return 0; |
| 277 | } |
| 278 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 279 | /* |
| 280 | * Convert the status register to an error code, and clear it. |
| 281 | * Note that status only contains the bits we want to clear, not the |
| 282 | * actual register value. |
| 283 | */ |
| 284 | static int i801_check_post(struct i801_priv *priv, int status) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 285 | { |
| 286 | int result = 0; |
| 287 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 288 | /* |
| 289 | * If the SMBus is still busy, we give up |
| 290 | * Note: This timeout condition only happens when using polling |
| 291 | * transactions. For interrupt operation, NAK/timeout is indicated by |
| 292 | * DEV_ERR. |
| 293 | */ |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 294 | if (unlikely(status < 0)) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 295 | dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 296 | /* try to stop the current command */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 297 | dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); |
| 298 | outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, |
| 299 | SMBHSTCNT(priv)); |
Jean Delvare | 84c1af4 | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 300 | usleep_range(1000, 2000); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 301 | outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), |
| 302 | SMBHSTCNT(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 303 | |
| 304 | /* Check if it worked */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 305 | status = inb_p(SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 306 | if ((status & SMBHSTSTS_HOST_BUSY) || |
| 307 | !(status & SMBHSTSTS_FAILED)) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 308 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 309 | "Failed terminating the transaction\n"); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 310 | outb_p(STATUS_FLAGS, SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 311 | return -ETIMEDOUT; |
| 312 | } |
| 313 | |
| 314 | if (status & SMBHSTSTS_FAILED) { |
| 315 | result = -EIO; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 316 | dev_err(&priv->pci_dev->dev, "Transaction failed\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 317 | } |
| 318 | if (status & SMBHSTSTS_DEV_ERR) { |
| 319 | result = -ENXIO; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 320 | dev_dbg(&priv->pci_dev->dev, "No response\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 321 | } |
| 322 | if (status & SMBHSTSTS_BUS_ERR) { |
| 323 | result = -EAGAIN; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 324 | dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 325 | } |
| 326 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 327 | /* Clear status flags except BYTE_DONE, to be cleared by caller */ |
| 328 | outb_p(status, SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 329 | |
| 330 | return result; |
| 331 | } |
| 332 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 333 | /* Wait for BUSY being cleared and either INTR or an error flag being set */ |
| 334 | static int i801_wait_intr(struct i801_priv *priv) |
| 335 | { |
| 336 | int timeout = 0; |
| 337 | int status; |
| 338 | |
| 339 | /* We will always wait for a fraction of a second! */ |
| 340 | do { |
| 341 | usleep_range(250, 500); |
| 342 | status = inb_p(SMBHSTSTS(priv)); |
| 343 | } while (((status & SMBHSTSTS_HOST_BUSY) || |
| 344 | !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) && |
| 345 | (timeout++ < MAX_RETRIES)); |
| 346 | |
| 347 | if (timeout > MAX_RETRIES) { |
| 348 | dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n"); |
| 349 | return -ETIMEDOUT; |
| 350 | } |
| 351 | return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR); |
| 352 | } |
| 353 | |
| 354 | /* Wait for either BYTE_DONE or an error flag being set */ |
| 355 | static int i801_wait_byte_done(struct i801_priv *priv) |
| 356 | { |
| 357 | int timeout = 0; |
| 358 | int status; |
| 359 | |
| 360 | /* We will always wait for a fraction of a second! */ |
| 361 | do { |
| 362 | usleep_range(250, 500); |
| 363 | status = inb_p(SMBHSTSTS(priv)); |
| 364 | } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) && |
| 365 | (timeout++ < MAX_RETRIES)); |
| 366 | |
| 367 | if (timeout > MAX_RETRIES) { |
| 368 | dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n"); |
| 369 | return -ETIMEDOUT; |
| 370 | } |
| 371 | return status & STATUS_ERROR_FLAGS; |
| 372 | } |
| 373 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 374 | static int i801_transaction(struct i801_priv *priv, int xact) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | { |
Jean Delvare | 2b73809 | 2008-07-14 22:38:32 +0200 | [diff] [blame] | 376 | int status; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 377 | int result; |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 378 | const struct i2c_adapter *adap = &priv->adapter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 380 | result = i801_check_pre(priv); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 381 | if (result < 0) |
| 382 | return result; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 384 | if (priv->features & FEATURE_IRQ) { |
| 385 | outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START, |
| 386 | SMBHSTCNT(priv)); |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 387 | result = wait_event_timeout(priv->waitq, |
| 388 | (status = priv->status), |
| 389 | adap->timeout); |
| 390 | if (!result) { |
| 391 | status = -ETIMEDOUT; |
| 392 | dev_warn(&priv->pci_dev->dev, |
| 393 | "Timeout waiting for interrupt!\n"); |
| 394 | } |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 395 | priv->status = 0; |
| 396 | return i801_check_post(priv, status); |
| 397 | } |
| 398 | |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 399 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 400 | * SMBSCMD are passed in xact */ |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 401 | outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 403 | status = i801_wait_intr(priv); |
| 404 | return i801_check_post(priv, status); |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 405 | } |
| 406 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 407 | static int i801_block_transaction_by_block(struct i801_priv *priv, |
| 408 | union i2c_smbus_data *data, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 409 | char read_write, int hwpec) |
| 410 | { |
| 411 | int i, len; |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 412 | int status; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 413 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 414 | inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 415 | |
| 416 | /* Use 32-byte buffer to process this transaction */ |
| 417 | if (read_write == I2C_SMBUS_WRITE) { |
| 418 | len = data->block[0]; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 419 | outb_p(len, SMBHSTDAT0(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 420 | for (i = 0; i < len; i++) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 421 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 422 | } |
| 423 | |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 424 | status = i801_transaction(priv, I801_BLOCK_DATA | |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 425 | (hwpec ? SMBHSTCNT_PEC_EN : 0)); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 426 | if (status) |
| 427 | return status; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 428 | |
| 429 | if (read_write == I2C_SMBUS_READ) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 430 | len = inb_p(SMBHSTDAT0(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 431 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 432 | return -EPROTO; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 433 | |
| 434 | data->block[0] = len; |
| 435 | for (i = 0; i < len; i++) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 436 | data->block[i + 1] = inb_p(SMBBLKDAT(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 437 | } |
| 438 | return 0; |
| 439 | } |
| 440 | |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 441 | static void i801_isr_byte_done(struct i801_priv *priv) |
| 442 | { |
| 443 | if (priv->is_read) { |
| 444 | /* For SMBus block reads, length is received with first byte */ |
| 445 | if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) && |
| 446 | (priv->count == 0)) { |
| 447 | priv->len = inb_p(SMBHSTDAT0(priv)); |
| 448 | if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) { |
| 449 | dev_err(&priv->pci_dev->dev, |
| 450 | "Illegal SMBus block read size %d\n", |
| 451 | priv->len); |
| 452 | /* FIXME: Recover */ |
| 453 | priv->len = I2C_SMBUS_BLOCK_MAX; |
| 454 | } else { |
| 455 | dev_dbg(&priv->pci_dev->dev, |
| 456 | "SMBus block read size is %d\n", |
| 457 | priv->len); |
| 458 | } |
| 459 | priv->data[-1] = priv->len; |
| 460 | } |
| 461 | |
| 462 | /* Read next byte */ |
| 463 | if (priv->count < priv->len) |
| 464 | priv->data[priv->count++] = inb(SMBBLKDAT(priv)); |
| 465 | else |
| 466 | dev_dbg(&priv->pci_dev->dev, |
| 467 | "Discarding extra byte on block read\n"); |
| 468 | |
| 469 | /* Set LAST_BYTE for last byte of read transaction */ |
| 470 | if (priv->count == priv->len - 1) |
| 471 | outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE, |
| 472 | SMBHSTCNT(priv)); |
| 473 | } else if (priv->count < priv->len - 1) { |
| 474 | /* Write next byte, except for IRQ after last byte */ |
| 475 | outb_p(priv->data[++priv->count], SMBBLKDAT(priv)); |
| 476 | } |
| 477 | |
| 478 | /* Clear BYTE_DONE to continue with next byte */ |
| 479 | outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); |
| 480 | } |
| 481 | |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 482 | /* |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 483 | * There are two kinds of interrupts: |
| 484 | * |
| 485 | * 1) i801 signals transaction completion with one of these interrupts: |
| 486 | * INTR - Success |
| 487 | * DEV_ERR - Invalid command, NAK or communication timeout |
| 488 | * BUS_ERR - SMI# transaction collision |
| 489 | * FAILED - transaction was canceled due to a KILL request |
| 490 | * When any of these occur, update ->status and wake up the waitq. |
| 491 | * ->status must be cleared before kicking off the next transaction. |
| 492 | * |
| 493 | * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt |
| 494 | * occurs for each byte of a byte-by-byte to prepare the next byte. |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 495 | */ |
| 496 | static irqreturn_t i801_isr(int irq, void *dev_id) |
| 497 | { |
| 498 | struct i801_priv *priv = dev_id; |
| 499 | u16 pcists; |
| 500 | u8 status; |
| 501 | |
| 502 | /* Confirm this is our interrupt */ |
| 503 | pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); |
| 504 | if (!(pcists & SMBPCISTS_INTS)) |
| 505 | return IRQ_NONE; |
| 506 | |
| 507 | status = inb_p(SMBHSTSTS(priv)); |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 508 | if (status & SMBHSTSTS_BYTE_DONE) |
| 509 | i801_isr_byte_done(priv); |
| 510 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 511 | /* |
| 512 | * Clear irq sources and report transaction result. |
| 513 | * ->status must be cleared before the next transaction is started. |
| 514 | */ |
| 515 | status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; |
| 516 | if (status) { |
| 517 | outb_p(status, SMBHSTSTS(priv)); |
| 518 | priv->status |= status; |
| 519 | wake_up(&priv->waitq); |
| 520 | } |
| 521 | |
| 522 | return IRQ_HANDLED; |
| 523 | } |
| 524 | |
| 525 | /* |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 526 | * For "byte-by-byte" block transactions: |
| 527 | * I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1 |
| 528 | * I2C read uses cmd=I801_I2C_BLOCK_DATA |
| 529 | */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 530 | static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, |
| 531 | union i2c_smbus_data *data, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 532 | char read_write, int command, |
| 533 | int hwpec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | { |
| 535 | int i, len; |
| 536 | int smbcmd; |
Jean Delvare | 2b73809 | 2008-07-14 22:38:32 +0200 | [diff] [blame] | 537 | int status; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 538 | int result; |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 539 | const struct i2c_adapter *adap = &priv->adapter; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 540 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 541 | result = i801_check_pre(priv); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 542 | if (result < 0) |
| 543 | return result; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 545 | len = data->block[0]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | |
| 547 | if (read_write == I2C_SMBUS_WRITE) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 548 | outb_p(len, SMBHSTDAT0(priv)); |
| 549 | outb_p(data->block[1], SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | } |
| 551 | |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 552 | if (command == I2C_SMBUS_I2C_BLOCK_DATA && |
| 553 | read_write == I2C_SMBUS_READ) |
| 554 | smbcmd = I801_I2C_BLOCK_DATA; |
| 555 | else |
| 556 | smbcmd = I801_BLOCK_DATA; |
| 557 | |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 558 | if (priv->features & FEATURE_IRQ) { |
| 559 | priv->is_read = (read_write == I2C_SMBUS_READ); |
| 560 | if (len == 1 && priv->is_read) |
| 561 | smbcmd |= SMBHSTCNT_LAST_BYTE; |
| 562 | priv->cmd = smbcmd | SMBHSTCNT_INTREN; |
| 563 | priv->len = len; |
| 564 | priv->count = 0; |
| 565 | priv->data = &data->block[1]; |
| 566 | |
| 567 | outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv)); |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 568 | result = wait_event_timeout(priv->waitq, |
| 569 | (status = priv->status), |
| 570 | adap->timeout); |
| 571 | if (!result) { |
| 572 | status = -ETIMEDOUT; |
| 573 | dev_warn(&priv->pci_dev->dev, |
| 574 | "Timeout waiting for interrupt!\n"); |
| 575 | } |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 576 | priv->status = 0; |
| 577 | return i801_check_post(priv, status); |
| 578 | } |
| 579 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | for (i = 1; i <= len; i++) { |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 581 | if (i == len && read_write == I2C_SMBUS_READ) |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 582 | smbcmd |= SMBHSTCNT_LAST_BYTE; |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 583 | outb_p(smbcmd, SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | if (i == 1) |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 586 | outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 587 | SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 589 | status = i801_wait_byte_done(priv); |
| 590 | if (status) |
| 591 | goto exit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 593 | if (i == 1 && read_write == I2C_SMBUS_READ |
| 594 | && command != I2C_SMBUS_I2C_BLOCK_DATA) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 595 | len = inb_p(SMBHSTDAT0(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 596 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 597 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 598 | "Illegal SMBus block read size %d\n", |
| 599 | len); |
| 600 | /* Recover */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 601 | while (inb_p(SMBHSTSTS(priv)) & |
| 602 | SMBHSTSTS_HOST_BUSY) |
| 603 | outb_p(SMBHSTSTS_BYTE_DONE, |
| 604 | SMBHSTSTS(priv)); |
| 605 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 606 | return -EPROTO; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 607 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | data->block[0] = len; |
| 609 | } |
| 610 | |
| 611 | /* Retrieve/store value in SMBBLKDAT */ |
| 612 | if (read_write == I2C_SMBUS_READ) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 613 | data->block[i] = inb_p(SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | if (read_write == I2C_SMBUS_WRITE && i+1 <= len) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 615 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 617 | /* signals SMBBLKDAT ready */ |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 618 | outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 619 | } |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 620 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 621 | status = i801_wait_intr(priv); |
| 622 | exit: |
| 623 | return i801_check_post(priv, status); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 624 | } |
| 625 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 626 | static int i801_set_block_buffer_mode(struct i801_priv *priv) |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 627 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 628 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv)); |
| 629 | if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0) |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 630 | return -EIO; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 631 | return 0; |
| 632 | } |
| 633 | |
| 634 | /* Block transaction function */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 635 | static int i801_block_transaction(struct i801_priv *priv, |
| 636 | union i2c_smbus_data *data, char read_write, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 637 | int command, int hwpec) |
| 638 | { |
| 639 | int result = 0; |
| 640 | unsigned char hostc; |
| 641 | |
| 642 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { |
| 643 | if (read_write == I2C_SMBUS_WRITE) { |
| 644 | /* set I2C_EN bit in configuration register */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 645 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); |
| 646 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 647 | hostc | SMBHSTCFG_I2C_EN); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 648 | } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { |
| 649 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 650 | "I2C block read is unsupported!\n"); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 651 | return -EOPNOTSUPP; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 652 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | } |
| 654 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 655 | if (read_write == I2C_SMBUS_WRITE |
| 656 | || command == I2C_SMBUS_I2C_BLOCK_DATA) { |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 657 | if (data->block[0] < 1) |
| 658 | data->block[0] = 1; |
| 659 | if (data->block[0] > I2C_SMBUS_BLOCK_MAX) |
| 660 | data->block[0] = I2C_SMBUS_BLOCK_MAX; |
| 661 | } else { |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 662 | data->block[0] = 32; /* max for SMBus block reads */ |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 663 | } |
| 664 | |
Jean Delvare | c074c39 | 2010-03-13 20:56:53 +0100 | [diff] [blame] | 665 | /* Experience has shown that the block buffer can only be used for |
| 666 | SMBus (not I2C) block transactions, even though the datasheet |
| 667 | doesn't mention this limitation. */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 668 | if ((priv->features & FEATURE_BLOCK_BUFFER) |
Jean Delvare | c074c39 | 2010-03-13 20:56:53 +0100 | [diff] [blame] | 669 | && command != I2C_SMBUS_I2C_BLOCK_DATA |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 670 | && i801_set_block_buffer_mode(priv) == 0) |
| 671 | result = i801_block_transaction_by_block(priv, data, |
| 672 | read_write, hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 673 | else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 674 | result = i801_block_transaction_byte_by_byte(priv, data, |
| 675 | read_write, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 676 | command, hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 677 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 678 | if (command == I2C_SMBUS_I2C_BLOCK_DATA |
| 679 | && read_write == I2C_SMBUS_WRITE) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | /* restore saved configuration register value */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 681 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | } |
| 683 | return result; |
| 684 | } |
| 685 | |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 686 | /* Return negative errno on error. */ |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 687 | static s32 i801_access(struct i2c_adapter *adap, u16 addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | unsigned short flags, char read_write, u8 command, |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 689 | int size, union i2c_smbus_data *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | { |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 691 | int hwpec; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | int block = 0; |
| 693 | int ret, xact = 0; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 694 | struct i801_priv *priv = i2c_get_adapdata(adap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 696 | hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 697 | && size != I2C_SMBUS_QUICK |
| 698 | && size != I2C_SMBUS_I2C_BLOCK_DATA; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | |
| 700 | switch (size) { |
| 701 | case I2C_SMBUS_QUICK: |
| 702 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 703 | SMBHSTADD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | xact = I801_QUICK; |
| 705 | break; |
| 706 | case I2C_SMBUS_BYTE: |
| 707 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 708 | SMBHSTADD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | if (read_write == I2C_SMBUS_WRITE) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 710 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | xact = I801_BYTE; |
| 712 | break; |
| 713 | case I2C_SMBUS_BYTE_DATA: |
| 714 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 715 | SMBHSTADD(priv)); |
| 716 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | if (read_write == I2C_SMBUS_WRITE) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 718 | outb_p(data->byte, SMBHSTDAT0(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | xact = I801_BYTE_DATA; |
| 720 | break; |
| 721 | case I2C_SMBUS_WORD_DATA: |
| 722 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 723 | SMBHSTADD(priv)); |
| 724 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | if (read_write == I2C_SMBUS_WRITE) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 726 | outb_p(data->word & 0xff, SMBHSTDAT0(priv)); |
| 727 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | } |
| 729 | xact = I801_WORD_DATA; |
| 730 | break; |
| 731 | case I2C_SMBUS_BLOCK_DATA: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 733 | SMBHSTADD(priv)); |
| 734 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | block = 1; |
| 736 | break; |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 737 | case I2C_SMBUS_I2C_BLOCK_DATA: |
| 738 | /* NB: page 240 of ICH5 datasheet shows that the R/#W |
| 739 | * bit should be cleared here, even when reading */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 740 | outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 741 | if (read_write == I2C_SMBUS_READ) { |
| 742 | /* NB: page 240 of ICH5 datasheet also shows |
| 743 | * that DATA1 is the cmd field when reading */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 744 | outb_p(command, SMBHSTDAT1(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 745 | } else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 746 | outb_p(command, SMBHSTCMD(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 747 | block = 1; |
| 748 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | default: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 750 | dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", |
| 751 | size); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 752 | return -EOPNOTSUPP; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | } |
| 754 | |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 755 | if (hwpec) /* enable/disable hardware PEC */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 756 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv)); |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 757 | else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 758 | outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), |
| 759 | SMBAUXCTL(priv)); |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 760 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 761 | if (block) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 762 | ret = i801_block_transaction(priv, data, read_write, size, |
| 763 | hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 764 | else |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 765 | ret = i801_transaction(priv, xact); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | |
Jean Delvare | c79cfba | 2006-04-20 02:43:18 -0700 | [diff] [blame] | 767 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 768 | time, so we forcibly disable it after every transaction. Turn off |
| 769 | E32B for the same reason. */ |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 770 | if (hwpec || block) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 771 | outb_p(inb_p(SMBAUXCTL(priv)) & |
| 772 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
Jean Delvare | c79cfba | 2006-04-20 02:43:18 -0700 | [diff] [blame] | 773 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 774 | if (block) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 775 | return ret; |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 776 | if (ret) |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 777 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) |
| 779 | return 0; |
| 780 | |
| 781 | switch (xact & 0x7f) { |
| 782 | case I801_BYTE: /* Result put in SMBHSTDAT0 */ |
| 783 | case I801_BYTE_DATA: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 784 | data->byte = inb_p(SMBHSTDAT0(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | break; |
| 786 | case I801_WORD_DATA: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 787 | data->word = inb_p(SMBHSTDAT0(priv)) + |
| 788 | (inb_p(SMBHSTDAT1(priv)) << 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | break; |
| 790 | } |
| 791 | return 0; |
| 792 | } |
| 793 | |
| 794 | |
| 795 | static u32 i801_func(struct i2c_adapter *adapter) |
| 796 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 797 | struct i801_priv *priv = i2c_get_adapdata(adapter); |
| 798 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
Jean Delvare | 369f6f4 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 800 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
| 801 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 802 | ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | |
| 803 | ((priv->features & FEATURE_I2C_BLOCK_READ) ? |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 804 | I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | } |
| 806 | |
Jean Delvare | 8f9082c | 2006-09-03 22:39:46 +0200 | [diff] [blame] | 807 | static const struct i2c_algorithm smbus_algorithm = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | .smbus_xfer = i801_access, |
| 809 | .functionality = i801_func, |
| 810 | }; |
| 811 | |
Jingoo Han | 392debf | 2013-12-03 08:11:20 +0900 | [diff] [blame] | 812 | static const struct pci_device_id i801_ids[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, |
| 814 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, |
| 815 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, |
| 816 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) }, |
| 817 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) }, |
| 818 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) }, |
| 819 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) }, |
| 820 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) }, |
| 821 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) }, |
Jason Gaston | b0a70b5 | 2005-04-16 15:24:45 -0700 | [diff] [blame] | 822 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, |
Jason Gaston | 8254fc4 | 2006-01-09 10:58:08 -0800 | [diff] [blame] | 823 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, |
Jason Gaston | adbc2a1 | 2006-11-22 15:19:12 -0800 | [diff] [blame] | 824 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) }, |
Seth Heasley | cb04e95 | 2010-10-04 13:27:14 -0700 | [diff] [blame] | 825 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) }, |
Gaston, Jason D | d28dc71 | 2008-02-24 20:03:42 +0100 | [diff] [blame] | 826 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, |
| 827 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, |
Seth Heasley | cb04e95 | 2010-10-04 13:27:14 -0700 | [diff] [blame] | 828 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, |
| 829 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, |
Seth Heasley | e30d985 | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 830 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) }, |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 831 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) }, |
| 832 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) }, |
| 833 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) }, |
Seth Heasley | 662cda8 | 2011-03-20 14:50:53 +0100 | [diff] [blame] | 834 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) }, |
Seth Heasley | 6e2a851 | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 835 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) }, |
Seth Heasley | 062737f | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 836 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) }, |
James Ralston | 4a8f1dd | 2012-09-10 10:14:02 +0200 | [diff] [blame] | 837 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) }, |
Seth Heasley | c2db409c | 2013-01-30 15:25:32 +0000 | [diff] [blame] | 838 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) }, |
James Ralston | a3fc0ff | 2013-02-14 09:15:33 +0000 | [diff] [blame] | 839 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) }, |
| 840 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) }, |
| 841 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) }, |
| 842 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) }, |
Seth Heasley | f39901c | 2013-06-19 16:59:57 -0700 | [diff] [blame] | 843 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) }, |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 844 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) }, |
James Ralston | afc6592 | 2013-11-04 09:29:48 -0800 | [diff] [blame] | 845 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) }, |
Chew, Kean ho | 1b31e9b | 2014-03-01 00:03:56 +0800 | [diff] [blame] | 846 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) }, |
Alan Cox | 39e8e30 | 2014-08-19 17:37:28 +0300 | [diff] [blame] | 847 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) }, |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 848 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 849 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | { 0, } |
| 851 | }; |
| 852 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 853 | MODULE_DEVICE_TABLE(pci, i801_ids); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 855 | #if defined CONFIG_X86 && defined CONFIG_DMI |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 856 | static unsigned char apanel_addr; |
| 857 | |
| 858 | /* Scan the system ROM for the signature "FJKEYINF" */ |
| 859 | static __init const void __iomem *bios_signature(const void __iomem *bios) |
| 860 | { |
| 861 | ssize_t offset; |
| 862 | const unsigned char signature[] = "FJKEYINF"; |
| 863 | |
| 864 | for (offset = 0; offset < 0x10000; offset += 0x10) { |
| 865 | if (check_signature(bios + offset, signature, |
| 866 | sizeof(signature)-1)) |
| 867 | return bios + offset; |
| 868 | } |
| 869 | return NULL; |
| 870 | } |
| 871 | |
| 872 | static void __init input_apanel_init(void) |
| 873 | { |
| 874 | void __iomem *bios; |
| 875 | const void __iomem *p; |
| 876 | |
| 877 | bios = ioremap(0xF0000, 0x10000); /* Can't fail */ |
| 878 | p = bios_signature(bios); |
| 879 | if (p) { |
| 880 | /* just use the first address */ |
| 881 | apanel_addr = readb(p + 8 + 3) >> 1; |
| 882 | } |
| 883 | iounmap(bios); |
| 884 | } |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 885 | |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 886 | struct dmi_onboard_device_info { |
| 887 | const char *name; |
| 888 | u8 type; |
| 889 | unsigned short i2c_addr; |
| 890 | const char *i2c_type; |
| 891 | }; |
| 892 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 893 | static const struct dmi_onboard_device_info dmi_devices[] = { |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 894 | { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" }, |
| 895 | { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" }, |
| 896 | { "Hades", DMI_DEV_TYPE_OTHER, 0x73, "fschds" }, |
| 897 | }; |
| 898 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 899 | static void dmi_check_onboard_device(u8 type, const char *name, |
| 900 | struct i2c_adapter *adap) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 901 | { |
| 902 | int i; |
| 903 | struct i2c_board_info info; |
| 904 | |
| 905 | for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) { |
| 906 | /* & ~0x80, ignore enabled/disabled bit */ |
| 907 | if ((type & ~0x80) != dmi_devices[i].type) |
| 908 | continue; |
Jean Delvare | faabd47 | 2010-07-09 16:22:51 +0200 | [diff] [blame] | 909 | if (strcasecmp(name, dmi_devices[i].name)) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 910 | continue; |
| 911 | |
| 912 | memset(&info, 0, sizeof(struct i2c_board_info)); |
| 913 | info.addr = dmi_devices[i].i2c_addr; |
| 914 | strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); |
| 915 | i2c_new_device(adap, &info); |
| 916 | break; |
| 917 | } |
| 918 | } |
| 919 | |
| 920 | /* We use our own function to check for onboard devices instead of |
| 921 | dmi_find_device() as some buggy BIOS's have the devices we are interested |
| 922 | in marked as disabled */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 923 | static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 924 | { |
| 925 | int i, count; |
| 926 | |
| 927 | if (dm->type != 10) |
| 928 | return; |
| 929 | |
| 930 | count = (dm->length - sizeof(struct dmi_header)) / 2; |
| 931 | for (i = 0; i < count; i++) { |
| 932 | const u8 *d = (char *)(dm + 1) + (i * 2); |
| 933 | const char *name = ((char *) dm) + dm->length; |
| 934 | u8 type = d[0]; |
| 935 | u8 s = d[1]; |
| 936 | |
| 937 | if (!s) |
| 938 | continue; |
| 939 | s--; |
| 940 | while (s > 0 && name[0]) { |
| 941 | name += strlen(name) + 1; |
| 942 | s--; |
| 943 | } |
| 944 | if (name[0] == 0) /* Bogus string reference */ |
| 945 | continue; |
| 946 | |
| 947 | dmi_check_onboard_device(type, name, adap); |
| 948 | } |
| 949 | } |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 950 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 951 | /* Register optional slaves */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 952 | static void i801_probe_optional_slaves(struct i801_priv *priv) |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 953 | { |
| 954 | /* Only register slaves on main SMBus channel */ |
| 955 | if (priv->features & FEATURE_IDF) |
| 956 | return; |
| 957 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 958 | if (apanel_addr) { |
| 959 | struct i2c_board_info info; |
| 960 | |
| 961 | memset(&info, 0, sizeof(struct i2c_board_info)); |
| 962 | info.addr = apanel_addr; |
| 963 | strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); |
| 964 | i2c_new_device(&priv->adapter, &info); |
| 965 | } |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 966 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 967 | if (dmi_name_in_vendors("FUJITSU")) |
| 968 | dmi_walk(dmi_check_onboard_devices, &priv->adapter); |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 969 | } |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 970 | #else |
| 971 | static void __init input_apanel_init(void) {} |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 972 | static void i801_probe_optional_slaves(struct i801_priv *priv) {} |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 973 | #endif /* CONFIG_X86 && CONFIG_DMI */ |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 974 | |
Jean Delvare | 79e3e5b | 2012-10-28 21:37:01 +0100 | [diff] [blame] | 975 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
| 976 | defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 977 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { |
| 978 | .gpio_chip = "gpio_ich", |
| 979 | .values = { 0x02, 0x03 }, |
| 980 | .n_values = 2, |
| 981 | .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD }, |
| 982 | .gpios = { 52, 53 }, |
| 983 | .n_gpios = 2, |
| 984 | }; |
| 985 | |
| 986 | static struct i801_mux_config i801_mux_config_asus_z8_d18 = { |
| 987 | .gpio_chip = "gpio_ich", |
| 988 | .values = { 0x02, 0x03, 0x01 }, |
| 989 | .n_values = 3, |
| 990 | .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD }, |
| 991 | .gpios = { 52, 53 }, |
| 992 | .n_gpios = 2, |
| 993 | }; |
| 994 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 995 | static const struct dmi_system_id mux_dmi_table[] = { |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 996 | { |
| 997 | .matches = { |
| 998 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 999 | DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"), |
| 1000 | }, |
| 1001 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1002 | }, |
| 1003 | { |
| 1004 | .matches = { |
| 1005 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1006 | DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"), |
| 1007 | }, |
| 1008 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1009 | }, |
| 1010 | { |
| 1011 | .matches = { |
| 1012 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1013 | DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"), |
| 1014 | }, |
| 1015 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1016 | }, |
| 1017 | { |
| 1018 | .matches = { |
| 1019 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1020 | DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"), |
| 1021 | }, |
| 1022 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1023 | }, |
| 1024 | { |
| 1025 | .matches = { |
| 1026 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1027 | DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"), |
| 1028 | }, |
| 1029 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1030 | }, |
| 1031 | { |
| 1032 | .matches = { |
| 1033 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1034 | DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"), |
| 1035 | }, |
| 1036 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1037 | }, |
| 1038 | { |
| 1039 | .matches = { |
| 1040 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1041 | DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"), |
| 1042 | }, |
| 1043 | .driver_data = &i801_mux_config_asus_z8_d18, |
| 1044 | }, |
| 1045 | { |
| 1046 | .matches = { |
| 1047 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1048 | DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"), |
| 1049 | }, |
| 1050 | .driver_data = &i801_mux_config_asus_z8_d18, |
| 1051 | }, |
| 1052 | { |
| 1053 | .matches = { |
| 1054 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1055 | DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"), |
| 1056 | }, |
| 1057 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1058 | }, |
| 1059 | { } |
| 1060 | }; |
| 1061 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1062 | /* Setup multiplexing if needed */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1063 | static int i801_add_mux(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1064 | { |
| 1065 | struct device *dev = &priv->adapter.dev; |
| 1066 | const struct i801_mux_config *mux_config; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1067 | struct i2c_mux_gpio_platform_data gpio_data; |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1068 | int err; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1069 | |
| 1070 | if (!priv->mux_drvdata) |
| 1071 | return 0; |
| 1072 | mux_config = priv->mux_drvdata; |
| 1073 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1074 | /* Prepare the platform data */ |
| 1075 | memset(&gpio_data, 0, sizeof(struct i2c_mux_gpio_platform_data)); |
| 1076 | gpio_data.parent = priv->adapter.nr; |
| 1077 | gpio_data.values = mux_config->values; |
| 1078 | gpio_data.n_values = mux_config->n_values; |
| 1079 | gpio_data.classes = mux_config->classes; |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1080 | gpio_data.gpio_chip = mux_config->gpio_chip; |
| 1081 | gpio_data.gpios = mux_config->gpios; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1082 | gpio_data.n_gpios = mux_config->n_gpios; |
| 1083 | gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; |
| 1084 | |
| 1085 | /* Register the mux device */ |
| 1086 | priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1087 | PLATFORM_DEVID_AUTO, &gpio_data, |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1088 | sizeof(struct i2c_mux_gpio_platform_data)); |
| 1089 | if (IS_ERR(priv->mux_pdev)) { |
| 1090 | err = PTR_ERR(priv->mux_pdev); |
| 1091 | priv->mux_pdev = NULL; |
| 1092 | dev_err(dev, "Failed to register i2c-mux-gpio device\n"); |
| 1093 | return err; |
| 1094 | } |
| 1095 | |
| 1096 | return 0; |
| 1097 | } |
| 1098 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1099 | static void i801_del_mux(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1100 | { |
| 1101 | if (priv->mux_pdev) |
| 1102 | platform_device_unregister(priv->mux_pdev); |
| 1103 | } |
| 1104 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1105 | static unsigned int i801_get_adapter_class(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1106 | { |
| 1107 | const struct dmi_system_id *id; |
| 1108 | const struct i801_mux_config *mux_config; |
| 1109 | unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD; |
| 1110 | int i; |
| 1111 | |
| 1112 | id = dmi_first_match(mux_dmi_table); |
| 1113 | if (id) { |
Jean Delvare | 28901f5 | 2012-10-28 21:37:01 +0100 | [diff] [blame] | 1114 | /* Remove branch classes from trunk */ |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1115 | mux_config = id->driver_data; |
| 1116 | for (i = 0; i < mux_config->n_values; i++) |
| 1117 | class &= ~mux_config->classes[i]; |
| 1118 | |
| 1119 | /* Remember for later */ |
| 1120 | priv->mux_drvdata = mux_config; |
| 1121 | } |
| 1122 | |
| 1123 | return class; |
| 1124 | } |
| 1125 | #else |
| 1126 | static inline int i801_add_mux(struct i801_priv *priv) { return 0; } |
| 1127 | static inline void i801_del_mux(struct i801_priv *priv) { } |
| 1128 | |
| 1129 | static inline unsigned int i801_get_adapter_class(struct i801_priv *priv) |
| 1130 | { |
| 1131 | return I2C_CLASS_HWMON | I2C_CLASS_SPD; |
| 1132 | } |
| 1133 | #endif |
| 1134 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1135 | static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | { |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1137 | unsigned char temp; |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1138 | int err, i; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1139 | struct i801_priv *priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1141 | priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1142 | if (!priv) |
| 1143 | return -ENOMEM; |
| 1144 | |
| 1145 | i2c_set_adapdata(&priv->adapter, priv); |
| 1146 | priv->adapter.owner = THIS_MODULE; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1147 | priv->adapter.class = i801_get_adapter_class(priv); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1148 | priv->adapter.algo = &smbus_algorithm; |
| 1149 | |
| 1150 | priv->pci_dev = dev; |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1151 | switch (dev->device) { |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1152 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: |
| 1153 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1: |
| 1154 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2: |
James Ralston | a3fc0ff | 2013-02-14 09:15:33 +0000 | [diff] [blame] | 1155 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0: |
| 1156 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1: |
| 1157 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2: |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1158 | priv->features |= FEATURE_IDF; |
| 1159 | /* fall through */ |
Jean Delvare | e0e8398c | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1160 | default: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1161 | priv->features |= FEATURE_I2C_BLOCK_READ; |
Jean Delvare | 6676a84 | 2012-12-16 21:11:55 +0100 | [diff] [blame] | 1162 | priv->features |= FEATURE_IRQ; |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1163 | /* fall through */ |
| 1164 | case PCI_DEVICE_ID_INTEL_82801DB_3: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1165 | priv->features |= FEATURE_SMBUS_PEC; |
| 1166 | priv->features |= FEATURE_BLOCK_BUFFER; |
Jean Delvare | e0e8398c | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1167 | /* fall through */ |
| 1168 | case PCI_DEVICE_ID_INTEL_82801CA_3: |
| 1169 | case PCI_DEVICE_ID_INTEL_82801BA_2: |
| 1170 | case PCI_DEVICE_ID_INTEL_82801AB_3: |
| 1171 | case PCI_DEVICE_ID_INTEL_82801AA_3: |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1172 | break; |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1173 | } |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1174 | |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1175 | /* Disable features on user request */ |
| 1176 | for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1177 | if (priv->features & disable_features & (1 << i)) |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1178 | dev_notice(&dev->dev, "%s disabled by user\n", |
| 1179 | i801_feature_names[i]); |
| 1180 | } |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1181 | priv->features &= ~disable_features; |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1182 | |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1183 | err = pci_enable_device(dev); |
| 1184 | if (err) { |
| 1185 | dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", |
| 1186 | err); |
| 1187 | goto exit; |
| 1188 | } |
| 1189 | |
| 1190 | /* Determine the address of the SMBus area */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1191 | priv->smba = pci_resource_start(dev, SMBBAR); |
| 1192 | if (!priv->smba) { |
Jarkko Nikula | 9cbbf3d | 2015-02-13 15:52:21 +0200 | [diff] [blame] | 1193 | dev_err(&dev->dev, |
| 1194 | "SMBus base address uninitialized, upgrade BIOS\n"); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1195 | err = -ENODEV; |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1196 | goto exit; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1197 | } |
| 1198 | |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 1199 | err = acpi_check_resource_conflict(&dev->resource[SMBBAR]); |
Jean Delvare | 18669ea | 2009-10-04 22:53:45 +0200 | [diff] [blame] | 1200 | if (err) { |
| 1201 | err = -ENODEV; |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 1202 | goto exit; |
Jean Delvare | 18669ea | 2009-10-04 22:53:45 +0200 | [diff] [blame] | 1203 | } |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 1204 | |
Jarkko Nikula | 256493c | 2015-02-13 15:52:22 +0200 | [diff] [blame] | 1205 | err = pci_request_region(dev, SMBBAR, dev_driver_string(&dev->dev)); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1206 | if (err) { |
Jarkko Nikula | 9cbbf3d | 2015-02-13 15:52:21 +0200 | [diff] [blame] | 1207 | dev_err(&dev->dev, |
| 1208 | "Failed to request SMBus region 0x%lx-0x%Lx\n", |
| 1209 | priv->smba, |
Andrew Morton | 598736c | 2006-06-30 01:56:20 -0700 | [diff] [blame] | 1210 | (unsigned long long)pci_resource_end(dev, SMBBAR)); |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1211 | goto exit; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1212 | } |
| 1213 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1214 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp); |
| 1215 | priv->original_hstcfg = temp; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1216 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ |
| 1217 | if (!(temp & SMBHSTCFG_HST_EN)) { |
| 1218 | dev_info(&dev->dev, "Enabling SMBus device\n"); |
| 1219 | temp |= SMBHSTCFG_HST_EN; |
| 1220 | } |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1221 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1222 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1223 | if (temp & SMBHSTCFG_SMB_SMI_EN) { |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1224 | dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1225 | /* Disable SMBus interrupt feature if SMBus using SMI# */ |
| 1226 | priv->features &= ~FEATURE_IRQ; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1227 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1228 | |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1229 | /* Clear special mode bits */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1230 | if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) |
| 1231 | outb_p(inb_p(SMBAUXCTL(priv)) & |
| 1232 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1233 | |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 1234 | /* Default timeout in interrupt mode: 200 ms */ |
| 1235 | priv->adapter.timeout = HZ / 5; |
| 1236 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1237 | if (priv->features & FEATURE_IRQ) { |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 1238 | u16 pcictl, pcists; |
| 1239 | |
| 1240 | /* Complain if an interrupt is already pending */ |
| 1241 | pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); |
| 1242 | if (pcists & SMBPCISTS_INTS) |
| 1243 | dev_warn(&dev->dev, "An interrupt is pending!\n"); |
| 1244 | |
| 1245 | /* Check if interrupts have been disabled */ |
| 1246 | pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl); |
| 1247 | if (pcictl & SMBPCICTL_INTDIS) { |
| 1248 | dev_info(&dev->dev, "Interrupts are disabled\n"); |
| 1249 | priv->features &= ~FEATURE_IRQ; |
| 1250 | } |
| 1251 | } |
| 1252 | |
| 1253 | if (priv->features & FEATURE_IRQ) { |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1254 | init_waitqueue_head(&priv->waitq); |
| 1255 | |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1256 | err = devm_request_irq(&dev->dev, dev->irq, i801_isr, |
| 1257 | IRQF_SHARED, |
| 1258 | dev_driver_string(&dev->dev), priv); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1259 | if (err) { |
| 1260 | dev_err(&dev->dev, "Failed to allocate irq %d: %d\n", |
| 1261 | dev->irq, err); |
Jean Delvare | ae94471 | 2014-11-12 10:24:07 +0100 | [diff] [blame] | 1262 | priv->features &= ~FEATURE_IRQ; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1263 | } |
| 1264 | } |
Jean Delvare | ae94471 | 2014-11-12 10:24:07 +0100 | [diff] [blame] | 1265 | dev_info(&dev->dev, "SMBus using %s\n", |
| 1266 | priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling"); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1267 | |
Robert P. J. Day | 405ae7d | 2007-02-17 19:13:42 +0100 | [diff] [blame] | 1268 | /* set up the sysfs linkage to our parent device */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1269 | priv->adapter.dev.parent = &dev->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1270 | |
Jean Delvare | 7e2193a | 2009-12-06 17:06:27 +0100 | [diff] [blame] | 1271 | /* Retry up to 3 times on lost arbitration */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1272 | priv->adapter.retries = 3; |
Jean Delvare | 7e2193a | 2009-12-06 17:06:27 +0100 | [diff] [blame] | 1273 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1274 | snprintf(priv->adapter.name, sizeof(priv->adapter.name), |
| 1275 | "SMBus I801 adapter at %04lx", priv->smba); |
| 1276 | err = i2c_add_adapter(&priv->adapter); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1277 | if (err) { |
| 1278 | dev_err(&dev->dev, "Failed to add SMBus adapter\n"); |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1279 | goto exit_release; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1280 | } |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1281 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1282 | i801_probe_optional_slaves(priv); |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1283 | /* We ignore errors - multiplexing is optional */ |
| 1284 | i801_add_mux(priv); |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1285 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1286 | pci_set_drvdata(dev, priv); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1287 | |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1288 | return 0; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1289 | |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1290 | exit_release: |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1291 | pci_release_region(dev, SMBBAR); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1292 | exit: |
| 1293 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1294 | } |
| 1295 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1296 | static void i801_remove(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1297 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1298 | struct i801_priv *priv = pci_get_drvdata(dev); |
| 1299 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1300 | i801_del_mux(priv); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1301 | i2c_del_adapter(&priv->adapter); |
| 1302 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1303 | |
Jean Delvare | 6dcc19d | 2006-06-12 21:53:02 +0200 | [diff] [blame] | 1304 | pci_release_region(dev, SMBBAR); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1305 | |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1306 | /* |
| 1307 | * do not call pci_disable_device(dev) since it can cause hard hangs on |
| 1308 | * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) |
| 1309 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | } |
| 1311 | |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1312 | #ifdef CONFIG_PM |
| 1313 | static int i801_suspend(struct pci_dev *dev, pm_message_t mesg) |
| 1314 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1315 | struct i801_priv *priv = pci_get_drvdata(dev); |
| 1316 | |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1317 | pci_save_state(dev); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1318 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1319 | pci_set_power_state(dev, pci_choose_state(dev, mesg)); |
| 1320 | return 0; |
| 1321 | } |
| 1322 | |
| 1323 | static int i801_resume(struct pci_dev *dev) |
| 1324 | { |
| 1325 | pci_set_power_state(dev, PCI_D0); |
| 1326 | pci_restore_state(dev); |
Jarkko Nikula | f85da3f | 2015-02-13 15:52:24 +0200 | [diff] [blame^] | 1327 | return 0; |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1328 | } |
| 1329 | #else |
| 1330 | #define i801_suspend NULL |
| 1331 | #define i801_resume NULL |
| 1332 | #endif |
| 1333 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1334 | static struct pci_driver i801_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | .name = "i801_smbus", |
| 1336 | .id_table = i801_ids, |
| 1337 | .probe = i801_probe, |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1338 | .remove = i801_remove, |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1339 | .suspend = i801_suspend, |
| 1340 | .resume = i801_resume, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1341 | }; |
| 1342 | |
| 1343 | static int __init i2c_i801_init(void) |
| 1344 | { |
Jean Delvare | 6aa1464 | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1345 | if (dmi_name_in_vendors("FUJITSU")) |
| 1346 | input_apanel_init(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1347 | return pci_register_driver(&i801_driver); |
| 1348 | } |
| 1349 | |
| 1350 | static void __exit i2c_i801_exit(void) |
| 1351 | { |
| 1352 | pci_unregister_driver(&i801_driver); |
| 1353 | } |
| 1354 | |
Jean Delvare | 7c81c60 | 2014-01-29 20:40:08 +0100 | [diff] [blame] | 1355 | MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, Jean Delvare <jdelvare@suse.de>"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1356 | MODULE_DESCRIPTION("I801 SMBus driver"); |
| 1357 | MODULE_LICENSE("GPL"); |
| 1358 | |
| 1359 | module_init(i2c_i801_init); |
| 1360 | module_exit(i2c_i801_exit); |