blob: e027f47081034828b7fa212d4f736358bc9fb9eb [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea31012005-04-17 16:05:31 -05006 * www.emulex.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -05008 * *
9 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040010 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea31012005-04-17 16:05:31 -050020 *******************************************************************/
21
dea31012005-04-17 16:05:31 -050022#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
27#include <scsi/scsi_cmnd.h>
28#include <scsi/scsi_device.h>
29#include <scsi/scsi_host.h>
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -040030#include <scsi/scsi_transport_fc.h>
dea31012005-04-17 16:05:31 -050031
32#include "lpfc_hw.h"
33#include "lpfc_sli.h"
34#include "lpfc_disc.h"
35#include "lpfc_scsi.h"
36#include "lpfc.h"
37#include "lpfc_crtn.h"
38#include "lpfc_logmsg.h"
39#include "lpfc_compat.h"
40
41/*
42 * Define macro to log: Mailbox command x%x cannot issue Data
43 * This allows multiple uses of lpfc_msgBlk0311
44 * w/o perturbing log msg utility.
45 */
46#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
47 lpfc_printf_log(phba, \
48 KERN_INFO, \
49 LOG_MBOX | LOG_SLI, \
50 "%d:0311 Mailbox command x%x cannot issue " \
51 "Data: x%x x%x x%x\n", \
52 phba->brd_no, \
53 mb->mbxCommand, \
54 phba->hba_state, \
55 psli->sli_flag, \
56 flag);
57
58
59/* There are only four IOCB completion types. */
60typedef enum _lpfc_iocb_type {
61 LPFC_UNKNOWN_IOCB,
62 LPFC_UNSOL_IOCB,
63 LPFC_SOL_IOCB,
64 LPFC_ABORT_IOCB
65} lpfc_iocb_type;
66
67/*
68 * Translate the iocb command to an iocb command type used to decide the final
69 * disposition of each completed IOCB.
70 */
71static lpfc_iocb_type
72lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
73{
74 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
75
76 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
77 return 0;
78
79 switch (iocb_cmnd) {
80 case CMD_XMIT_SEQUENCE_CR:
81 case CMD_XMIT_SEQUENCE_CX:
82 case CMD_XMIT_BCAST_CN:
83 case CMD_XMIT_BCAST_CX:
84 case CMD_ELS_REQUEST_CR:
85 case CMD_ELS_REQUEST_CX:
86 case CMD_CREATE_XRI_CR:
87 case CMD_CREATE_XRI_CX:
88 case CMD_GET_RPI_CN:
89 case CMD_XMIT_ELS_RSP_CX:
90 case CMD_GET_RPI_CR:
91 case CMD_FCP_IWRITE_CR:
92 case CMD_FCP_IWRITE_CX:
93 case CMD_FCP_IREAD_CR:
94 case CMD_FCP_IREAD_CX:
95 case CMD_FCP_ICMND_CR:
96 case CMD_FCP_ICMND_CX:
97 case CMD_ADAPTER_MSG:
98 case CMD_ADAPTER_DUMP:
99 case CMD_XMIT_SEQUENCE64_CR:
100 case CMD_XMIT_SEQUENCE64_CX:
101 case CMD_XMIT_BCAST64_CN:
102 case CMD_XMIT_BCAST64_CX:
103 case CMD_ELS_REQUEST64_CR:
104 case CMD_ELS_REQUEST64_CX:
105 case CMD_FCP_IWRITE64_CR:
106 case CMD_FCP_IWRITE64_CX:
107 case CMD_FCP_IREAD64_CR:
108 case CMD_FCP_IREAD64_CX:
109 case CMD_FCP_ICMND64_CR:
110 case CMD_FCP_ICMND64_CX:
111 case CMD_GEN_REQUEST64_CR:
112 case CMD_GEN_REQUEST64_CX:
113 case CMD_XMIT_ELS_RSP64_CX:
114 type = LPFC_SOL_IOCB;
115 break;
116 case CMD_ABORT_XRI_CN:
117 case CMD_ABORT_XRI_CX:
118 case CMD_CLOSE_XRI_CN:
119 case CMD_CLOSE_XRI_CX:
120 case CMD_XRI_ABORTED_CX:
121 case CMD_ABORT_MXRI64_CN:
122 type = LPFC_ABORT_IOCB;
123 break;
124 case CMD_RCV_SEQUENCE_CX:
125 case CMD_RCV_ELS_REQ_CX:
126 case CMD_RCV_SEQUENCE64_CX:
127 case CMD_RCV_ELS_REQ64_CX:
128 type = LPFC_UNSOL_IOCB;
129 break;
130 default:
131 type = LPFC_UNKNOWN_IOCB;
132 break;
133 }
134
135 return type;
136}
137
138static int
139lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
140{
141 struct lpfc_sli *psli = &phba->sli;
142 MAILBOX_t *pmbox = &pmb->mb;
143 int i, rc;
144
145 for (i = 0; i < psli->num_rings; i++) {
146 phba->hba_state = LPFC_INIT_MBX_CMDS;
147 lpfc_config_ring(phba, i, pmb);
148 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
149 if (rc != MBX_SUCCESS) {
150 lpfc_printf_log(phba,
151 KERN_ERR,
152 LOG_INIT,
153 "%d:0446 Adapter failed to init, "
154 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
155 "ring %d\n",
156 phba->brd_no,
157 pmbox->mbxCommand,
158 pmbox->mbxStatus,
159 i);
160 phba->hba_state = LPFC_HBA_ERROR;
161 return -ENXIO;
162 }
163 }
164 return 0;
165}
166
167static int
168lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
169 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
170{
171 uint16_t iotag;
172
173 list_add_tail(&piocb->list, &pring->txcmplq);
174 pring->txcmplq_cnt++;
175 if (unlikely(pring->ringno == LPFC_ELS_RING))
176 mod_timer(&phba->els_tmofunc,
177 jiffies + HZ * (phba->fc_ratov << 1));
178
179 if (pring->fast_lookup) {
180 /* Setup fast lookup based on iotag for completion */
181 iotag = piocb->iocb.ulpIoTag;
182 if (iotag && (iotag < pring->fast_iotag))
183 *(pring->fast_lookup + iotag) = piocb;
184 else {
185
186 /* Cmd ring <ringno> put: iotag <iotag> greater then
187 configured max <fast_iotag> wd0 <icmd> */
188 lpfc_printf_log(phba,
189 KERN_ERR,
190 LOG_SLI,
191 "%d:0316 Cmd ring %d put: iotag x%x "
192 "greater then configured max x%x "
193 "wd0 x%x\n",
194 phba->brd_no,
195 pring->ringno, iotag,
196 pring->fast_iotag,
197 *(((uint32_t *)(&piocb->iocb)) + 7));
198 }
199 }
200 return (0);
201}
202
203static struct lpfc_iocbq *
204lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
205{
206 struct list_head *dlp;
207 struct lpfc_iocbq *cmd_iocb;
208
209 dlp = &pring->txq;
210 cmd_iocb = NULL;
211 list_remove_head((&pring->txq), cmd_iocb,
212 struct lpfc_iocbq,
213 list);
214 if (cmd_iocb) {
215 /* If the first ptr is not equal to the list header,
216 * deque the IOCBQ_t and return it.
217 */
218 pring->txq_cnt--;
219 }
220 return (cmd_iocb);
221}
222
223static IOCB_t *
224lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
225{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400226 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500227 uint32_t max_cmd_idx = pring->numCiocb;
228 IOCB_t *iocb = NULL;
229
230 if ((pring->next_cmdidx == pring->cmdidx) &&
231 (++pring->next_cmdidx >= max_cmd_idx))
232 pring->next_cmdidx = 0;
233
234 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
235
236 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
237
238 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
239 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
240 "%d:0315 Ring %d issue: portCmdGet %d "
241 "is bigger then cmd ring %d\n",
242 phba->brd_no, pring->ringno,
243 pring->local_getidx, max_cmd_idx);
244
245 phba->hba_state = LPFC_HBA_ERROR;
246 /*
247 * All error attention handlers are posted to
248 * worker thread
249 */
250 phba->work_ha |= HA_ERATT;
251 phba->work_hs = HS_FFER3;
252 if (phba->work_wait)
253 wake_up(phba->work_wait);
254
255 return NULL;
256 }
257
258 if (pring->local_getidx == pring->next_cmdidx)
259 return NULL;
260 }
261
262 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
263
264 return iocb;
265}
266
267static uint32_t
268lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
269{
270 uint32_t search_start;
271
272 if (pring->fast_lookup == NULL) {
273 pring->iotag_ctr++;
274 if (pring->iotag_ctr >= pring->iotag_max)
275 pring->iotag_ctr = 1;
276 return pring->iotag_ctr;
277 }
278
279 search_start = pring->iotag_ctr;
280
281 do {
282 pring->iotag_ctr++;
283 if (pring->iotag_ctr >= pring->fast_iotag)
284 pring->iotag_ctr = 1;
285
286 if (*(pring->fast_lookup + pring->iotag_ctr) == NULL)
287 return pring->iotag_ctr;
288
289 } while (pring->iotag_ctr != search_start);
290
291 /*
292 * Outstanding I/O count for ring <ringno> is at max <fast_iotag>
293 */
294 lpfc_printf_log(phba,
295 KERN_ERR,
296 LOG_SLI,
297 "%d:0318 Outstanding I/O count for ring %d is at max x%x\n",
298 phba->brd_no,
299 pring->ringno,
300 pring->fast_iotag);
301 return (0);
302}
303
304static void
305lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
306 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
307{
308 /*
309 * Allocate and set up an iotag
310 */
311 nextiocb->iocb.ulpIoTag =
312 lpfc_sli_next_iotag(phba, &phba->sli.ring[phba->sli.fcp_ring]);
313
314 /*
315 * Issue iocb command to adapter
316 */
317 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
318 wmb();
319 pring->stats.iocb_cmd++;
320
321 /*
322 * If there is no completion routine to call, we can release the
323 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
324 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
325 */
326 if (nextiocb->iocb_cmpl)
327 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
328 else {
329 list_add_tail(&nextiocb->list, &phba->lpfc_iocb_list);
330 }
331
332 /*
333 * Let the HBA know what IOCB slot will be the next one the
334 * driver will put a command into.
335 */
336 pring->cmdidx = pring->next_cmdidx;
337 writeb(pring->cmdidx, phba->MBslimaddr
338 + (SLIMOFF + (pring->ringno * 2)) * 4);
339}
340
341static void
342lpfc_sli_update_full_ring(struct lpfc_hba * phba,
343 struct lpfc_sli_ring *pring)
344{
345 int ringno = pring->ringno;
346
347 pring->flag |= LPFC_CALL_RING_AVAILABLE;
348
349 wmb();
350
351 /*
352 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
353 * The HBA will tell us when an IOCB entry is available.
354 */
355 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
356 readl(phba->CAregaddr); /* flush */
357
358 pring->stats.iocb_cmd_full++;
359}
360
361static void
362lpfc_sli_update_ring(struct lpfc_hba * phba,
363 struct lpfc_sli_ring *pring)
364{
365 int ringno = pring->ringno;
366
367 /*
368 * Tell the HBA that there is work to do in this ring.
369 */
370 wmb();
371 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
372 readl(phba->CAregaddr); /* flush */
373}
374
375static void
376lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
377{
378 IOCB_t *iocb;
379 struct lpfc_iocbq *nextiocb;
380
381 /*
382 * Check to see if:
383 * (a) there is anything on the txq to send
384 * (b) link is up
385 * (c) link attention events can be processed (fcp ring only)
386 * (d) IOCB processing is not blocked by the outstanding mbox command.
387 */
388 if (pring->txq_cnt &&
389 (phba->hba_state > LPFC_LINK_DOWN) &&
390 (pring->ringno != phba->sli.fcp_ring ||
391 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
392 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
393
394 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
395 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
396 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
397
398 if (iocb)
399 lpfc_sli_update_ring(phba, pring);
400 else
401 lpfc_sli_update_full_ring(phba, pring);
402 }
403
404 return;
405}
406
407/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
408static void
409lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
410{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400411 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
dea31012005-04-17 16:05:31 -0500412
413 /* If the ring is active, flag it */
414 if (phba->sli.ring[ringno].cmdringaddr) {
415 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
416 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
417 /*
418 * Force update of the local copy of cmdGetInx
419 */
420 phba->sli.ring[ringno].local_getidx
421 = le32_to_cpu(pgp->cmdGetInx);
422 spin_lock_irq(phba->host->host_lock);
423 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
424 spin_unlock_irq(phba->host->host_lock);
425 }
426 }
427}
428
429static int
430lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
431{
432 uint8_t ret;
433
434 switch (mbxCommand) {
435 case MBX_LOAD_SM:
436 case MBX_READ_NV:
437 case MBX_WRITE_NV:
438 case MBX_RUN_BIU_DIAG:
439 case MBX_INIT_LINK:
440 case MBX_DOWN_LINK:
441 case MBX_CONFIG_LINK:
442 case MBX_CONFIG_RING:
443 case MBX_RESET_RING:
444 case MBX_READ_CONFIG:
445 case MBX_READ_RCONFIG:
446 case MBX_READ_SPARM:
447 case MBX_READ_STATUS:
448 case MBX_READ_RPI:
449 case MBX_READ_XRI:
450 case MBX_READ_REV:
451 case MBX_READ_LNK_STAT:
452 case MBX_REG_LOGIN:
453 case MBX_UNREG_LOGIN:
454 case MBX_READ_LA:
455 case MBX_CLEAR_LA:
456 case MBX_DUMP_MEMORY:
457 case MBX_DUMP_CONTEXT:
458 case MBX_RUN_DIAGS:
459 case MBX_RESTART:
460 case MBX_UPDATE_CFG:
461 case MBX_DOWN_LOAD:
462 case MBX_DEL_LD_ENTRY:
463 case MBX_RUN_PROGRAM:
464 case MBX_SET_MASK:
465 case MBX_SET_SLIM:
466 case MBX_UNREG_D_ID:
467 case MBX_CONFIG_FARP:
468 case MBX_LOAD_AREA:
469 case MBX_RUN_BIU_DIAG64:
470 case MBX_CONFIG_PORT:
471 case MBX_READ_SPARM64:
472 case MBX_READ_RPI64:
473 case MBX_REG_LOGIN64:
474 case MBX_READ_LA64:
475 case MBX_FLASH_WR_ULA:
476 case MBX_SET_DEBUG:
477 case MBX_LOAD_EXP_ROM:
478 ret = mbxCommand;
479 break;
480 default:
481 ret = MBX_SHUTDOWN;
482 break;
483 }
484 return (ret);
485}
486static void
487lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
488{
489 wait_queue_head_t *pdone_q;
490
491 /*
492 * If pdone_q is empty, the driver thread gave up waiting and
493 * continued running.
494 */
495 pdone_q = (wait_queue_head_t *) pmboxq->context1;
496 if (pdone_q)
497 wake_up_interruptible(pdone_q);
498 return;
499}
500
501void
502lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
503{
504 struct lpfc_dmabuf *mp;
505 mp = (struct lpfc_dmabuf *) (pmb->context1);
506 if (mp) {
507 lpfc_mbuf_free(phba, mp->virt, mp->phys);
508 kfree(mp);
509 }
510 mempool_free( pmb, phba->mbox_mem_pool);
511 return;
512}
513
514int
515lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
516{
517 MAILBOX_t *mbox;
518 MAILBOX_t *pmbox;
519 LPFC_MBOXQ_t *pmb;
520 struct lpfc_sli *psli;
521 int i, rc;
522 uint32_t process_next;
523
524 psli = &phba->sli;
525 /* We should only get here if we are in SLI2 mode */
526 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
527 return (1);
528 }
529
530 phba->sli.slistat.mbox_event++;
531
532 /* Get a Mailbox buffer to setup mailbox commands for callback */
533 if ((pmb = phba->sli.mbox_active)) {
534 pmbox = &pmb->mb;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400535 mbox = &phba->slim2p->mbx;
dea31012005-04-17 16:05:31 -0500536
537 /* First check out the status word */
538 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
539
540 /* Sanity check to ensure the host owns the mailbox */
541 if (pmbox->mbxOwner != OWN_HOST) {
542 /* Lets try for a while */
543 for (i = 0; i < 10240; i++) {
544 /* First copy command data */
545 lpfc_sli_pcimem_bcopy(mbox, pmbox,
546 sizeof (uint32_t));
547 if (pmbox->mbxOwner == OWN_HOST)
548 goto mbout;
549 }
550 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
551 <status> */
552 lpfc_printf_log(phba,
553 KERN_ERR,
554 LOG_MBOX | LOG_SLI,
555 "%d:0304 Stray Mailbox Interrupt "
556 "mbxCommand x%x mbxStatus x%x\n",
557 phba->brd_no,
558 pmbox->mbxCommand,
559 pmbox->mbxStatus);
560
561 spin_lock_irq(phba->host->host_lock);
562 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
563 spin_unlock_irq(phba->host->host_lock);
564 return (1);
565 }
566
567 mbout:
568 del_timer_sync(&phba->sli.mbox_tmo);
569 phba->work_hba_events &= ~WORKER_MBOX_TMO;
570
571 /*
572 * It is a fatal error if unknown mbox command completion.
573 */
574 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
575 MBX_SHUTDOWN) {
576
577 /* Unknow mailbox command compl */
578 lpfc_printf_log(phba,
579 KERN_ERR,
580 LOG_MBOX | LOG_SLI,
581 "%d:0323 Unknown Mailbox command %x Cmpl\n",
582 phba->brd_no,
583 pmbox->mbxCommand);
584 phba->hba_state = LPFC_HBA_ERROR;
585 phba->work_hs = HS_FFER3;
586 lpfc_handle_eratt(phba);
587 return (0);
588 }
589
590 phba->sli.mbox_active = NULL;
591 if (pmbox->mbxStatus) {
592 phba->sli.slistat.mbox_stat_err++;
593 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
594 /* Mbox cmd cmpl error - RETRYing */
595 lpfc_printf_log(phba,
596 KERN_INFO,
597 LOG_MBOX | LOG_SLI,
598 "%d:0305 Mbox cmd cmpl error - "
599 "RETRYing Data: x%x x%x x%x x%x\n",
600 phba->brd_no,
601 pmbox->mbxCommand,
602 pmbox->mbxStatus,
603 pmbox->un.varWords[0],
604 phba->hba_state);
605 pmbox->mbxStatus = 0;
606 pmbox->mbxOwner = OWN_HOST;
607 spin_lock_irq(phba->host->host_lock);
608 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
609 spin_unlock_irq(phba->host->host_lock);
610 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
611 if (rc == MBX_SUCCESS)
612 return (0);
613 }
614 }
615
616 /* Mailbox cmd <cmd> Cmpl <cmpl> */
617 lpfc_printf_log(phba,
618 KERN_INFO,
619 LOG_MBOX | LOG_SLI,
620 "%d:0307 Mailbox cmd x%x Cmpl x%p "
621 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
622 phba->brd_no,
623 pmbox->mbxCommand,
624 pmb->mbox_cmpl,
625 *((uint32_t *) pmbox),
626 pmbox->un.varWords[0],
627 pmbox->un.varWords[1],
628 pmbox->un.varWords[2],
629 pmbox->un.varWords[3],
630 pmbox->un.varWords[4],
631 pmbox->un.varWords[5],
632 pmbox->un.varWords[6],
633 pmbox->un.varWords[7]);
634
635 if (pmb->mbox_cmpl) {
636 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
637 pmb->mbox_cmpl(phba,pmb);
638 }
639 }
640
641
642 do {
643 process_next = 0; /* by default don't loop */
644 spin_lock_irq(phba->host->host_lock);
645 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
646
647 /* Process next mailbox command if there is one */
648 if ((pmb = lpfc_mbox_get(phba))) {
649 spin_unlock_irq(phba->host->host_lock);
650 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
651 if (rc == MBX_NOT_FINISHED) {
652 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
653 pmb->mbox_cmpl(phba,pmb);
654 process_next = 1;
655 continue; /* loop back */
656 }
657 } else {
658 spin_unlock_irq(phba->host->host_lock);
659 /* Turn on IOCB processing */
660 for (i = 0; i < phba->sli.num_rings; i++) {
661 lpfc_sli_turn_on_ring(phba, i);
662 }
663
664 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
665 while (!list_empty(&phba->freebufList)) {
666 struct lpfc_dmabuf *mp;
667
668 mp = NULL;
669 list_remove_head((&phba->freebufList),
670 mp,
671 struct lpfc_dmabuf,
672 list);
673 if (mp) {
674 lpfc_mbuf_free(phba, mp->virt,
675 mp->phys);
676 kfree(mp);
677 }
678 }
679 }
680
681 } while (process_next);
682
683 return (0);
684}
685static int
686lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
687 struct lpfc_iocbq *saveq)
688{
689 IOCB_t * irsp;
690 WORD5 * w5p;
691 uint32_t Rctl, Type;
692 uint32_t match, i;
693
694 match = 0;
695 irsp = &(saveq->iocb);
696 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
697 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
698 Rctl = FC_ELS_REQ;
699 Type = FC_ELS_DATA;
700 } else {
701 w5p =
702 (WORD5 *) & (saveq->iocb.un.
703 ulpWord[5]);
704 Rctl = w5p->hcsw.Rctl;
705 Type = w5p->hcsw.Type;
706
707 /* Firmware Workaround */
708 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
709 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
710 Rctl = FC_ELS_REQ;
711 Type = FC_ELS_DATA;
712 w5p->hcsw.Rctl = Rctl;
713 w5p->hcsw.Type = Type;
714 }
715 }
716 /* unSolicited Responses */
717 if (pring->prt[0].profile) {
718 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
719 match = 1;
720 } else {
721 /* We must search, based on rctl / type
722 for the right routine */
723 for (i = 0; i < pring->num_mask;
724 i++) {
725 if ((pring->prt[i].rctl ==
726 Rctl)
727 && (pring->prt[i].
728 type == Type)) {
729 (pring->prt[i].lpfc_sli_rcv_unsol_event)
730 (phba, pring, saveq);
731 match = 1;
732 break;
733 }
734 }
735 }
736 if (match == 0) {
737 /* Unexpected Rctl / Type received */
738 /* Ring <ringno> handler: unexpected
739 Rctl <Rctl> Type <Type> received */
740 lpfc_printf_log(phba,
741 KERN_WARNING,
742 LOG_SLI,
743 "%d:0313 Ring %d handler: unexpected Rctl x%x "
744 "Type x%x received \n",
745 phba->brd_no,
746 pring->ringno,
747 Rctl,
748 Type);
749 }
750 return(1);
751}
752
753static struct lpfc_iocbq *
754lpfc_sli_txcmpl_ring_search_slow(struct lpfc_sli_ring * pring,
755 struct lpfc_iocbq * prspiocb)
756{
757 IOCB_t *icmd = NULL;
758 IOCB_t *irsp = NULL;
759 struct lpfc_iocbq *cmd_iocb;
760 struct lpfc_iocbq *iocb, *next_iocb;
761 uint16_t iotag;
762
763 irsp = &prspiocb->iocb;
764 iotag = irsp->ulpIoTag;
765 cmd_iocb = NULL;
766
767 /* Search through txcmpl from the begining */
768 list_for_each_entry_safe(iocb, next_iocb, &(pring->txcmplq), list) {
769 icmd = &iocb->iocb;
770 if (iotag == icmd->ulpIoTag) {
771 /* Found a match. */
772 cmd_iocb = iocb;
773 list_del(&iocb->list);
774 pring->txcmplq_cnt--;
775 break;
776 }
777 }
778
779 return (cmd_iocb);
780}
781
782static struct lpfc_iocbq *
783lpfc_sli_txcmpl_ring_iotag_lookup(struct lpfc_hba * phba,
784 struct lpfc_sli_ring * pring,
785 struct lpfc_iocbq * prspiocb)
786{
787 IOCB_t *irsp = NULL;
788 struct lpfc_iocbq *cmd_iocb = NULL;
789 uint16_t iotag;
790
791 if (unlikely(pring->fast_lookup == NULL))
792 return NULL;
793
794 /* Use fast lookup based on iotag for completion */
795 irsp = &prspiocb->iocb;
796 iotag = irsp->ulpIoTag;
797 if (iotag < pring->fast_iotag) {
798 cmd_iocb = *(pring->fast_lookup + iotag);
799 *(pring->fast_lookup + iotag) = NULL;
800 if (cmd_iocb) {
801 list_del(&cmd_iocb->list);
802 pring->txcmplq_cnt--;
803 return cmd_iocb;
804 } else {
805 /*
806 * This is clearly an error. A ring that uses iotags
807 * should never have a interrupt for a completion that
808 * is not on the ring. Return NULL and log a error.
809 */
810 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
811 "%d:0327 Rsp ring %d error - command "
812 "completion for iotag x%x not found\n",
813 phba->brd_no, pring->ringno, iotag);
814 return NULL;
815 }
816 }
817
818 /*
819 * Rsp ring <ringno> get: iotag <iotag> greater then
820 * configured max <fast_iotag> wd0 <irsp>. This is an
821 * error. Just return NULL.
822 */
823 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
824 "%d:0317 Rsp ring %d get: iotag x%x greater then "
825 "configured max x%x wd0 x%x\n",
826 phba->brd_no, pring->ringno, iotag, pring->fast_iotag,
827 *(((uint32_t *) irsp) + 7));
828 return NULL;
829}
830
831static int
832lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
833 struct lpfc_iocbq *saveq)
834{
835 struct lpfc_iocbq * cmdiocbp;
836 int rc = 1;
837 unsigned long iflag;
838
839 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
840 spin_lock_irqsave(phba->host->host_lock, iflag);
841 cmdiocbp = lpfc_sli_txcmpl_ring_search_slow(pring, saveq);
842 if (cmdiocbp) {
843 if (cmdiocbp->iocb_cmpl) {
844 /*
845 * Post all ELS completions to the worker thread.
846 * All other are passed to the completion callback.
847 */
848 if (pring->ringno == LPFC_ELS_RING) {
849 spin_unlock_irqrestore(phba->host->host_lock,
850 iflag);
851 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
852 spin_lock_irqsave(phba->host->host_lock, iflag);
853 }
854 else {
855 if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
856 rc = 0;
857
858 spin_unlock_irqrestore(phba->host->host_lock,
859 iflag);
860 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
861 spin_lock_irqsave(phba->host->host_lock, iflag);
862 }
863 } else {
864 list_add_tail(&cmdiocbp->list, &phba->lpfc_iocb_list);
865 }
866 } else {
867 /*
868 * Unknown initiating command based on the response iotag.
869 * This could be the case on the ELS ring because of
870 * lpfc_els_abort().
871 */
872 if (pring->ringno != LPFC_ELS_RING) {
873 /*
874 * Ring <ringno> handler: unexpected completion IoTag
875 * <IoTag>
876 */
877 lpfc_printf_log(phba,
878 KERN_WARNING,
879 LOG_SLI,
880 "%d:0322 Ring %d handler: unexpected "
881 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
882 phba->brd_no,
883 pring->ringno,
884 saveq->iocb.ulpIoTag,
885 saveq->iocb.ulpStatus,
886 saveq->iocb.un.ulpWord[4],
887 saveq->iocb.ulpCommand,
888 saveq->iocb.ulpContext);
889 }
890 }
891 spin_unlock_irqrestore(phba->host->host_lock, iflag);
892 return rc;
893}
894
895/*
896 * This routine presumes LPFC_FCP_RING handling and doesn't bother
897 * to check it explicitly.
898 */
899static int
900lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
901 struct lpfc_sli_ring * pring, uint32_t mask)
902{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400903 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500904 IOCB_t *irsp = NULL;
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400905 IOCB_t *entry = NULL;
dea31012005-04-17 16:05:31 -0500906 struct lpfc_iocbq *cmdiocbq = NULL;
907 struct lpfc_iocbq rspiocbq;
dea31012005-04-17 16:05:31 -0500908 uint32_t status;
909 uint32_t portRspPut, portRspMax;
910 int rc = 1;
911 lpfc_iocb_type type;
912 unsigned long iflag;
913 uint32_t rsp_cmpl = 0;
914 void __iomem *to_slim;
915
916 spin_lock_irqsave(phba->host->host_lock, iflag);
917 pring->stats.iocb_event++;
918
dea31012005-04-17 16:05:31 -0500919 /*
920 * The next available response entry should never exceed the maximum
921 * entries. If it does, treat it as an adapter hardware error.
922 */
923 portRspMax = pring->numRiocb;
924 portRspPut = le32_to_cpu(pgp->rspPutInx);
925 if (unlikely(portRspPut >= portRspMax)) {
926 /*
927 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
928 * rsp ring <portRspMax>
929 */
930 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
931 "%d:0312 Ring %d handler: portRspPut %d "
932 "is bigger then rsp ring %d\n",
933 phba->brd_no, pring->ringno, portRspPut,
934 portRspMax);
935
936 phba->hba_state = LPFC_HBA_ERROR;
937
938 /* All error attention handlers are posted to worker thread */
939 phba->work_ha |= HA_ERATT;
940 phba->work_hs = HS_FFER3;
941 if (phba->work_wait)
942 wake_up(phba->work_wait);
943
944 spin_unlock_irqrestore(phba->host->host_lock, iflag);
945 return 1;
946 }
947
948 rmb();
949 while (pring->rspidx != portRspPut) {
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400950 /*
951 * Fetch an entry off the ring and copy it into a local data
952 * structure. The copy involves a byte-swap since the
953 * network byte order and pci byte orders are different.
954 */
955 entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
956 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
957 (uint32_t *) &rspiocbq.iocb,
958 sizeof (IOCB_t));
959 irsp = &rspiocbq.iocb;
960
dea31012005-04-17 16:05:31 -0500961 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
962 pring->stats.iocb_rsp++;
963 rsp_cmpl++;
964
965 if (unlikely(irsp->ulpStatus)) {
966 /* Rsp ring <ringno> error: IOCB */
967 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
968 "%d:0326 Rsp Ring %d error: IOCB Data: "
969 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
970 phba->brd_no, pring->ringno,
971 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
972 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
973 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
974 *(((uint32_t *) irsp) + 6),
975 *(((uint32_t *) irsp) + 7));
976 }
977
978 switch (type) {
979 case LPFC_ABORT_IOCB:
980 case LPFC_SOL_IOCB:
981 /*
982 * Idle exchange closed via ABTS from port. No iocb
983 * resources need to be recovered.
984 */
985 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
986 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
987 "Skipping completion\n", __FUNCTION__,
988 irsp->ulpCommand);
989 break;
990 }
991
dea31012005-04-17 16:05:31 -0500992 cmdiocbq = lpfc_sli_txcmpl_ring_iotag_lookup(phba,
993 pring,
994 &rspiocbq);
995 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
996 spin_unlock_irqrestore(
997 phba->host->host_lock, iflag);
998 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
999 &rspiocbq);
1000 spin_lock_irqsave(phba->host->host_lock,
1001 iflag);
1002 }
1003 break;
1004 default:
1005 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1006 char adaptermsg[LPFC_MAX_ADPTMSG];
1007 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1008 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1009 MAX_MSG_DATA);
1010 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1011 phba->brd_no, adaptermsg);
1012 } else {
1013 /* Unknown IOCB command */
1014 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1015 "%d:0321 Unknown IOCB command "
1016 "Data: x%x, x%x x%x x%x x%x\n",
1017 phba->brd_no, type, irsp->ulpCommand,
1018 irsp->ulpStatus, irsp->ulpIoTag,
1019 irsp->ulpContext);
1020 }
1021 break;
1022 }
1023
1024 /*
1025 * The response IOCB has been processed. Update the ring
1026 * pointer in SLIM. If the port response put pointer has not
1027 * been updated, sync the pgp->rspPutInx and fetch the new port
1028 * response put pointer.
1029 */
1030 if (++pring->rspidx >= portRspMax)
1031 pring->rspidx = 0;
1032
1033 to_slim = phba->MBslimaddr +
1034 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1035 writeb(pring->rspidx, to_slim);
1036
1037 if (pring->rspidx == portRspPut)
1038 portRspPut = le32_to_cpu(pgp->rspPutInx);
1039 }
1040
1041 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1042 pring->stats.iocb_rsp_full++;
1043 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1044 writel(status, phba->CAregaddr);
1045 readl(phba->CAregaddr);
1046 }
1047 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1048 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1049 pring->stats.iocb_cmd_empty++;
1050
1051 /* Force update of the local copy of cmdGetInx */
1052 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1053 lpfc_sli_resume_iocb(phba, pring);
1054
1055 if ((pring->lpfc_sli_cmd_available))
1056 (pring->lpfc_sli_cmd_available) (phba, pring);
1057
1058 }
1059
1060 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1061 return rc;
1062}
1063
1064
1065int
1066lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1067 struct lpfc_sli_ring * pring, uint32_t mask)
1068{
1069 IOCB_t *entry;
1070 IOCB_t *irsp = NULL;
1071 struct lpfc_iocbq *rspiocbp = NULL;
1072 struct lpfc_iocbq *next_iocb;
1073 struct lpfc_iocbq *cmdiocbp;
1074 struct lpfc_iocbq *saveq;
1075 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001076 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -05001077 uint8_t iocb_cmd_type;
1078 lpfc_iocb_type type;
1079 uint32_t status, free_saveq;
1080 uint32_t portRspPut, portRspMax;
1081 int rc = 1;
1082 unsigned long iflag;
1083 void __iomem *to_slim;
1084
1085 spin_lock_irqsave(phba->host->host_lock, iflag);
1086 pring->stats.iocb_event++;
1087
dea31012005-04-17 16:05:31 -05001088 /*
1089 * The next available response entry should never exceed the maximum
1090 * entries. If it does, treat it as an adapter hardware error.
1091 */
1092 portRspMax = pring->numRiocb;
1093 portRspPut = le32_to_cpu(pgp->rspPutInx);
1094 if (portRspPut >= portRspMax) {
1095 /*
1096 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1097 * rsp ring <portRspMax>
1098 */
1099 lpfc_printf_log(phba,
1100 KERN_ERR,
1101 LOG_SLI,
1102 "%d:0312 Ring %d handler: portRspPut %d "
1103 "is bigger then rsp ring %d\n",
1104 phba->brd_no,
1105 pring->ringno, portRspPut, portRspMax);
1106
1107 phba->hba_state = LPFC_HBA_ERROR;
1108 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1109
1110 phba->work_hs = HS_FFER3;
1111 lpfc_handle_eratt(phba);
1112
1113 return 1;
1114 }
1115
1116 rmb();
1117 lpfc_iocb_list = &phba->lpfc_iocb_list;
1118 while (pring->rspidx != portRspPut) {
1119 /*
1120 * Build a completion list and call the appropriate handler.
1121 * The process is to get the next available response iocb, get
1122 * a free iocb from the list, copy the response data into the
1123 * free iocb, insert to the continuation list, and update the
1124 * next response index to slim. This process makes response
1125 * iocb's in the ring available to DMA as fast as possible but
1126 * pays a penalty for a copy operation. Since the iocb is
1127 * only 32 bytes, this penalty is considered small relative to
1128 * the PCI reads for register values and a slim write. When
1129 * the ulpLe field is set, the entire Command has been
1130 * received.
1131 */
1132 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1133 list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
1134 list);
1135 if (rspiocbp == NULL) {
1136 printk(KERN_ERR "%s: out of buffers! Failing "
1137 "completion.\n", __FUNCTION__);
1138 break;
1139 }
1140
1141 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1142 irsp = &rspiocbp->iocb;
1143
1144 if (++pring->rspidx >= portRspMax)
1145 pring->rspidx = 0;
1146
1147 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1148 + 1) * 4;
1149 writeb(pring->rspidx, to_slim);
1150
1151 if (list_empty(&(pring->iocb_continueq))) {
1152 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1153 } else {
1154 list_add_tail(&rspiocbp->list,
1155 &(pring->iocb_continueq));
1156 }
1157
1158 pring->iocb_continueq_cnt++;
1159 if (irsp->ulpLe) {
1160 /*
1161 * By default, the driver expects to free all resources
1162 * associated with this iocb completion.
1163 */
1164 free_saveq = 1;
1165 saveq = list_get_first(&pring->iocb_continueq,
1166 struct lpfc_iocbq, list);
1167 irsp = &(saveq->iocb);
1168 list_del_init(&pring->iocb_continueq);
1169 pring->iocb_continueq_cnt = 0;
1170
1171 pring->stats.iocb_rsp++;
1172
1173 if (irsp->ulpStatus) {
1174 /* Rsp ring <ringno> error: IOCB */
1175 lpfc_printf_log(phba,
1176 KERN_WARNING,
1177 LOG_SLI,
1178 "%d:0328 Rsp Ring %d error: IOCB Data: "
1179 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1180 phba->brd_no,
1181 pring->ringno,
1182 irsp->un.ulpWord[0],
1183 irsp->un.ulpWord[1],
1184 irsp->un.ulpWord[2],
1185 irsp->un.ulpWord[3],
1186 irsp->un.ulpWord[4],
1187 irsp->un.ulpWord[5],
1188 *(((uint32_t *) irsp) + 6),
1189 *(((uint32_t *) irsp) + 7));
1190 }
1191
1192 /*
1193 * Fetch the IOCB command type and call the correct
1194 * completion routine. Solicited and Unsolicited
1195 * IOCBs on the ELS ring get freed back to the
1196 * lpfc_iocb_list by the discovery kernel thread.
1197 */
1198 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1199 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1200 if (type == LPFC_SOL_IOCB) {
1201 spin_unlock_irqrestore(phba->host->host_lock,
1202 iflag);
1203 rc = lpfc_sli_process_sol_iocb(phba, pring,
1204 saveq);
1205 spin_lock_irqsave(phba->host->host_lock, iflag);
1206 } else if (type == LPFC_UNSOL_IOCB) {
1207 spin_unlock_irqrestore(phba->host->host_lock,
1208 iflag);
1209 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1210 saveq);
1211 spin_lock_irqsave(phba->host->host_lock, iflag);
1212 } else if (type == LPFC_ABORT_IOCB) {
1213 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1214 ((cmdiocbp =
1215 lpfc_sli_txcmpl_ring_search_slow(pring,
1216 saveq)))) {
1217 /* Call the specified completion
1218 routine */
1219 if (cmdiocbp->iocb_cmpl) {
1220 spin_unlock_irqrestore(
1221 phba->host->host_lock,
1222 iflag);
1223 (cmdiocbp->iocb_cmpl) (phba,
1224 cmdiocbp, saveq);
1225 spin_lock_irqsave(
1226 phba->host->host_lock,
1227 iflag);
1228 } else {
1229 list_add_tail(&cmdiocbp->list,
1230 lpfc_iocb_list);
1231 }
1232 }
1233 } else if (type == LPFC_UNKNOWN_IOCB) {
1234 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1235
1236 char adaptermsg[LPFC_MAX_ADPTMSG];
1237
1238 memset(adaptermsg, 0,
1239 LPFC_MAX_ADPTMSG);
1240 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1241 MAX_MSG_DATA);
1242 dev_warn(&((phba->pcidev)->dev),
1243 "lpfc%d: %s",
1244 phba->brd_no, adaptermsg);
1245 } else {
1246 /* Unknown IOCB command */
1247 lpfc_printf_log(phba,
1248 KERN_ERR,
1249 LOG_SLI,
1250 "%d:0321 Unknown IOCB command "
1251 "Data: x%x x%x x%x x%x\n",
1252 phba->brd_no,
1253 irsp->ulpCommand,
1254 irsp->ulpStatus,
1255 irsp->ulpIoTag,
1256 irsp->ulpContext);
1257 }
1258 }
1259
1260 if (free_saveq) {
1261 if (!list_empty(&saveq->list)) {
1262 list_for_each_entry_safe(rspiocbp,
1263 next_iocb,
1264 &saveq->list,
1265 list) {
1266 list_add_tail(&rspiocbp->list,
1267 lpfc_iocb_list);
1268 }
1269 }
1270
1271 list_add_tail(&saveq->list, lpfc_iocb_list);
1272 }
1273 }
1274
1275 /*
1276 * If the port response put pointer has not been updated, sync
1277 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1278 * response put pointer.
1279 */
1280 if (pring->rspidx == portRspPut) {
1281 portRspPut = le32_to_cpu(pgp->rspPutInx);
1282 }
1283 } /* while (pring->rspidx != portRspPut) */
1284
1285 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1286 /* At least one response entry has been freed */
1287 pring->stats.iocb_rsp_full++;
1288 /* SET RxRE_RSP in Chip Att register */
1289 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1290 writel(status, phba->CAregaddr);
1291 readl(phba->CAregaddr); /* flush */
1292 }
1293 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1294 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1295 pring->stats.iocb_cmd_empty++;
1296
1297 /* Force update of the local copy of cmdGetInx */
1298 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1299 lpfc_sli_resume_iocb(phba, pring);
1300
1301 if ((pring->lpfc_sli_cmd_available))
1302 (pring->lpfc_sli_cmd_available) (phba, pring);
1303
1304 }
1305
1306 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1307 return rc;
1308}
1309
1310int
1311lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1312{
1313 struct lpfc_iocbq *iocb, *next_iocb;
1314 IOCB_t *icmd = NULL, *cmd = NULL;
1315 int errcnt;
1316 uint16_t iotag;
1317
1318 errcnt = 0;
1319
1320 /* Error everything on txq and txcmplq
1321 * First do the txq.
1322 */
1323 spin_lock_irq(phba->host->host_lock);
1324 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1325 list_del_init(&iocb->list);
1326 if (iocb->iocb_cmpl) {
1327 icmd = &iocb->iocb;
1328 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1329 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1330 spin_unlock_irq(phba->host->host_lock);
1331 (iocb->iocb_cmpl) (phba, iocb, iocb);
1332 spin_lock_irq(phba->host->host_lock);
1333 } else {
1334 list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
1335 }
1336 }
1337 pring->txq_cnt = 0;
1338 INIT_LIST_HEAD(&(pring->txq));
1339
1340 /* Next issue ABTS for everything on the txcmplq */
1341 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1342 cmd = &iocb->iocb;
1343
1344 /*
1345 * Imediate abort of IOCB, clear fast_lookup entry,
1346 * if any, deque and call compl
1347 */
1348 iotag = cmd->ulpIoTag;
1349 if (iotag && pring->fast_lookup &&
1350 (iotag < pring->fast_iotag))
1351 pring->fast_lookup[iotag] = NULL;
1352
1353 list_del_init(&iocb->list);
1354 pring->txcmplq_cnt--;
1355
1356 if (iocb->iocb_cmpl) {
1357 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1358 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1359 spin_unlock_irq(phba->host->host_lock);
1360 (iocb->iocb_cmpl) (phba, iocb, iocb);
1361 spin_lock_irq(phba->host->host_lock);
1362 } else {
1363 list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
1364 }
1365 }
1366
1367 INIT_LIST_HEAD(&pring->txcmplq);
1368 pring->txcmplq_cnt = 0;
1369 spin_unlock_irq(phba->host->host_lock);
1370
1371 return errcnt;
1372}
1373
1374/******************************************************************************
1375* lpfc_sli_send_reset
1376*
1377* Note: After returning from this function, the HBA cannot be accessed for
1378* 1 ms. Since we do not wish to delay in interrupt context, it is the
1379* responsibility of the caller to perform the mdelay(1) and flush via readl().
1380******************************************************************************/
1381static int
1382lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
1383{
1384 MAILBOX_t *swpmb;
1385 volatile uint32_t word0;
1386 void __iomem *to_slim;
1387 unsigned long flags = 0;
1388
1389 spin_lock_irqsave(phba->host->host_lock, flags);
1390
1391 /* A board reset must use REAL SLIM. */
1392 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1393
1394 word0 = 0;
1395 swpmb = (MAILBOX_t *) & word0;
1396 swpmb->mbxCommand = MBX_RESTART;
1397 swpmb->mbxHc = 1;
1398
1399 to_slim = phba->MBslimaddr;
1400 writel(*(uint32_t *) swpmb, to_slim);
1401 readl(to_slim); /* flush */
1402
1403 /* Only skip post after fc_ffinit is completed */
1404 if (skip_post) {
1405 word0 = 1; /* This is really setting up word1 */
1406 } else {
1407 word0 = 0; /* This is really setting up word1 */
1408 }
1409 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1410 writel(*(uint32_t *) swpmb, to_slim);
1411 readl(to_slim); /* flush */
1412
1413 /* Turn off parity checking and serr during the physical reset */
1414 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
1415 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1416 (phba->pci_cfg_value &
1417 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1418
1419 writel(HC_INITFF, phba->HCregaddr);
1420
1421 phba->hba_state = LPFC_INIT_START;
1422 spin_unlock_irqrestore(phba->host->host_lock, flags);
1423
1424 return 0;
1425}
1426
1427static int
1428lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
1429{
1430 struct lpfc_sli_ring *pring;
1431 int i;
1432 struct lpfc_dmabuf *mp, *next_mp;
1433 unsigned long flags = 0;
1434
1435 lpfc_sli_send_reset(phba, skip_post);
1436 mdelay(1);
1437
1438 spin_lock_irqsave(phba->host->host_lock, flags);
1439 /* Risk the write on flush case ie no delay after the readl */
1440 readl(phba->HCregaddr); /* flush */
1441 /* Now toggle INITFF bit set by lpfc_sli_send_reset */
1442 writel(0, phba->HCregaddr);
1443 readl(phba->HCregaddr); /* flush */
1444
1445 /* Restore PCI cmd register */
1446 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
1447
1448 /* perform board reset */
1449 phba->fc_eventTag = 0;
1450 phba->fc_myDID = 0;
1451 phba->fc_prevDID = Mask_DID;
1452
1453 /* Reset HBA */
1454 lpfc_printf_log(phba,
1455 KERN_INFO,
1456 LOG_SLI,
1457 "%d:0325 Reset HBA Data: x%x x%x x%x\n",
1458 phba->brd_no,
1459 phba->hba_state,
1460 phba->sli.sli_flag,
1461 skip_post);
1462
1463 /* Initialize relevant SLI info */
1464 for (i = 0; i < phba->sli.num_rings; i++) {
1465 pring = &phba->sli.ring[i];
1466 pring->flag = 0;
1467 pring->rspidx = 0;
1468 pring->next_cmdidx = 0;
1469 pring->local_getidx = 0;
1470 pring->cmdidx = 0;
1471 pring->missbufcnt = 0;
1472 }
1473 spin_unlock_irqrestore(phba->host->host_lock, flags);
1474
1475 if (skip_post) {
1476 mdelay(100);
1477 } else {
1478 mdelay(2000);
1479 }
1480
1481 spin_lock_irqsave(phba->host->host_lock, flags);
1482 /* Cleanup preposted buffers on the ELS ring */
1483 pring = &phba->sli.ring[LPFC_ELS_RING];
1484 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
1485 list_del(&mp->list);
1486 pring->postbufq_cnt--;
1487 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1488 kfree(mp);
1489 }
1490 spin_unlock_irqrestore(phba->host->host_lock, flags);
1491
1492 for (i = 0; i < phba->sli.num_rings; i++)
1493 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
1494
1495 return 0;
1496}
1497
1498static int
1499lpfc_sli_chipset_init(struct lpfc_hba *phba)
1500{
1501 uint32_t status, i = 0;
1502
1503 /* Read the HBA Host Status Register */
1504 status = readl(phba->HSregaddr);
1505
1506 /* Check status register to see what current state is */
1507 i = 0;
1508 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1509
1510 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1511 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1512 * 4.
1513 */
1514 if (i++ >= 20) {
1515 /* Adapter failed to init, timeout, status reg
1516 <status> */
1517 lpfc_printf_log(phba,
1518 KERN_ERR,
1519 LOG_INIT,
1520 "%d:0436 Adapter failed to init, "
1521 "timeout, status reg x%x\n",
1522 phba->brd_no,
1523 status);
1524 phba->hba_state = LPFC_HBA_ERROR;
1525 return -ETIMEDOUT;
1526 }
1527
1528 /* Check to see if any errors occurred during init */
1529 if (status & HS_FFERM) {
1530 /* ERROR: During chipset initialization */
1531 /* Adapter failed to init, chipset, status reg
1532 <status> */
1533 lpfc_printf_log(phba,
1534 KERN_ERR,
1535 LOG_INIT,
1536 "%d:0437 Adapter failed to init, "
1537 "chipset, status reg x%x\n",
1538 phba->brd_no,
1539 status);
1540 phba->hba_state = LPFC_HBA_ERROR;
1541 return -EIO;
1542 }
1543
1544 if (i <= 5) {
1545 msleep(10);
1546 } else if (i <= 10) {
1547 msleep(500);
1548 } else {
1549 msleep(2500);
1550 }
1551
1552 if (i == 15) {
1553 lpfc_sli_brdreset(phba, 0);
1554 }
1555 /* Read the HBA Host Status Register */
1556 status = readl(phba->HSregaddr);
1557 }
1558
1559 /* Check to see if any errors occurred during init */
1560 if (status & HS_FFERM) {
1561 /* ERROR: During chipset initialization */
1562 /* Adapter failed to init, chipset, status reg <status> */
1563 lpfc_printf_log(phba,
1564 KERN_ERR,
1565 LOG_INIT,
1566 "%d:0438 Adapter failed to init, chipset, "
1567 "status reg x%x\n",
1568 phba->brd_no,
1569 status);
1570 phba->hba_state = LPFC_HBA_ERROR;
1571 return -EIO;
1572 }
1573
1574 /* Clear all interrupt enable conditions */
1575 writel(0, phba->HCregaddr);
1576 readl(phba->HCregaddr); /* flush */
1577
1578 /* setup host attn register */
1579 writel(0xffffffff, phba->HAregaddr);
1580 readl(phba->HAregaddr); /* flush */
1581 return 0;
1582}
1583
1584int
1585lpfc_sli_hba_setup(struct lpfc_hba * phba)
1586{
1587 LPFC_MBOXQ_t *pmb;
1588 uint32_t resetcount = 0, rc = 0, done = 0;
1589
1590 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1591 if (!pmb) {
1592 phba->hba_state = LPFC_HBA_ERROR;
1593 return -ENOMEM;
1594 }
1595
1596 while (resetcount < 2 && !done) {
1597 phba->hba_state = 0;
1598 lpfc_sli_brdreset(phba, 0);
1599 msleep(2500);
1600 rc = lpfc_sli_chipset_init(phba);
1601 if (rc)
1602 break;
1603
1604 resetcount++;
1605
1606 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1607 * means the call was successful. Any other nonzero value is a failure,
1608 * but if ERESTART is returned, the driver may reset the HBA and try
1609 * again.
1610 */
1611 rc = lpfc_config_port_prep(phba);
1612 if (rc == -ERESTART) {
1613 phba->hba_state = 0;
1614 continue;
1615 } else if (rc) {
1616 break;
1617 }
1618
1619 phba->hba_state = LPFC_INIT_MBX_CMDS;
1620 lpfc_config_port(phba, pmb);
1621 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1622 if (rc == MBX_SUCCESS)
1623 done = 1;
1624 else {
1625 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1626 "%d:0442 Adapter failed to init, mbxCmd x%x "
1627 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1628 phba->brd_no, pmb->mb.mbxCommand,
1629 pmb->mb.mbxStatus, 0);
1630 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1631 }
1632 }
1633 if (!done)
1634 goto lpfc_sli_hba_setup_error;
1635
1636 rc = lpfc_sli_ring_map(phba, pmb);
1637
1638 if (rc)
1639 goto lpfc_sli_hba_setup_error;
1640
1641 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1642
1643 rc = lpfc_config_port_post(phba);
1644 if (rc)
1645 goto lpfc_sli_hba_setup_error;
1646
1647 goto lpfc_sli_hba_setup_exit;
1648lpfc_sli_hba_setup_error:
1649 phba->hba_state = LPFC_HBA_ERROR;
1650lpfc_sli_hba_setup_exit:
1651 mempool_free(pmb, phba->mbox_mem_pool);
1652 return rc;
1653}
1654
1655static void
1656lpfc_mbox_abort(struct lpfc_hba * phba)
1657{
1658 LPFC_MBOXQ_t *pmbox;
1659 MAILBOX_t *mb;
1660
1661 if (phba->sli.mbox_active) {
1662 del_timer_sync(&phba->sli.mbox_tmo);
1663 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1664 pmbox = phba->sli.mbox_active;
1665 mb = &pmbox->mb;
1666 phba->sli.mbox_active = NULL;
1667 if (pmbox->mbox_cmpl) {
1668 mb->mbxStatus = MBX_NOT_FINISHED;
1669 (pmbox->mbox_cmpl) (phba, pmbox);
1670 }
1671 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1672 }
1673
1674 /* Abort all the non active mailbox commands. */
1675 spin_lock_irq(phba->host->host_lock);
1676 pmbox = lpfc_mbox_get(phba);
1677 while (pmbox) {
1678 mb = &pmbox->mb;
1679 if (pmbox->mbox_cmpl) {
1680 mb->mbxStatus = MBX_NOT_FINISHED;
1681 spin_unlock_irq(phba->host->host_lock);
1682 (pmbox->mbox_cmpl) (phba, pmbox);
1683 spin_lock_irq(phba->host->host_lock);
1684 }
1685 pmbox = lpfc_mbox_get(phba);
1686 }
1687 spin_unlock_irq(phba->host->host_lock);
1688 return;
1689}
1690
1691/*! lpfc_mbox_timeout
1692 *
1693 * \pre
1694 * \post
1695 * \param hba Pointer to per struct lpfc_hba structure
1696 * \param l1 Pointer to the driver's mailbox queue.
1697 * \return
1698 * void
1699 *
1700 * \b Description:
1701 *
1702 * This routine handles mailbox timeout events at timer interrupt context.
1703 */
1704void
1705lpfc_mbox_timeout(unsigned long ptr)
1706{
1707 struct lpfc_hba *phba;
1708 unsigned long iflag;
1709
1710 phba = (struct lpfc_hba *)ptr;
1711 spin_lock_irqsave(phba->host->host_lock, iflag);
1712 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1713 phba->work_hba_events |= WORKER_MBOX_TMO;
1714 if (phba->work_wait)
1715 wake_up(phba->work_wait);
1716 }
1717 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1718}
1719
1720void
1721lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
1722{
1723 LPFC_MBOXQ_t *pmbox;
1724 MAILBOX_t *mb;
1725
1726 spin_lock_irq(phba->host->host_lock);
1727 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1728 spin_unlock_irq(phba->host->host_lock);
1729 return;
1730 }
1731
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001732 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1733
dea31012005-04-17 16:05:31 -05001734 pmbox = phba->sli.mbox_active;
1735 mb = &pmbox->mb;
1736
1737 /* Mbox cmd <mbxCommand> timeout */
1738 lpfc_printf_log(phba,
1739 KERN_ERR,
1740 LOG_MBOX | LOG_SLI,
1741 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
1742 phba->brd_no,
1743 mb->mbxCommand,
1744 phba->hba_state,
1745 phba->sli.sli_flag,
1746 phba->sli.mbox_active);
1747
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001748 phba->sli.mbox_active = NULL;
1749 if (pmbox->mbox_cmpl) {
1750 mb->mbxStatus = MBX_NOT_FINISHED;
1751 spin_unlock_irq(phba->host->host_lock);
1752 (pmbox->mbox_cmpl) (phba, pmbox);
1753 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05001754 }
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001755 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea31012005-04-17 16:05:31 -05001756
1757 spin_unlock_irq(phba->host->host_lock);
1758 lpfc_mbox_abort(phba);
1759 return;
1760}
1761
1762int
1763lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
1764{
dea31012005-04-17 16:05:31 -05001765 MAILBOX_t *mb;
1766 struct lpfc_sli *psli;
1767 uint32_t status, evtctr;
1768 uint32_t ha_copy;
1769 int i;
1770 unsigned long drvr_flag = 0;
1771 volatile uint32_t word0, ldata;
1772 void __iomem *to_slim;
1773
1774 psli = &phba->sli;
1775
1776 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1777
1778
1779 mb = &pmbox->mb;
1780 status = MBX_SUCCESS;
1781
1782 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
1783 /* Polling for a mbox command when another one is already active
1784 * is not allowed in SLI. Also, the driver must have established
1785 * SLI2 mode to queue and process multiple mbox commands.
1786 */
1787
1788 if (flag & MBX_POLL) {
1789 spin_unlock_irqrestore(phba->host->host_lock,
1790 drvr_flag);
1791
1792 /* Mbox command <mbxCommand> cannot issue */
1793 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1794 return (MBX_NOT_FINISHED);
1795 }
1796
1797 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1798 spin_unlock_irqrestore(phba->host->host_lock,
1799 drvr_flag);
1800 /* Mbox command <mbxCommand> cannot issue */
1801 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1802 return (MBX_NOT_FINISHED);
1803 }
1804
1805 /* Handle STOP IOCB processing flag. This is only meaningful
1806 * if we are not polling for mbox completion.
1807 */
1808 if (flag & MBX_STOP_IOCB) {
1809 flag &= ~MBX_STOP_IOCB;
1810 /* Now flag each ring */
1811 for (i = 0; i < psli->num_rings; i++) {
1812 /* If the ring is active, flag it */
1813 if (psli->ring[i].cmdringaddr) {
1814 psli->ring[i].flag |=
1815 LPFC_STOP_IOCB_MBX;
1816 }
1817 }
1818 }
1819
1820 /* Another mailbox command is still being processed, queue this
1821 * command to be processed later.
1822 */
1823 lpfc_mbox_put(phba, pmbox);
1824
1825 /* Mbox cmd issue - BUSY */
1826 lpfc_printf_log(phba,
1827 KERN_INFO,
1828 LOG_MBOX | LOG_SLI,
1829 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
1830 phba->brd_no,
1831 mb->mbxCommand,
1832 phba->hba_state,
1833 psli->sli_flag,
1834 flag);
1835
1836 psli->slistat.mbox_busy++;
1837 spin_unlock_irqrestore(phba->host->host_lock,
1838 drvr_flag);
1839
1840 return (MBX_BUSY);
1841 }
1842
1843 /* Handle STOP IOCB processing flag. This is only meaningful
1844 * if we are not polling for mbox completion.
1845 */
1846 if (flag & MBX_STOP_IOCB) {
1847 flag &= ~MBX_STOP_IOCB;
1848 if (flag == MBX_NOWAIT) {
1849 /* Now flag each ring */
1850 for (i = 0; i < psli->num_rings; i++) {
1851 /* If the ring is active, flag it */
1852 if (psli->ring[i].cmdringaddr) {
1853 psli->ring[i].flag |=
1854 LPFC_STOP_IOCB_MBX;
1855 }
1856 }
1857 }
1858 }
1859
1860 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1861
1862 /* If we are not polling, we MUST be in SLI2 mode */
1863 if (flag != MBX_POLL) {
1864 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1865 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1866 spin_unlock_irqrestore(phba->host->host_lock,
1867 drvr_flag);
1868 /* Mbox command <mbxCommand> cannot issue */
1869 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
1870 return (MBX_NOT_FINISHED);
1871 }
1872 /* timeout active mbox command */
1873 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
1874 }
1875
1876 /* Mailbox cmd <cmd> issue */
1877 lpfc_printf_log(phba,
1878 KERN_INFO,
1879 LOG_MBOX | LOG_SLI,
1880 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
1881 phba->brd_no,
1882 mb->mbxCommand,
1883 phba->hba_state,
1884 psli->sli_flag,
1885 flag);
1886
1887 psli->slistat.mbox_cmd++;
1888 evtctr = psli->slistat.mbox_event;
1889
1890 /* next set own bit for the adapter and copy over command word */
1891 mb->mbxOwner = OWN_CHIP;
1892
1893 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05001894 /* First copy command data to host SLIM area */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001895 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001896 } else {
1897 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1898 /* copy command data into host mbox for cmpl */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001899 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
1900 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001901 }
1902
1903 /* First copy mbox command data to HBA SLIM, skip past first
1904 word */
1905 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1906 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
1907 MAILBOX_CMD_SIZE - sizeof (uint32_t));
1908
1909 /* Next copy over first word, with mbxOwner set */
1910 ldata = *((volatile uint32_t *)mb);
1911 to_slim = phba->MBslimaddr;
1912 writel(ldata, to_slim);
1913 readl(to_slim); /* flush */
1914
1915 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1916 /* switch over to host mailbox */
1917 psli->sli_flag |= LPFC_SLI2_ACTIVE;
1918 }
1919 }
1920
1921 wmb();
1922 /* interrupt board to doit right away */
1923 writel(CA_MBATT, phba->CAregaddr);
1924 readl(phba->CAregaddr); /* flush */
1925
1926 switch (flag) {
1927 case MBX_NOWAIT:
1928 /* Don't wait for it to finish, just return */
1929 psli->mbox_active = pmbox;
1930 break;
1931
1932 case MBX_POLL:
1933 i = 0;
1934 psli->mbox_active = NULL;
1935 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1936 /* First read mbox status word */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001937 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001938 word0 = le32_to_cpu(word0);
1939 } else {
1940 /* First read mbox status word */
1941 word0 = readl(phba->MBslimaddr);
1942 }
1943
1944 /* Read the HBA Host Attention Register */
1945 ha_copy = readl(phba->HAregaddr);
1946
1947 /* Wait for command to complete */
1948 while (((word0 & OWN_CHIP) == OWN_CHIP)
1949 || !(ha_copy & HA_MBATT)) {
1950 if (i++ >= 100) {
1951 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1952 spin_unlock_irqrestore(phba->host->host_lock,
1953 drvr_flag);
1954 return (MBX_NOT_FINISHED);
1955 }
1956
1957 /* Check if we took a mbox interrupt while we were
1958 polling */
1959 if (((word0 & OWN_CHIP) != OWN_CHIP)
1960 && (evtctr != psli->slistat.mbox_event))
1961 break;
1962
1963 spin_unlock_irqrestore(phba->host->host_lock,
1964 drvr_flag);
1965
1966 /* Can be in interrupt context, do not sleep */
1967 /* (or might be called with interrupts disabled) */
1968 mdelay(i);
1969
1970 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1971
1972 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1973 /* First copy command data */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001974 word0 = *((volatile uint32_t *)
1975 &phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001976 word0 = le32_to_cpu(word0);
1977 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1978 MAILBOX_t *slimmb;
1979 volatile uint32_t slimword0;
1980 /* Check real SLIM for any errors */
1981 slimword0 = readl(phba->MBslimaddr);
1982 slimmb = (MAILBOX_t *) & slimword0;
1983 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
1984 && slimmb->mbxStatus) {
1985 psli->sli_flag &=
1986 ~LPFC_SLI2_ACTIVE;
1987 word0 = slimword0;
1988 }
1989 }
1990 } else {
1991 /* First copy command data */
1992 word0 = readl(phba->MBslimaddr);
1993 }
1994 /* Read the HBA Host Attention Register */
1995 ha_copy = readl(phba->HAregaddr);
1996 }
1997
1998 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05001999 /* copy results back to user */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002000 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
2001 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05002002 } else {
2003 /* First copy command data */
2004 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2005 MAILBOX_CMD_SIZE);
2006 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2007 pmbox->context2) {
2008 lpfc_memcpy_from_slim((void *)pmbox->context2,
2009 phba->MBslimaddr + DMP_RSP_OFFSET,
2010 mb->un.varDmp.word_cnt);
2011 }
2012 }
2013
2014 writel(HA_MBATT, phba->HAregaddr);
2015 readl(phba->HAregaddr); /* flush */
2016
2017 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2018 status = mb->mbxStatus;
2019 }
2020
2021 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2022 return (status);
2023}
2024
2025static int
2026lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2027 struct lpfc_iocbq * piocb)
2028{
2029 /* Insert the caller's iocb in the txq tail for later processing. */
2030 list_add_tail(&piocb->list, &pring->txq);
2031 pring->txq_cnt++;
2032 return (0);
2033}
2034
2035static struct lpfc_iocbq *
2036lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2037 struct lpfc_iocbq ** piocb)
2038{
2039 struct lpfc_iocbq * nextiocb;
2040
2041 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2042 if (!nextiocb) {
2043 nextiocb = *piocb;
2044 *piocb = NULL;
2045 }
2046
2047 return nextiocb;
2048}
2049
2050int
2051lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2052 struct lpfc_iocbq *piocb, uint32_t flag)
2053{
2054 struct lpfc_iocbq *nextiocb;
2055 IOCB_t *iocb;
2056
2057 /*
2058 * We should never get an IOCB if we are in a < LINK_DOWN state
2059 */
2060 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2061 return IOCB_ERROR;
2062
2063 /*
2064 * Check to see if we are blocking IOCB processing because of a
2065 * outstanding mbox command.
2066 */
2067 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2068 goto iocb_busy;
2069
2070 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2071 /*
2072 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2073 * can be issued if the link is not up.
2074 */
2075 switch (piocb->iocb.ulpCommand) {
2076 case CMD_QUE_RING_BUF_CN:
2077 case CMD_QUE_RING_BUF64_CN:
dea31012005-04-17 16:05:31 -05002078 /*
2079 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2080 * completion, iocb_cmpl MUST be 0.
2081 */
2082 if (piocb->iocb_cmpl)
2083 piocb->iocb_cmpl = NULL;
2084 /*FALLTHROUGH*/
2085 case CMD_CREATE_XRI_CR:
2086 break;
2087 default:
2088 goto iocb_busy;
2089 }
2090
2091 /*
2092 * For FCP commands, we must be in a state where we can process link
2093 * attention events.
2094 */
2095 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2096 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2097 goto iocb_busy;
2098
2099 /*
2100 * Check to see if this is a high priority command.
2101 * If so bypass tx queue processing.
2102 */
2103 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
2104 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
2105 lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
2106 piocb = NULL;
2107 }
2108
2109 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2110 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2111 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2112
2113 if (iocb)
2114 lpfc_sli_update_ring(phba, pring);
2115 else
2116 lpfc_sli_update_full_ring(phba, pring);
2117
2118 if (!piocb)
2119 return IOCB_SUCCESS;
2120
2121 goto out_busy;
2122
2123 iocb_busy:
2124 pring->stats.iocb_cmd_delay++;
2125
2126 out_busy:
2127
2128 if (!(flag & SLI_IOCB_RET_IOCB)) {
2129 lpfc_sli_ringtx_put(phba, pring, piocb);
2130 return IOCB_SUCCESS;
2131 }
2132
2133 return IOCB_BUSY;
2134}
2135
2136int
2137lpfc_sli_setup(struct lpfc_hba *phba)
2138{
2139 int i, totiocb = 0;
2140 struct lpfc_sli *psli = &phba->sli;
2141 struct lpfc_sli_ring *pring;
2142
2143 psli->num_rings = MAX_CONFIGURED_RINGS;
2144 psli->sli_flag = 0;
2145 psli->fcp_ring = LPFC_FCP_RING;
2146 psli->next_ring = LPFC_FCP_NEXT_RING;
2147 psli->ip_ring = LPFC_IP_RING;
2148
2149 for (i = 0; i < psli->num_rings; i++) {
2150 pring = &psli->ring[i];
2151 switch (i) {
2152 case LPFC_FCP_RING: /* ring 0 - FCP */
2153 /* numCiocb and numRiocb are used in config_port */
2154 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2155 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2156 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2157 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2158 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2159 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2160 pring->iotag_ctr = 0;
2161 pring->iotag_max =
2162 (phba->cfg_hba_queue_depth * 2);
2163 pring->fast_iotag = pring->iotag_max;
2164 pring->num_mask = 0;
2165 break;
2166 case LPFC_IP_RING: /* ring 1 - IP */
2167 /* numCiocb and numRiocb are used in config_port */
2168 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2169 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2170 pring->num_mask = 0;
2171 break;
2172 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2173 /* numCiocb and numRiocb are used in config_port */
2174 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2175 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2176 pring->fast_iotag = 0;
2177 pring->iotag_ctr = 0;
2178 pring->iotag_max = 4096;
2179 pring->num_mask = 4;
2180 pring->prt[0].profile = 0; /* Mask 0 */
2181 pring->prt[0].rctl = FC_ELS_REQ;
2182 pring->prt[0].type = FC_ELS_DATA;
2183 pring->prt[0].lpfc_sli_rcv_unsol_event =
2184 lpfc_els_unsol_event;
2185 pring->prt[1].profile = 0; /* Mask 1 */
2186 pring->prt[1].rctl = FC_ELS_RSP;
2187 pring->prt[1].type = FC_ELS_DATA;
2188 pring->prt[1].lpfc_sli_rcv_unsol_event =
2189 lpfc_els_unsol_event;
2190 pring->prt[2].profile = 0; /* Mask 2 */
2191 /* NameServer Inquiry */
2192 pring->prt[2].rctl = FC_UNSOL_CTL;
2193 /* NameServer */
2194 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2195 pring->prt[2].lpfc_sli_rcv_unsol_event =
2196 lpfc_ct_unsol_event;
2197 pring->prt[3].profile = 0; /* Mask 3 */
2198 /* NameServer response */
2199 pring->prt[3].rctl = FC_SOL_CTL;
2200 /* NameServer */
2201 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2202 pring->prt[3].lpfc_sli_rcv_unsol_event =
2203 lpfc_ct_unsol_event;
2204 break;
2205 }
2206 totiocb += (pring->numCiocb + pring->numRiocb);
2207 }
2208 if (totiocb > MAX_SLI2_IOCB) {
2209 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2210 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2211 "%d:0462 Too many cmd / rsp ring entries in "
2212 "SLI2 SLIM Data: x%x x%x\n",
2213 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2214 }
2215
2216 return 0;
2217}
2218
2219int
2220lpfc_sli_queue_setup(struct lpfc_hba * phba)
2221{
2222 struct lpfc_sli *psli;
2223 struct lpfc_sli_ring *pring;
2224 int i, cnt;
2225
2226 psli = &phba->sli;
2227 spin_lock_irq(phba->host->host_lock);
2228 INIT_LIST_HEAD(&psli->mboxq);
2229 /* Initialize list headers for txq and txcmplq as double linked lists */
2230 for (i = 0; i < psli->num_rings; i++) {
2231 pring = &psli->ring[i];
2232 pring->ringno = i;
2233 pring->next_cmdidx = 0;
2234 pring->local_getidx = 0;
2235 pring->cmdidx = 0;
2236 INIT_LIST_HEAD(&pring->txq);
2237 INIT_LIST_HEAD(&pring->txcmplq);
2238 INIT_LIST_HEAD(&pring->iocb_continueq);
2239 INIT_LIST_HEAD(&pring->postbufq);
2240 cnt = pring->fast_iotag;
2241 spin_unlock_irq(phba->host->host_lock);
2242 if (cnt) {
2243 pring->fast_lookup =
2244 kmalloc(cnt * sizeof (struct lpfc_iocbq *),
2245 GFP_KERNEL);
2246 if (pring->fast_lookup == 0) {
2247 return (0);
2248 }
2249 memset((char *)pring->fast_lookup, 0,
2250 cnt * sizeof (struct lpfc_iocbq *));
2251 }
2252 spin_lock_irq(phba->host->host_lock);
2253 }
2254 spin_unlock_irq(phba->host->host_lock);
2255 return (1);
2256}
2257
2258int
2259lpfc_sli_hba_down(struct lpfc_hba * phba)
2260{
2261 struct lpfc_sli *psli;
2262 struct lpfc_sli_ring *pring;
2263 LPFC_MBOXQ_t *pmb;
2264 struct lpfc_iocbq *iocb, *next_iocb;
2265 IOCB_t *icmd = NULL;
2266 int i;
2267 unsigned long flags = 0;
2268
2269 psli = &phba->sli;
2270 lpfc_hba_down_prep(phba);
2271
2272 spin_lock_irqsave(phba->host->host_lock, flags);
2273
2274 for (i = 0; i < psli->num_rings; i++) {
2275 pring = &psli->ring[i];
2276 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2277
2278 /*
2279 * Error everything on the txq since these iocbs have not been
2280 * given to the FW yet.
2281 */
2282 pring->txq_cnt = 0;
2283
2284 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2285 list_del_init(&iocb->list);
2286 if (iocb->iocb_cmpl) {
2287 icmd = &iocb->iocb;
2288 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2289 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2290 spin_unlock_irqrestore(phba->host->host_lock,
2291 flags);
2292 (iocb->iocb_cmpl) (phba, iocb, iocb);
2293 spin_lock_irqsave(phba->host->host_lock, flags);
2294 } else {
2295 list_add_tail(&iocb->list,
2296 &phba->lpfc_iocb_list);
2297 }
2298 }
2299
2300 INIT_LIST_HEAD(&(pring->txq));
2301
2302 if (pring->fast_lookup) {
2303 kfree(pring->fast_lookup);
2304 pring->fast_lookup = NULL;
2305 }
2306
2307 }
2308
2309 spin_unlock_irqrestore(phba->host->host_lock, flags);
2310
2311 /* Return any active mbox cmds */
2312 del_timer_sync(&psli->mbox_tmo);
2313 spin_lock_irqsave(phba->host->host_lock, flags);
2314 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2315 if (psli->mbox_active) {
2316 pmb = psli->mbox_active;
2317 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2318 if (pmb->mbox_cmpl) {
2319 spin_unlock_irqrestore(phba->host->host_lock, flags);
2320 pmb->mbox_cmpl(phba,pmb);
2321 spin_lock_irqsave(phba->host->host_lock, flags);
2322 }
2323 }
2324 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2325 psli->mbox_active = NULL;
2326
2327 /* Return any pending mbox cmds */
2328 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2329 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2330 if (pmb->mbox_cmpl) {
2331 spin_unlock_irqrestore(phba->host->host_lock, flags);
2332 pmb->mbox_cmpl(phba,pmb);
2333 spin_lock_irqsave(phba->host->host_lock, flags);
2334 }
2335 }
2336
2337 INIT_LIST_HEAD(&psli->mboxq);
2338
2339 spin_unlock_irqrestore(phba->host->host_lock, flags);
2340
2341 /*
2342 * Provided the hba is not in an error state, reset it. It is not
2343 * capable of IO anymore.
2344 */
2345 if (phba->hba_state != LPFC_HBA_ERROR) {
2346 phba->hba_state = LPFC_INIT_START;
2347 lpfc_sli_brdreset(phba, 1);
2348 }
2349
2350 return 1;
2351}
2352
2353void
2354lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2355{
2356 uint32_t *src = srcp;
2357 uint32_t *dest = destp;
2358 uint32_t ldata;
2359 int i;
2360
2361 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2362 ldata = *src;
2363 ldata = le32_to_cpu(ldata);
2364 *dest = ldata;
2365 src++;
2366 dest++;
2367 }
2368}
2369
2370int
2371lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2372 struct lpfc_dmabuf * mp)
2373{
2374 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2375 later */
2376 list_add_tail(&mp->list, &pring->postbufq);
2377
2378 pring->postbufq_cnt++;
2379 return 0;
2380}
2381
2382
2383struct lpfc_dmabuf *
2384lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2385 dma_addr_t phys)
2386{
2387 struct lpfc_dmabuf *mp, *next_mp;
2388 struct list_head *slp = &pring->postbufq;
2389
2390 /* Search postbufq, from the begining, looking for a match on phys */
2391 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2392 if (mp->phys == phys) {
2393 list_del_init(&mp->list);
2394 pring->postbufq_cnt--;
2395 return mp;
2396 }
2397 }
2398
2399 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2400 "%d:0410 Cannot find virtual addr for mapped buf on "
2401 "ring %d Data x%llx x%p x%p x%x\n",
2402 phba->brd_no, pring->ringno, (unsigned long long)phys,
2403 slp->next, slp->prev, pring->postbufq_cnt);
2404 return NULL;
2405}
2406
2407static void
2408lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2409 struct lpfc_iocbq * rspiocb)
2410{
2411 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2412 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2413 * just aborted.
2414 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2415 */
2416 if (cmdiocb->context2) {
2417 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2418
2419 /* Free the response IOCB before completing the abort
2420 command. */
2421 buf_ptr = NULL;
2422 list_remove_head((&buf_ptr1->list), buf_ptr,
2423 struct lpfc_dmabuf, list);
2424 if (buf_ptr) {
2425 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2426 kfree(buf_ptr);
2427 }
2428 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2429 kfree(buf_ptr1);
2430 }
2431
2432 if (cmdiocb->context3) {
2433 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2434 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2435 kfree(buf_ptr);
2436 }
2437
2438 list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
2439 return;
2440}
2441
2442int
2443lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2444 struct lpfc_sli_ring * pring,
2445 struct lpfc_iocbq * cmdiocb)
2446{
2447 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2448 struct lpfc_iocbq *abtsiocbp = NULL;
2449 IOCB_t *icmd = NULL;
2450 IOCB_t *iabt = NULL;
2451
2452 /* issue ABTS for this IOCB based on iotag */
2453 list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
2454 if (abtsiocbp == NULL)
2455 return 0;
2456 memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
2457
2458 iabt = &abtsiocbp->iocb;
2459 icmd = &cmdiocb->iocb;
2460 switch (icmd->ulpCommand) {
2461 case CMD_ELS_REQUEST64_CR:
2462 /* Even though we abort the ELS command, the firmware may access
2463 * the BPL or other resources before it processes our
2464 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2465 * resources till the actual abort request completes.
2466 */
2467 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2468 abtsiocbp->context2 = cmdiocb->context2;
2469 abtsiocbp->context3 = cmdiocb->context3;
2470 cmdiocb->context2 = NULL;
2471 cmdiocb->context3 = NULL;
2472 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2473 break;
2474 default:
2475 list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
2476 return 0;
2477 }
2478
2479 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2480 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2481
2482 iabt->ulpLe = 1;
2483 iabt->ulpClass = CLASS3;
2484 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2485
2486 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
2487 list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
2488 return 0;
2489 }
2490
2491 return 1;
2492}
2493
2494static int
2495lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
2496 uint64_t lun_id, struct lpfc_iocbq *iocb,
2497 uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
2498{
2499 int rc = 1;
2500
2501 if (lpfc_cmd == NULL)
2502 return rc;
2503
2504 switch (ctx_cmd) {
2505 case LPFC_CTX_LUN:
2506 if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
2507 (lpfc_cmd->pCmd->device->lun == lun_id))
2508 rc = 0;
2509 break;
2510 case LPFC_CTX_TGT:
2511 if (lpfc_cmd->pCmd->device->id == tgt_id)
2512 rc = 0;
2513 break;
2514 case LPFC_CTX_CTX:
2515 if (iocb->iocb.ulpContext == ctx)
2516 rc = 0;
2517 case LPFC_CTX_HOST:
2518 rc = 0;
2519 break;
2520 default:
2521 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2522 __FUNCTION__, ctx_cmd);
2523 break;
2524 }
2525
2526 return rc;
2527}
2528
2529int
2530lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2531 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2532{
2533 struct lpfc_iocbq *iocb, *next_iocb;
2534 IOCB_t *cmd = NULL;
2535 struct lpfc_scsi_buf *lpfc_cmd;
2536 int sum = 0, ret_val = 0;
2537
2538 /* Next check the txcmplq */
2539 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2540 cmd = &iocb->iocb;
2541
2542 /* Must be a FCP command */
2543 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2544 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2545 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2546 continue;
2547 }
2548
2549 /* context1 MUST be a struct lpfc_scsi_buf */
2550 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2551 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2552 NULL, 0, ctx_cmd);
2553 if (ret_val != 0)
2554 continue;
2555 sum++;
2556 }
2557 return sum;
2558}
2559
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002560void
2561lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2562 struct lpfc_iocbq * rspiocb)
2563{
2564 spin_lock_irq(phba->host->host_lock);
2565 list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
2566 spin_unlock_irq(phba->host->host_lock);
2567 return;
2568}
2569
dea31012005-04-17 16:05:31 -05002570int
2571lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2572 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2573 lpfc_ctx_cmd abort_cmd)
2574{
2575 struct lpfc_iocbq *iocb, *next_iocb;
2576 struct lpfc_iocbq *abtsiocb = NULL;
2577 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2578 IOCB_t *cmd = NULL;
2579 struct lpfc_scsi_buf *lpfc_cmd;
2580 int errcnt = 0, ret_val = 0;
2581
2582 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2583 cmd = &iocb->iocb;
2584
2585 /* Must be a FCP command */
2586 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2587 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2588 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2589 continue;
2590 }
2591
2592 /* context1 MUST be a struct lpfc_scsi_buf */
2593 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2594 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2595 iocb, ctx, abort_cmd);
2596 if (ret_val != 0)
2597 continue;
2598
2599 /* issue ABTS for this IOCB based on iotag */
2600 list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
2601 list);
2602 if (abtsiocb == NULL) {
2603 errcnt++;
2604 continue;
2605 }
2606 memset(abtsiocb, 0, sizeof (struct lpfc_iocbq));
2607
2608 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2609 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2610 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2611 abtsiocb->iocb.ulpLe = 1;
2612 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2613
2614 if (phba->hba_state >= LPFC_LINK_UP)
2615 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2616 else
2617 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2618
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002619 /* Setup callback routine and issue the command. */
2620 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea31012005-04-17 16:05:31 -05002621 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2622 if (ret_val == IOCB_ERROR) {
2623 list_add_tail(&abtsiocb->list, lpfc_iocb_list);
2624 errcnt++;
2625 continue;
2626 }
2627 }
2628
2629 return errcnt;
2630}
2631
2632void
2633lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
2634 struct lpfc_iocbq * queue1,
2635 struct lpfc_iocbq * queue2)
2636{
2637 if (queue1->context2 && queue2)
2638 memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
2639
2640 /* The waiter is looking for LPFC_IO_HIPRI bit to be set
2641 as a signal to wake up */
2642 queue1->iocb_flag |= LPFC_IO_HIPRI;
2643 return;
2644}
2645
2646int
2647lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
2648 struct lpfc_sli_ring * pring,
2649 struct lpfc_iocbq * piocb,
2650 uint32_t flag,
2651 struct lpfc_iocbq * prspiocbq,
2652 uint32_t timeout)
2653{
2654 int j, delay_time, retval = IOCB_ERROR;
2655
2656 /* The caller must left context1 empty. */
2657 if (piocb->context_un.hipri_wait_queue != 0) {
2658 return IOCB_ERROR;
2659 }
2660
2661 /*
2662 * If the caller has provided a response iocbq buffer, context2 must
2663 * be NULL or its an error.
2664 */
2665 if (prspiocbq && piocb->context2) {
2666 return IOCB_ERROR;
2667 }
2668
2669 piocb->context2 = prspiocbq;
2670
2671 /* Setup callback routine and issue the command. */
2672 piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
2673 retval = lpfc_sli_issue_iocb(phba, pring, piocb,
2674 flag | SLI_IOCB_HIGH_PRIORITY);
2675 if (retval != IOCB_SUCCESS) {
2676 piocb->context2 = NULL;
2677 return IOCB_ERROR;
2678 }
2679
2680 /*
2681 * This high-priority iocb was sent out-of-band. Poll for its
2682 * completion rather than wait for a signal. Note that the host_lock
2683 * is held by the midlayer and must be released here to allow the
2684 * interrupt handlers to complete the IO and signal this routine via
2685 * the iocb_flag.
2686 * Also, the delay_time is computed to be one second longer than
2687 * the scsi command timeout to give the FW time to abort on
2688 * timeout rather than the driver just giving up. Typically,
2689 * the midlayer does not specify a time for this command so the
2690 * driver is free to enforce its own timeout.
2691 */
2692
2693 delay_time = ((timeout + 1) * 1000) >> 6;
2694 retval = IOCB_ERROR;
2695 spin_unlock_irq(phba->host->host_lock);
2696 for (j = 0; j < 64; j++) {
2697 msleep(delay_time);
2698 if (piocb->iocb_flag & LPFC_IO_HIPRI) {
2699 piocb->iocb_flag &= ~LPFC_IO_HIPRI;
2700 retval = IOCB_SUCCESS;
2701 break;
2702 }
2703 }
2704
2705 spin_lock_irq(phba->host->host_lock);
2706 piocb->context2 = NULL;
2707 return retval;
2708}
2709int
2710lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
2711 uint32_t timeout)
2712{
2713 DECLARE_WAIT_QUEUE_HEAD(done_q);
2714 DECLARE_WAITQUEUE(wq_entry, current);
2715 uint32_t timeleft = 0;
2716 int retval;
2717
2718 /* The caller must leave context1 empty. */
2719 if (pmboxq->context1 != 0) {
2720 return (MBX_NOT_FINISHED);
2721 }
2722
2723 /* setup wake call as IOCB callback */
2724 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
2725 /* setup context field to pass wait_queue pointer to wake function */
2726 pmboxq->context1 = &done_q;
2727
2728 /* start to sleep before we wait, to avoid races */
2729 set_current_state(TASK_INTERRUPTIBLE);
2730 add_wait_queue(&done_q, &wq_entry);
2731
2732 /* now issue the command */
2733 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2734
2735 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
2736 timeleft = schedule_timeout(timeout * HZ);
2737 pmboxq->context1 = NULL;
2738 /* if schedule_timeout returns 0, we timed out and were not
2739 woken up */
2740 if (timeleft == 0) {
2741 retval = MBX_TIMEOUT;
2742 } else {
2743 retval = MBX_SUCCESS;
2744 }
2745 }
2746
2747
2748 set_current_state(TASK_RUNNING);
2749 remove_wait_queue(&done_q, &wq_entry);
2750 return retval;
2751}
2752
2753irqreturn_t
2754lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
2755{
2756 struct lpfc_hba *phba;
2757 uint32_t ha_copy;
2758 uint32_t work_ha_copy;
2759 unsigned long status;
2760 int i;
2761 uint32_t control;
2762
2763 /*
2764 * Get the driver's phba structure from the dev_id and
2765 * assume the HBA is not interrupting.
2766 */
2767 phba = (struct lpfc_hba *) dev_id;
2768
2769 if (unlikely(!phba))
2770 return IRQ_NONE;
2771
2772 phba->sli.slistat.sli_intr++;
2773
2774 /*
2775 * Call the HBA to see if it is interrupting. If not, don't claim
2776 * the interrupt
2777 */
2778
2779 /* Ignore all interrupts during initialization. */
2780 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2781 return IRQ_NONE;
2782
2783 /*
2784 * Read host attention register to determine interrupt source
2785 * Clear Attention Sources, except Error Attention (to
2786 * preserve status) and Link Attention
2787 */
2788 spin_lock(phba->host->host_lock);
2789 ha_copy = readl(phba->HAregaddr);
2790 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
2791 readl(phba->HAregaddr); /* flush */
2792 spin_unlock(phba->host->host_lock);
2793
2794 if (unlikely(!ha_copy))
2795 return IRQ_NONE;
2796
2797 work_ha_copy = ha_copy & phba->work_ha_mask;
2798
2799 if (unlikely(work_ha_copy)) {
2800 if (work_ha_copy & HA_LATT) {
2801 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
2802 /*
2803 * Turn off Link Attention interrupts
2804 * until CLEAR_LA done
2805 */
2806 spin_lock(phba->host->host_lock);
2807 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
2808 control = readl(phba->HCregaddr);
2809 control &= ~HC_LAINT_ENA;
2810 writel(control, phba->HCregaddr);
2811 readl(phba->HCregaddr); /* flush */
2812 spin_unlock(phba->host->host_lock);
2813 }
2814 else
2815 work_ha_copy &= ~HA_LATT;
2816 }
2817
2818 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
2819 for (i = 0; i < phba->sli.num_rings; i++) {
2820 if (work_ha_copy & (HA_RXATT << (4*i))) {
2821 /*
2822 * Turn off Slow Rings interrupts
2823 */
2824 spin_lock(phba->host->host_lock);
2825 control = readl(phba->HCregaddr);
2826 control &= ~(HC_R0INT_ENA << i);
2827 writel(control, phba->HCregaddr);
2828 readl(phba->HCregaddr); /* flush */
2829 spin_unlock(phba->host->host_lock);
2830 }
2831 }
2832 }
2833
2834 if (work_ha_copy & HA_ERATT) {
2835 phba->hba_state = LPFC_HBA_ERROR;
2836 /*
2837 * There was a link/board error. Read the
2838 * status register to retrieve the error event
2839 * and process it.
2840 */
2841 phba->sli.slistat.err_attn_event++;
2842 /* Save status info */
2843 phba->work_hs = readl(phba->HSregaddr);
2844 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
2845 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
2846
2847 /* Clear Chip error bit */
2848 writel(HA_ERATT, phba->HAregaddr);
2849 readl(phba->HAregaddr); /* flush */
2850
2851 /*
2852 * Reseting the HBA is the only reliable way
2853 * to shutdown interrupt when there is a
2854 * ERROR.
2855 */
2856 lpfc_sli_send_reset(phba, phba->hba_state);
2857 }
2858
2859 spin_lock(phba->host->host_lock);
2860 phba->work_ha |= work_ha_copy;
2861 if (phba->work_wait)
2862 wake_up(phba->work_wait);
2863 spin_unlock(phba->host->host_lock);
2864 }
2865
2866 ha_copy &= ~(phba->work_ha_mask);
2867
2868 /*
2869 * Process all events on FCP ring. Take the optimized path for
2870 * FCP IO. Any other IO is slow path and is handled by
2871 * the worker thread.
2872 */
2873 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
2874 status >>= (4*LPFC_FCP_RING);
2875 if (status & HA_RXATT)
2876 lpfc_sli_handle_fast_ring_event(phba,
2877 &phba->sli.ring[LPFC_FCP_RING],
2878 status);
2879 return IRQ_HANDLED;
2880
2881} /* lpfc_intr_handler */