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Archit Tanejae1ef4d22010-09-15 18:47:29 +05301/*
2 * linux/drivers/video/omap2/dss/dss_features.c
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/err.h>
23#include <linux/slab.h>
24
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030025#include <video/omapdss.h>
Archit Tanejae1ef4d22010-09-15 18:47:29 +053026#include <plat/cpu.h>
27
Archit Taneja067a57e2011-03-02 11:57:25 +053028#include "dss.h"
Archit Tanejae1ef4d22010-09-15 18:47:29 +053029#include "dss_features.h"
30
31/* Defines a generic omap register field */
32struct dss_reg_field {
Archit Tanejae1ef4d22010-09-15 18:47:29 +053033 u8 start, end;
34};
35
Taneja, Archit31ef8232011-03-14 23:28:22 -050036struct dss_param_range {
37 int min, max;
38};
39
Archit Tanejae1ef4d22010-09-15 18:47:29 +053040struct omap_dss_features {
41 const struct dss_reg_field *reg_fields;
42 const int num_reg_fields;
43
Archit Tanejac124f232012-01-30 10:52:39 +053044 const enum dss_feat_id *features;
45 const int num_features;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053046
47 const int num_mgrs;
48 const int num_ovls;
49 const enum omap_display_type *supported_displays;
50 const enum omap_color_mode *supported_color_modes;
Tomi Valkeinen67019db2011-08-15 15:18:15 +030051 const enum omap_overlay_caps *overlay_caps;
Taneja, Archit235e7db2011-03-14 23:28:21 -050052 const char * const *clksrc_names;
Taneja, Archit31ef8232011-03-14 23:28:22 -050053 const struct dss_param_range *dss_params;
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +030054
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +053055 const enum omap_dss_rotation_type supported_rotation_types;
56
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +030057 const u32 buffer_size_unit;
58 const u32 burst_size_unit;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053059};
60
61/* This struct is assigned to one of the below during initialization */
Tomi Valkeinenea290332011-04-20 10:09:36 +030062static const struct omap_dss_features *omap_current_dss_features;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053063
64static const struct dss_reg_field omap2_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050065 [FEAT_REG_FIRHINC] = { 11, 0 },
66 [FEAT_REG_FIRVINC] = { 27, 16 },
67 [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
68 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
69 [FEAT_REG_FIFOSIZE] = { 8, 0 },
70 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
71 [FEAT_REG_VERTICALACCU] = { 25, 16 },
72 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
73 [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
74 [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
75 [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
76 [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +053077};
78
79static const struct dss_reg_field omap3_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050080 [FEAT_REG_FIRHINC] = { 12, 0 },
81 [FEAT_REG_FIRVINC] = { 28, 16 },
82 [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
83 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
84 [FEAT_REG_FIFOSIZE] = { 10, 0 },
85 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
86 [FEAT_REG_VERTICALACCU] = { 25, 16 },
87 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
88 [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
89 [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
90 [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
91 [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
Archit Taneja87a74842011-03-02 11:19:50 +053092};
93
94static const struct dss_reg_field omap4_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050095 [FEAT_REG_FIRHINC] = { 12, 0 },
96 [FEAT_REG_FIRVINC] = { 28, 16 },
97 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
98 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
99 [FEAT_REG_FIFOSIZE] = { 15, 0 },
100 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
101 [FEAT_REG_VERTICALACCU] = { 26, 16 },
102 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
103 [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
104 [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
105 [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
106 [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530107};
108
Archit Taneja23362832012-04-08 16:47:01 +0530109static const struct dss_reg_field omap5_dss_reg_fields[] = {
110 [FEAT_REG_FIRHINC] = { 12, 0 },
111 [FEAT_REG_FIRVINC] = { 28, 16 },
112 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
113 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
114 [FEAT_REG_FIFOSIZE] = { 15, 0 },
115 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
116 [FEAT_REG_VERTICALACCU] = { 26, 16 },
117 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 },
118 [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
119 [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
120 [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
121 [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
122};
123
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530124static const enum omap_display_type omap2_dss_supported_displays[] = {
125 /* OMAP_DSS_CHANNEL_LCD */
Tomi Valkeinenf8df01f2011-02-24 14:21:25 +0200126 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530127
128 /* OMAP_DSS_CHANNEL_DIGIT */
129 OMAP_DISPLAY_TYPE_VENC,
130};
131
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200132static const enum omap_display_type omap3430_dss_supported_displays[] = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530133 /* OMAP_DSS_CHANNEL_LCD */
134 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
135 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
136
137 /* OMAP_DSS_CHANNEL_DIGIT */
138 OMAP_DISPLAY_TYPE_VENC,
139};
140
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200141static const enum omap_display_type omap3630_dss_supported_displays[] = {
142 /* OMAP_DSS_CHANNEL_LCD */
143 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
144 OMAP_DISPLAY_TYPE_DSI,
145
146 /* OMAP_DSS_CHANNEL_DIGIT */
147 OMAP_DISPLAY_TYPE_VENC,
148};
149
Archit Tanejad50cd032010-12-02 11:27:08 +0000150static const enum omap_display_type omap4_dss_supported_displays[] = {
151 /* OMAP_DSS_CHANNEL_LCD */
152 OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
153
154 /* OMAP_DSS_CHANNEL_DIGIT */
Mythri P Kb1196012011-03-08 17:15:54 +0530155 OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
Archit Tanejad50cd032010-12-02 11:27:08 +0000156
157 /* OMAP_DSS_CHANNEL_LCD2 */
158 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
159 OMAP_DISPLAY_TYPE_DSI,
160};
161
Archit Taneja23362832012-04-08 16:47:01 +0530162static const enum omap_display_type omap5_dss_supported_displays[] = {
163 /* OMAP_DSS_CHANNEL_LCD */
164 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
165 OMAP_DISPLAY_TYPE_DSI,
166
167 /* OMAP_DSS_CHANNEL_DIGIT */
168 OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
169
170 /* OMAP_DSS_CHANNEL_LCD2 */
171 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
172 OMAP_DISPLAY_TYPE_DSI,
173};
174
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530175static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
176 /* OMAP_DSS_GFX */
177 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
178 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
179 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
180 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
181
182 /* OMAP_DSS_VIDEO1 */
183 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
184 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
185 OMAP_DSS_COLOR_UYVY,
186
187 /* OMAP_DSS_VIDEO2 */
188 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
189 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
190 OMAP_DSS_COLOR_UYVY,
191};
192
193static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
194 /* OMAP_DSS_GFX */
195 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
196 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
197 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
198 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
199 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
200 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
201
202 /* OMAP_DSS_VIDEO1 */
203 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
204 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
205 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
206
207 /* OMAP_DSS_VIDEO2 */
208 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
209 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
210 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
211 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
212 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
213};
214
Amber Jainf20e4222011-05-19 19:47:50 +0530215static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
216 /* OMAP_DSS_GFX */
217 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
218 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
219 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
220 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
221 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
222 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
Lajos Molnar08f32672012-02-21 19:36:30 +0530223 OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
224 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
Amber Jainf20e4222011-05-19 19:47:50 +0530225
226 /* OMAP_DSS_VIDEO1 */
227 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
228 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
229 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
230 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
231 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
232 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
233 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
234 OMAP_DSS_COLOR_RGBX32,
235
236 /* OMAP_DSS_VIDEO2 */
237 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
238 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
239 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
240 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
241 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
242 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
243 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
244 OMAP_DSS_COLOR_RGBX32,
Archit Tanejab8c095b2011-09-13 18:20:33 +0530245
246 /* OMAP_DSS_VIDEO3 */
247 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
248 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
249 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
250 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
251 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
252 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
253 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
254 OMAP_DSS_COLOR_RGBX32,
Amber Jainf20e4222011-05-19 19:47:50 +0530255};
256
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300257static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
258 /* OMAP_DSS_GFX */
259 0,
260
261 /* OMAP_DSS_VIDEO1 */
262 OMAP_DSS_OVL_CAP_SCALE,
263
264 /* OMAP_DSS_VIDEO2 */
265 OMAP_DSS_OVL_CAP_SCALE,
266};
267
268static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
269 /* OMAP_DSS_GFX */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300270 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300271
272 /* OMAP_DSS_VIDEO1 */
273 OMAP_DSS_OVL_CAP_SCALE,
274
275 /* OMAP_DSS_VIDEO2 */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300276 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300277};
278
279static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
280 /* OMAP_DSS_GFX */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300281 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300282
283 /* OMAP_DSS_VIDEO1 */
284 OMAP_DSS_OVL_CAP_SCALE,
285
286 /* OMAP_DSS_VIDEO2 */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300287 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
288 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300289};
290
291static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
292 /* OMAP_DSS_GFX */
Archit Taneja11354dd2011-09-26 11:47:29 +0530293 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
294 OMAP_DSS_OVL_CAP_ZORDER,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300295
296 /* OMAP_DSS_VIDEO1 */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300297 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
Archit Taneja11354dd2011-09-26 11:47:29 +0530298 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300299
300 /* OMAP_DSS_VIDEO2 */
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300301 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
Archit Taneja11354dd2011-09-26 11:47:29 +0530302 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
Archit Tanejab8c095b2011-09-13 18:20:33 +0530303
304 /* OMAP_DSS_VIDEO3 */
305 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
306 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300307};
308
Taneja, Archit235e7db2011-03-14 23:28:21 -0500309static const char * const omap2_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530310 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
311 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
312 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
Archit Taneja067a57e2011-03-02 11:57:25 +0530313};
314
Taneja, Archit235e7db2011-03-14 23:28:21 -0500315static const char * const omap3_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530316 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
317 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
318 [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
Archit Taneja067a57e2011-03-02 11:57:25 +0530319};
320
Taneja, Archit235e7db2011-03-14 23:28:21 -0500321static const char * const omap4_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530322 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
323 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
324 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
Archit Taneja5a8b5722011-05-12 17:26:29 +0530325 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
326 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
Taneja, Architea751592011-03-08 05:50:35 -0600327};
328
Archit Taneja23362832012-04-08 16:47:01 +0530329static const char * const omap5_dss_clk_source_names[] = {
330 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1",
331 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2",
332 [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK",
333 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
334 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2",
335};
336
Taneja, Archit31ef8232011-03-14 23:28:22 -0500337static const struct dss_param_range omap2_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500338 [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
Tomi Valkeinen9eaaf202011-08-29 15:56:04 +0300339 [FEAT_PARAM_DSS_PCD] = { 2, 255 },
Taneja, Archit49641112011-03-14 23:28:23 -0500340 [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
341 [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
342 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
343 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
344 [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
345 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
Archit Taneja0373cac2011-09-08 13:25:17 +0530346 [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
Chandrabhanu Mahapatra7282f1b2011-12-19 14:03:56 +0530347 /*
348 * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
349 * scaler cannot scale a image with width more than 768.
350 */
351 [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
Archit Taneja8f366162012-04-16 12:53:44 +0530352 [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
353 [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
Taneja, Archit31ef8232011-03-14 23:28:22 -0500354};
355
356static const struct dss_param_range omap3_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500357 [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
Tomi Valkeinen9eaaf202011-08-29 15:56:04 +0300358 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
Taneja, Archit49641112011-03-14 23:28:23 -0500359 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
360 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
361 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
362 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
363 [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
364 [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
Tomi Valkeinenbc63f302012-08-16 16:25:29 +0300365 [FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
Archit Taneja0373cac2011-09-08 13:25:17 +0530366 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
Chandrabhanu Mahapatra7282f1b2011-12-19 14:03:56 +0530367 [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
Archit Taneja8f366162012-04-16 12:53:44 +0530368 [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
369 [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
Taneja, Archit31ef8232011-03-14 23:28:22 -0500370};
371
372static const struct dss_param_range omap4_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500373 [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
Tomi Valkeinen9eaaf202011-08-29 15:56:04 +0300374 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
Taneja, Archit49641112011-03-14 23:28:23 -0500375 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
376 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
377 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
378 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
379 [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
380 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
Tomi Valkeinenbc63f302012-08-16 16:25:29 +0300381 [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
Archit Taneja0373cac2011-09-08 13:25:17 +0530382 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
Chandrabhanu Mahapatra7282f1b2011-12-19 14:03:56 +0530383 [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
Archit Taneja8f366162012-04-16 12:53:44 +0530384 [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
385 [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
Taneja, Archit31ef8232011-03-14 23:28:22 -0500386};
387
Archit Taneja23362832012-04-08 16:47:01 +0530388static const struct dss_param_range omap5_dss_param_range[] = {
389 [FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
390 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
391 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
392 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
393 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
394 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
395 [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
396 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
397 [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
398 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
399 [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
400 [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
401 [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
402};
403
Archit Tanejac124f232012-01-30 10:52:39 +0530404static const enum dss_feat_id omap2_dss_feat_list[] = {
405 FEAT_LCDENABLEPOL,
406 FEAT_LCDENABLESIGNAL,
407 FEAT_PCKFREEENABLE,
408 FEAT_FUNCGATED,
409 FEAT_ROWREPEATENABLE,
410 FEAT_RESIZECONF,
411};
412
413static const enum dss_feat_id omap3430_dss_feat_list[] = {
414 FEAT_LCDENABLEPOL,
415 FEAT_LCDENABLESIGNAL,
416 FEAT_PCKFREEENABLE,
417 FEAT_FUNCGATED,
418 FEAT_LINEBUFFERSPLIT,
419 FEAT_ROWREPEATENABLE,
420 FEAT_RESIZECONF,
421 FEAT_DSI_PLL_FREQSEL,
422 FEAT_DSI_REVERSE_TXCLKESC,
423 FEAT_VENC_REQUIRES_TV_DAC_CLK,
424 FEAT_CPR,
425 FEAT_PRELOAD,
426 FEAT_FIR_COEF_V,
427 FEAT_ALPHA_FIXED_ZORDER,
428 FEAT_FIFO_MERGE,
429 FEAT_OMAP3_DSI_FIFO_BUG,
Chandrabhanu Mahapatra195e6722012-08-22 11:44:06 +0530430 FEAT_DPI_USES_VDDS_DSI,
Archit Tanejac124f232012-01-30 10:52:39 +0530431};
432
433static const enum dss_feat_id omap3630_dss_feat_list[] = {
434 FEAT_LCDENABLEPOL,
435 FEAT_LCDENABLESIGNAL,
436 FEAT_PCKFREEENABLE,
437 FEAT_FUNCGATED,
438 FEAT_LINEBUFFERSPLIT,
439 FEAT_ROWREPEATENABLE,
440 FEAT_RESIZECONF,
441 FEAT_DSI_PLL_PWR_BUG,
442 FEAT_DSI_PLL_FREQSEL,
443 FEAT_CPR,
444 FEAT_PRELOAD,
445 FEAT_FIR_COEF_V,
446 FEAT_ALPHA_FIXED_ZORDER,
447 FEAT_FIFO_MERGE,
448 FEAT_OMAP3_DSI_FIFO_BUG,
449};
450
451static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
452 FEAT_MGR_LCD2,
453 FEAT_CORE_CLK_DIV,
454 FEAT_LCD_CLK_SRC,
455 FEAT_DSI_DCS_CMD_CONFIG_VC,
456 FEAT_DSI_VC_OCP_WIDTH,
457 FEAT_DSI_GNQ,
458 FEAT_HANDLE_UV_SEPARATE,
459 FEAT_ATTR2,
460 FEAT_CPR,
461 FEAT_PRELOAD,
462 FEAT_FIR_COEF_V,
463 FEAT_ALPHA_FREE_ZORDER,
464 FEAT_FIFO_MERGE,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530465 FEAT_BURST_2D,
Archit Tanejac124f232012-01-30 10:52:39 +0530466};
467
Ricardo Neri70988192012-02-16 09:20:57 -0600468static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
469 FEAT_MGR_LCD2,
470 FEAT_CORE_CLK_DIV,
471 FEAT_LCD_CLK_SRC,
472 FEAT_DSI_DCS_CMD_CONFIG_VC,
473 FEAT_DSI_VC_OCP_WIDTH,
474 FEAT_DSI_GNQ,
475 FEAT_HDMI_CTS_SWMODE,
476 FEAT_HANDLE_UV_SEPARATE,
477 FEAT_ATTR2,
478 FEAT_CPR,
479 FEAT_PRELOAD,
480 FEAT_FIR_COEF_V,
481 FEAT_ALPHA_FREE_ZORDER,
482 FEAT_FIFO_MERGE,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530483 FEAT_BURST_2D,
Ricardo Neri70988192012-02-16 09:20:57 -0600484};
485
Archit Tanejac124f232012-01-30 10:52:39 +0530486static const enum dss_feat_id omap4_dss_feat_list[] = {
487 FEAT_MGR_LCD2,
488 FEAT_CORE_CLK_DIV,
489 FEAT_LCD_CLK_SRC,
490 FEAT_DSI_DCS_CMD_CONFIG_VC,
491 FEAT_DSI_VC_OCP_WIDTH,
492 FEAT_DSI_GNQ,
493 FEAT_HDMI_CTS_SWMODE,
Ricardo Neri70988192012-02-16 09:20:57 -0600494 FEAT_HDMI_AUDIO_USE_MCLK,
Archit Tanejac124f232012-01-30 10:52:39 +0530495 FEAT_HANDLE_UV_SEPARATE,
496 FEAT_ATTR2,
497 FEAT_CPR,
498 FEAT_PRELOAD,
499 FEAT_FIR_COEF_V,
500 FEAT_ALPHA_FREE_ZORDER,
501 FEAT_FIFO_MERGE,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530502 FEAT_BURST_2D,
Archit Tanejac124f232012-01-30 10:52:39 +0530503};
504
Archit Taneja23362832012-04-08 16:47:01 +0530505static const enum dss_feat_id omap5_dss_feat_list[] = {
506 FEAT_MGR_LCD2,
507 FEAT_CORE_CLK_DIV,
508 FEAT_LCD_CLK_SRC,
509 FEAT_DSI_DCS_CMD_CONFIG_VC,
510 FEAT_DSI_VC_OCP_WIDTH,
511 FEAT_DSI_GNQ,
512 FEAT_HDMI_CTS_SWMODE,
513 FEAT_HDMI_AUDIO_USE_MCLK,
514 FEAT_HANDLE_UV_SEPARATE,
515 FEAT_ATTR2,
516 FEAT_CPR,
517 FEAT_PRELOAD,
518 FEAT_FIR_COEF_V,
519 FEAT_ALPHA_FREE_ZORDER,
520 FEAT_FIFO_MERGE,
521 FEAT_BURST_2D,
Tomi Valkeinenf8ef3d62012-08-22 16:00:31 +0300522 FEAT_DSI_PLL_SELFREQDCO,
Archit Taneja23362832012-04-08 16:47:01 +0530523};
524
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530525/* OMAP2 DSS Features */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300526static const struct omap_dss_features omap2_dss_features = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530527 .reg_fields = omap2_dss_reg_fields,
528 .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
529
Archit Tanejac124f232012-01-30 10:52:39 +0530530 .features = omap2_dss_feat_list,
531 .num_features = ARRAY_SIZE(omap2_dss_feat_list),
Archit Tanejad50cd032010-12-02 11:27:08 +0000532
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530533 .num_mgrs = 2,
534 .num_ovls = 3,
535 .supported_displays = omap2_dss_supported_displays,
536 .supported_color_modes = omap2_dss_supported_color_modes,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300537 .overlay_caps = omap2_dss_overlay_caps,
Archit Taneja067a57e2011-03-02 11:57:25 +0530538 .clksrc_names = omap2_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500539 .dss_params = omap2_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530540 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300541 .buffer_size_unit = 1,
542 .burst_size_unit = 8,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530543};
544
545/* OMAP3 DSS Features */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300546static const struct omap_dss_features omap3430_dss_features = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530547 .reg_fields = omap3_dss_reg_fields,
548 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
549
Archit Tanejac124f232012-01-30 10:52:39 +0530550 .features = omap3430_dss_feat_list,
551 .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530552
553 .num_mgrs = 2,
554 .num_ovls = 3,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200555 .supported_displays = omap3430_dss_supported_displays,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530556 .supported_color_modes = omap3_dss_supported_color_modes,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300557 .overlay_caps = omap3430_dss_overlay_caps,
Archit Taneja067a57e2011-03-02 11:57:25 +0530558 .clksrc_names = omap3_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500559 .dss_params = omap3_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530560 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300561 .buffer_size_unit = 1,
562 .burst_size_unit = 8,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530563};
564
Tomi Valkeinenea290332011-04-20 10:09:36 +0300565static const struct omap_dss_features omap3630_dss_features = {
Samreen8fbde102010-11-04 12:28:41 +0100566 .reg_fields = omap3_dss_reg_fields,
567 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
568
Archit Tanejac124f232012-01-30 10:52:39 +0530569 .features = omap3630_dss_feat_list,
570 .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
Samreen8fbde102010-11-04 12:28:41 +0100571
572 .num_mgrs = 2,
573 .num_ovls = 3,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200574 .supported_displays = omap3630_dss_supported_displays,
Samreen8fbde102010-11-04 12:28:41 +0100575 .supported_color_modes = omap3_dss_supported_color_modes,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300576 .overlay_caps = omap3630_dss_overlay_caps,
Archit Taneja067a57e2011-03-02 11:57:25 +0530577 .clksrc_names = omap3_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500578 .dss_params = omap3_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530579 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300580 .buffer_size_unit = 1,
581 .burst_size_unit = 8,
Samreen8fbde102010-11-04 12:28:41 +0100582};
583
Archit Tanejad50cd032010-12-02 11:27:08 +0000584/* OMAP4 DSS Features */
Ricardo Neri6ff70842011-05-18 22:23:33 -0500585/* For OMAP4430 ES 1.0 revision */
586static const struct omap_dss_features omap4430_es1_0_dss_features = {
587 .reg_fields = omap4_dss_reg_fields,
588 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
589
Archit Tanejac124f232012-01-30 10:52:39 +0530590 .features = omap4430_es1_0_dss_feat_list,
591 .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
Ricardo Neri6ff70842011-05-18 22:23:33 -0500592
593 .num_mgrs = 3,
Archit Tanejab8c095b2011-09-13 18:20:33 +0530594 .num_ovls = 4,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500595 .supported_displays = omap4_dss_supported_displays,
Amber Jainf20e4222011-05-19 19:47:50 +0530596 .supported_color_modes = omap4_dss_supported_color_modes,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300597 .overlay_caps = omap4_dss_overlay_caps,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500598 .clksrc_names = omap4_dss_clk_source_names,
599 .dss_params = omap4_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530600 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300601 .buffer_size_unit = 16,
602 .burst_size_unit = 16,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500603};
604
Ricardo Neri70988192012-02-16 09:20:57 -0600605/* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
606static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
607 .reg_fields = omap4_dss_reg_fields,
608 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
609
610 .features = omap4430_es2_0_1_2_dss_feat_list,
611 .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
612
613 .num_mgrs = 3,
614 .num_ovls = 4,
615 .supported_displays = omap4_dss_supported_displays,
616 .supported_color_modes = omap4_dss_supported_color_modes,
617 .overlay_caps = omap4_dss_overlay_caps,
618 .clksrc_names = omap4_dss_clk_source_names,
619 .dss_params = omap4_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530620 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
Ricardo Neri70988192012-02-16 09:20:57 -0600621 .buffer_size_unit = 16,
622 .burst_size_unit = 16,
623};
624
Ricardo Neri6ff70842011-05-18 22:23:33 -0500625/* For all the other OMAP4 versions */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300626static const struct omap_dss_features omap4_dss_features = {
Archit Taneja87a74842011-03-02 11:19:50 +0530627 .reg_fields = omap4_dss_reg_fields,
628 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
Archit Tanejad50cd032010-12-02 11:27:08 +0000629
Archit Tanejac124f232012-01-30 10:52:39 +0530630 .features = omap4_dss_feat_list,
631 .num_features = ARRAY_SIZE(omap4_dss_feat_list),
Archit Tanejad50cd032010-12-02 11:27:08 +0000632
633 .num_mgrs = 3,
Archit Tanejab8c095b2011-09-13 18:20:33 +0530634 .num_ovls = 4,
Archit Tanejad50cd032010-12-02 11:27:08 +0000635 .supported_displays = omap4_dss_supported_displays,
Amber Jainf20e4222011-05-19 19:47:50 +0530636 .supported_color_modes = omap4_dss_supported_color_modes,
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300637 .overlay_caps = omap4_dss_overlay_caps,
Taneja, Architea751592011-03-08 05:50:35 -0600638 .clksrc_names = omap4_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500639 .dss_params = omap4_dss_param_range,
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530640 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300641 .buffer_size_unit = 16,
642 .burst_size_unit = 16,
Archit Tanejad50cd032010-12-02 11:27:08 +0000643};
644
Archit Taneja23362832012-04-08 16:47:01 +0530645/* OMAP5 DSS Features */
646static const struct omap_dss_features omap5_dss_features = {
647 .reg_fields = omap5_dss_reg_fields,
648 .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
649
650 .features = omap5_dss_feat_list,
651 .num_features = ARRAY_SIZE(omap5_dss_feat_list),
652
653 .num_mgrs = 3,
654 .num_ovls = 4,
655 .supported_displays = omap5_dss_supported_displays,
656 .supported_color_modes = omap4_dss_supported_color_modes,
657 .overlay_caps = omap4_dss_overlay_caps,
658 .clksrc_names = omap5_dss_clk_source_names,
659 .dss_params = omap5_dss_param_range,
660 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
661 .buffer_size_unit = 16,
662 .burst_size_unit = 16,
663};
664
Mythri P K60634a22011-09-08 19:06:26 +0530665#if defined(CONFIG_OMAP4_DSS_HDMI)
666/* HDMI OMAP4 Functions*/
667static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
668
669 .video_configure = ti_hdmi_4xxx_basic_configure,
670 .phy_enable = ti_hdmi_4xxx_phy_enable,
671 .phy_disable = ti_hdmi_4xxx_phy_disable,
672 .read_edid = ti_hdmi_4xxx_read_edid,
Tomi Valkeinen759593f2011-08-29 18:10:20 +0300673 .detect = ti_hdmi_4xxx_detect,
Mythri P K60634a22011-09-08 19:06:26 +0530674 .pll_enable = ti_hdmi_4xxx_pll_enable,
675 .pll_disable = ti_hdmi_4xxx_pll_disable,
676 .video_enable = ti_hdmi_4xxx_wp_video_start,
Ricardo Neric0456be2012-04-27 13:48:45 -0500677 .video_disable = ti_hdmi_4xxx_wp_video_stop,
Mythri P K162874d2011-09-22 13:37:45 +0530678 .dump_wrapper = ti_hdmi_4xxx_wp_dump,
679 .dump_core = ti_hdmi_4xxx_core_dump,
680 .dump_pll = ti_hdmi_4xxx_pll_dump,
681 .dump_phy = ti_hdmi_4xxx_phy_dump,
Ricardo Neri7e151f72012-03-15 14:08:03 -0600682#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
Ricardo Neri80a48592011-11-27 16:09:58 -0600683 .audio_enable = ti_hdmi_4xxx_wp_audio_enable,
Ricardo Neri027bdc82012-04-20 17:17:46 -0500684 .audio_disable = ti_hdmi_4xxx_wp_audio_disable,
Axel Castaneda Gonzalez3df9fb52012-05-03 09:00:21 -0500685 .audio_start = ti_hdmi_4xxx_audio_start,
686 .audio_stop = ti_hdmi_4xxx_audio_stop,
Ricardo Neri6ec355d2012-03-21 12:38:15 -0600687 .audio_config = ti_hdmi_4xxx_audio_config,
Ricardo Neri80a48592011-11-27 16:09:58 -0600688#endif
Mythri P K162874d2011-09-22 13:37:45 +0530689
Mythri P K60634a22011-09-08 19:06:26 +0530690};
691
692void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
693{
694 if (cpu_is_omap44xx())
695 ip_data->ops = &omap4_hdmi_functions;
696}
697#endif
698
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530699/* Functions returning values related to a DSS feature */
700int dss_feat_get_num_mgrs(void)
701{
702 return omap_current_dss_features->num_mgrs;
703}
704
705int dss_feat_get_num_ovls(void)
706{
707 return omap_current_dss_features->num_ovls;
708}
709
Taneja, Archit31ef8232011-03-14 23:28:22 -0500710unsigned long dss_feat_get_param_min(enum dss_range_param param)
Archit Taneja819d8072011-03-01 11:54:00 +0530711{
Taneja, Archit31ef8232011-03-14 23:28:22 -0500712 return omap_current_dss_features->dss_params[param].min;
713}
714
715unsigned long dss_feat_get_param_max(enum dss_range_param param)
716{
717 return omap_current_dss_features->dss_params[param].max;
Archit Taneja819d8072011-03-01 11:54:00 +0530718}
719
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530720enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
721{
722 return omap_current_dss_features->supported_displays[channel];
723}
724
725enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
726{
727 return omap_current_dss_features->supported_color_modes[plane];
728}
729
Tomi Valkeinen67019db2011-08-15 15:18:15 +0300730enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
731{
732 return omap_current_dss_features->overlay_caps[plane];
733}
734
Archit Taneja8dad2ab2010-11-25 17:58:10 +0530735bool dss_feat_color_mode_supported(enum omap_plane plane,
736 enum omap_color_mode color_mode)
737{
738 return omap_current_dss_features->supported_color_modes[plane] &
739 color_mode;
740}
741
Archit Taneja89a35e52011-04-12 13:52:23 +0530742const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
Archit Taneja067a57e2011-03-02 11:57:25 +0530743{
Taneja, Archit235e7db2011-03-14 23:28:21 -0500744 return omap_current_dss_features->clksrc_names[id];
Archit Taneja067a57e2011-03-02 11:57:25 +0530745}
746
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300747u32 dss_feat_get_buffer_size_unit(void)
748{
749 return omap_current_dss_features->buffer_size_unit;
750}
751
752u32 dss_feat_get_burst_size_unit(void)
753{
754 return omap_current_dss_features->burst_size_unit;
755}
756
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530757/* DSS has_feature check */
758bool dss_has_feature(enum dss_feat_id id)
759{
Archit Tanejac124f232012-01-30 10:52:39 +0530760 int i;
761 const enum dss_feat_id *features = omap_current_dss_features->features;
762 const int num_features = omap_current_dss_features->num_features;
763
764 for (i = 0; i < num_features; i++) {
765 if (features[i] == id)
766 return true;
767 }
768
769 return false;
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530770}
771
772void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
773{
774 if (id >= omap_current_dss_features->num_reg_fields)
775 BUG();
776
777 *start = omap_current_dss_features->reg_fields[id].start;
778 *end = omap_current_dss_features->reg_fields[id].end;
779}
780
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530781bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
782{
783 return omap_current_dss_features->supported_rotation_types & rot_type;
784}
785
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530786void dss_features_init(void)
787{
788 if (cpu_is_omap24xx())
789 omap_current_dss_features = &omap2_dss_features;
Samreen8fbde102010-11-04 12:28:41 +0100790 else if (cpu_is_omap3630())
791 omap_current_dss_features = &omap3630_dss_features;
792 else if (cpu_is_omap34xx())
793 omap_current_dss_features = &omap3430_dss_features;
Ricardo Neri6ff70842011-05-18 22:23:33 -0500794 else if (omap_rev() == OMAP4430_REV_ES1_0)
795 omap_current_dss_features = &omap4430_es1_0_dss_features;
Ricardo Neri70988192012-02-16 09:20:57 -0600796 else if (omap_rev() == OMAP4430_REV_ES2_0 ||
797 omap_rev() == OMAP4430_REV_ES2_1 ||
798 omap_rev() == OMAP4430_REV_ES2_2)
799 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
Ricardo Neri6ff70842011-05-18 22:23:33 -0500800 else if (cpu_is_omap44xx())
Archit Tanejad50cd032010-12-02 11:27:08 +0000801 omap_current_dss_features = &omap4_dss_features;
Archit Taneja23362832012-04-08 16:47:01 +0530802 else if (soc_is_omap54xx())
803 omap_current_dss_features = &omap5_dss_features;
Ricardo Neri6ff70842011-05-18 22:23:33 -0500804 else
805 DSSWARN("Unsupported OMAP version");
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530806}