blob: 2972742c6adb8cffec27eafd4712c057b30e2d39 [file] [log] [blame]
Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020098static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200100static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200101
Yuval Mintzfefb0202016-05-11 16:36:19 +0300102#ifdef CONFIG_QED_SRIOV
Yuval Mintz08feecd2016-05-11 16:36:20 +0300103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104{
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116}
117
Yuval Mintzeff16962016-05-11 16:36:21 +0300118static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119{
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132}
133
Yuval Mintzfefb0202016-05-11 16:36:19 +0300134static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135{
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144 /* Enable/Disable Tx switching for PF */
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(&params, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, &params);
154 }
155
156 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300157}
158#endif
159
Yuval Mintze712d522015-10-26 11:02:27 +0200160static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300165#ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200168};
169
Yuval Mintzeff16962016-05-11 16:36:21 +0300170static void qede_force_mac(void *dev, u8 *mac)
171{
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176}
177
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200178static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300182 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200183};
184
Yuval Mintz29502192015-10-26 11:02:29 +0200185static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187{
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192 /* Currently only support name change */
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196 /* Check whether this is a qede device */
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206 /* Notify qed of the name change */
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212done:
213 return NOTIFY_DONE;
214}
215
216static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218};
219
Yuval Mintze712d522015-10-26 11:02:27 +0200220static
221int __init qede_init(void)
222{
223 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200224
225 pr_notice("qede_init: %s\n", version);
226
Rahul Verma95114342016-04-10 12:42:59 +0300227 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
Yuval Mintz29502192015-10-26 11:02:29 +0200233 /* Must register notifier before pci ops, since we might miss
234 * interface rename after pci probe and netdev registeration.
235 */
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
Yuval Mintze712d522015-10-26 11:02:27 +0200243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200246 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252}
253
254static void __exit qede_cleanup(void)
255{
256 pr_notice("qede_cleanup called\n");
257
Yuval Mintz29502192015-10-26 11:02:29 +0200258 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200259 pci_unregister_driver(&qede_pci_driver);
260 qed_put_eth_ops();
261}
262
263module_init(qede_init);
264module_exit(qede_cleanup);
265
266/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200267 * START OF FAST-PATH
268 * -------------------------------------------------------------------------
269 */
270
271/* Unmap the data and free skb */
272static int qede_free_tx_pkt(struct qede_dev *edev,
273 struct qede_tx_queue *txq,
274 int *len)
275{
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309 /* Unmap the data of the skb frags */
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320 /* Free skb */
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326}
327
328/* Unmap the data and free skb when mapping failed during start_xmit */
329static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
332 int nbd,
333 bool data_split)
334{
335 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
336 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
337 struct eth_tx_bd *tx_data_bd;
338 int i, split_bd_len = 0;
339
340 /* Return prod to its position before this skb was handled */
341 qed_chain_set_prod(&txq->tx_pbl,
342 le16_to_cpu(txq->tx_db.data.bd_prod),
343 first_bd);
344
345 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
346
347 if (data_split) {
348 struct eth_tx_bd *split = (struct eth_tx_bd *)
349 qed_chain_produce(&txq->tx_pbl);
350 split_bd_len = BD_UNMAP_LEN(split);
351 nbd--;
352 }
353
354 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
355 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
356
357 /* Unmap the data of the skb frags */
358 for (i = 0; i < nbd; i++) {
359 tx_data_bd = (struct eth_tx_bd *)
360 qed_chain_produce(&txq->tx_pbl);
361 if (tx_data_bd->nbytes)
362 dma_unmap_page(&edev->pdev->dev,
363 BD_UNMAP_ADDR(tx_data_bd),
364 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
365 }
366
367 /* Return again prod to its position before this skb was handled */
368 qed_chain_set_prod(&txq->tx_pbl,
369 le16_to_cpu(txq->tx_db.data.bd_prod),
370 first_bd);
371
372 /* Free skb */
373 dev_kfree_skb_any(skb);
374 txq->sw_tx_ring[idx].skb = NULL;
375 txq->sw_tx_ring[idx].flags = 0;
376}
377
378static u32 qede_xmit_type(struct qede_dev *edev,
379 struct sk_buff *skb,
380 int *ipv6_ext)
381{
382 u32 rc = XMIT_L4_CSUM;
383 __be16 l3_proto;
384
385 if (skb->ip_summed != CHECKSUM_PARTIAL)
386 return XMIT_PLAIN;
387
388 l3_proto = vlan_get_protocol(skb);
389 if (l3_proto == htons(ETH_P_IPV6) &&
390 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
391 *ipv6_ext = 1;
392
Manish Chopra14db81d2016-04-14 01:38:33 -0400393 if (skb->encapsulation)
394 rc |= XMIT_ENC;
395
Yuval Mintz29502192015-10-26 11:02:29 +0200396 if (skb_is_gso(skb))
397 rc |= XMIT_LSO;
398
399 return rc;
400}
401
402static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
403 struct eth_tx_2nd_bd *second_bd,
404 struct eth_tx_3rd_bd *third_bd)
405{
406 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500407 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200408
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500409 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200410
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500411 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200412 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
413 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
414
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500415 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200416 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
417
418 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
419 l4_proto = ipv6_hdr(skb)->nexthdr;
420 else
421 l4_proto = ip_hdr(skb)->protocol;
422
423 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500424 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200425
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500426 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200427 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500428 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
429 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
430 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200433 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
434}
435
436static int map_frag_to_bd(struct qede_dev *edev,
437 skb_frag_t *frag,
438 struct eth_tx_bd *bd)
439{
440 dma_addr_t mapping;
441
442 /* Map skb non-linear frag data for DMA */
443 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
444 skb_frag_size(frag),
445 DMA_TO_DEVICE);
446 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
447 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
448 return -ENOMEM;
449 }
450
451 /* Setup the data pointer of the frag data */
452 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
453
454 return 0;
455}
456
Manish Chopra14db81d2016-04-14 01:38:33 -0400457static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
458{
459 if (is_encap_pkt)
460 return (skb_inner_transport_header(skb) +
461 inner_tcp_hdrlen(skb) - skb->data);
462 else
463 return (skb_transport_header(skb) +
464 tcp_hdrlen(skb) - skb->data);
465}
466
Yuval Mintzb1199b12016-02-24 16:52:46 +0200467/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
468#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
469static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
470 u8 xmit_type)
471{
472 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
473
474 if (xmit_type & XMIT_LSO) {
475 int hlen;
476
Manish Chopra14db81d2016-04-14 01:38:33 -0400477 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200478
479 /* linear payload would require its own BD */
480 if (skb_headlen(skb) > hlen)
481 allowed_frags--;
482 }
483
484 return (skb_shinfo(skb)->nr_frags > allowed_frags);
485}
486#endif
487
Yuval Mintz29502192015-10-26 11:02:29 +0200488/* Main transmit function */
489static
490netdev_tx_t qede_start_xmit(struct sk_buff *skb,
491 struct net_device *ndev)
492{
493 struct qede_dev *edev = netdev_priv(ndev);
494 struct netdev_queue *netdev_txq;
495 struct qede_tx_queue *txq;
496 struct eth_tx_1st_bd *first_bd;
497 struct eth_tx_2nd_bd *second_bd = NULL;
498 struct eth_tx_3rd_bd *third_bd = NULL;
499 struct eth_tx_bd *tx_data_bd = NULL;
500 u16 txq_index;
501 u8 nbd = 0;
502 dma_addr_t mapping;
503 int rc, frag_idx = 0, ipv6_ext = 0;
504 u8 xmit_type;
505 u16 idx;
506 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300507 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200508
509 /* Get tx-queue context and netdev index */
510 txq_index = skb_get_queue_mapping(skb);
511 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
512 txq = QEDE_TX_QUEUE(edev, txq_index);
513 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
514
Yuval Mintz29502192015-10-26 11:02:29 +0200515 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
516 (MAX_SKB_FRAGS + 1));
517
518 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
519
Yuval Mintzb1199b12016-02-24 16:52:46 +0200520#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
521 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
522 if (skb_linearize(skb)) {
523 DP_NOTICE(edev,
524 "SKB linearization failed - silently dropping this SKB\n");
525 dev_kfree_skb_any(skb);
526 return NETDEV_TX_OK;
527 }
528 }
529#endif
530
Yuval Mintz29502192015-10-26 11:02:29 +0200531 /* Fill the entry in the SW ring and the BDs in the FW ring */
532 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
533 txq->sw_tx_ring[idx].skb = skb;
534 first_bd = (struct eth_tx_1st_bd *)
535 qed_chain_produce(&txq->tx_pbl);
536 memset(first_bd, 0, sizeof(*first_bd));
537 first_bd->data.bd_flags.bitfields =
538 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
539
540 /* Map skb linear data for DMA and set in the first BD */
541 mapping = dma_map_single(&edev->pdev->dev, skb->data,
542 skb_headlen(skb), DMA_TO_DEVICE);
543 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
544 DP_NOTICE(edev, "SKB mapping failed\n");
545 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
546 return NETDEV_TX_OK;
547 }
548 nbd++;
549 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
550
551 /* In case there is IPv6 with extension headers or LSO we need 2nd and
552 * 3rd BDs.
553 */
554 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
555 second_bd = (struct eth_tx_2nd_bd *)
556 qed_chain_produce(&txq->tx_pbl);
557 memset(second_bd, 0, sizeof(*second_bd));
558
559 nbd++;
560 third_bd = (struct eth_tx_3rd_bd *)
561 qed_chain_produce(&txq->tx_pbl);
562 memset(third_bd, 0, sizeof(*third_bd));
563
564 nbd++;
565 /* We need to fill in additional data in second_bd... */
566 tx_data_bd = (struct eth_tx_bd *)second_bd;
567 }
568
569 if (skb_vlan_tag_present(skb)) {
570 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
571 first_bd->data.bd_flags.bitfields |=
572 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
573 }
574
575 /* Fill the parsing flags & params according to the requested offload */
576 if (xmit_type & XMIT_L4_CSUM) {
577 /* We don't re-calculate IP checksum as it is already done by
578 * the upper stack
579 */
580 first_bd->data.bd_flags.bitfields |=
581 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
582
Manish Chopra14db81d2016-04-14 01:38:33 -0400583 if (xmit_type & XMIT_ENC) {
584 first_bd->data.bd_flags.bitfields |=
585 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300586 first_bd->data.bitfields |=
587 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400588 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500589
Yuval Mintz29502192015-10-26 11:02:29 +0200590 /* If the packet is IPv6 with extension header, indicate that
591 * to FW and pass few params, since the device cracker doesn't
592 * support parsing IPv6 with extension header/s.
593 */
594 if (unlikely(ipv6_ext))
595 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
596 }
597
598 if (xmit_type & XMIT_LSO) {
599 first_bd->data.bd_flags.bitfields |=
600 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
601 third_bd->data.lso_mss =
602 cpu_to_le16(skb_shinfo(skb)->gso_size);
603
Manish Chopra14db81d2016-04-14 01:38:33 -0400604 if (unlikely(xmit_type & XMIT_ENC)) {
605 first_bd->data.bd_flags.bitfields |=
606 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
607 hlen = qede_get_skb_hlen(skb, true);
608 } else {
609 first_bd->data.bd_flags.bitfields |=
610 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
611 hlen = qede_get_skb_hlen(skb, false);
612 }
Yuval Mintz29502192015-10-26 11:02:29 +0200613
614 /* @@@TBD - if will not be removed need to check */
615 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500616 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200617
618 /* Make life easier for FW guys who can't deal with header and
619 * data on same BD. If we need to split, use the second bd...
620 */
621 if (unlikely(skb_headlen(skb) > hlen)) {
622 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
623 "TSO split header size is %d (%x:%x)\n",
624 first_bd->nbytes, first_bd->addr.hi,
625 first_bd->addr.lo);
626
627 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
628 le32_to_cpu(first_bd->addr.lo)) +
629 hlen;
630
631 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
632 le16_to_cpu(first_bd->nbytes) -
633 hlen);
634
635 /* this marks the BD as one that has no
636 * individual mapping
637 */
638 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
639
640 first_bd->nbytes = cpu_to_le16(hlen);
641
642 tx_data_bd = (struct eth_tx_bd *)third_bd;
643 data_split = true;
644 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300645 } else {
646 first_bd->data.bitfields |=
647 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
648 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200649 }
650
651 /* Handle fragmented skb */
652 /* special handle for frags inside 2nd and 3rd bds.. */
653 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
654 rc = map_frag_to_bd(edev,
655 &skb_shinfo(skb)->frags[frag_idx],
656 tx_data_bd);
657 if (rc) {
658 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
659 data_split);
660 return NETDEV_TX_OK;
661 }
662
663 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
664 tx_data_bd = (struct eth_tx_bd *)third_bd;
665 else
666 tx_data_bd = NULL;
667
668 frag_idx++;
669 }
670
671 /* map last frags into 4th, 5th .... */
672 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
673 tx_data_bd = (struct eth_tx_bd *)
674 qed_chain_produce(&txq->tx_pbl);
675
676 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
677
678 rc = map_frag_to_bd(edev,
679 &skb_shinfo(skb)->frags[frag_idx],
680 tx_data_bd);
681 if (rc) {
682 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
683 data_split);
684 return NETDEV_TX_OK;
685 }
686 }
687
688 /* update the first BD with the actual num BDs */
689 first_bd->data.nbds = nbd;
690
691 netdev_tx_sent_queue(netdev_txq, skb->len);
692
693 skb_tx_timestamp(skb);
694
695 /* Advance packet producer only before sending the packet since mapping
696 * of pages may fail.
697 */
698 txq->sw_tx_prod++;
699
700 /* 'next page' entries are counted in the producer value */
701 txq->tx_db.data.bd_prod =
702 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
703
704 /* wmb makes sure that the BDs data is updated before updating the
705 * producer, otherwise FW may read old data from the BDs.
706 */
707 wmb();
708 barrier();
709 writel(txq->tx_db.raw, txq->doorbell_addr);
710
711 /* mmiowb is needed to synchronize doorbell writes from more than one
712 * processor. It guarantees that the write arrives to the device before
713 * the queue lock is released and another start_xmit is called (possibly
714 * on another CPU). Without this barrier, the next doorbell can bypass
715 * this doorbell. This is applicable to IA64/Altix systems.
716 */
717 mmiowb();
718
719 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
720 < (MAX_SKB_FRAGS + 1))) {
721 netif_tx_stop_queue(netdev_txq);
722 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
723 "Stop queue was called\n");
724 /* paired memory barrier is in qede_tx_int(), we have to keep
725 * ordering of set_bit() in netif_tx_stop_queue() and read of
726 * fp->bd_tx_cons
727 */
728 smp_mb();
729
730 if (qed_chain_get_elem_left(&txq->tx_pbl)
731 >= (MAX_SKB_FRAGS + 1) &&
732 (edev->state == QEDE_STATE_OPEN)) {
733 netif_tx_wake_queue(netdev_txq);
734 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
735 "Wake queue was called\n");
736 }
737 }
738
739 return NETDEV_TX_OK;
740}
741
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400742int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200743{
744 u16 hw_bd_cons;
745
746 /* Tell compiler that consumer and producer can change */
747 barrier();
748 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
749 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
750 return 0;
751
752 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
753}
754
755static int qede_tx_int(struct qede_dev *edev,
756 struct qede_tx_queue *txq)
757{
758 struct netdev_queue *netdev_txq;
759 u16 hw_bd_cons;
760 unsigned int pkts_compl = 0, bytes_compl = 0;
761 int rc;
762
763 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
764
765 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
766 barrier();
767
768 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
769 int len = 0;
770
771 rc = qede_free_tx_pkt(edev, txq, &len);
772 if (rc) {
773 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
774 hw_bd_cons,
775 qed_chain_get_cons_idx(&txq->tx_pbl));
776 break;
777 }
778
779 bytes_compl += len;
780 pkts_compl++;
781 txq->sw_tx_cons++;
782 }
783
784 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
785
786 /* Need to make the tx_bd_cons update visible to start_xmit()
787 * before checking for netif_tx_queue_stopped(). Without the
788 * memory barrier, there is a small possibility that
789 * start_xmit() will miss it and cause the queue to be stopped
790 * forever.
791 * On the other hand we need an rmb() here to ensure the proper
792 * ordering of bit testing in the following
793 * netif_tx_queue_stopped(txq) call.
794 */
795 smp_mb();
796
797 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
798 /* Taking tx_lock is needed to prevent reenabling the queue
799 * while it's empty. This could have happen if rx_action() gets
800 * suspended in qede_tx_int() after the condition before
801 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
802 *
803 * stops the queue->sees fresh tx_bd_cons->releases the queue->
804 * sends some packets consuming the whole queue again->
805 * stops the queue
806 */
807
808 __netif_tx_lock(netdev_txq, smp_processor_id());
809
810 if ((netif_tx_queue_stopped(netdev_txq)) &&
811 (edev->state == QEDE_STATE_OPEN) &&
812 (qed_chain_get_elem_left(&txq->tx_pbl)
813 >= (MAX_SKB_FRAGS + 1))) {
814 netif_tx_wake_queue(netdev_txq);
815 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
816 "Wake queue was called\n");
817 }
818
819 __netif_tx_unlock(netdev_txq);
820 }
821
822 return 0;
823}
824
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400825bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200826{
827 u16 hw_comp_cons, sw_comp_cons;
828
829 /* Tell compiler that status block fields can change */
830 barrier();
831
832 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
833 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
834
835 return hw_comp_cons != sw_comp_cons;
836}
837
838static bool qede_has_tx_work(struct qede_fastpath *fp)
839{
840 u8 tc;
841
842 for (tc = 0; tc < fp->edev->num_tc; tc++)
843 if (qede_txq_has_work(&fp->txqs[tc]))
844 return true;
845 return false;
846}
847
Manish Chopraf86af2d2016-04-20 03:03:27 -0400848static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
849{
850 qed_chain_consume(&rxq->rx_bd_ring);
851 rxq->sw_rx_cons++;
852}
853
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500854/* This function reuses the buffer(from an offset) from
855 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200856 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500857static inline void qede_reuse_page(struct qede_dev *edev,
858 struct qede_rx_queue *rxq,
859 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200860{
Yuval Mintz29502192015-10-26 11:02:29 +0200861 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500862 struct sw_rx_data *curr_prod;
863 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200864
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500865 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
866 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200867
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500868 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200869
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500870 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
871 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
872
Yuval Mintz29502192015-10-26 11:02:29 +0200873 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500874 curr_cons->data = NULL;
875}
876
Manish Chopraf86af2d2016-04-20 03:03:27 -0400877/* In case of allocation failures reuse buffers
878 * from consumer index to produce buffers for firmware
879 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400880void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
881 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400882{
883 struct sw_rx_data *curr_cons;
884
885 for (; count > 0; count--) {
886 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
887 qede_reuse_page(edev, rxq, curr_cons);
888 qede_rx_bd_ring_consume(rxq);
889 }
890}
891
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500892static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
893 struct qede_rx_queue *rxq,
894 struct sw_rx_data *curr_cons)
895{
896 /* Move to the next segment in the page */
897 curr_cons->page_offset += rxq->rx_buf_seg_size;
898
899 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400900 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
901 /* Since we failed to allocate new buffer
902 * current buffer can be used again.
903 */
904 curr_cons->page_offset -= rxq->rx_buf_seg_size;
905
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500906 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400907 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500908
909 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
910 PAGE_SIZE, DMA_FROM_DEVICE);
911 } else {
912 /* Increment refcount of the page as we don't want
913 * network stack to take the ownership of the page
914 * which can be recycled multiple times by the driver.
915 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700916 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500917 qede_reuse_page(edev, rxq, curr_cons);
918 }
919
920 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200921}
922
923static inline void qede_update_rx_prod(struct qede_dev *edev,
924 struct qede_rx_queue *rxq)
925{
926 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
927 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
928 struct eth_rx_prod_data rx_prods = {0};
929
930 /* Update producers */
931 rx_prods.bd_prod = cpu_to_le16(bd_prod);
932 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
933
934 /* Make sure that the BD and SGE data is updated before updating the
935 * producers since FW might read the BD/SGE right after the producer
936 * is updated.
937 */
938 wmb();
939
940 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
941 (u32 *)&rx_prods);
942
943 /* mmiowb is needed to synchronize doorbell writes from more than one
944 * processor. It guarantees that the write arrives to the device before
945 * the napi lock is released and another qede_poll is called (possibly
946 * on another CPU). Without this barrier, the next doorbell can bypass
947 * this doorbell. This is applicable to IA64/Altix systems.
948 */
949 mmiowb();
950}
951
952static u32 qede_get_rxhash(struct qede_dev *edev,
953 u8 bitfields,
954 __le32 rss_hash,
955 enum pkt_hash_types *rxhash_type)
956{
957 enum rss_hash_type htype;
958
959 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
960
961 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
962 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
963 (htype == RSS_HASH_TYPE_IPV6)) ?
964 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
965 return le32_to_cpu(rss_hash);
966 }
967 *rxhash_type = PKT_HASH_TYPE_NONE;
968 return 0;
969}
970
971static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
972{
973 skb_checksum_none_assert(skb);
974
975 if (csum_flag & QEDE_CSUM_UNNECESSARY)
976 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -0400977
978 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
979 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +0200980}
981
982static inline void qede_skb_receive(struct qede_dev *edev,
983 struct qede_fastpath *fp,
984 struct sk_buff *skb,
985 u16 vlan_tag)
986{
987 if (vlan_tag)
988 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
989 vlan_tag);
990
991 napi_gro_receive(&fp->napi, skb);
992}
993
Manish Chopra55482ed2016-03-04 12:35:06 -0500994static void qede_set_gro_params(struct qede_dev *edev,
995 struct sk_buff *skb,
996 struct eth_fast_path_rx_tpa_start_cqe *cqe)
997{
998 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
999
1000 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1001 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1002 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1003 else
1004 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1005
1006 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1007 cqe->header_len;
1008}
1009
1010static int qede_fill_frag_skb(struct qede_dev *edev,
1011 struct qede_rx_queue *rxq,
1012 u8 tpa_agg_index,
1013 u16 len_on_bd)
1014{
1015 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1016 NUM_RX_BDS_MAX];
1017 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1018 struct sk_buff *skb = tpa_info->skb;
1019
1020 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1021 goto out;
1022
1023 /* Add one frag and update the appropriate fields in the skb */
1024 skb_fill_page_desc(skb, tpa_info->frag_id++,
1025 current_bd->data, current_bd->page_offset,
1026 len_on_bd);
1027
1028 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001029 /* Incr page ref count to reuse on allocation failure
1030 * so that it doesn't get freed while freeing SKB.
1031 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001032 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001033 goto out;
1034 }
1035
1036 qed_chain_consume(&rxq->rx_bd_ring);
1037 rxq->sw_rx_cons++;
1038
1039 skb->data_len += len_on_bd;
1040 skb->truesize += rxq->rx_buf_seg_size;
1041 skb->len += len_on_bd;
1042
1043 return 0;
1044
1045out:
Manish Chopraf86af2d2016-04-20 03:03:27 -04001046 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1047 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001048 return -ENOMEM;
1049}
1050
1051static void qede_tpa_start(struct qede_dev *edev,
1052 struct qede_rx_queue *rxq,
1053 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1054{
1055 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1056 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1057 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1058 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1059 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1060 struct sw_rx_data *sw_rx_data_cons;
1061 struct sw_rx_data *sw_rx_data_prod;
1062 enum pkt_hash_types rxhash_type;
1063 u32 rxhash;
1064
1065 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1066 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1067
1068 /* Use pre-allocated replacement buffer - we can't release the agg.
1069 * start until its over and we don't want to risk allocation failing
1070 * here, so re-allocate when aggregation will be over.
1071 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001072 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001073
1074 sw_rx_data_prod->data = replace_buf->data;
1075 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1076 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1077 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1078
1079 rxq->sw_rx_prod++;
1080
1081 /* move partial skb from cons to pool (don't unmap yet)
1082 * save mapping, incase we drop the packet later on.
1083 */
1084 tpa_info->start_buf = *sw_rx_data_cons;
1085 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1086 le32_to_cpu(rx_bd_cons->addr.lo));
1087
1088 tpa_info->start_buf_mapping = mapping;
1089 rxq->sw_rx_cons++;
1090
1091 /* set tpa state to start only if we are able to allocate skb
1092 * for this aggregation, otherwise mark as error and aggregation will
1093 * be dropped
1094 */
1095 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1096 le16_to_cpu(cqe->len_on_first_bd));
1097 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001098 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Manish Chopra55482ed2016-03-04 12:35:06 -05001099 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001100 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001101 }
1102
1103 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1104 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1105
1106 /* Start filling in the aggregation info */
1107 tpa_info->frag_id = 0;
1108 tpa_info->agg_state = QEDE_AGG_STATE_START;
1109
1110 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1111 cqe->rss_hash, &rxhash_type);
1112 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1113 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1114 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1115 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1116 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1117 else
1118 tpa_info->vlan_tag = 0;
1119
1120 /* This is needed in order to enable forwarding support */
1121 qede_set_gro_params(edev, tpa_info->skb, cqe);
1122
Manish Chopraf86af2d2016-04-20 03:03:27 -04001123cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001124 if (likely(cqe->ext_bd_len_list[0]))
1125 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1126 le16_to_cpu(cqe->ext_bd_len_list[0]));
1127
1128 if (unlikely(cqe->ext_bd_len_list[1])) {
1129 DP_ERR(edev,
1130 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1131 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1132 }
1133}
1134
Manish Chopra88f09bd2016-03-08 04:09:44 -05001135#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001136static void qede_gro_ip_csum(struct sk_buff *skb)
1137{
1138 const struct iphdr *iph = ip_hdr(skb);
1139 struct tcphdr *th;
1140
Manish Chopra55482ed2016-03-04 12:35:06 -05001141 skb_set_transport_header(skb, sizeof(struct iphdr));
1142 th = tcp_hdr(skb);
1143
1144 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1145 iph->saddr, iph->daddr, 0);
1146
1147 tcp_gro_complete(skb);
1148}
1149
1150static void qede_gro_ipv6_csum(struct sk_buff *skb)
1151{
1152 struct ipv6hdr *iph = ipv6_hdr(skb);
1153 struct tcphdr *th;
1154
Manish Chopra55482ed2016-03-04 12:35:06 -05001155 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1156 th = tcp_hdr(skb);
1157
1158 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1159 &iph->saddr, &iph->daddr, 0);
1160 tcp_gro_complete(skb);
1161}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001162#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001163
1164static void qede_gro_receive(struct qede_dev *edev,
1165 struct qede_fastpath *fp,
1166 struct sk_buff *skb,
1167 u16 vlan_tag)
1168{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001169 /* FW can send a single MTU sized packet from gro flow
1170 * due to aggregation timeout/last segment etc. which
1171 * is not expected to be a gro packet. If a skb has zero
1172 * frags then simply push it in the stack as non gso skb.
1173 */
1174 if (unlikely(!skb->data_len)) {
1175 skb_shinfo(skb)->gso_type = 0;
1176 skb_shinfo(skb)->gso_size = 0;
1177 goto send_skb;
1178 }
1179
Manish Chopra88f09bd2016-03-08 04:09:44 -05001180#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001181 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001182 skb_set_network_header(skb, 0);
1183
Manish Chopra55482ed2016-03-04 12:35:06 -05001184 switch (skb->protocol) {
1185 case htons(ETH_P_IP):
1186 qede_gro_ip_csum(skb);
1187 break;
1188 case htons(ETH_P_IPV6):
1189 qede_gro_ipv6_csum(skb);
1190 break;
1191 default:
1192 DP_ERR(edev,
1193 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1194 ntohs(skb->protocol));
1195 }
1196 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001197#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001198
1199send_skb:
Manish Chopra55482ed2016-03-04 12:35:06 -05001200 skb_record_rx_queue(skb, fp->rss_id);
1201 qede_skb_receive(edev, fp, skb, vlan_tag);
1202}
1203
1204static inline void qede_tpa_cont(struct qede_dev *edev,
1205 struct qede_rx_queue *rxq,
1206 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1207{
1208 int i;
1209
1210 for (i = 0; cqe->len_list[i]; i++)
1211 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1212 le16_to_cpu(cqe->len_list[i]));
1213
1214 if (unlikely(i > 1))
1215 DP_ERR(edev,
1216 "Strange - TPA cont with more than a single len_list entry\n");
1217}
1218
1219static void qede_tpa_end(struct qede_dev *edev,
1220 struct qede_fastpath *fp,
1221 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1222{
1223 struct qede_rx_queue *rxq = fp->rxq;
1224 struct qede_agg_info *tpa_info;
1225 struct sk_buff *skb;
1226 int i;
1227
1228 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1229 skb = tpa_info->skb;
1230
1231 for (i = 0; cqe->len_list[i]; i++)
1232 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1233 le16_to_cpu(cqe->len_list[i]));
1234 if (unlikely(i > 1))
1235 DP_ERR(edev,
1236 "Strange - TPA emd with more than a single len_list entry\n");
1237
1238 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1239 goto err;
1240
1241 /* Sanity */
1242 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1243 DP_ERR(edev,
1244 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1245 cqe->num_of_bds, tpa_info->frag_id);
1246 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1247 DP_ERR(edev,
1248 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1249 le16_to_cpu(cqe->total_packet_len), skb->len);
1250
1251 memcpy(skb->data,
1252 page_address(tpa_info->start_buf.data) +
1253 tpa_info->start_cqe.placement_offset +
1254 tpa_info->start_buf.page_offset,
1255 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1256
1257 /* Recycle [mapped] start buffer for the next replacement */
1258 tpa_info->replace_buf = tpa_info->start_buf;
1259 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1260
1261 /* Finalize the SKB */
1262 skb->protocol = eth_type_trans(skb, edev->ndev);
1263 skb->ip_summed = CHECKSUM_UNNECESSARY;
1264
1265 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1266 * to skb_shinfo(skb)->gso_segs
1267 */
1268 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1269
1270 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1271
1272 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1273
1274 return;
1275err:
1276 /* The BD starting the aggregation is still mapped; Re-use it for
1277 * future aggregations [as replacement buffer]
1278 */
1279 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1280 sizeof(struct sw_rx_data));
1281 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1282 tpa_info->start_buf.data = NULL;
1283 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1284 dev_kfree_skb_any(tpa_info->skb);
1285 tpa_info->skb = NULL;
1286}
1287
Manish Chopra14db81d2016-04-14 01:38:33 -04001288static bool qede_tunn_exist(u16 flag)
1289{
1290 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1291 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1292}
1293
1294static u8 qede_check_tunn_csum(u16 flag)
1295{
1296 u16 csum_flag = 0;
1297 u8 tcsum = 0;
1298
1299 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1300 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1301 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1302 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1303
1304 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1305 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1306 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1307 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1308 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1309 }
1310
1311 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1312 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1313 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1314 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1315
1316 if (csum_flag & flag)
1317 return QEDE_CSUM_ERROR;
1318
1319 return QEDE_CSUM_UNNECESSARY | tcsum;
1320}
1321
1322static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001323{
1324 u16 csum_flag = 0;
1325 u8 csum = 0;
1326
Manish Chopra14db81d2016-04-14 01:38:33 -04001327 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1328 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001329 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1330 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1331 csum = QEDE_CSUM_UNNECESSARY;
1332 }
1333
1334 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1335 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1336
1337 if (csum_flag & flag)
1338 return QEDE_CSUM_ERROR;
1339
1340 return csum;
1341}
1342
Manish Chopra14db81d2016-04-14 01:38:33 -04001343static u8 qede_check_csum(u16 flag)
1344{
1345 if (!qede_tunn_exist(flag))
1346 return qede_check_notunn_csum(flag);
1347 else
1348 return qede_check_tunn_csum(flag);
1349}
1350
Yuval Mintz29502192015-10-26 11:02:29 +02001351static int qede_rx_int(struct qede_fastpath *fp, int budget)
1352{
1353 struct qede_dev *edev = fp->edev;
1354 struct qede_rx_queue *rxq = fp->rxq;
1355
1356 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1357 int rx_pkt = 0;
1358 u8 csum_flag;
1359
1360 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1361 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1362
1363 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1364 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1365 * read before it is written by FW, then FW writes CQE and SB, and then
1366 * the CPU reads the hw_comp_cons, it will use an old CQE.
1367 */
1368 rmb();
1369
1370 /* Loop to complete all indicated BDs */
1371 while (sw_comp_cons != hw_comp_cons) {
1372 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1373 enum pkt_hash_types rxhash_type;
1374 enum eth_rx_cqe_type cqe_type;
1375 struct sw_rx_data *sw_rx_data;
1376 union eth_rx_cqe *cqe;
1377 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001378 struct page *data;
1379 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001380 u16 len, pad;
1381 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001382
1383 /* Get the CQE from the completion ring */
1384 cqe = (union eth_rx_cqe *)
1385 qed_chain_consume(&rxq->rx_comp_ring);
1386 cqe_type = cqe->fast_path_regular.type;
1387
1388 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1389 edev->ops->eth_cqe_completion(
1390 edev->cdev, fp->rss_id,
1391 (struct eth_slow_path_rx_cqe *)cqe);
1392 goto next_cqe;
1393 }
1394
Manish Chopra55482ed2016-03-04 12:35:06 -05001395 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1396 switch (cqe_type) {
1397 case ETH_RX_CQE_TYPE_TPA_START:
1398 qede_tpa_start(edev, rxq,
1399 &cqe->fast_path_tpa_start);
1400 goto next_cqe;
1401 case ETH_RX_CQE_TYPE_TPA_CONT:
1402 qede_tpa_cont(edev, rxq,
1403 &cqe->fast_path_tpa_cont);
1404 goto next_cqe;
1405 case ETH_RX_CQE_TYPE_TPA_END:
1406 qede_tpa_end(edev, fp,
1407 &cqe->fast_path_tpa_end);
1408 goto next_rx_only;
1409 default:
1410 break;
1411 }
1412 }
1413
Yuval Mintz29502192015-10-26 11:02:29 +02001414 /* Get the data from the SW ring */
1415 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1416 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1417 data = sw_rx_data->data;
1418
1419 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001420 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001421 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001422 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001423
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001424 /* If this is an error packet then drop it */
1425 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001426
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001427 csum_flag = qede_check_csum(parse_flag);
1428 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001429 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001430 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1431 sw_comp_cons, parse_flag);
1432 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001433 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1434 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001435 }
1436
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001437 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1438 if (unlikely(!skb)) {
1439 DP_NOTICE(edev,
1440 "Build_skb failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001441 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001442 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001443 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001444 }
Yuval Mintz29502192015-10-26 11:02:29 +02001445
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001446 /* Copy data into SKB */
1447 if (len + pad <= QEDE_RX_HDR_SIZE) {
1448 memcpy(skb_put(skb, len),
1449 page_address(data) + pad +
1450 sw_rx_data->page_offset, len);
1451 qede_reuse_page(edev, rxq, sw_rx_data);
1452 } else {
1453 struct skb_frag_struct *frag;
1454 unsigned int pull_len;
1455 unsigned char *va;
1456
1457 frag = &skb_shinfo(skb)->frags[0];
1458
1459 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1460 pad + sw_rx_data->page_offset,
1461 len, rxq->rx_buf_seg_size);
1462
1463 va = skb_frag_address(frag);
1464 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1465
1466 /* Align the pull_len to optimize memcpy */
1467 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1468
1469 skb_frag_size_sub(frag, pull_len);
1470 frag->page_offset += pull_len;
1471 skb->data_len -= pull_len;
1472 skb->tail += pull_len;
1473
1474 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1475 sw_rx_data))) {
1476 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001477 /* Incr page ref count to reuse on allocation
1478 * failure so that it doesn't get freed while
1479 * freeing SKB.
1480 */
1481
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001482 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001483 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001484 qede_recycle_rx_bd_ring(rxq, edev,
1485 fp_cqe->bd_num);
1486 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001487 goto next_cqe;
1488 }
1489 }
1490
Manish Chopraf86af2d2016-04-20 03:03:27 -04001491 qede_rx_bd_ring_consume(rxq);
1492
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001493 if (fp_cqe->bd_num != 1) {
1494 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1495 u8 num_frags;
1496
1497 pkt_len -= len;
1498
1499 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1500 num_frags--) {
1501 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1502 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001503 if (unlikely(!cur_size)) {
1504 DP_ERR(edev,
1505 "Still got %d BDs for mapping jumbo, but length became 0\n",
1506 num_frags);
1507 qede_recycle_rx_bd_ring(rxq, edev,
1508 num_frags);
1509 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001510 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001511 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001512
Manish Chopraf86af2d2016-04-20 03:03:27 -04001513 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1514 qede_recycle_rx_bd_ring(rxq, edev,
1515 num_frags);
1516 dev_kfree_skb_any(skb);
1517 goto next_cqe;
1518 }
1519
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001520 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1521 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001522 qede_rx_bd_ring_consume(rxq);
1523
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001524 dma_unmap_page(&edev->pdev->dev,
1525 sw_rx_data->mapping,
1526 PAGE_SIZE, DMA_FROM_DEVICE);
1527
1528 skb_fill_page_desc(skb,
1529 skb_shinfo(skb)->nr_frags++,
1530 sw_rx_data->data, 0,
1531 cur_size);
1532
1533 skb->truesize += PAGE_SIZE;
1534 skb->data_len += cur_size;
1535 skb->len += cur_size;
1536 pkt_len -= cur_size;
1537 }
1538
Manish Chopraf86af2d2016-04-20 03:03:27 -04001539 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001540 DP_ERR(edev,
1541 "Mapped all BDs of jumbo, but still have %d bytes\n",
1542 pkt_len);
1543 }
Yuval Mintz29502192015-10-26 11:02:29 +02001544
1545 skb->protocol = eth_type_trans(skb, edev->ndev);
1546
1547 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1548 fp_cqe->rss_hash,
1549 &rxhash_type);
1550
1551 skb_set_hash(skb, rx_hash, rxhash_type);
1552
1553 qede_set_skb_csum(skb, csum_flag);
1554
1555 skb_record_rx_queue(skb, fp->rss_id);
1556
1557 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001558next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001559 rx_pkt++;
1560
1561next_cqe: /* don't consume bd rx buffer */
1562 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1563 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1564 /* CR TPA - revisit how to handle budget in TPA perhaps
1565 * increase on "end"
1566 */
1567 if (rx_pkt == budget)
1568 break;
1569 } /* repeat while sw_comp_cons != hw_comp_cons... */
1570
1571 /* Update producers */
1572 qede_update_rx_prod(edev, rxq);
1573
1574 return rx_pkt;
1575}
1576
1577static int qede_poll(struct napi_struct *napi, int budget)
1578{
1579 int work_done = 0;
1580 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1581 napi);
1582 struct qede_dev *edev = fp->edev;
1583
1584 while (1) {
1585 u8 tc;
1586
1587 for (tc = 0; tc < edev->num_tc; tc++)
1588 if (qede_txq_has_work(&fp->txqs[tc]))
1589 qede_tx_int(edev, &fp->txqs[tc]);
1590
1591 if (qede_has_rx_work(fp->rxq)) {
1592 work_done += qede_rx_int(fp, budget - work_done);
1593
1594 /* must not complete if we consumed full budget */
1595 if (work_done >= budget)
1596 break;
1597 }
1598
1599 /* Fall out from the NAPI loop if needed */
1600 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1601 qed_sb_update_sb_idx(fp->sb_info);
1602 /* *_has_*_work() reads the status block,
1603 * thus we need to ensure that status block indices
1604 * have been actually read (qed_sb_update_sb_idx)
1605 * prior to this check (*_has_*_work) so that
1606 * we won't write the "newer" value of the status block
1607 * to HW (if there was a DMA right after
1608 * qede_has_rx_work and if there is no rmb, the memory
1609 * reading (qed_sb_update_sb_idx) may be postponed
1610 * to right before *_ack_sb). In this case there
1611 * will never be another interrupt until there is
1612 * another update of the status block, while there
1613 * is still unhandled work.
1614 */
1615 rmb();
1616
1617 if (!(qede_has_rx_work(fp->rxq) ||
1618 qede_has_tx_work(fp))) {
1619 napi_complete(napi);
1620 /* Update and reenable interrupts */
1621 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1622 1 /*update*/);
1623 break;
1624 }
1625 }
1626 }
1627
1628 return work_done;
1629}
1630
1631static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1632{
1633 struct qede_fastpath *fp = fp_cookie;
1634
1635 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1636
1637 napi_schedule_irqoff(&fp->napi);
1638 return IRQ_HANDLED;
1639}
1640
1641/* -------------------------------------------------------------------------
1642 * END OF FAST-PATH
1643 * -------------------------------------------------------------------------
1644 */
1645
1646static int qede_open(struct net_device *ndev);
1647static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001648static int qede_set_mac_addr(struct net_device *ndev, void *p);
1649static void qede_set_rx_mode(struct net_device *ndev);
1650static void qede_config_rx_mode(struct net_device *ndev);
1651
1652static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1653 enum qed_filter_xcast_params_type opcode,
1654 unsigned char mac[ETH_ALEN])
1655{
1656 struct qed_filter_params filter_cmd;
1657
1658 memset(&filter_cmd, 0, sizeof(filter_cmd));
1659 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1660 filter_cmd.filter.ucast.type = opcode;
1661 filter_cmd.filter.ucast.mac_valid = 1;
1662 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1663
1664 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1665}
1666
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001667static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1668 enum qed_filter_xcast_params_type opcode,
1669 u16 vid)
1670{
1671 struct qed_filter_params filter_cmd;
1672
1673 memset(&filter_cmd, 0, sizeof(filter_cmd));
1674 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1675 filter_cmd.filter.ucast.type = opcode;
1676 filter_cmd.filter.ucast.vlan_valid = 1;
1677 filter_cmd.filter.ucast.vlan = vid;
1678
1679 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1680}
1681
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001682void qede_fill_by_demand_stats(struct qede_dev *edev)
1683{
1684 struct qed_eth_stats stats;
1685
1686 edev->ops->get_vport_stats(edev->cdev, &stats);
1687 edev->stats.no_buff_discards = stats.no_buff_discards;
1688 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1689 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1690 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1691 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1692 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1693 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1694 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1695 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1696
1697 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1698 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1699 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1700 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1701 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1702 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1703 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1704 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1705 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1706 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1707 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1708 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1709
1710 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001711 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1712 edev->stats.rx_128_to_255_byte_packets =
1713 stats.rx_128_to_255_byte_packets;
1714 edev->stats.rx_256_to_511_byte_packets =
1715 stats.rx_256_to_511_byte_packets;
1716 edev->stats.rx_512_to_1023_byte_packets =
1717 stats.rx_512_to_1023_byte_packets;
1718 edev->stats.rx_1024_to_1518_byte_packets =
1719 stats.rx_1024_to_1518_byte_packets;
1720 edev->stats.rx_1519_to_1522_byte_packets =
1721 stats.rx_1519_to_1522_byte_packets;
1722 edev->stats.rx_1519_to_2047_byte_packets =
1723 stats.rx_1519_to_2047_byte_packets;
1724 edev->stats.rx_2048_to_4095_byte_packets =
1725 stats.rx_2048_to_4095_byte_packets;
1726 edev->stats.rx_4096_to_9216_byte_packets =
1727 stats.rx_4096_to_9216_byte_packets;
1728 edev->stats.rx_9217_to_16383_byte_packets =
1729 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001730 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1731 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1732 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1733 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1734 edev->stats.rx_align_errors = stats.rx_align_errors;
1735 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1736 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1737 edev->stats.rx_jabbers = stats.rx_jabbers;
1738 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1739 edev->stats.rx_fragments = stats.rx_fragments;
1740 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1741 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1742 edev->stats.tx_128_to_255_byte_packets =
1743 stats.tx_128_to_255_byte_packets;
1744 edev->stats.tx_256_to_511_byte_packets =
1745 stats.tx_256_to_511_byte_packets;
1746 edev->stats.tx_512_to_1023_byte_packets =
1747 stats.tx_512_to_1023_byte_packets;
1748 edev->stats.tx_1024_to_1518_byte_packets =
1749 stats.tx_1024_to_1518_byte_packets;
1750 edev->stats.tx_1519_to_2047_byte_packets =
1751 stats.tx_1519_to_2047_byte_packets;
1752 edev->stats.tx_2048_to_4095_byte_packets =
1753 stats.tx_2048_to_4095_byte_packets;
1754 edev->stats.tx_4096_to_9216_byte_packets =
1755 stats.tx_4096_to_9216_byte_packets;
1756 edev->stats.tx_9217_to_16383_byte_packets =
1757 stats.tx_9217_to_16383_byte_packets;
1758 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1759 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1760 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1761 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1762 edev->stats.brb_truncates = stats.brb_truncates;
1763 edev->stats.brb_discards = stats.brb_discards;
1764 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1765}
1766
1767static struct rtnl_link_stats64 *qede_get_stats64(
1768 struct net_device *dev,
1769 struct rtnl_link_stats64 *stats)
1770{
1771 struct qede_dev *edev = netdev_priv(dev);
1772
1773 qede_fill_by_demand_stats(edev);
1774
1775 stats->rx_packets = edev->stats.rx_ucast_pkts +
1776 edev->stats.rx_mcast_pkts +
1777 edev->stats.rx_bcast_pkts;
1778 stats->tx_packets = edev->stats.tx_ucast_pkts +
1779 edev->stats.tx_mcast_pkts +
1780 edev->stats.tx_bcast_pkts;
1781
1782 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1783 edev->stats.rx_mcast_bytes +
1784 edev->stats.rx_bcast_bytes;
1785
1786 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1787 edev->stats.tx_mcast_bytes +
1788 edev->stats.tx_bcast_bytes;
1789
1790 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1791 stats->multicast = edev->stats.rx_mcast_pkts +
1792 edev->stats.rx_bcast_pkts;
1793
1794 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1795
1796 stats->collisions = edev->stats.tx_total_collisions;
1797 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1798 stats->rx_frame_errors = edev->stats.rx_align_errors;
1799
1800 return stats;
1801}
1802
Yuval Mintz733def62016-05-11 16:36:22 +03001803#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001804static int qede_get_vf_config(struct net_device *dev, int vfidx,
1805 struct ifla_vf_info *ivi)
1806{
1807 struct qede_dev *edev = netdev_priv(dev);
1808
1809 if (!edev->ops)
1810 return -EINVAL;
1811
1812 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1813}
1814
Yuval Mintz733def62016-05-11 16:36:22 +03001815static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1816 int min_tx_rate, int max_tx_rate)
1817{
1818 struct qede_dev *edev = netdev_priv(dev);
1819
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001820 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001821 max_tx_rate);
1822}
1823
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001824static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1825{
1826 struct qede_dev *edev = netdev_priv(dev);
1827
1828 if (!edev->ops)
1829 return -EINVAL;
1830
1831 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1832}
1833
Yuval Mintz733def62016-05-11 16:36:22 +03001834static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1835 int link_state)
1836{
1837 struct qede_dev *edev = netdev_priv(dev);
1838
1839 if (!edev->ops)
1840 return -EINVAL;
1841
1842 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1843}
1844#endif
1845
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001846static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1847{
1848 struct qed_update_vport_params params;
1849 int rc;
1850
1851 /* Proceed only if action actually needs to be performed */
1852 if (edev->accept_any_vlan == action)
1853 return;
1854
1855 memset(&params, 0, sizeof(params));
1856
1857 params.vport_id = 0;
1858 params.accept_any_vlan = action;
1859 params.update_accept_any_vlan_flg = 1;
1860
1861 rc = edev->ops->vport_update(edev->cdev, &params);
1862 if (rc) {
1863 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1864 action ? "enable" : "disable");
1865 } else {
1866 DP_INFO(edev, "%s accept-any-vlan\n",
1867 action ? "enabled" : "disabled");
1868 edev->accept_any_vlan = action;
1869 }
1870}
1871
1872static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1873{
1874 struct qede_dev *edev = netdev_priv(dev);
1875 struct qede_vlan *vlan, *tmp;
1876 int rc;
1877
1878 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1879
1880 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1881 if (!vlan) {
1882 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1883 return -ENOMEM;
1884 }
1885 INIT_LIST_HEAD(&vlan->list);
1886 vlan->vid = vid;
1887 vlan->configured = false;
1888
1889 /* Verify vlan isn't already configured */
1890 list_for_each_entry(tmp, &edev->vlan_list, list) {
1891 if (tmp->vid == vlan->vid) {
1892 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1893 "vlan already configured\n");
1894 kfree(vlan);
1895 return -EEXIST;
1896 }
1897 }
1898
1899 /* If interface is down, cache this VLAN ID and return */
1900 if (edev->state != QEDE_STATE_OPEN) {
1901 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1902 "Interface is down, VLAN %d will be configured when interface is up\n",
1903 vid);
1904 if (vid != 0)
1905 edev->non_configured_vlans++;
1906 list_add(&vlan->list, &edev->vlan_list);
1907
1908 return 0;
1909 }
1910
1911 /* Check for the filter limit.
1912 * Note - vlan0 has a reserved filter and can be added without
1913 * worrying about quota
1914 */
1915 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1916 (vlan->vid == 0)) {
1917 rc = qede_set_ucast_rx_vlan(edev,
1918 QED_FILTER_XCAST_TYPE_ADD,
1919 vlan->vid);
1920 if (rc) {
1921 DP_ERR(edev, "Failed to configure VLAN %d\n",
1922 vlan->vid);
1923 kfree(vlan);
1924 return -EINVAL;
1925 }
1926 vlan->configured = true;
1927
1928 /* vlan0 filter isn't consuming out of our quota */
1929 if (vlan->vid != 0)
1930 edev->configured_vlans++;
1931 } else {
1932 /* Out of quota; Activate accept-any-VLAN mode */
1933 if (!edev->non_configured_vlans)
1934 qede_config_accept_any_vlan(edev, true);
1935
1936 edev->non_configured_vlans++;
1937 }
1938
1939 list_add(&vlan->list, &edev->vlan_list);
1940
1941 return 0;
1942}
1943
1944static void qede_del_vlan_from_list(struct qede_dev *edev,
1945 struct qede_vlan *vlan)
1946{
1947 /* vlan0 filter isn't consuming out of our quota */
1948 if (vlan->vid != 0) {
1949 if (vlan->configured)
1950 edev->configured_vlans--;
1951 else
1952 edev->non_configured_vlans--;
1953 }
1954
1955 list_del(&vlan->list);
1956 kfree(vlan);
1957}
1958
1959static int qede_configure_vlan_filters(struct qede_dev *edev)
1960{
1961 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1962 struct qed_dev_eth_info *dev_info;
1963 struct qede_vlan *vlan = NULL;
1964
1965 if (list_empty(&edev->vlan_list))
1966 return 0;
1967
1968 dev_info = &edev->dev_info;
1969
1970 /* Configure non-configured vlans */
1971 list_for_each_entry(vlan, &edev->vlan_list, list) {
1972 if (vlan->configured)
1973 continue;
1974
1975 /* We have used all our credits, now enable accept_any_vlan */
1976 if ((vlan->vid != 0) &&
1977 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1978 accept_any_vlan = 1;
1979 continue;
1980 }
1981
1982 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1983
1984 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1985 vlan->vid);
1986 if (rc) {
1987 DP_ERR(edev, "Failed to configure VLAN %u\n",
1988 vlan->vid);
1989 real_rc = rc;
1990 continue;
1991 }
1992
1993 vlan->configured = true;
1994 /* vlan0 filter doesn't consume our VLAN filter's quota */
1995 if (vlan->vid != 0) {
1996 edev->non_configured_vlans--;
1997 edev->configured_vlans++;
1998 }
1999 }
2000
2001 /* enable accept_any_vlan mode if we have more VLANs than credits,
2002 * or remove accept_any_vlan mode if we've actually removed
2003 * a non-configured vlan, and all remaining vlans are truly configured.
2004 */
2005
2006 if (accept_any_vlan)
2007 qede_config_accept_any_vlan(edev, true);
2008 else if (!edev->non_configured_vlans)
2009 qede_config_accept_any_vlan(edev, false);
2010
2011 return real_rc;
2012}
2013
2014static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2015{
2016 struct qede_dev *edev = netdev_priv(dev);
2017 struct qede_vlan *vlan = NULL;
2018 int rc;
2019
2020 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2021
2022 /* Find whether entry exists */
2023 list_for_each_entry(vlan, &edev->vlan_list, list)
2024 if (vlan->vid == vid)
2025 break;
2026
2027 if (!vlan || (vlan->vid != vid)) {
2028 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2029 "Vlan isn't configured\n");
2030 return 0;
2031 }
2032
2033 if (edev->state != QEDE_STATE_OPEN) {
2034 /* As interface is already down, we don't have a VPORT
2035 * instance to remove vlan filter. So just update vlan list
2036 */
2037 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2038 "Interface is down, removing VLAN from list only\n");
2039 qede_del_vlan_from_list(edev, vlan);
2040 return 0;
2041 }
2042
2043 /* Remove vlan */
2044 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2045 if (rc) {
2046 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2047 return -EINVAL;
2048 }
2049
2050 qede_del_vlan_from_list(edev, vlan);
2051
2052 /* We have removed a VLAN - try to see if we can
2053 * configure non-configured VLAN from the list.
2054 */
2055 rc = qede_configure_vlan_filters(edev);
2056
2057 return rc;
2058}
2059
2060static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2061{
2062 struct qede_vlan *vlan = NULL;
2063
2064 if (list_empty(&edev->vlan_list))
2065 return;
2066
2067 list_for_each_entry(vlan, &edev->vlan_list, list) {
2068 if (!vlan->configured)
2069 continue;
2070
2071 vlan->configured = false;
2072
2073 /* vlan0 filter isn't consuming out of our quota */
2074 if (vlan->vid != 0) {
2075 edev->non_configured_vlans++;
2076 edev->configured_vlans--;
2077 }
2078
2079 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2080 "marked vlan %d as non-configured\n",
2081 vlan->vid);
2082 }
2083
2084 edev->accept_any_vlan = false;
2085}
2086
Yuval Mintzce2b8852016-05-26 11:01:18 +03002087int qede_set_features(struct net_device *dev, netdev_features_t features)
2088{
2089 struct qede_dev *edev = netdev_priv(dev);
2090 netdev_features_t changes = features ^ dev->features;
2091 bool need_reload = false;
2092
2093 /* No action needed if hardware GRO is disabled during driver load */
2094 if (changes & NETIF_F_GRO) {
2095 if (dev->features & NETIF_F_GRO)
2096 need_reload = !edev->gro_disable;
2097 else
2098 need_reload = edev->gro_disable;
2099 }
2100
2101 if (need_reload && netif_running(edev->ndev)) {
2102 dev->features = features;
2103 qede_reload(edev, NULL, NULL);
2104 return 1;
2105 }
2106
2107 return 0;
2108}
2109
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002110static void qede_udp_tunnel_add(struct net_device *dev,
2111 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002112{
2113 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002114 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002115
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002116 switch (ti->type) {
2117 case UDP_TUNNEL_TYPE_VXLAN:
2118 if (edev->vxlan_dst_port)
2119 return;
2120
2121 edev->vxlan_dst_port = t_port;
2122
2123 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d",
2124 t_port);
2125
2126 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2127 break;
2128 case UDP_TUNNEL_TYPE_GENEVE:
2129 if (edev->geneve_dst_port)
2130 return;
2131
2132 edev->geneve_dst_port = t_port;
2133
2134 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d",
2135 t_port);
2136 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2137 break;
2138 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002139 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002140 }
Manish Choprab18e1702016-04-14 01:38:30 -04002141
Manish Choprab18e1702016-04-14 01:38:30 -04002142 schedule_delayed_work(&edev->sp_task, 0);
2143}
2144
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002145static void qede_udp_tunnel_del(struct net_device *dev,
2146 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002147{
2148 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002149 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002150
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002151 switch (ti->type) {
2152 case UDP_TUNNEL_TYPE_VXLAN:
2153 if (t_port != edev->vxlan_dst_port)
2154 return;
2155
2156 edev->vxlan_dst_port = 0;
2157
2158 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d",
2159 t_port);
2160
2161 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2162 break;
2163 case UDP_TUNNEL_TYPE_GENEVE:
2164 if (t_port != edev->geneve_dst_port)
2165 return;
2166
2167 edev->geneve_dst_port = 0;
2168
2169 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d",
2170 t_port);
2171 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2172 break;
2173 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002174 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002175 }
Manish Choprab18e1702016-04-14 01:38:30 -04002176
Manish Choprab18e1702016-04-14 01:38:30 -04002177 schedule_delayed_work(&edev->sp_task, 0);
2178}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002179
Yuval Mintz29502192015-10-26 11:02:29 +02002180static const struct net_device_ops qede_netdev_ops = {
2181 .ndo_open = qede_open,
2182 .ndo_stop = qede_close,
2183 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002184 .ndo_set_rx_mode = qede_set_rx_mode,
2185 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002186 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002187 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002188#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002189 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002190 .ndo_set_vf_vlan = qede_set_vf_vlan,
2191#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002192 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2193 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002194 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002195 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002196#ifdef CONFIG_QED_SRIOV
2197 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002198 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002199 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002200 .ndo_set_vf_rate = qede_set_vf_rate,
2201#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002202 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2203 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Yuval Mintz29502192015-10-26 11:02:29 +02002204};
2205
2206/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002207 * START OF PROBE / REMOVE
2208 * -------------------------------------------------------------------------
2209 */
2210
2211static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2212 struct pci_dev *pdev,
2213 struct qed_dev_eth_info *info,
2214 u32 dp_module,
2215 u8 dp_level)
2216{
2217 struct net_device *ndev;
2218 struct qede_dev *edev;
2219
2220 ndev = alloc_etherdev_mqs(sizeof(*edev),
2221 info->num_queues,
2222 info->num_queues);
2223 if (!ndev) {
2224 pr_err("etherdev allocation failed\n");
2225 return NULL;
2226 }
2227
2228 edev = netdev_priv(ndev);
2229 edev->ndev = ndev;
2230 edev->cdev = cdev;
2231 edev->pdev = pdev;
2232 edev->dp_module = dp_module;
2233 edev->dp_level = dp_level;
2234 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002235 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2236 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002237
Yuval Mintze712d522015-10-26 11:02:27 +02002238 SET_NETDEV_DEV(ndev, &pdev->dev);
2239
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002240 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002241 memcpy(&edev->dev_info, info, sizeof(*info));
2242
2243 edev->num_tc = edev->dev_info.num_tc;
2244
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002245 INIT_LIST_HEAD(&edev->vlan_list);
2246
Yuval Mintze712d522015-10-26 11:02:27 +02002247 return edev;
2248}
2249
2250static void qede_init_ndev(struct qede_dev *edev)
2251{
2252 struct net_device *ndev = edev->ndev;
2253 struct pci_dev *pdev = edev->pdev;
2254 u32 hw_features;
2255
2256 pci_set_drvdata(pdev, ndev);
2257
2258 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2259 ndev->base_addr = ndev->mem_start;
2260 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2261 ndev->irq = edev->dev_info.common.pci_irq;
2262
2263 ndev->watchdog_timeo = TX_TIMEOUT;
2264
Yuval Mintz29502192015-10-26 11:02:29 +02002265 ndev->netdev_ops = &qede_netdev_ops;
2266
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002267 qede_set_ethtool_ops(ndev);
2268
Yuval Mintze712d522015-10-26 11:02:27 +02002269 /* user-changeble features */
2270 hw_features = NETIF_F_GRO | NETIF_F_SG |
2271 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2272 NETIF_F_TSO | NETIF_F_TSO6;
2273
Manish Chopra14db81d2016-04-14 01:38:33 -04002274 /* Encap features*/
2275 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2276 NETIF_F_TSO_ECN;
2277 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2278 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2279 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2280 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2281
Yuval Mintze712d522015-10-26 11:02:27 +02002282 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2283 NETIF_F_HIGHDMA;
2284 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2285 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002286 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002287
2288 ndev->hw_features = hw_features;
2289
2290 /* Set network device HW mac */
2291 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2292}
2293
2294/* This function converts from 32b param to two params of level and module
2295 * Input 32b decoding:
2296 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2297 * 'happy' flow, e.g. memory allocation failed.
2298 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2299 * and provide important parameters.
2300 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2301 * module. VERBOSE prints are for tracking the specific flow in low level.
2302 *
2303 * Notice that the level should be that of the lowest required logs.
2304 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002305void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002306{
2307 *p_dp_level = QED_LEVEL_NOTICE;
2308 *p_dp_module = 0;
2309
2310 if (debug & QED_LOG_VERBOSE_MASK) {
2311 *p_dp_level = QED_LEVEL_VERBOSE;
2312 *p_dp_module = (debug & 0x3FFFFFFF);
2313 } else if (debug & QED_LOG_INFO_MASK) {
2314 *p_dp_level = QED_LEVEL_INFO;
2315 } else if (debug & QED_LOG_NOTICE_MASK) {
2316 *p_dp_level = QED_LEVEL_NOTICE;
2317 }
2318}
2319
Yuval Mintz29502192015-10-26 11:02:29 +02002320static void qede_free_fp_array(struct qede_dev *edev)
2321{
2322 if (edev->fp_array) {
2323 struct qede_fastpath *fp;
2324 int i;
2325
2326 for_each_rss(i) {
2327 fp = &edev->fp_array[i];
2328
2329 kfree(fp->sb_info);
2330 kfree(fp->rxq);
2331 kfree(fp->txqs);
2332 }
2333 kfree(edev->fp_array);
2334 }
2335 edev->num_rss = 0;
2336}
2337
2338static int qede_alloc_fp_array(struct qede_dev *edev)
2339{
2340 struct qede_fastpath *fp;
2341 int i;
2342
2343 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2344 sizeof(*edev->fp_array), GFP_KERNEL);
2345 if (!edev->fp_array) {
2346 DP_NOTICE(edev, "fp array allocation failed\n");
2347 goto err;
2348 }
2349
2350 for_each_rss(i) {
2351 fp = &edev->fp_array[i];
2352
2353 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2354 if (!fp->sb_info) {
2355 DP_NOTICE(edev, "sb info struct allocation failed\n");
2356 goto err;
2357 }
2358
2359 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2360 if (!fp->rxq) {
2361 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2362 goto err;
2363 }
2364
2365 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2366 if (!fp->txqs) {
2367 DP_NOTICE(edev, "TXQ array allocation failed\n");
2368 goto err;
2369 }
2370 }
2371
2372 return 0;
2373err:
2374 qede_free_fp_array(edev);
2375 return -ENOMEM;
2376}
2377
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002378static void qede_sp_task(struct work_struct *work)
2379{
2380 struct qede_dev *edev = container_of(work, struct qede_dev,
2381 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002382 struct qed_dev *cdev = edev->cdev;
2383
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002384 mutex_lock(&edev->qede_lock);
2385
2386 if (edev->state == QEDE_STATE_OPEN) {
2387 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2388 qede_config_rx_mode(edev->ndev);
2389 }
2390
Manish Choprab18e1702016-04-14 01:38:30 -04002391 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2392 struct qed_tunn_params tunn_params;
2393
2394 memset(&tunn_params, 0, sizeof(tunn_params));
2395 tunn_params.update_vxlan_port = 1;
2396 tunn_params.vxlan_port = edev->vxlan_dst_port;
2397 qed_ops->tunn_config(cdev, &tunn_params);
2398 }
2399
Manish Chopra9a109dd2016-04-14 01:38:31 -04002400 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2401 struct qed_tunn_params tunn_params;
2402
2403 memset(&tunn_params, 0, sizeof(tunn_params));
2404 tunn_params.update_geneve_port = 1;
2405 tunn_params.geneve_port = edev->geneve_dst_port;
2406 qed_ops->tunn_config(cdev, &tunn_params);
2407 }
2408
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002409 mutex_unlock(&edev->qede_lock);
2410}
2411
Yuval Mintze712d522015-10-26 11:02:27 +02002412static void qede_update_pf_params(struct qed_dev *cdev)
2413{
2414 struct qed_pf_params pf_params;
2415
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002416 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002417 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002418 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002419 qed_ops->common->update_pf_params(cdev, &pf_params);
2420}
2421
2422enum qede_probe_mode {
2423 QEDE_PROBE_NORMAL,
2424};
2425
2426static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002427 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002428{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002429 struct qed_probe_params probe_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002430 struct qed_slowpath_params params;
2431 struct qed_dev_eth_info dev_info;
2432 struct qede_dev *edev;
2433 struct qed_dev *cdev;
2434 int rc;
2435
2436 if (unlikely(dp_level & QED_LEVEL_INFO))
2437 pr_notice("Starting qede probe\n");
2438
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002439 memset(&probe_params, 0, sizeof(probe_params));
2440 probe_params.protocol = QED_PROTOCOL_ETH;
2441 probe_params.dp_module = dp_module;
2442 probe_params.dp_level = dp_level;
2443 probe_params.is_vf = is_vf;
2444 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002445 if (!cdev) {
2446 rc = -ENODEV;
2447 goto err0;
2448 }
2449
2450 qede_update_pf_params(cdev);
2451
2452 /* Start the Slowpath-process */
2453 memset(&params, 0, sizeof(struct qed_slowpath_params));
2454 params.int_mode = QED_INT_MODE_MSIX;
2455 params.drv_major = QEDE_MAJOR_VERSION;
2456 params.drv_minor = QEDE_MINOR_VERSION;
2457 params.drv_rev = QEDE_REVISION_VERSION;
2458 params.drv_eng = QEDE_ENGINEERING_VERSION;
2459 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2460 rc = qed_ops->common->slowpath_start(cdev, &params);
2461 if (rc) {
2462 pr_notice("Cannot start slowpath\n");
2463 goto err1;
2464 }
2465
2466 /* Learn information crucial for qede to progress */
2467 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2468 if (rc)
2469 goto err2;
2470
2471 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2472 dp_level);
2473 if (!edev) {
2474 rc = -ENOMEM;
2475 goto err2;
2476 }
2477
Yuval Mintzfefb0202016-05-11 16:36:19 +03002478 if (is_vf)
2479 edev->flags |= QEDE_FLAG_IS_VF;
2480
Yuval Mintze712d522015-10-26 11:02:27 +02002481 qede_init_ndev(edev);
2482
Yuval Mintz29502192015-10-26 11:02:29 +02002483 rc = register_netdev(edev->ndev);
2484 if (rc) {
2485 DP_NOTICE(edev, "Cannot register net-device\n");
2486 goto err3;
2487 }
2488
Yuval Mintze712d522015-10-26 11:02:27 +02002489 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2490
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002491 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2492
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002493#ifdef CONFIG_DCB
2494 qede_set_dcbnl_ops(edev->ndev);
2495#endif
2496
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002497 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2498 mutex_init(&edev->qede_lock);
2499
Yuval Mintze712d522015-10-26 11:02:27 +02002500 DP_INFO(edev, "Ending successfully qede probe\n");
2501
2502 return 0;
2503
Yuval Mintz29502192015-10-26 11:02:29 +02002504err3:
2505 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002506err2:
2507 qed_ops->common->slowpath_stop(cdev);
2508err1:
2509 qed_ops->common->remove(cdev);
2510err0:
2511 return rc;
2512}
2513
2514static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2515{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002516 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002517 u32 dp_module = 0;
2518 u8 dp_level = 0;
2519
Yuval Mintzfefb0202016-05-11 16:36:19 +03002520 switch ((enum qede_pci_private)id->driver_data) {
2521 case QEDE_PRIVATE_VF:
2522 if (debug & QED_LOG_VERBOSE_MASK)
2523 dev_err(&pdev->dev, "Probing a VF\n");
2524 is_vf = true;
2525 break;
2526 default:
2527 if (debug & QED_LOG_VERBOSE_MASK)
2528 dev_err(&pdev->dev, "Probing a PF\n");
2529 }
2530
Yuval Mintze712d522015-10-26 11:02:27 +02002531 qede_config_debug(debug, &dp_module, &dp_level);
2532
Yuval Mintzfefb0202016-05-11 16:36:19 +03002533 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002534 QEDE_PROBE_NORMAL);
2535}
2536
2537enum qede_remove_mode {
2538 QEDE_REMOVE_NORMAL,
2539};
2540
2541static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2542{
2543 struct net_device *ndev = pci_get_drvdata(pdev);
2544 struct qede_dev *edev = netdev_priv(ndev);
2545 struct qed_dev *cdev = edev->cdev;
2546
2547 DP_INFO(edev, "Starting qede_remove\n");
2548
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002549 cancel_delayed_work_sync(&edev->sp_task);
Yuval Mintz29502192015-10-26 11:02:29 +02002550 unregister_netdev(ndev);
2551
Yuval Mintze712d522015-10-26 11:02:27 +02002552 edev->ops->common->set_power_state(cdev, PCI_D0);
2553
2554 pci_set_drvdata(pdev, NULL);
2555
2556 free_netdev(ndev);
2557
2558 /* Use global ops since we've freed edev */
2559 qed_ops->common->slowpath_stop(cdev);
2560 qed_ops->common->remove(cdev);
2561
2562 pr_notice("Ending successfully qede_remove\n");
2563}
2564
2565static void qede_remove(struct pci_dev *pdev)
2566{
2567 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2568}
Yuval Mintz29502192015-10-26 11:02:29 +02002569
2570/* -------------------------------------------------------------------------
2571 * START OF LOAD / UNLOAD
2572 * -------------------------------------------------------------------------
2573 */
2574
2575static int qede_set_num_queues(struct qede_dev *edev)
2576{
2577 int rc;
2578 u16 rss_num;
2579
2580 /* Setup queues according to possible resources*/
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002581 if (edev->req_rss)
2582 rss_num = edev->req_rss;
2583 else
2584 rss_num = netif_get_num_default_rss_queues() *
2585 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002586
2587 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2588
2589 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2590 if (rc > 0) {
2591 /* Managed to request interrupts for our queues */
2592 edev->num_rss = rc;
2593 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2594 QEDE_RSS_CNT(edev), rss_num);
2595 rc = 0;
2596 }
2597 return rc;
2598}
2599
2600static void qede_free_mem_sb(struct qede_dev *edev,
2601 struct qed_sb_info *sb_info)
2602{
2603 if (sb_info->sb_virt)
2604 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2605 (void *)sb_info->sb_virt, sb_info->sb_phys);
2606}
2607
2608/* This function allocates fast-path status block memory */
2609static int qede_alloc_mem_sb(struct qede_dev *edev,
2610 struct qed_sb_info *sb_info,
2611 u16 sb_id)
2612{
2613 struct status_block *sb_virt;
2614 dma_addr_t sb_phys;
2615 int rc;
2616
2617 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2618 sizeof(*sb_virt),
2619 &sb_phys, GFP_KERNEL);
2620 if (!sb_virt) {
2621 DP_ERR(edev, "Status block allocation failed\n");
2622 return -ENOMEM;
2623 }
2624
2625 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2626 sb_virt, sb_phys, sb_id,
2627 QED_SB_TYPE_L2_QUEUE);
2628 if (rc) {
2629 DP_ERR(edev, "Status block initialization failed\n");
2630 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2631 sb_virt, sb_phys);
2632 return rc;
2633 }
2634
2635 return 0;
2636}
2637
2638static void qede_free_rx_buffers(struct qede_dev *edev,
2639 struct qede_rx_queue *rxq)
2640{
2641 u16 i;
2642
2643 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2644 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002645 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002646
2647 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2648 data = rx_buf->data;
2649
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002650 dma_unmap_page(&edev->pdev->dev,
2651 rx_buf->mapping,
2652 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002653
2654 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002655 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002656 }
2657}
2658
Manish Chopra55482ed2016-03-04 12:35:06 -05002659static void qede_free_sge_mem(struct qede_dev *edev,
2660 struct qede_rx_queue *rxq) {
2661 int i;
2662
2663 if (edev->gro_disable)
2664 return;
2665
2666 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2667 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2668 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2669
Manish Chopraf86af2d2016-04-20 03:03:27 -04002670 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002671 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002672 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002673 PAGE_SIZE, DMA_FROM_DEVICE);
2674 __free_page(replace_buf->data);
2675 }
2676 }
2677}
2678
Yuval Mintz29502192015-10-26 11:02:29 +02002679static void qede_free_mem_rxq(struct qede_dev *edev,
2680 struct qede_rx_queue *rxq)
2681{
Manish Chopra55482ed2016-03-04 12:35:06 -05002682 qede_free_sge_mem(edev, rxq);
2683
Yuval Mintz29502192015-10-26 11:02:29 +02002684 /* Free rx buffers */
2685 qede_free_rx_buffers(edev, rxq);
2686
2687 /* Free the parallel SW ring */
2688 kfree(rxq->sw_rx_ring);
2689
2690 /* Free the real RQ ring used by FW */
2691 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2692 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2693}
2694
2695static int qede_alloc_rx_buffer(struct qede_dev *edev,
2696 struct qede_rx_queue *rxq)
2697{
2698 struct sw_rx_data *sw_rx_data;
2699 struct eth_rx_bd *rx_bd;
2700 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002701 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002702 u16 rx_buf_size;
Yuval Mintz29502192015-10-26 11:02:29 +02002703
2704 rx_buf_size = rxq->rx_buf_size;
2705
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002706 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002707 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002708 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002709 return -ENOMEM;
2710 }
2711
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002712 /* Map the entire page as it would be used
2713 * for multiple RX buffer segment size mapping.
2714 */
2715 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2716 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002717 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002718 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002719 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2720 return -ENOMEM;
2721 }
2722
2723 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002724 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002725 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002726 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002727
2728 /* Advance PROD and get BD pointer */
2729 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2730 WARN_ON(!rx_bd);
2731 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2732 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2733
2734 rxq->sw_rx_prod++;
2735
2736 return 0;
2737}
2738
Manish Chopra55482ed2016-03-04 12:35:06 -05002739static int qede_alloc_sge_mem(struct qede_dev *edev,
2740 struct qede_rx_queue *rxq)
2741{
2742 dma_addr_t mapping;
2743 int i;
2744
2745 if (edev->gro_disable)
2746 return 0;
2747
2748 if (edev->ndev->mtu > PAGE_SIZE) {
2749 edev->gro_disable = 1;
2750 return 0;
2751 }
2752
2753 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2754 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2755 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2756
2757 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2758 if (unlikely(!replace_buf->data)) {
2759 DP_NOTICE(edev,
2760 "Failed to allocate TPA skb pool [replacement buffer]\n");
2761 goto err;
2762 }
2763
2764 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2765 rxq->rx_buf_size, DMA_FROM_DEVICE);
2766 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2767 DP_NOTICE(edev,
2768 "Failed to map TPA replacement buffer\n");
2769 goto err;
2770 }
2771
Manish Chopra09ec8e72016-05-18 07:43:57 -04002772 replace_buf->mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05002773 tpa_info->replace_buf.page_offset = 0;
2774
2775 tpa_info->replace_buf_mapping = mapping;
2776 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2777 }
2778
2779 return 0;
2780err:
2781 qede_free_sge_mem(edev, rxq);
2782 edev->gro_disable = 1;
2783 return -ENOMEM;
2784}
2785
Yuval Mintz29502192015-10-26 11:02:29 +02002786/* This function allocates all memory needed per Rx queue */
2787static int qede_alloc_mem_rxq(struct qede_dev *edev,
2788 struct qede_rx_queue *rxq)
2789{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002790 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002791
2792 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2793
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002794 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2795 edev->ndev->mtu;
2796 if (rxq->rx_buf_size > PAGE_SIZE)
2797 rxq->rx_buf_size = PAGE_SIZE;
2798
2799 /* Segment size to spilt a page in multiple equal parts */
2800 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002801
2802 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002803 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002804 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2805 if (!rxq->sw_rx_ring) {
2806 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002807 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002808 goto err;
2809 }
2810
2811 /* Allocate FW Rx ring */
2812 rc = edev->ops->common->chain_alloc(edev->cdev,
2813 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2814 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002815 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002816 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002817 sizeof(struct eth_rx_bd),
2818 &rxq->rx_bd_ring);
2819
2820 if (rc)
2821 goto err;
2822
2823 /* Allocate FW completion ring */
2824 rc = edev->ops->common->chain_alloc(edev->cdev,
2825 QED_CHAIN_USE_TO_CONSUME,
2826 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002827 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002828 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002829 sizeof(union eth_rx_cqe),
2830 &rxq->rx_comp_ring);
2831 if (rc)
2832 goto err;
2833
2834 /* Allocate buffers for the Rx ring */
2835 for (i = 0; i < rxq->num_rx_buffers; i++) {
2836 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002837 if (rc) {
2838 DP_ERR(edev,
2839 "Rx buffers allocation failed at index %d\n", i);
2840 goto err;
2841 }
Yuval Mintz29502192015-10-26 11:02:29 +02002842 }
2843
Manish Chopraf86af2d2016-04-20 03:03:27 -04002844 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002845err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002846 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002847}
2848
2849static void qede_free_mem_txq(struct qede_dev *edev,
2850 struct qede_tx_queue *txq)
2851{
2852 /* Free the parallel SW ring */
2853 kfree(txq->sw_tx_ring);
2854
2855 /* Free the real RQ ring used by FW */
2856 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2857}
2858
2859/* This function allocates all memory needed per Tx queue */
2860static int qede_alloc_mem_txq(struct qede_dev *edev,
2861 struct qede_tx_queue *txq)
2862{
2863 int size, rc;
2864 union eth_tx_bd_types *p_virt;
2865
2866 txq->num_tx_buffers = edev->q_num_tx_buffers;
2867
2868 /* Allocate the parallel driver ring for Tx buffers */
2869 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2870 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2871 if (!txq->sw_tx_ring) {
2872 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2873 goto err;
2874 }
2875
2876 rc = edev->ops->common->chain_alloc(edev->cdev,
2877 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2878 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002879 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintz29502192015-10-26 11:02:29 +02002880 NUM_TX_BDS_MAX,
Yuval Mintza91eb522016-06-03 14:35:32 +03002881 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02002882 if (rc)
2883 goto err;
2884
2885 return 0;
2886
2887err:
2888 qede_free_mem_txq(edev, txq);
2889 return -ENOMEM;
2890}
2891
2892/* This function frees all memory of a single fp */
2893static void qede_free_mem_fp(struct qede_dev *edev,
2894 struct qede_fastpath *fp)
2895{
2896 int tc;
2897
2898 qede_free_mem_sb(edev, fp->sb_info);
2899
2900 qede_free_mem_rxq(edev, fp->rxq);
2901
2902 for (tc = 0; tc < edev->num_tc; tc++)
2903 qede_free_mem_txq(edev, &fp->txqs[tc]);
2904}
2905
2906/* This function allocates all memory needed for a single fp (i.e. an entity
2907 * which contains status block, one rx queue and multiple per-TC tx queues.
2908 */
2909static int qede_alloc_mem_fp(struct qede_dev *edev,
2910 struct qede_fastpath *fp)
2911{
2912 int rc, tc;
2913
2914 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2915 if (rc)
2916 goto err;
2917
2918 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2919 if (rc)
2920 goto err;
2921
2922 for (tc = 0; tc < edev->num_tc; tc++) {
2923 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2924 if (rc)
2925 goto err;
2926 }
2927
2928 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002929err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002930 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002931}
2932
2933static void qede_free_mem_load(struct qede_dev *edev)
2934{
2935 int i;
2936
2937 for_each_rss(i) {
2938 struct qede_fastpath *fp = &edev->fp_array[i];
2939
2940 qede_free_mem_fp(edev, fp);
2941 }
2942}
2943
2944/* This function allocates all qede memory at NIC load. */
2945static int qede_alloc_mem_load(struct qede_dev *edev)
2946{
2947 int rc = 0, rss_id;
2948
2949 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2950 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2951
2952 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002953 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02002954 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04002955 "Failed to allocate memory for fastpath - rss id = %d\n",
2956 rss_id);
2957 qede_free_mem_load(edev);
2958 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002959 }
Yuval Mintz29502192015-10-26 11:02:29 +02002960 }
2961
2962 return 0;
2963}
2964
2965/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2966static void qede_init_fp(struct qede_dev *edev)
2967{
2968 int rss_id, txq_index, tc;
2969 struct qede_fastpath *fp;
2970
2971 for_each_rss(rss_id) {
2972 fp = &edev->fp_array[rss_id];
2973
2974 fp->edev = edev;
2975 fp->rss_id = rss_id;
2976
2977 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2978
2979 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2980
2981 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2982 fp->rxq->rxq_id = rss_id;
2983
2984 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2985 for (tc = 0; tc < edev->num_tc; tc++) {
2986 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2987 fp->txqs[tc].index = txq_index;
2988 }
2989
2990 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2991 edev->ndev->name, rss_id);
2992 }
Manish Chopra55482ed2016-03-04 12:35:06 -05002993
2994 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02002995}
2996
2997static int qede_set_real_num_queues(struct qede_dev *edev)
2998{
2999 int rc = 0;
3000
3001 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3002 if (rc) {
3003 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3004 return rc;
3005 }
3006 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3007 if (rc) {
3008 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3009 return rc;
3010 }
3011
3012 return 0;
3013}
3014
3015static void qede_napi_disable_remove(struct qede_dev *edev)
3016{
3017 int i;
3018
3019 for_each_rss(i) {
3020 napi_disable(&edev->fp_array[i].napi);
3021
3022 netif_napi_del(&edev->fp_array[i].napi);
3023 }
3024}
3025
3026static void qede_napi_add_enable(struct qede_dev *edev)
3027{
3028 int i;
3029
3030 /* Add NAPI objects */
3031 for_each_rss(i) {
3032 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3033 qede_poll, NAPI_POLL_WEIGHT);
3034 napi_enable(&edev->fp_array[i].napi);
3035 }
3036}
3037
3038static void qede_sync_free_irqs(struct qede_dev *edev)
3039{
3040 int i;
3041
3042 for (i = 0; i < edev->int_info.used_cnt; i++) {
3043 if (edev->int_info.msix_cnt) {
3044 synchronize_irq(edev->int_info.msix[i].vector);
3045 free_irq(edev->int_info.msix[i].vector,
3046 &edev->fp_array[i]);
3047 } else {
3048 edev->ops->common->simd_handler_clean(edev->cdev, i);
3049 }
3050 }
3051
3052 edev->int_info.used_cnt = 0;
3053}
3054
3055static int qede_req_msix_irqs(struct qede_dev *edev)
3056{
3057 int i, rc;
3058
3059 /* Sanitize number of interrupts == number of prepared RSS queues */
3060 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3061 DP_ERR(edev,
3062 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3063 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3064 return -EINVAL;
3065 }
3066
3067 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3068 rc = request_irq(edev->int_info.msix[i].vector,
3069 qede_msix_fp_int, 0, edev->fp_array[i].name,
3070 &edev->fp_array[i]);
3071 if (rc) {
3072 DP_ERR(edev, "Request fp %d irq failed\n", i);
3073 qede_sync_free_irqs(edev);
3074 return rc;
3075 }
3076 DP_VERBOSE(edev, NETIF_MSG_INTR,
3077 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3078 edev->fp_array[i].name, i,
3079 &edev->fp_array[i]);
3080 edev->int_info.used_cnt++;
3081 }
3082
3083 return 0;
3084}
3085
3086static void qede_simd_fp_handler(void *cookie)
3087{
3088 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3089
3090 napi_schedule_irqoff(&fp->napi);
3091}
3092
3093static int qede_setup_irqs(struct qede_dev *edev)
3094{
3095 int i, rc = 0;
3096
3097 /* Learn Interrupt configuration */
3098 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3099 if (rc)
3100 return rc;
3101
3102 if (edev->int_info.msix_cnt) {
3103 rc = qede_req_msix_irqs(edev);
3104 if (rc)
3105 return rc;
3106 edev->ndev->irq = edev->int_info.msix[0].vector;
3107 } else {
3108 const struct qed_common_ops *ops;
3109
3110 /* qed should learn receive the RSS ids and callbacks */
3111 ops = edev->ops->common;
3112 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3113 ops->simd_handler_config(edev->cdev,
3114 &edev->fp_array[i], i,
3115 qede_simd_fp_handler);
3116 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3117 }
3118 return 0;
3119}
3120
3121static int qede_drain_txq(struct qede_dev *edev,
3122 struct qede_tx_queue *txq,
3123 bool allow_drain)
3124{
3125 int rc, cnt = 1000;
3126
3127 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3128 if (!cnt) {
3129 if (allow_drain) {
3130 DP_NOTICE(edev,
3131 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3132 txq->index);
3133 rc = edev->ops->common->drain(edev->cdev);
3134 if (rc)
3135 return rc;
3136 return qede_drain_txq(edev, txq, false);
3137 }
3138 DP_NOTICE(edev,
3139 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3140 txq->index, txq->sw_tx_prod,
3141 txq->sw_tx_cons);
3142 return -ENODEV;
3143 }
3144 cnt--;
3145 usleep_range(1000, 2000);
3146 barrier();
3147 }
3148
3149 /* FW finished processing, wait for HW to transmit all tx packets */
3150 usleep_range(1000, 2000);
3151
3152 return 0;
3153}
3154
3155static int qede_stop_queues(struct qede_dev *edev)
3156{
3157 struct qed_update_vport_params vport_update_params;
3158 struct qed_dev *cdev = edev->cdev;
3159 int rc, tc, i;
3160
3161 /* Disable the vport */
3162 memset(&vport_update_params, 0, sizeof(vport_update_params));
3163 vport_update_params.vport_id = 0;
3164 vport_update_params.update_vport_active_flg = 1;
3165 vport_update_params.vport_active_flg = 0;
3166 vport_update_params.update_rss_flg = 0;
3167
3168 rc = edev->ops->vport_update(cdev, &vport_update_params);
3169 if (rc) {
3170 DP_ERR(edev, "Failed to update vport\n");
3171 return rc;
3172 }
3173
3174 /* Flush Tx queues. If needed, request drain from MCP */
3175 for_each_rss(i) {
3176 struct qede_fastpath *fp = &edev->fp_array[i];
3177
3178 for (tc = 0; tc < edev->num_tc; tc++) {
3179 struct qede_tx_queue *txq = &fp->txqs[tc];
3180
3181 rc = qede_drain_txq(edev, txq, true);
3182 if (rc)
3183 return rc;
3184 }
3185 }
3186
3187 /* Stop all Queues in reverse order*/
3188 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3189 struct qed_stop_rxq_params rx_params;
3190
3191 /* Stop the Tx Queue(s)*/
3192 for (tc = 0; tc < edev->num_tc; tc++) {
3193 struct qed_stop_txq_params tx_params;
3194
3195 tx_params.rss_id = i;
3196 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3197 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3198 if (rc) {
3199 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3200 tx_params.tx_queue_id);
3201 return rc;
3202 }
3203 }
3204
3205 /* Stop the Rx Queue*/
3206 memset(&rx_params, 0, sizeof(rx_params));
3207 rx_params.rss_id = i;
3208 rx_params.rx_queue_id = i;
3209
3210 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3211 if (rc) {
3212 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3213 return rc;
3214 }
3215 }
3216
3217 /* Stop the vport */
3218 rc = edev->ops->vport_stop(cdev, 0);
3219 if (rc)
3220 DP_ERR(edev, "Failed to stop VPORT\n");
3221
3222 return rc;
3223}
3224
3225static int qede_start_queues(struct qede_dev *edev)
3226{
3227 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003228 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003229 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003230 struct qed_update_vport_params vport_update_params;
3231 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003232 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003233 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003234 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003235
3236 if (!edev->num_rss) {
3237 DP_ERR(edev,
3238 "Cannot update V-VPORT as active as there are no Rx queues\n");
3239 return -EINVAL;
3240 }
3241
Manish Chopra55482ed2016-03-04 12:35:06 -05003242 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003243 start.mtu = edev->ndev->mtu;
3244 start.vport_id = 0;
3245 start.drop_ttl0 = true;
3246 start.remove_inner_vlan = vlan_removal_en;
3247
3248 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003249
3250 if (rc) {
3251 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3252 return rc;
3253 }
3254
3255 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3256 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003257 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003258
3259 for_each_rss(i) {
3260 struct qede_fastpath *fp = &edev->fp_array[i];
3261 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3262
3263 memset(&q_params, 0, sizeof(q_params));
3264 q_params.rss_id = i;
3265 q_params.queue_id = i;
3266 q_params.vport_id = 0;
3267 q_params.sb = fp->sb_info->igu_sb_id;
3268 q_params.sb_idx = RX_PI;
3269
3270 rc = edev->ops->q_rx_start(cdev, &q_params,
3271 fp->rxq->rx_buf_size,
3272 fp->rxq->rx_bd_ring.p_phys_addr,
3273 phys_table,
3274 fp->rxq->rx_comp_ring.page_cnt,
3275 &fp->rxq->hw_rxq_prod_addr);
3276 if (rc) {
3277 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3278 return rc;
3279 }
3280
3281 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3282
3283 qede_update_rx_prod(edev, fp->rxq);
3284
3285 for (tc = 0; tc < edev->num_tc; tc++) {
3286 struct qede_tx_queue *txq = &fp->txqs[tc];
3287 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3288
3289 memset(&q_params, 0, sizeof(q_params));
3290 q_params.rss_id = i;
3291 q_params.queue_id = txq_index;
3292 q_params.vport_id = 0;
3293 q_params.sb = fp->sb_info->igu_sb_id;
3294 q_params.sb_idx = TX_PI(tc);
3295
3296 rc = edev->ops->q_tx_start(cdev, &q_params,
3297 txq->tx_pbl.pbl.p_phys_table,
3298 txq->tx_pbl.page_cnt,
3299 &txq->doorbell_addr);
3300 if (rc) {
3301 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3302 txq_index, rc);
3303 return rc;
3304 }
3305
3306 txq->hw_cons_ptr =
3307 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3308 SET_FIELD(txq->tx_db.data.params,
3309 ETH_DB_DATA_DEST, DB_DEST_XCM);
3310 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3311 DB_AGG_CMD_SET);
3312 SET_FIELD(txq->tx_db.data.params,
3313 ETH_DB_DATA_AGG_VAL_SEL,
3314 DQ_XCM_ETH_TX_BD_PROD_CMD);
3315
3316 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3317 }
3318 }
3319
3320 /* Prepare and send the vport enable */
3321 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003322 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003323 vport_update_params.update_vport_active_flg = 1;
3324 vport_update_params.vport_active_flg = 1;
3325
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003326 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3327 qed_info->tx_switching) {
3328 vport_update_params.update_tx_switching_flg = 1;
3329 vport_update_params.tx_switching_flg = 1;
3330 }
3331
Yuval Mintz29502192015-10-26 11:02:29 +02003332 /* Fill struct with RSS params */
3333 if (QEDE_RSS_CNT(edev) > 1) {
3334 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003335
3336 /* Need to validate current RSS config uses valid entries */
3337 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3338 if (edev->rss_params.rss_ind_table[i] >=
3339 edev->num_rss) {
3340 reset_rss_indir = true;
3341 break;
3342 }
3343 }
3344
3345 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3346 reset_rss_indir) {
3347 u16 val;
3348
3349 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3350 u16 indir_val;
3351
3352 val = QEDE_RSS_CNT(edev);
3353 indir_val = ethtool_rxfh_indir_default(i, val);
3354 edev->rss_params.rss_ind_table[i] = indir_val;
3355 }
3356 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3357 }
3358
3359 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3360 netdev_rss_key_fill(edev->rss_params.rss_key,
3361 sizeof(edev->rss_params.rss_key));
3362 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3363 }
3364
3365 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3366 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3367 QED_RSS_IPV6 |
3368 QED_RSS_IPV4_TCP |
3369 QED_RSS_IPV6_TCP;
3370 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3371 }
3372
3373 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3374 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003375 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003376 memset(&vport_update_params.rss_params, 0,
3377 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003378 }
Yuval Mintz29502192015-10-26 11:02:29 +02003379
3380 rc = edev->ops->vport_update(cdev, &vport_update_params);
3381 if (rc) {
3382 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3383 return rc;
3384 }
3385
3386 return 0;
3387}
3388
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003389static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3390 enum qed_filter_xcast_params_type opcode,
3391 unsigned char *mac, int num_macs)
3392{
3393 struct qed_filter_params filter_cmd;
3394 int i;
3395
3396 memset(&filter_cmd, 0, sizeof(filter_cmd));
3397 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3398 filter_cmd.filter.mcast.type = opcode;
3399 filter_cmd.filter.mcast.num = num_macs;
3400
3401 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3402 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3403
3404 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3405}
3406
Yuval Mintz29502192015-10-26 11:02:29 +02003407enum qede_unload_mode {
3408 QEDE_UNLOAD_NORMAL,
3409};
3410
3411static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3412{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003413 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003414 int rc;
3415
3416 DP_INFO(edev, "Starting qede unload\n");
3417
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003418 mutex_lock(&edev->qede_lock);
3419 edev->state = QEDE_STATE_CLOSED;
3420
Yuval Mintz29502192015-10-26 11:02:29 +02003421 /* Close OS Tx */
3422 netif_tx_disable(edev->ndev);
3423 netif_carrier_off(edev->ndev);
3424
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003425 /* Reset the link */
3426 memset(&link_params, 0, sizeof(link_params));
3427 link_params.link_up = false;
3428 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003429 rc = qede_stop_queues(edev);
3430 if (rc) {
3431 qede_sync_free_irqs(edev);
3432 goto out;
3433 }
3434
3435 DP_INFO(edev, "Stopped Queues\n");
3436
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003437 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003438 edev->ops->fastpath_stop(edev->cdev);
3439
3440 /* Release the interrupts */
3441 qede_sync_free_irqs(edev);
3442 edev->ops->common->set_fp_int(edev->cdev, 0);
3443
3444 qede_napi_disable_remove(edev);
3445
3446 qede_free_mem_load(edev);
3447 qede_free_fp_array(edev);
3448
3449out:
3450 mutex_unlock(&edev->qede_lock);
3451 DP_INFO(edev, "Ending qede unload\n");
3452}
3453
3454enum qede_load_mode {
3455 QEDE_LOAD_NORMAL,
3456};
3457
3458static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3459{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003460 struct qed_link_params link_params;
3461 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003462 int rc;
3463
3464 DP_INFO(edev, "Starting qede load\n");
3465
3466 rc = qede_set_num_queues(edev);
3467 if (rc)
3468 goto err0;
3469
3470 rc = qede_alloc_fp_array(edev);
3471 if (rc)
3472 goto err0;
3473
3474 qede_init_fp(edev);
3475
3476 rc = qede_alloc_mem_load(edev);
3477 if (rc)
3478 goto err1;
3479 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3480 QEDE_RSS_CNT(edev), edev->num_tc);
3481
3482 rc = qede_set_real_num_queues(edev);
3483 if (rc)
3484 goto err2;
3485
3486 qede_napi_add_enable(edev);
3487 DP_INFO(edev, "Napi added and enabled\n");
3488
3489 rc = qede_setup_irqs(edev);
3490 if (rc)
3491 goto err3;
3492 DP_INFO(edev, "Setup IRQs succeeded\n");
3493
3494 rc = qede_start_queues(edev);
3495 if (rc)
3496 goto err4;
3497 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3498
3499 /* Add primary mac and set Rx filters */
3500 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3501
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003502 mutex_lock(&edev->qede_lock);
3503 edev->state = QEDE_STATE_OPEN;
3504 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003505
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003506 /* Program un-configured VLANs */
3507 qede_configure_vlan_filters(edev);
3508
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003509 /* Ask for link-up using current configuration */
3510 memset(&link_params, 0, sizeof(link_params));
3511 link_params.link_up = true;
3512 edev->ops->common->set_link(edev->cdev, &link_params);
3513
3514 /* Query whether link is already-up */
3515 memset(&link_output, 0, sizeof(link_output));
3516 edev->ops->common->get_link(edev->cdev, &link_output);
3517 qede_link_update(edev, &link_output);
3518
Yuval Mintz29502192015-10-26 11:02:29 +02003519 DP_INFO(edev, "Ending successfully qede load\n");
3520
3521 return 0;
3522
3523err4:
3524 qede_sync_free_irqs(edev);
3525 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3526err3:
3527 qede_napi_disable_remove(edev);
3528err2:
3529 qede_free_mem_load(edev);
3530err1:
3531 edev->ops->common->set_fp_int(edev->cdev, 0);
3532 qede_free_fp_array(edev);
3533 edev->num_rss = 0;
3534err0:
3535 return rc;
3536}
3537
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003538void qede_reload(struct qede_dev *edev,
3539 void (*func)(struct qede_dev *, union qede_reload_args *),
3540 union qede_reload_args *args)
3541{
3542 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3543 /* Call function handler to update parameters
3544 * needed for function load.
3545 */
3546 if (func)
3547 func(edev, args);
3548
3549 qede_load(edev, QEDE_LOAD_NORMAL);
3550
3551 mutex_lock(&edev->qede_lock);
3552 qede_config_rx_mode(edev->ndev);
3553 mutex_unlock(&edev->qede_lock);
3554}
3555
Yuval Mintz29502192015-10-26 11:02:29 +02003556/* called with rtnl_lock */
3557static int qede_open(struct net_device *ndev)
3558{
3559 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003560 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003561
3562 netif_carrier_off(ndev);
3563
3564 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3565
Manish Choprab18e1702016-04-14 01:38:30 -04003566 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3567
3568 if (rc)
3569 return rc;
3570
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003571 udp_tunnel_get_rx_info(ndev);
3572
Manish Choprab18e1702016-04-14 01:38:30 -04003573 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003574}
3575
3576static int qede_close(struct net_device *ndev)
3577{
3578 struct qede_dev *edev = netdev_priv(ndev);
3579
3580 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3581
3582 return 0;
3583}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003584
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003585static void qede_link_update(void *dev, struct qed_link_output *link)
3586{
3587 struct qede_dev *edev = dev;
3588
3589 if (!netif_running(edev->ndev)) {
3590 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3591 return;
3592 }
3593
3594 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003595 if (!netif_carrier_ok(edev->ndev)) {
3596 DP_NOTICE(edev, "Link is up\n");
3597 netif_tx_start_all_queues(edev->ndev);
3598 netif_carrier_on(edev->ndev);
3599 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003600 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003601 if (netif_carrier_ok(edev->ndev)) {
3602 DP_NOTICE(edev, "Link is down\n");
3603 netif_tx_disable(edev->ndev);
3604 netif_carrier_off(edev->ndev);
3605 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003606 }
3607}
3608
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003609static int qede_set_mac_addr(struct net_device *ndev, void *p)
3610{
3611 struct qede_dev *edev = netdev_priv(ndev);
3612 struct sockaddr *addr = p;
3613 int rc;
3614
3615 ASSERT_RTNL(); /* @@@TBD To be removed */
3616
3617 DP_INFO(edev, "Set_mac_addr called\n");
3618
3619 if (!is_valid_ether_addr(addr->sa_data)) {
3620 DP_NOTICE(edev, "The MAC address is not valid\n");
3621 return -EFAULT;
3622 }
3623
Yuval Mintzeff16962016-05-11 16:36:21 +03003624 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3625 DP_NOTICE(edev, "qed prevents setting MAC\n");
3626 return -EINVAL;
3627 }
3628
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003629 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3630
3631 if (!netif_running(ndev)) {
3632 DP_NOTICE(edev, "The device is currently down\n");
3633 return 0;
3634 }
3635
3636 /* Remove the previous primary mac */
3637 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3638 edev->primary_mac);
3639 if (rc)
3640 return rc;
3641
3642 /* Add MAC filter according to the new unicast HW MAC address */
3643 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3644 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3645 edev->primary_mac);
3646}
3647
3648static int
3649qede_configure_mcast_filtering(struct net_device *ndev,
3650 enum qed_filter_rx_mode_type *accept_flags)
3651{
3652 struct qede_dev *edev = netdev_priv(ndev);
3653 unsigned char *mc_macs, *temp;
3654 struct netdev_hw_addr *ha;
3655 int rc = 0, mc_count;
3656 size_t size;
3657
3658 size = 64 * ETH_ALEN;
3659
3660 mc_macs = kzalloc(size, GFP_KERNEL);
3661 if (!mc_macs) {
3662 DP_NOTICE(edev,
3663 "Failed to allocate memory for multicast MACs\n");
3664 rc = -ENOMEM;
3665 goto exit;
3666 }
3667
3668 temp = mc_macs;
3669
3670 /* Remove all previously configured MAC filters */
3671 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3672 mc_macs, 1);
3673 if (rc)
3674 goto exit;
3675
3676 netif_addr_lock_bh(ndev);
3677
3678 mc_count = netdev_mc_count(ndev);
3679 if (mc_count < 64) {
3680 netdev_for_each_mc_addr(ha, ndev) {
3681 ether_addr_copy(temp, ha->addr);
3682 temp += ETH_ALEN;
3683 }
3684 }
3685
3686 netif_addr_unlock_bh(ndev);
3687
3688 /* Check for all multicast @@@TBD resource allocation */
3689 if ((ndev->flags & IFF_ALLMULTI) ||
3690 (mc_count > 64)) {
3691 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3692 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3693 } else {
3694 /* Add all multicast MAC filters */
3695 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3696 mc_macs, mc_count);
3697 }
3698
3699exit:
3700 kfree(mc_macs);
3701 return rc;
3702}
3703
3704static void qede_set_rx_mode(struct net_device *ndev)
3705{
3706 struct qede_dev *edev = netdev_priv(ndev);
3707
3708 DP_INFO(edev, "qede_set_rx_mode called\n");
3709
3710 if (edev->state != QEDE_STATE_OPEN) {
3711 DP_INFO(edev,
3712 "qede_set_rx_mode called while interface is down\n");
3713 } else {
3714 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3715 schedule_delayed_work(&edev->sp_task, 0);
3716 }
3717}
3718
3719/* Must be called with qede_lock held */
3720static void qede_config_rx_mode(struct net_device *ndev)
3721{
3722 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3723 struct qede_dev *edev = netdev_priv(ndev);
3724 struct qed_filter_params rx_mode;
3725 unsigned char *uc_macs, *temp;
3726 struct netdev_hw_addr *ha;
3727 int rc, uc_count;
3728 size_t size;
3729
3730 netif_addr_lock_bh(ndev);
3731
3732 uc_count = netdev_uc_count(ndev);
3733 size = uc_count * ETH_ALEN;
3734
3735 uc_macs = kzalloc(size, GFP_ATOMIC);
3736 if (!uc_macs) {
3737 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3738 netif_addr_unlock_bh(ndev);
3739 return;
3740 }
3741
3742 temp = uc_macs;
3743 netdev_for_each_uc_addr(ha, ndev) {
3744 ether_addr_copy(temp, ha->addr);
3745 temp += ETH_ALEN;
3746 }
3747
3748 netif_addr_unlock_bh(ndev);
3749
3750 /* Configure the struct for the Rx mode */
3751 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3752 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3753
3754 /* Remove all previous unicast secondary macs and multicast macs
3755 * (configrue / leave the primary mac)
3756 */
3757 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3758 edev->primary_mac);
3759 if (rc)
3760 goto out;
3761
3762 /* Check for promiscuous */
3763 if ((ndev->flags & IFF_PROMISC) ||
3764 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3765 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3766 } else {
3767 /* Add MAC filters according to the unicast secondary macs */
3768 int i;
3769
3770 temp = uc_macs;
3771 for (i = 0; i < uc_count; i++) {
3772 rc = qede_set_ucast_rx_mac(edev,
3773 QED_FILTER_XCAST_TYPE_ADD,
3774 temp);
3775 if (rc)
3776 goto out;
3777
3778 temp += ETH_ALEN;
3779 }
3780
3781 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3782 if (rc)
3783 goto out;
3784 }
3785
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003786 /* take care of VLAN mode */
3787 if (ndev->flags & IFF_PROMISC) {
3788 qede_config_accept_any_vlan(edev, true);
3789 } else if (!edev->non_configured_vlans) {
3790 /* It's possible that accept_any_vlan mode is set due to a
3791 * previous setting of IFF_PROMISC. If vlan credits are
3792 * sufficient, disable accept_any_vlan.
3793 */
3794 qede_config_accept_any_vlan(edev, false);
3795 }
3796
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003797 rx_mode.filter.accept_flags = accept_flags;
3798 edev->ops->filter_config(edev->cdev, &rx_mode);
3799out:
3800 kfree(uc_macs);
3801}