Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1 | /* |
Sujith Manoharan | 5b68138 | 2011-05-17 13:36:18 +0530 | [diff] [blame] | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame] | 17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 18 | |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 19 | #include <linux/dma-mapping.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 20 | #include <linux/slab.h> |
Felix Fietkau | 6fb1b1e | 2011-03-19 13:55:39 +0100 | [diff] [blame] | 21 | #include <linux/ath9k_platform.h> |
Paul Gortmaker | 9d9779e | 2011-07-03 15:21:01 -0400 | [diff] [blame] | 22 | #include <linux/module.h> |
Simon Wunderlich | e93d083 | 2013-01-08 14:48:58 +0100 | [diff] [blame] | 23 | #include <linux/relay.h> |
Oleksij Rempel | b0a1ae9 | 2013-05-24 20:30:59 +0200 | [diff] [blame] | 24 | #include <net/ieee80211_radiotap.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 25 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 26 | #include "ath9k.h" |
| 27 | |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 28 | struct ath9k_eeprom_ctx { |
| 29 | struct completion complete; |
| 30 | struct ath_hw *ah; |
| 31 | }; |
| 32 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 33 | static char *dev_info = "ath9k"; |
| 34 | |
| 35 | MODULE_AUTHOR("Atheros Communications"); |
| 36 | MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards."); |
| 37 | MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards"); |
| 38 | MODULE_LICENSE("Dual BSD/GPL"); |
| 39 | |
| 40 | static unsigned int ath9k_debug = ATH_DBG_DEFAULT; |
| 41 | module_param_named(debug, ath9k_debug, uint, 0); |
| 42 | MODULE_PARM_DESC(debug, "Debugging mask"); |
| 43 | |
John W. Linville | 3e6109c | 2011-01-05 09:39:17 -0500 | [diff] [blame] | 44 | int ath9k_modparam_nohwcrypt; |
| 45 | module_param_named(nohwcrypt, ath9k_modparam_nohwcrypt, int, 0444); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 46 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); |
| 47 | |
Vivek Natarajan | 93dbbcc | 2010-08-25 19:34:52 +0530 | [diff] [blame] | 48 | int led_blink; |
Vivek Natarajan | 9a75c2f | 2010-06-22 11:52:37 +0530 | [diff] [blame] | 49 | module_param_named(blink, led_blink, int, 0444); |
| 50 | MODULE_PARM_DESC(blink, "Enable LED blink on activity"); |
| 51 | |
Vasanthakumar Thiagarajan | 8f5dcb1 | 2010-11-26 06:10:06 -0800 | [diff] [blame] | 52 | static int ath9k_btcoex_enable; |
| 53 | module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444); |
| 54 | MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence"); |
| 55 | |
Sujith Manoharan | e09f2dc | 2012-09-16 08:06:56 +0530 | [diff] [blame] | 56 | static int ath9k_enable_diversity; |
| 57 | module_param_named(enable_diversity, ath9k_enable_diversity, int, 0444); |
| 58 | MODULE_PARM_DESC(enable_diversity, "Enable Antenna diversity for AR9565"); |
| 59 | |
Rajkumar Manoharan | d584747 | 2010-12-20 14:39:51 +0530 | [diff] [blame] | 60 | bool is_ath9k_unloaded; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 61 | /* We use the hw_value as an index into our private channel structure */ |
| 62 | |
| 63 | #define CHAN2G(_freq, _idx) { \ |
Mohammed Shafi Shajakhan | b1c1d00 | 2010-12-17 20:44:36 +0530 | [diff] [blame] | 64 | .band = IEEE80211_BAND_2GHZ, \ |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 65 | .center_freq = (_freq), \ |
| 66 | .hw_value = (_idx), \ |
| 67 | .max_power = 20, \ |
| 68 | } |
| 69 | |
| 70 | #define CHAN5G(_freq, _idx) { \ |
| 71 | .band = IEEE80211_BAND_5GHZ, \ |
| 72 | .center_freq = (_freq), \ |
| 73 | .hw_value = (_idx), \ |
| 74 | .max_power = 20, \ |
| 75 | } |
| 76 | |
| 77 | /* Some 2 GHz radios are actually tunable on 2312-2732 |
| 78 | * on 5 MHz steps, we support the channels which we know |
| 79 | * we have calibration data for all cards though to make |
| 80 | * this static */ |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 81 | static const struct ieee80211_channel ath9k_2ghz_chantable[] = { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 82 | CHAN2G(2412, 0), /* Channel 1 */ |
| 83 | CHAN2G(2417, 1), /* Channel 2 */ |
| 84 | CHAN2G(2422, 2), /* Channel 3 */ |
| 85 | CHAN2G(2427, 3), /* Channel 4 */ |
| 86 | CHAN2G(2432, 4), /* Channel 5 */ |
| 87 | CHAN2G(2437, 5), /* Channel 6 */ |
| 88 | CHAN2G(2442, 6), /* Channel 7 */ |
| 89 | CHAN2G(2447, 7), /* Channel 8 */ |
| 90 | CHAN2G(2452, 8), /* Channel 9 */ |
| 91 | CHAN2G(2457, 9), /* Channel 10 */ |
| 92 | CHAN2G(2462, 10), /* Channel 11 */ |
| 93 | CHAN2G(2467, 11), /* Channel 12 */ |
| 94 | CHAN2G(2472, 12), /* Channel 13 */ |
| 95 | CHAN2G(2484, 13), /* Channel 14 */ |
| 96 | }; |
| 97 | |
| 98 | /* Some 5 GHz radios are actually tunable on XXXX-YYYY |
| 99 | * on 5 MHz steps, we support the channels which we know |
| 100 | * we have calibration data for all cards though to make |
| 101 | * this static */ |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 102 | static const struct ieee80211_channel ath9k_5ghz_chantable[] = { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 103 | /* _We_ call this UNII 1 */ |
| 104 | CHAN5G(5180, 14), /* Channel 36 */ |
| 105 | CHAN5G(5200, 15), /* Channel 40 */ |
| 106 | CHAN5G(5220, 16), /* Channel 44 */ |
| 107 | CHAN5G(5240, 17), /* Channel 48 */ |
| 108 | /* _We_ call this UNII 2 */ |
| 109 | CHAN5G(5260, 18), /* Channel 52 */ |
| 110 | CHAN5G(5280, 19), /* Channel 56 */ |
| 111 | CHAN5G(5300, 20), /* Channel 60 */ |
| 112 | CHAN5G(5320, 21), /* Channel 64 */ |
| 113 | /* _We_ call this "Middle band" */ |
| 114 | CHAN5G(5500, 22), /* Channel 100 */ |
| 115 | CHAN5G(5520, 23), /* Channel 104 */ |
| 116 | CHAN5G(5540, 24), /* Channel 108 */ |
| 117 | CHAN5G(5560, 25), /* Channel 112 */ |
| 118 | CHAN5G(5580, 26), /* Channel 116 */ |
| 119 | CHAN5G(5600, 27), /* Channel 120 */ |
| 120 | CHAN5G(5620, 28), /* Channel 124 */ |
| 121 | CHAN5G(5640, 29), /* Channel 128 */ |
| 122 | CHAN5G(5660, 30), /* Channel 132 */ |
| 123 | CHAN5G(5680, 31), /* Channel 136 */ |
| 124 | CHAN5G(5700, 32), /* Channel 140 */ |
| 125 | /* _We_ call this UNII 3 */ |
| 126 | CHAN5G(5745, 33), /* Channel 149 */ |
| 127 | CHAN5G(5765, 34), /* Channel 153 */ |
| 128 | CHAN5G(5785, 35), /* Channel 157 */ |
| 129 | CHAN5G(5805, 36), /* Channel 161 */ |
| 130 | CHAN5G(5825, 37), /* Channel 165 */ |
| 131 | }; |
| 132 | |
| 133 | /* Atheros hardware rate code addition for short premble */ |
| 134 | #define SHPCHECK(__hw_rate, __flags) \ |
| 135 | ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04 ) : 0) |
| 136 | |
| 137 | #define RATE(_bitrate, _hw_rate, _flags) { \ |
| 138 | .bitrate = (_bitrate), \ |
| 139 | .flags = (_flags), \ |
| 140 | .hw_value = (_hw_rate), \ |
| 141 | .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ |
| 142 | } |
| 143 | |
| 144 | static struct ieee80211_rate ath9k_legacy_rates[] = { |
| 145 | RATE(10, 0x1b, 0), |
| 146 | RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), |
| 147 | RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), |
| 148 | RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), |
| 149 | RATE(60, 0x0b, 0), |
| 150 | RATE(90, 0x0f, 0), |
| 151 | RATE(120, 0x0a, 0), |
| 152 | RATE(180, 0x0e, 0), |
| 153 | RATE(240, 0x09, 0), |
| 154 | RATE(360, 0x0d, 0), |
| 155 | RATE(480, 0x08, 0), |
| 156 | RATE(540, 0x0c, 0), |
| 157 | }; |
| 158 | |
Felix Fietkau | 0cf55c2 | 2011-02-27 22:26:40 +0100 | [diff] [blame] | 159 | #ifdef CONFIG_MAC80211_LEDS |
| 160 | static const struct ieee80211_tpt_blink ath9k_tpt_blink[] = { |
| 161 | { .throughput = 0 * 1024, .blink_time = 334 }, |
| 162 | { .throughput = 1 * 1024, .blink_time = 260 }, |
| 163 | { .throughput = 5 * 1024, .blink_time = 220 }, |
| 164 | { .throughput = 10 * 1024, .blink_time = 190 }, |
| 165 | { .throughput = 20 * 1024, .blink_time = 170 }, |
| 166 | { .throughput = 50 * 1024, .blink_time = 150 }, |
| 167 | { .throughput = 70 * 1024, .blink_time = 130 }, |
| 168 | { .throughput = 100 * 1024, .blink_time = 110 }, |
| 169 | { .throughput = 200 * 1024, .blink_time = 80 }, |
| 170 | { .throughput = 300 * 1024, .blink_time = 50 }, |
| 171 | }; |
| 172 | #endif |
| 173 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 174 | static void ath9k_deinit_softc(struct ath_softc *sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 175 | |
| 176 | /* |
| 177 | * Read and write, they both share the same lock. We do this to serialize |
| 178 | * reads and writes on Atheros 802.11n PCI devices only. This is required |
| 179 | * as the FIFO on these devices can only accept sanely 2 requests. |
| 180 | */ |
| 181 | |
| 182 | static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) |
| 183 | { |
| 184 | struct ath_hw *ah = (struct ath_hw *) hw_priv; |
| 185 | struct ath_common *common = ath9k_hw_common(ah); |
| 186 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| 187 | |
Felix Fietkau | f3eef64 | 2012-03-14 16:40:25 +0100 | [diff] [blame] | 188 | if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 189 | unsigned long flags; |
| 190 | spin_lock_irqsave(&sc->sc_serial_rw, flags); |
| 191 | iowrite32(val, sc->mem + reg_offset); |
| 192 | spin_unlock_irqrestore(&sc->sc_serial_rw, flags); |
| 193 | } else |
| 194 | iowrite32(val, sc->mem + reg_offset); |
| 195 | } |
| 196 | |
| 197 | static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset) |
| 198 | { |
| 199 | struct ath_hw *ah = (struct ath_hw *) hw_priv; |
| 200 | struct ath_common *common = ath9k_hw_common(ah); |
| 201 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| 202 | u32 val; |
| 203 | |
Felix Fietkau | f3eef64 | 2012-03-14 16:40:25 +0100 | [diff] [blame] | 204 | if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 205 | unsigned long flags; |
| 206 | spin_lock_irqsave(&sc->sc_serial_rw, flags); |
| 207 | val = ioread32(sc->mem + reg_offset); |
| 208 | spin_unlock_irqrestore(&sc->sc_serial_rw, flags); |
| 209 | } else |
| 210 | val = ioread32(sc->mem + reg_offset); |
| 211 | return val; |
| 212 | } |
| 213 | |
Rajkumar Manoharan | 5479de6 | 2011-07-17 11:43:02 +0530 | [diff] [blame] | 214 | static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset, |
| 215 | u32 set, u32 clr) |
| 216 | { |
| 217 | u32 val; |
| 218 | |
| 219 | val = ioread32(sc->mem + reg_offset); |
| 220 | val &= ~clr; |
| 221 | val |= set; |
| 222 | iowrite32(val, sc->mem + reg_offset); |
| 223 | |
| 224 | return val; |
| 225 | } |
| 226 | |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 227 | static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) |
| 228 | { |
| 229 | struct ath_hw *ah = (struct ath_hw *) hw_priv; |
| 230 | struct ath_common *common = ath9k_hw_common(ah); |
| 231 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| 232 | unsigned long uninitialized_var(flags); |
| 233 | u32 val; |
| 234 | |
Felix Fietkau | f3eef64 | 2012-03-14 16:40:25 +0100 | [diff] [blame] | 235 | if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 236 | spin_lock_irqsave(&sc->sc_serial_rw, flags); |
Rajkumar Manoharan | 5479de6 | 2011-07-17 11:43:02 +0530 | [diff] [blame] | 237 | val = __ath9k_reg_rmw(sc, reg_offset, set, clr); |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 238 | spin_unlock_irqrestore(&sc->sc_serial_rw, flags); |
Rajkumar Manoharan | 5479de6 | 2011-07-17 11:43:02 +0530 | [diff] [blame] | 239 | } else |
| 240 | val = __ath9k_reg_rmw(sc, reg_offset, set, clr); |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 241 | |
| 242 | return val; |
| 243 | } |
| 244 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 245 | /**************************/ |
| 246 | /* Initialization */ |
| 247 | /**************************/ |
| 248 | |
| 249 | static void setup_ht_cap(struct ath_softc *sc, |
| 250 | struct ieee80211_sta_ht_cap *ht_info) |
| 251 | { |
Felix Fietkau | 3bb065a | 2010-04-19 19:57:34 +0200 | [diff] [blame] | 252 | struct ath_hw *ah = sc->sc_ah; |
| 253 | struct ath_common *common = ath9k_hw_common(ah); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 254 | u8 tx_streams, rx_streams; |
Felix Fietkau | 3bb065a | 2010-04-19 19:57:34 +0200 | [diff] [blame] | 255 | int i, max_streams; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 256 | |
| 257 | ht_info->ht_supported = true; |
| 258 | ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | |
| 259 | IEEE80211_HT_CAP_SM_PS | |
| 260 | IEEE80211_HT_CAP_SGI_40 | |
| 261 | IEEE80211_HT_CAP_DSSSCCK40; |
| 262 | |
Luis R. Rodriguez | b0a3344 | 2010-04-15 17:39:39 -0400 | [diff] [blame] | 263 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) |
| 264 | ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING; |
| 265 | |
Vasanthakumar Thiagarajan | 6473d24 | 2010-05-13 18:42:38 -0700 | [diff] [blame] | 266 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) |
| 267 | ht_info->cap |= IEEE80211_HT_CAP_SGI_20; |
| 268 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 269 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
| 270 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; |
| 271 | |
Sujith Manoharan | e41db61 | 2012-09-10 09:20:12 +0530 | [diff] [blame] | 272 | if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) |
Vasanthakumar Thiagarajan | 7f1c7a6 | 2010-12-06 04:27:41 -0800 | [diff] [blame] | 273 | max_streams = 1; |
Mohammed Shafi Shajakhan | e710419 | 2011-12-01 18:14:01 +0530 | [diff] [blame] | 274 | else if (AR_SREV_9462(ah)) |
| 275 | max_streams = 2; |
Vasanthakumar Thiagarajan | 7f1c7a6 | 2010-12-06 04:27:41 -0800 | [diff] [blame] | 276 | else if (AR_SREV_9300_20_OR_LATER(ah)) |
Felix Fietkau | 3bb065a | 2010-04-19 19:57:34 +0200 | [diff] [blame] | 277 | max_streams = 3; |
| 278 | else |
| 279 | max_streams = 2; |
| 280 | |
Felix Fietkau | 7a37081 | 2010-09-22 12:34:52 +0200 | [diff] [blame] | 281 | if (AR_SREV_9280_20_OR_LATER(ah)) { |
Felix Fietkau | 074a8c0 | 2010-04-19 19:57:36 +0200 | [diff] [blame] | 282 | if (max_streams >= 2) |
| 283 | ht_info->cap |= IEEE80211_HT_CAP_TX_STBC; |
| 284 | ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); |
| 285 | } |
| 286 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 287 | /* set up supported mcs set */ |
| 288 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
Felix Fietkau | 82b2d33 | 2011-09-03 01:40:23 +0200 | [diff] [blame] | 289 | tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams); |
| 290 | rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams); |
Felix Fietkau | 3bb065a | 2010-04-19 19:57:34 +0200 | [diff] [blame] | 291 | |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 292 | ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n", |
Joe Perches | 226afe6 | 2010-12-02 19:12:37 -0800 | [diff] [blame] | 293 | tx_streams, rx_streams); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 294 | |
| 295 | if (tx_streams != rx_streams) { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 296 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
| 297 | ht_info->mcs.tx_params |= ((tx_streams - 1) << |
| 298 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); |
| 299 | } |
| 300 | |
Felix Fietkau | 3bb065a | 2010-04-19 19:57:34 +0200 | [diff] [blame] | 301 | for (i = 0; i < rx_streams; i++) |
| 302 | ht_info->mcs.rx_mask[i] = 0xff; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 303 | |
| 304 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; |
| 305 | } |
| 306 | |
Luis R. Rodriguez | 0c0280b | 2013-01-11 18:39:36 +0000 | [diff] [blame] | 307 | static void ath9k_reg_notifier(struct wiphy *wiphy, |
| 308 | struct regulatory_request *request) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 309 | { |
| 310 | struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
Felix Fietkau | 9ac5861 | 2011-01-24 19:23:18 +0100 | [diff] [blame] | 311 | struct ath_softc *sc = hw->priv; |
Rajkumar Manoharan | 687f545 | 2011-12-08 23:59:25 +0530 | [diff] [blame] | 312 | struct ath_hw *ah = sc->sc_ah; |
| 313 | struct ath_regulatory *reg = ath9k_hw_regulatory(ah); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 314 | |
Luis R. Rodriguez | 0c0280b | 2013-01-11 18:39:36 +0000 | [diff] [blame] | 315 | ath_reg_notifier_apply(wiphy, request, reg); |
Rajkumar Manoharan | 687f545 | 2011-12-08 23:59:25 +0530 | [diff] [blame] | 316 | |
| 317 | /* Set tx power */ |
| 318 | if (ah->curchan) { |
| 319 | sc->config.txpowlimit = 2 * ah->curchan->chan->max_power; |
| 320 | ath9k_ps_wakeup(sc); |
| 321 | ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false); |
| 322 | sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit; |
Zefir Kurtisi | 73e4937 | 2013-04-03 18:31:31 +0200 | [diff] [blame] | 323 | /* synchronize DFS detector if regulatory domain changed */ |
| 324 | if (sc->dfs_detector != NULL) |
| 325 | sc->dfs_detector->set_dfs_domain(sc->dfs_detector, |
| 326 | request->dfs_region); |
Rajkumar Manoharan | 687f545 | 2011-12-08 23:59:25 +0530 | [diff] [blame] | 327 | ath9k_ps_restore(sc); |
| 328 | } |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 329 | } |
| 330 | |
| 331 | /* |
| 332 | * This function will allocate both the DMA descriptor structure, and the |
| 333 | * buffers it contains. These are used to contain the descriptors used |
| 334 | * by the system. |
| 335 | */ |
| 336 | int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, |
| 337 | struct list_head *head, const char *name, |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 338 | int nbuf, int ndesc, bool is_tx) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 339 | { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 340 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 341 | u8 *ds; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 342 | struct ath_buf *bf; |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 343 | int i, bsize, desc_len; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 344 | |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 345 | ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n", |
Joe Perches | 226afe6 | 2010-12-02 19:12:37 -0800 | [diff] [blame] | 346 | name, nbuf, ndesc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 347 | |
| 348 | INIT_LIST_HEAD(head); |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 349 | |
| 350 | if (is_tx) |
| 351 | desc_len = sc->sc_ah->caps.tx_desc_len; |
| 352 | else |
| 353 | desc_len = sizeof(struct ath_desc); |
| 354 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 355 | /* ath_desc must be a multiple of DWORDs */ |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 356 | if ((desc_len % 4) != 0) { |
Joe Perches | 3800276 | 2010-12-02 19:12:36 -0800 | [diff] [blame] | 357 | ath_err(common, "ath_desc not DWORD aligned\n"); |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 358 | BUG_ON((desc_len % 4) != 0); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 359 | return -ENOMEM; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 360 | } |
| 361 | |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 362 | dd->dd_desc_len = desc_len * nbuf * ndesc; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 363 | |
| 364 | /* |
| 365 | * Need additional DMA memory because we can't use |
| 366 | * descriptors that cross the 4K page boundary. Assume |
| 367 | * one skipped descriptor per 4K page. |
| 368 | */ |
| 369 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) { |
| 370 | u32 ndesc_skipped = |
| 371 | ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len); |
| 372 | u32 dma_len; |
| 373 | |
| 374 | while (ndesc_skipped) { |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 375 | dma_len = ndesc_skipped * desc_len; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 376 | dd->dd_desc_len += dma_len; |
| 377 | |
| 378 | ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len); |
Joe Perches | ee289b6 | 2010-05-17 22:47:34 -0700 | [diff] [blame] | 379 | } |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | /* allocate descriptors */ |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 383 | dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len, |
| 384 | &dd->dd_desc_paddr, GFP_KERNEL); |
| 385 | if (!dd->dd_desc) |
| 386 | return -ENOMEM; |
| 387 | |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 388 | ds = (u8 *) dd->dd_desc; |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 389 | ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", |
Joe Perches | 226afe6 | 2010-12-02 19:12:37 -0800 | [diff] [blame] | 390 | name, ds, (u32) dd->dd_desc_len, |
| 391 | ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 392 | |
| 393 | /* allocate buffers */ |
| 394 | bsize = sizeof(struct ath_buf) * nbuf; |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 395 | bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL); |
| 396 | if (!bf) |
| 397 | return -ENOMEM; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 398 | |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 399 | for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) { |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 400 | bf->bf_desc = ds; |
| 401 | bf->bf_daddr = DS2PHYS(dd, ds); |
| 402 | |
| 403 | if (!(sc->sc_ah->caps.hw_caps & |
| 404 | ATH9K_HW_CAP_4KB_SPLITTRANS)) { |
| 405 | /* |
| 406 | * Skip descriptor addresses which can cause 4KB |
| 407 | * boundary crossing (addr + length) with a 32 dword |
| 408 | * descriptor fetch. |
| 409 | */ |
| 410 | while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) { |
| 411 | BUG_ON((caddr_t) bf->bf_desc >= |
| 412 | ((caddr_t) dd->dd_desc + |
| 413 | dd->dd_desc_len)); |
| 414 | |
Vasanthakumar Thiagarajan | 4adfcde | 2010-04-15 17:39:33 -0400 | [diff] [blame] | 415 | ds += (desc_len * ndesc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 416 | bf->bf_desc = ds; |
| 417 | bf->bf_daddr = DS2PHYS(dd, ds); |
| 418 | } |
| 419 | } |
| 420 | list_add_tail(&bf->list, head); |
| 421 | } |
| 422 | return 0; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 423 | } |
| 424 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 425 | static int ath9k_init_queues(struct ath_softc *sc) |
| 426 | { |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 427 | int i = 0; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 428 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 429 | sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 430 | sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 431 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 432 | sc->config.cabqReadytime = ATH_CABQ_READY_TIME; |
| 433 | ath_cabq_update(sc); |
| 434 | |
Felix Fietkau | f2c7a79 | 2013-06-07 18:12:00 +0200 | [diff] [blame] | 435 | sc->tx.uapsdq = ath_txq_setup(sc, ATH9K_TX_QUEUE_UAPSD, 0); |
| 436 | |
Sujith Manoharan | bea843c | 2012-11-21 18:13:10 +0530 | [diff] [blame] | 437 | for (i = 0; i < IEEE80211_NUM_ACS; i++) { |
Felix Fietkau | 066dae9 | 2010-11-07 14:59:39 +0100 | [diff] [blame] | 438 | sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); |
Ben Greear | 60f2d1d | 2011-01-09 23:11:52 -0800 | [diff] [blame] | 439 | sc->tx.txq_map[i]->mac80211_qnum = i; |
Felix Fietkau | 7702e78 | 2012-07-15 19:53:35 +0200 | [diff] [blame] | 440 | sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH; |
Ben Greear | 60f2d1d | 2011-01-09 23:11:52 -0800 | [diff] [blame] | 441 | } |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 442 | return 0; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 443 | } |
| 444 | |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 445 | static int ath9k_init_channels_rates(struct ath_softc *sc) |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 446 | { |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 447 | void *channels; |
| 448 | |
Felix Fietkau | cac4220 | 2010-10-09 02:39:30 +0200 | [diff] [blame] | 449 | BUILD_BUG_ON(ARRAY_SIZE(ath9k_2ghz_chantable) + |
| 450 | ARRAY_SIZE(ath9k_5ghz_chantable) != |
| 451 | ATH9K_NUM_CHANNELS); |
| 452 | |
Felix Fietkau | d465991 | 2010-10-14 16:02:39 +0200 | [diff] [blame] | 453 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 454 | channels = devm_kzalloc(sc->dev, |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 455 | sizeof(ath9k_2ghz_chantable), GFP_KERNEL); |
| 456 | if (!channels) |
| 457 | return -ENOMEM; |
| 458 | |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 459 | memcpy(channels, ath9k_2ghz_chantable, |
| 460 | sizeof(ath9k_2ghz_chantable)); |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 461 | sc->sbands[IEEE80211_BAND_2GHZ].channels = channels; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 462 | sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; |
| 463 | sc->sbands[IEEE80211_BAND_2GHZ].n_channels = |
| 464 | ARRAY_SIZE(ath9k_2ghz_chantable); |
| 465 | sc->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; |
| 466 | sc->sbands[IEEE80211_BAND_2GHZ].n_bitrates = |
| 467 | ARRAY_SIZE(ath9k_legacy_rates); |
| 468 | } |
| 469 | |
Felix Fietkau | d465991 | 2010-10-14 16:02:39 +0200 | [diff] [blame] | 470 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 471 | channels = devm_kzalloc(sc->dev, |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 472 | sizeof(ath9k_5ghz_chantable), GFP_KERNEL); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 473 | if (!channels) |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 474 | return -ENOMEM; |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 475 | |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 476 | memcpy(channels, ath9k_5ghz_chantable, |
| 477 | sizeof(ath9k_5ghz_chantable)); |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 478 | sc->sbands[IEEE80211_BAND_5GHZ].channels = channels; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 479 | sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; |
| 480 | sc->sbands[IEEE80211_BAND_5GHZ].n_channels = |
| 481 | ARRAY_SIZE(ath9k_5ghz_chantable); |
| 482 | sc->sbands[IEEE80211_BAND_5GHZ].bitrates = |
| 483 | ath9k_legacy_rates + 4; |
| 484 | sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates = |
| 485 | ARRAY_SIZE(ath9k_legacy_rates) - 4; |
| 486 | } |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 487 | return 0; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 488 | } |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 489 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 490 | static void ath9k_init_misc(struct ath_softc *sc) |
| 491 | { |
| 492 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
| 493 | int i = 0; |
Sujith Manoharan | 3d4e20f | 2012-03-14 14:40:58 +0530 | [diff] [blame] | 494 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 495 | setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc); |
| 496 | |
Sujith Manoharan | aaa1ec4 | 2012-06-04 16:27:08 +0530 | [diff] [blame] | 497 | sc->last_rssi = ATH_RSSI_DUMMY_MARKER; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 498 | sc->config.txpowlimit = ATH_TXPOWER_MAX; |
Felix Fietkau | 364734f | 2010-09-14 20:22:44 +0200 | [diff] [blame] | 499 | memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 500 | sc->beacon.slottime = ATH9K_SLOT_TIME_9; |
| 501 | |
Felix Fietkau | 7545daf | 2011-01-24 19:23:16 +0100 | [diff] [blame] | 502 | for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 503 | sc->beacon.bslot[i] = NULL; |
Vasanthakumar Thiagarajan | 102885a | 2010-09-02 01:34:43 -0700 | [diff] [blame] | 504 | |
| 505 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) |
| 506 | sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT; |
Simon Wunderlich | 04ccd4a | 2013-01-23 17:38:04 +0100 | [diff] [blame] | 507 | |
| 508 | sc->spec_config.enabled = 0; |
| 509 | sc->spec_config.short_repeat = true; |
| 510 | sc->spec_config.count = 8; |
| 511 | sc->spec_config.endless = false; |
| 512 | sc->spec_config.period = 0xFF; |
| 513 | sc->spec_config.fft_period = 0xF; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 514 | } |
| 515 | |
Sujith Manoharan | 9b60b64 | 2013-06-13 22:51:26 +0530 | [diff] [blame] | 516 | static void ath9k_init_platform(struct ath_softc *sc) |
| 517 | { |
| 518 | struct ath_hw *ah = sc->sc_ah; |
| 519 | struct ath_common *common = ath9k_hw_common(ah); |
| 520 | |
| 521 | if (common->bus_ops->ath_bus_type != ATH_PCI) |
| 522 | return; |
| 523 | |
Sujith Manoharan | e861ef5 | 2013-06-18 10:13:43 +0530 | [diff] [blame] | 524 | if (sc->driver_data & (ATH9K_PCI_CUS198 | |
| 525 | ATH9K_PCI_CUS230)) { |
Sujith Manoharan | 9b60b64 | 2013-06-13 22:51:26 +0530 | [diff] [blame] | 526 | ah->config.xlna_gpio = 9; |
| 527 | ah->config.xatten_margin_cfg = true; |
| 528 | |
Sujith Manoharan | e861ef5 | 2013-06-18 10:13:43 +0530 | [diff] [blame] | 529 | ath_info(common, "Set parameters for %s\n", |
| 530 | (sc->driver_data & ATH9K_PCI_CUS198) ? |
| 531 | "CUS198" : "CUS230"); |
Sujith Manoharan | 12eea64 | 2013-06-18 15:42:36 +0530 | [diff] [blame] | 532 | } else if (sc->driver_data & ATH9K_PCI_CUS217) { |
| 533 | ath_info(common, "CUS217 card detected\n"); |
Sujith Manoharan | 9b60b64 | 2013-06-13 22:51:26 +0530 | [diff] [blame] | 534 | } |
| 535 | } |
| 536 | |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 537 | static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob, |
| 538 | void *ctx) |
| 539 | { |
| 540 | struct ath9k_eeprom_ctx *ec = ctx; |
| 541 | |
| 542 | if (eeprom_blob) |
| 543 | ec->ah->eeprom_blob = eeprom_blob; |
| 544 | |
| 545 | complete(&ec->complete); |
| 546 | } |
| 547 | |
| 548 | static int ath9k_eeprom_request(struct ath_softc *sc, const char *name) |
| 549 | { |
| 550 | struct ath9k_eeprom_ctx ec; |
| 551 | struct ath_hw *ah = ah = sc->sc_ah; |
| 552 | int err; |
| 553 | |
| 554 | /* try to load the EEPROM content asynchronously */ |
| 555 | init_completion(&ec.complete); |
| 556 | ec.ah = sc->sc_ah; |
| 557 | |
| 558 | err = request_firmware_nowait(THIS_MODULE, 1, name, sc->dev, GFP_KERNEL, |
| 559 | &ec, ath9k_eeprom_request_cb); |
| 560 | if (err < 0) { |
| 561 | ath_err(ath9k_hw_common(ah), |
| 562 | "EEPROM request failed\n"); |
| 563 | return err; |
| 564 | } |
| 565 | |
| 566 | wait_for_completion(&ec.complete); |
| 567 | |
| 568 | if (!ah->eeprom_blob) { |
| 569 | ath_err(ath9k_hw_common(ah), |
| 570 | "Unable to load EEPROM file %s\n", name); |
| 571 | return -EINVAL; |
| 572 | } |
| 573 | |
| 574 | return 0; |
| 575 | } |
| 576 | |
| 577 | static void ath9k_eeprom_release(struct ath_softc *sc) |
| 578 | { |
| 579 | release_firmware(sc->sc_ah->eeprom_blob); |
| 580 | } |
| 581 | |
Pavel Roskin | eb93e89 | 2011-07-23 03:55:39 -0400 | [diff] [blame] | 582 | static int ath9k_init_softc(u16 devid, struct ath_softc *sc, |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 583 | const struct ath_bus_ops *bus_ops) |
| 584 | { |
Felix Fietkau | 6fb1b1e | 2011-03-19 13:55:39 +0100 | [diff] [blame] | 585 | struct ath9k_platform_data *pdata = sc->dev->platform_data; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 586 | struct ath_hw *ah = NULL; |
| 587 | struct ath_common *common; |
| 588 | int ret = 0, i; |
| 589 | int csz = 0; |
| 590 | |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 591 | ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw), GFP_KERNEL); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 592 | if (!ah) |
| 593 | return -ENOMEM; |
| 594 | |
Felix Fietkau | c1b976d | 2012-12-12 13:14:23 +0100 | [diff] [blame] | 595 | ah->dev = sc->dev; |
Ben Greear | 233536e | 2011-01-09 23:11:44 -0800 | [diff] [blame] | 596 | ah->hw = sc->hw; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 597 | ah->hw_version.devid = devid; |
Felix Fietkau | f9f84e9 | 2011-03-23 20:57:24 +0100 | [diff] [blame] | 598 | ah->reg_ops.read = ath9k_ioread32; |
| 599 | ah->reg_ops.write = ath9k_iowrite32; |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 600 | ah->reg_ops.rmw = ath9k_reg_rmw; |
Rajkumar Manoharan | e8fe733 | 2011-08-05 18:59:41 +0530 | [diff] [blame] | 601 | atomic_set(&ah->intr_ref_cnt, -1); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 602 | sc->sc_ah = ah; |
| 603 | |
Zefir Kurtisi | ca21cfd | 2013-04-15 11:29:06 +0200 | [diff] [blame] | 604 | sc->dfs_detector = dfs_pattern_detector_init(ah, NL80211_DFS_UNSET); |
Zefir Kurtisi | 8e92d3f | 2012-04-03 17:15:50 +0200 | [diff] [blame] | 605 | |
Felix Fietkau | 6de66dd | 2011-03-19 13:55:40 +0100 | [diff] [blame] | 606 | if (!pdata) { |
Felix Fietkau | a05b5d45 | 2010-11-17 04:25:33 +0100 | [diff] [blame] | 607 | ah->ah_flags |= AH_USE_EEPROM; |
Felix Fietkau | 6de66dd | 2011-03-19 13:55:40 +0100 | [diff] [blame] | 608 | sc->sc_ah->led_pin = -1; |
| 609 | } else { |
| 610 | sc->sc_ah->gpio_mask = pdata->gpio_mask; |
| 611 | sc->sc_ah->gpio_val = pdata->gpio_val; |
| 612 | sc->sc_ah->led_pin = pdata->led_pin; |
Vasanthakumar Thiagarajan | f2f5f2a | 2011-04-19 19:29:01 +0530 | [diff] [blame] | 613 | ah->is_clk_25mhz = pdata->is_clk_25mhz; |
Gabor Juhos | 3762561 | 2011-06-21 11:23:23 +0200 | [diff] [blame] | 614 | ah->get_mac_revision = pdata->get_mac_revision; |
Gabor Juhos | 7d95847c | 2011-06-21 11:23:51 +0200 | [diff] [blame] | 615 | ah->external_reset = pdata->external_reset; |
Felix Fietkau | 6de66dd | 2011-03-19 13:55:40 +0100 | [diff] [blame] | 616 | } |
Felix Fietkau | a05b5d45 | 2010-11-17 04:25:33 +0100 | [diff] [blame] | 617 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 618 | common = ath9k_hw_common(ah); |
Felix Fietkau | f9f84e9 | 2011-03-23 20:57:24 +0100 | [diff] [blame] | 619 | common->ops = &ah->reg_ops; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 620 | common->bus_ops = bus_ops; |
| 621 | common->ah = ah; |
| 622 | common->hw = sc->hw; |
| 623 | common->priv = sc; |
| 624 | common->debug_mask = ath9k_debug; |
Vasanthakumar Thiagarajan | 8f5dcb1 | 2010-11-26 06:10:06 -0800 | [diff] [blame] | 625 | common->btcoex_enabled = ath9k_btcoex_enable == 1; |
Mohammed Shafi Shajakhan | 05c0be2 | 2011-05-26 10:56:15 +0530 | [diff] [blame] | 626 | common->disable_ani = false; |
Sujith Manoharan | e09f2dc | 2012-09-16 08:06:56 +0530 | [diff] [blame] | 627 | |
| 628 | /* |
Sujith Manoharan | 9b60b64 | 2013-06-13 22:51:26 +0530 | [diff] [blame] | 629 | * Platform quirks. |
| 630 | */ |
| 631 | ath9k_init_platform(sc); |
| 632 | |
| 633 | /* |
Sujith Manoharan | e09f2dc | 2012-09-16 08:06:56 +0530 | [diff] [blame] | 634 | * Enable Antenna diversity only when BTCOEX is disabled |
| 635 | * and the user manually requests the feature. |
| 636 | */ |
| 637 | if (!common->btcoex_enabled && ath9k_enable_diversity) |
| 638 | common->antenna_diversity = 1; |
| 639 | |
Ben Greear | 20b25744 | 2010-10-15 15:04:09 -0700 | [diff] [blame] | 640 | spin_lock_init(&common->cc_lock); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 641 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 642 | spin_lock_init(&sc->sc_serial_rw); |
| 643 | spin_lock_init(&sc->sc_pm_lock); |
| 644 | mutex_init(&sc->mutex); |
| 645 | tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc); |
Sujith Manoharan | fb6e252 | 2012-07-17 17:16:22 +0530 | [diff] [blame] | 646 | tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet, |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 647 | (unsigned long)sc); |
| 648 | |
Sujith Manoharan | aaa1ec4 | 2012-06-04 16:27:08 +0530 | [diff] [blame] | 649 | INIT_WORK(&sc->hw_reset_work, ath_reset_work); |
| 650 | INIT_WORK(&sc->hw_check_work, ath_hw_check); |
| 651 | INIT_WORK(&sc->paprd_work, ath_paprd_calibrate); |
| 652 | INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work); |
| 653 | setup_timer(&sc->rx_poll_timer, ath_rx_poll, (unsigned long)sc); |
| 654 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 655 | /* |
| 656 | * Cache line size is used to size and align various |
| 657 | * structures used to communicate with the hardware. |
| 658 | */ |
| 659 | ath_read_cachesize(common, &csz); |
| 660 | common->cachelsz = csz << 2; /* convert to bytes */ |
| 661 | |
Gabor Juhos | 36b07d1 | 2012-12-11 00:06:41 +0100 | [diff] [blame] | 662 | if (pdata && pdata->eeprom_name) { |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 663 | ret = ath9k_eeprom_request(sc, pdata->eeprom_name); |
| 664 | if (ret) |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 665 | return ret; |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 666 | } |
| 667 | |
Luis R. Rodriguez | d70357d | 2010-04-15 17:38:06 -0400 | [diff] [blame] | 668 | /* Initializes the hardware for all supported chipsets */ |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 669 | ret = ath9k_hw_init(ah); |
Luis R. Rodriguez | d70357d | 2010-04-15 17:38:06 -0400 | [diff] [blame] | 670 | if (ret) |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 671 | goto err_hw; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 672 | |
Felix Fietkau | 6fb1b1e | 2011-03-19 13:55:39 +0100 | [diff] [blame] | 673 | if (pdata && pdata->macaddr) |
| 674 | memcpy(common->macaddr, pdata->macaddr, ETH_ALEN); |
| 675 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 676 | ret = ath9k_init_queues(sc); |
| 677 | if (ret) |
| 678 | goto err_queues; |
| 679 | |
| 680 | ret = ath9k_init_btcoex(sc); |
| 681 | if (ret) |
| 682 | goto err_btcoex; |
| 683 | |
Felix Fietkau | f209f52 | 2010-10-01 01:06:53 +0200 | [diff] [blame] | 684 | ret = ath9k_init_channels_rates(sc); |
| 685 | if (ret) |
| 686 | goto err_btcoex; |
| 687 | |
Rajkumar Manoharan | f82b4bd | 2011-08-13 10:28:15 +0530 | [diff] [blame] | 688 | ath9k_cmn_init_crypto(sc->sc_ah); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 689 | ath9k_init_misc(sc); |
Rajkumar Manoharan | 8f176a3 | 2012-09-12 18:59:23 +0530 | [diff] [blame] | 690 | ath_fill_led_pin(sc); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 691 | |
Sujith Manoharan | d09f5f4 | 2012-06-04 16:27:14 +0530 | [diff] [blame] | 692 | if (common->bus_ops->aspm_init) |
| 693 | common->bus_ops->aspm_init(common); |
| 694 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 695 | return 0; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 696 | |
| 697 | err_btcoex: |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 698 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) |
| 699 | if (ATH_TXQ_SETUP(sc, i)) |
| 700 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 701 | err_queues: |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 702 | ath9k_hw_deinit(ah); |
| 703 | err_hw: |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 704 | ath9k_eeprom_release(sc); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 705 | return ret; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 706 | } |
| 707 | |
Felix Fietkau | babcbc2 | 2010-10-20 02:09:46 +0200 | [diff] [blame] | 708 | static void ath9k_init_band_txpower(struct ath_softc *sc, int band) |
| 709 | { |
| 710 | struct ieee80211_supported_band *sband; |
| 711 | struct ieee80211_channel *chan; |
| 712 | struct ath_hw *ah = sc->sc_ah; |
Felix Fietkau | babcbc2 | 2010-10-20 02:09:46 +0200 | [diff] [blame] | 713 | int i; |
| 714 | |
| 715 | sband = &sc->sbands[band]; |
| 716 | for (i = 0; i < sband->n_channels; i++) { |
| 717 | chan = &sband->channels[i]; |
| 718 | ah->curchan = &ah->channels[chan->hw_value]; |
| 719 | ath9k_cmn_update_ichannel(ah->curchan, chan, NL80211_CHAN_HT20); |
| 720 | ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true); |
Felix Fietkau | babcbc2 | 2010-10-20 02:09:46 +0200 | [diff] [blame] | 721 | } |
| 722 | } |
| 723 | |
| 724 | static void ath9k_init_txpower_limits(struct ath_softc *sc) |
| 725 | { |
| 726 | struct ath_hw *ah = sc->sc_ah; |
| 727 | struct ath9k_channel *curchan = ah->curchan; |
| 728 | |
| 729 | if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
| 730 | ath9k_init_band_txpower(sc, IEEE80211_BAND_2GHZ); |
| 731 | if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
| 732 | ath9k_init_band_txpower(sc, IEEE80211_BAND_5GHZ); |
| 733 | |
| 734 | ah->curchan = curchan; |
| 735 | } |
| 736 | |
Felix Fietkau | 43c3528 | 2011-09-03 01:40:27 +0200 | [diff] [blame] | 737 | void ath9k_reload_chainmask_settings(struct ath_softc *sc) |
| 738 | { |
| 739 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)) |
| 740 | return; |
| 741 | |
| 742 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
| 743 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); |
| 744 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
| 745 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap); |
| 746 | } |
| 747 | |
Felix Fietkau | 20c8e8d | 2012-04-17 02:40:07 +0200 | [diff] [blame] | 748 | static const struct ieee80211_iface_limit if_limits[] = { |
| 749 | { .max = 2048, .types = BIT(NL80211_IFTYPE_STATION) | |
| 750 | BIT(NL80211_IFTYPE_P2P_CLIENT) | |
| 751 | BIT(NL80211_IFTYPE_WDS) }, |
| 752 | { .max = 8, .types = |
| 753 | #ifdef CONFIG_MAC80211_MESH |
| 754 | BIT(NL80211_IFTYPE_MESH_POINT) | |
| 755 | #endif |
| 756 | BIT(NL80211_IFTYPE_AP) | |
| 757 | BIT(NL80211_IFTYPE_P2P_GO) }, |
| 758 | }; |
| 759 | |
Zefir Kurtisi | e9cdedf | 2013-04-03 18:31:29 +0200 | [diff] [blame] | 760 | |
| 761 | static const struct ieee80211_iface_limit if_dfs_limits[] = { |
| 762 | { .max = 1, .types = BIT(NL80211_IFTYPE_AP) }, |
| 763 | }; |
| 764 | |
| 765 | static const struct ieee80211_iface_combination if_comb[] = { |
| 766 | { |
| 767 | .limits = if_limits, |
| 768 | .n_limits = ARRAY_SIZE(if_limits), |
| 769 | .max_interfaces = 2048, |
| 770 | .num_different_channels = 1, |
| 771 | .beacon_int_infra_match = true, |
| 772 | }, |
| 773 | { |
| 774 | .limits = if_dfs_limits, |
| 775 | .n_limits = ARRAY_SIZE(if_dfs_limits), |
| 776 | .max_interfaces = 1, |
| 777 | .num_different_channels = 1, |
| 778 | .beacon_int_infra_match = true, |
| 779 | .radar_detect_widths = BIT(NL80211_CHAN_NO_HT) | |
| 780 | BIT(NL80211_CHAN_HT20), |
| 781 | } |
Felix Fietkau | 20c8e8d | 2012-04-17 02:40:07 +0200 | [diff] [blame] | 782 | }; |
Felix Fietkau | 43c3528 | 2011-09-03 01:40:27 +0200 | [diff] [blame] | 783 | |
Johannes Berg | 964dc9e | 2013-06-03 17:25:34 +0200 | [diff] [blame] | 784 | #ifdef CONFIG_PM |
| 785 | static const struct wiphy_wowlan_support ath9k_wowlan_support = { |
| 786 | .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, |
| 787 | .n_patterns = MAX_NUM_USER_PATTERN, |
| 788 | .pattern_min_len = 1, |
| 789 | .pattern_max_len = MAX_PATTERN_SIZE, |
| 790 | }; |
| 791 | #endif |
| 792 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 793 | void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 794 | { |
Felix Fietkau | 43c3528 | 2011-09-03 01:40:27 +0200 | [diff] [blame] | 795 | struct ath_hw *ah = sc->sc_ah; |
| 796 | struct ath_common *common = ath9k_hw_common(ah); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 797 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 798 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
| 799 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
| 800 | IEEE80211_HW_SIGNAL_DBM | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 801 | IEEE80211_HW_SUPPORTS_PS | |
| 802 | IEEE80211_HW_PS_NULLFUNC_STACK | |
Vivek Natarajan | 05df498 | 2010-02-09 11:34:50 +0530 | [diff] [blame] | 803 | IEEE80211_HW_SPECTRUM_MGMT | |
Felix Fietkau | 79acac0 | 2013-04-22 23:11:44 +0200 | [diff] [blame] | 804 | IEEE80211_HW_REPORTS_TX_ACK_STATUS | |
| 805 | IEEE80211_HW_SUPPORTS_RC_TABLE; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 806 | |
Oleksij Rempel | b0a1ae9 | 2013-05-24 20:30:59 +0200 | [diff] [blame] | 807 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { |
| 808 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; |
| 809 | |
| 810 | if (AR_SREV_9280_20_OR_LATER(ah)) |
| 811 | hw->radiotap_mcs_details |= |
| 812 | IEEE80211_RADIOTAP_MCS_HAVE_STBC; |
| 813 | } |
Luis R. Rodriguez | 5ffaf8a | 2010-02-02 11:58:33 -0500 | [diff] [blame] | 814 | |
John W. Linville | 3e6109c | 2011-01-05 09:39:17 -0500 | [diff] [blame] | 815 | if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 816 | hw->flags |= IEEE80211_HW_MFP_CAPABLE; |
| 817 | |
Felix Fietkau | ec26bcc | 2013-05-28 13:01:54 +0200 | [diff] [blame] | 818 | hw->wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR; |
| 819 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 820 | hw->wiphy->interface_modes = |
Johannes Berg | c426ee2 | 2010-11-26 11:38:04 +0100 | [diff] [blame] | 821 | BIT(NL80211_IFTYPE_P2P_GO) | |
| 822 | BIT(NL80211_IFTYPE_P2P_CLIENT) | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 823 | BIT(NL80211_IFTYPE_AP) | |
Bill Jordan | e51f3ef | 2010-10-01 11:20:39 -0400 | [diff] [blame] | 824 | BIT(NL80211_IFTYPE_WDS) | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 825 | BIT(NL80211_IFTYPE_STATION) | |
| 826 | BIT(NL80211_IFTYPE_ADHOC) | |
| 827 | BIT(NL80211_IFTYPE_MESH_POINT); |
| 828 | |
Zefir Kurtisi | e9cdedf | 2013-04-03 18:31:29 +0200 | [diff] [blame] | 829 | hw->wiphy->iface_combinations = if_comb; |
| 830 | hw->wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); |
Felix Fietkau | 20c8e8d | 2012-04-17 02:40:07 +0200 | [diff] [blame] | 831 | |
Sujith Manoharan | 531671c | 2013-06-01 07:08:09 +0530 | [diff] [blame] | 832 | hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 833 | |
Jouni Malinen | cfdc9a8 | 2011-03-23 14:52:19 +0200 | [diff] [blame] | 834 | hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; |
Jouni Malinen | fd65623 | 2011-10-27 17:31:50 +0300 | [diff] [blame] | 835 | hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; |
Johannes Berg | 81ddbb5 | 2012-03-26 18:47:18 +0200 | [diff] [blame] | 836 | hw->wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; |
Jouni Malinen | cfdc9a8 | 2011-03-23 14:52:19 +0200 | [diff] [blame] | 837 | |
Mohammed Shafi Shajakhan | 9f11e16 | 2012-07-10 14:55:35 +0530 | [diff] [blame] | 838 | #ifdef CONFIG_PM_SLEEP |
Mohammed Shafi Shajakhan | 9f11e16 | 2012-07-10 14:55:35 +0530 | [diff] [blame] | 839 | if ((ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) && |
Sujith Manoharan | fca3c21 | 2013-06-21 11:11:52 +0530 | [diff] [blame^] | 840 | (sc->driver_data & ATH9K_PCI_WOW) && |
Johannes Berg | 964dc9e | 2013-06-03 17:25:34 +0200 | [diff] [blame] | 841 | device_can_wakeup(sc->dev)) |
| 842 | hw->wiphy->wowlan = &ath9k_wowlan_support; |
Mohammed Shafi Shajakhan | 9f11e16 | 2012-07-10 14:55:35 +0530 | [diff] [blame] | 843 | |
| 844 | atomic_set(&sc->wow_sleep_proc_intr, -1); |
| 845 | atomic_set(&sc->wow_got_bmiss_intr, -1); |
Mohammed Shafi Shajakhan | 9f11e16 | 2012-07-10 14:55:35 +0530 | [diff] [blame] | 846 | #endif |
| 847 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 848 | hw->queues = 4; |
| 849 | hw->max_rates = 4; |
| 850 | hw->channel_change_time = 5000; |
Rajkumar Manoharan | 195ca3b | 2012-03-15 23:05:28 +0530 | [diff] [blame] | 851 | hw->max_listen_interval = 1; |
Felix Fietkau | 6589651 | 2010-01-24 03:26:11 +0100 | [diff] [blame] | 852 | hw->max_rate_tries = 10; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 853 | hw->sta_data_size = sizeof(struct ath_node); |
| 854 | hw->vif_data_size = sizeof(struct ath_vif); |
| 855 | |
Felix Fietkau | 43c3528 | 2011-09-03 01:40:27 +0200 | [diff] [blame] | 856 | hw->wiphy->available_antennas_rx = BIT(ah->caps.max_rxchains) - 1; |
| 857 | hw->wiphy->available_antennas_tx = BIT(ah->caps.max_txchains) - 1; |
| 858 | |
| 859 | /* single chain devices with rx diversity */ |
| 860 | if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) |
| 861 | hw->wiphy->available_antennas_rx = BIT(0) | BIT(1); |
| 862 | |
| 863 | sc->ant_rx = hw->wiphy->available_antennas_rx; |
| 864 | sc->ant_tx = hw->wiphy->available_antennas_tx; |
| 865 | |
Felix Fietkau | d465991 | 2010-10-14 16:02:39 +0200 | [diff] [blame] | 866 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 867 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
| 868 | &sc->sbands[IEEE80211_BAND_2GHZ]; |
Felix Fietkau | d465991 | 2010-10-14 16:02:39 +0200 | [diff] [blame] | 869 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 870 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
| 871 | &sc->sbands[IEEE80211_BAND_5GHZ]; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 872 | |
Felix Fietkau | 43c3528 | 2011-09-03 01:40:27 +0200 | [diff] [blame] | 873 | ath9k_reload_chainmask_settings(sc); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 874 | |
| 875 | SET_IEEE80211_PERM_ADDR(hw, common->macaddr); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 876 | } |
| 877 | |
Pavel Roskin | eb93e89 | 2011-07-23 03:55:39 -0400 | [diff] [blame] | 878 | int ath9k_init_device(u16 devid, struct ath_softc *sc, |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 879 | const struct ath_bus_ops *bus_ops) |
| 880 | { |
| 881 | struct ieee80211_hw *hw = sc->hw; |
| 882 | struct ath_common *common; |
| 883 | struct ath_hw *ah; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 884 | int error = 0; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 885 | struct ath_regulatory *reg; |
| 886 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 887 | /* Bring up device */ |
Pavel Roskin | eb93e89 | 2011-07-23 03:55:39 -0400 | [diff] [blame] | 888 | error = ath9k_init_softc(devid, sc, bus_ops); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 889 | if (error) |
| 890 | return error; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 891 | |
| 892 | ah = sc->sc_ah; |
| 893 | common = ath9k_hw_common(ah); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 894 | ath9k_set_hw_capab(sc, hw); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 895 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 896 | /* Initialize regulatory */ |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 897 | error = ath_regd_init(&common->regulatory, sc->hw->wiphy, |
| 898 | ath9k_reg_notifier); |
| 899 | if (error) |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 900 | goto deinit; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 901 | |
| 902 | reg = &common->regulatory; |
| 903 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 904 | /* Setup TX DMA */ |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 905 | error = ath_tx_init(sc, ATH_TXBUF); |
| 906 | if (error != 0) |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 907 | goto deinit; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 908 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 909 | /* Setup RX DMA */ |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 910 | error = ath_rx_init(sc, ATH_RXBUF); |
| 911 | if (error != 0) |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 912 | goto deinit; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 913 | |
Felix Fietkau | babcbc2 | 2010-10-20 02:09:46 +0200 | [diff] [blame] | 914 | ath9k_init_txpower_limits(sc); |
| 915 | |
Felix Fietkau | 0cf55c2 | 2011-02-27 22:26:40 +0100 | [diff] [blame] | 916 | #ifdef CONFIG_MAC80211_LEDS |
| 917 | /* must be initialized before ieee80211_register_hw */ |
| 918 | sc->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(sc->hw, |
| 919 | IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_tpt_blink, |
| 920 | ARRAY_SIZE(ath9k_tpt_blink)); |
| 921 | #endif |
| 922 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 923 | /* Register with mac80211 */ |
| 924 | error = ieee80211_register_hw(hw); |
| 925 | if (error) |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 926 | goto rx_cleanup; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 927 | |
Ben Greear | eb27244 | 2010-11-29 14:13:22 -0800 | [diff] [blame] | 928 | error = ath9k_init_debug(ah); |
| 929 | if (error) { |
Joe Perches | 3800276 | 2010-12-02 19:12:36 -0800 | [diff] [blame] | 930 | ath_err(common, "Unable to create debugfs files\n"); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 931 | goto unregister; |
Ben Greear | eb27244 | 2010-11-29 14:13:22 -0800 | [diff] [blame] | 932 | } |
| 933 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 934 | /* Handle world regulatory */ |
| 935 | if (!ath_is_world_regd(reg)) { |
| 936 | error = regulatory_hint(hw->wiphy, reg->alpha2); |
| 937 | if (error) |
Sujith Manoharan | af69009 | 2013-05-10 18:41:06 +0530 | [diff] [blame] | 938 | goto debug_cleanup; |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 939 | } |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 940 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 941 | ath_init_leds(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 942 | ath_start_rfkill_poll(sc); |
| 943 | |
| 944 | return 0; |
| 945 | |
Sujith Manoharan | af69009 | 2013-05-10 18:41:06 +0530 | [diff] [blame] | 946 | debug_cleanup: |
| 947 | ath9k_deinit_debug(sc); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 948 | unregister: |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 949 | ieee80211_unregister_hw(hw); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 950 | rx_cleanup: |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 951 | ath_rx_cleanup(sc); |
Felix Fietkau | b81950b1 | 2012-12-12 13:14:22 +0100 | [diff] [blame] | 952 | deinit: |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 953 | ath9k_deinit_softc(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 954 | return error; |
| 955 | } |
| 956 | |
| 957 | /*****************************/ |
| 958 | /* De-Initialization */ |
| 959 | /*****************************/ |
| 960 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 961 | static void ath9k_deinit_softc(struct ath_softc *sc) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 962 | { |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 963 | int i = 0; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 964 | |
Sujith Manoharan | 5908120 | 2012-02-22 12:40:21 +0530 | [diff] [blame] | 965 | ath9k_deinit_btcoex(sc); |
Mohammed Shafi Shajakhan | 19686dd | 2011-11-30 10:41:28 +0530 | [diff] [blame] | 966 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 967 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) |
| 968 | if (ATH_TXQ_SETUP(sc, i)) |
| 969 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
| 970 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 971 | ath9k_hw_deinit(sc->sc_ah); |
Zefir Kurtisi | 8e92d3f | 2012-04-03 17:15:50 +0200 | [diff] [blame] | 972 | if (sc->dfs_detector != NULL) |
| 973 | sc->dfs_detector->exit(sc->dfs_detector); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 974 | |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 975 | ath9k_eeprom_release(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 976 | } |
| 977 | |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 978 | void ath9k_deinit_device(struct ath_softc *sc) |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 979 | { |
| 980 | struct ieee80211_hw *hw = sc->hw; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 981 | |
| 982 | ath9k_ps_wakeup(sc); |
| 983 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 984 | wiphy_rfkill_stop_polling(sc->hw->wiphy); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 985 | ath_deinit_leds(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 986 | |
Rajkumar Manoharan | c7c1806 | 2011-01-27 18:39:38 +0530 | [diff] [blame] | 987 | ath9k_ps_restore(sc); |
| 988 | |
Sujith Manoharan | af69009 | 2013-05-10 18:41:06 +0530 | [diff] [blame] | 989 | ath9k_deinit_debug(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 990 | ieee80211_unregister_hw(hw); |
| 991 | ath_rx_cleanup(sc); |
Sujith | 285f2dd | 2010-01-08 10:36:07 +0530 | [diff] [blame] | 992 | ath9k_deinit_softc(sc); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 993 | } |
| 994 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 995 | /************************/ |
| 996 | /* Module Hooks */ |
| 997 | /************************/ |
| 998 | |
| 999 | static int __init ath9k_init(void) |
| 1000 | { |
| 1001 | int error; |
| 1002 | |
| 1003 | /* Register rate control algorithm */ |
| 1004 | error = ath_rate_control_register(); |
| 1005 | if (error != 0) { |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame] | 1006 | pr_err("Unable to register rate control algorithm: %d\n", |
| 1007 | error); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1008 | goto err_out; |
| 1009 | } |
| 1010 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1011 | error = ath_pci_init(); |
| 1012 | if (error < 0) { |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame] | 1013 | pr_err("No PCI devices found, driver not installed\n"); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1014 | error = -ENODEV; |
Ben Greear | eb27244 | 2010-11-29 14:13:22 -0800 | [diff] [blame] | 1015 | goto err_rate_unregister; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1016 | } |
| 1017 | |
| 1018 | error = ath_ahb_init(); |
| 1019 | if (error < 0) { |
| 1020 | error = -ENODEV; |
| 1021 | goto err_pci_exit; |
| 1022 | } |
| 1023 | |
| 1024 | return 0; |
| 1025 | |
| 1026 | err_pci_exit: |
| 1027 | ath_pci_exit(); |
| 1028 | |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1029 | err_rate_unregister: |
| 1030 | ath_rate_control_unregister(); |
| 1031 | err_out: |
| 1032 | return error; |
| 1033 | } |
| 1034 | module_init(ath9k_init); |
| 1035 | |
| 1036 | static void __exit ath9k_exit(void) |
| 1037 | { |
Rajkumar Manoharan | d584747 | 2010-12-20 14:39:51 +0530 | [diff] [blame] | 1038 | is_ath9k_unloaded = true; |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1039 | ath_ahb_exit(); |
| 1040 | ath_pci_exit(); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1041 | ath_rate_control_unregister(); |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame] | 1042 | pr_info("%s: Driver unloaded\n", dev_info); |
Sujith | 5562420 | 2010-01-08 10:36:02 +0530 | [diff] [blame] | 1043 | } |
| 1044 | module_exit(ath9k_exit); |