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James Bottomley2908d772006-08-29 09:22:51 -05001/*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26#ifndef _SAS_H_
27#define _SAS_H_
28
29#include <linux/types.h>
30#include <asm/byteorder.h>
31
32#define SAS_ADDR_SIZE 8
33#define HASHED_SAS_ADDR_SIZE 3
34#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36#define SMP_REQUEST 0x40
37#define SMP_RESPONSE 0x41
38
39#define SSP_DATA 0x01
40#define SSP_XFER_RDY 0x05
41#define SSP_COMMAND 0x06
42#define SSP_RESPONSE 0x07
43#define SSP_TASK 0x16
44
45#define SMP_REPORT_GENERAL 0x00
46#define SMP_REPORT_MANUF_INFO 0x01
47#define SMP_READ_GPIO_REG 0x02
48#define SMP_DISCOVER 0x10
49#define SMP_REPORT_PHY_ERR_LOG 0x11
50#define SMP_REPORT_PHY_SATA 0x12
51#define SMP_REPORT_ROUTE_INFO 0x13
52#define SMP_WRITE_GPIO_REG 0x82
53#define SMP_CONF_ROUTE_INFO 0x90
54#define SMP_PHY_CONTROL 0x91
55#define SMP_PHY_TEST_FUNCTION 0x92
56
57#define SMP_RESP_FUNC_ACC 0x00
58#define SMP_RESP_FUNC_UNK 0x01
59#define SMP_RESP_FUNC_FAILED 0x02
60#define SMP_RESP_INV_FRM_LEN 0x03
61#define SMP_RESP_NO_PHY 0x10
62#define SMP_RESP_NO_INDEX 0x11
63#define SMP_RESP_PHY_NO_SATA 0x12
64#define SMP_RESP_PHY_UNK_OP 0x13
65#define SMP_RESP_PHY_UNK_TESTF 0x14
66#define SMP_RESP_PHY_TEST_INPROG 0x15
67#define SMP_RESP_PHY_VACANT 0x16
68
69/* SAM TMFs */
70#define TMF_ABORT_TASK 0x01
71#define TMF_ABORT_TASK_SET 0x02
72#define TMF_CLEAR_TASK_SET 0x04
73#define TMF_LU_RESET 0x08
74#define TMF_CLEAR_ACA 0x40
75#define TMF_QUERY_TASK 0x80
76
77/* SAS TMF responses */
78#define TMF_RESP_FUNC_COMPLETE 0x00
79#define TMF_RESP_INVALID_FRAME 0x02
80#define TMF_RESP_FUNC_ESUPP 0x04
81#define TMF_RESP_FUNC_FAILED 0x05
82#define TMF_RESP_FUNC_SUCC 0x08
83#define TMF_RESP_NO_LUN 0x09
84#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90};
91
92/* See sas_discover.c if you plan on changing these.
93 */
94enum sas_dev_type {
95 NO_DEVICE = 0, /* protocol */
96 SAS_END_DEV = 1, /* protocol */
97 EDGE_DEV = 2, /* protocol */
98 FANOUT_DEV = 3, /* protocol */
99 SAS_HA = 4,
100 SATA_DEV = 5,
101 SATA_PM = 7,
102 SATA_PM_PORT= 8,
103};
104
Darrick J. Wong5929faf2007-11-05 11:51:17 -0800105enum sas_protocol {
106 SAS_PROTOCOL_SATA = 0x01,
107 SAS_PROTOCOL_SMP = 0x02,
108 SAS_PROTOCOL_STP = 0x04,
109 SAS_PROTOCOL_SSP = 0x08,
110 SAS_PROTOCOL_ALL = 0x0E,
James Bottomley2908d772006-08-29 09:22:51 -0500111};
112
113/* From the spec; local phys only */
114enum phy_func {
115 PHY_FUNC_NOP,
116 PHY_FUNC_LINK_RESET, /* Enables the phy */
117 PHY_FUNC_HARD_RESET,
118 PHY_FUNC_DISABLE,
119 PHY_FUNC_CLEAR_ERROR_LOG = 5,
120 PHY_FUNC_CLEAR_AFFIL,
121 PHY_FUNC_TX_SATA_PS_SIGNAL,
122 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
James Bottomleya01e70e2006-09-06 19:28:07 -0500123 PHY_FUNC_SET_LINK_RATE,
James Bottomley2908d772006-08-29 09:22:51 -0500124};
125
126/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
127 * Most of those are here for completeness.
128 */
129enum sas_prim {
130 SAS_PRIM_AIP_NORMAL = 1,
131 SAS_PRIM_AIP_R0 = 2,
132 SAS_PRIM_AIP_R1 = 3,
133 SAS_PRIM_AIP_R2 = 4,
134 SAS_PRIM_AIP_WC = 5,
135 SAS_PRIM_AIP_WD = 6,
136 SAS_PRIM_AIP_WP = 7,
137 SAS_PRIM_AIP_RWP = 8,
138
139 SAS_PRIM_BC_CH = 9,
140 SAS_PRIM_BC_RCH0 = 10,
141 SAS_PRIM_BC_RCH1 = 11,
142 SAS_PRIM_BC_R0 = 12,
143 SAS_PRIM_BC_R1 = 13,
144 SAS_PRIM_BC_R2 = 14,
145 SAS_PRIM_BC_R3 = 15,
146 SAS_PRIM_BC_R4 = 16,
147
148 SAS_PRIM_NOTIFY_ENSP= 17,
149 SAS_PRIM_NOTIFY_R0 = 18,
150 SAS_PRIM_NOTIFY_R1 = 19,
151 SAS_PRIM_NOTIFY_R2 = 20,
152
153 SAS_PRIM_CLOSE_CLAF = 21,
154 SAS_PRIM_CLOSE_NORM = 22,
155 SAS_PRIM_CLOSE_R0 = 23,
156 SAS_PRIM_CLOSE_R1 = 24,
157
158 SAS_PRIM_OPEN_RTRY = 25,
159 SAS_PRIM_OPEN_RJCT = 26,
160 SAS_PRIM_OPEN_ACPT = 27,
161
162 SAS_PRIM_DONE = 28,
163 SAS_PRIM_BREAK = 29,
164
165 SATA_PRIM_DMAT = 33,
166 SATA_PRIM_PMNAK = 34,
167 SATA_PRIM_PMACK = 35,
168 SATA_PRIM_PMREQ_S = 36,
169 SATA_PRIM_PMREQ_P = 37,
170 SATA_SATA_R_ERR = 38,
171};
172
173enum sas_open_rej_reason {
174 /* Abandon open */
175 SAS_OREJ_UNKNOWN = 0,
176 SAS_OREJ_BAD_DEST = 1,
177 SAS_OREJ_CONN_RATE = 2,
178 SAS_OREJ_EPROTO = 3,
179 SAS_OREJ_RESV_AB0 = 4,
180 SAS_OREJ_RESV_AB1 = 5,
181 SAS_OREJ_RESV_AB2 = 6,
182 SAS_OREJ_RESV_AB3 = 7,
183 SAS_OREJ_WRONG_DEST= 8,
184 SAS_OREJ_STP_NORES = 9,
185
186 /* Retry open */
187 SAS_OREJ_NO_DEST = 10,
188 SAS_OREJ_PATH_BLOCKED = 11,
189 SAS_OREJ_RSVD_CONT0 = 12,
190 SAS_OREJ_RSVD_CONT1 = 13,
191 SAS_OREJ_RSVD_INIT0 = 14,
192 SAS_OREJ_RSVD_INIT1 = 15,
193 SAS_OREJ_RSVD_STOP0 = 16,
194 SAS_OREJ_RSVD_STOP1 = 17,
195 SAS_OREJ_RSVD_RETRY = 18,
196};
197
Dan Williams8ec65522011-09-01 21:18:20 -0700198enum sas_gpio_reg_type {
199 SAS_GPIO_REG_CFG = 0,
200 SAS_GPIO_REG_RX = 1,
201 SAS_GPIO_REG_RX_GP = 2,
202 SAS_GPIO_REG_TX = 3,
203 SAS_GPIO_REG_TX_GP = 4,
204};
205
James Bottomley2908d772006-08-29 09:22:51 -0500206struct dev_to_host_fis {
207 u8 fis_type; /* 0x34 */
208 u8 flags;
209 u8 status;
210 u8 error;
211
212 u8 lbal;
213 union { u8 lbam; u8 byte_count_low; };
214 union { u8 lbah; u8 byte_count_high; };
215 u8 device;
216
217 u8 lbal_exp;
218 u8 lbam_exp;
219 u8 lbah_exp;
220 u8 _r_a;
221
222 union { u8 sector_count; u8 interrupt_reason; };
223 u8 sector_count_exp;
224 u8 _r_b;
225 u8 _r_c;
226
227 u32 _r_d;
228} __attribute__ ((packed));
229
230struct host_to_dev_fis {
231 u8 fis_type; /* 0x27 */
232 u8 flags;
233 u8 command;
234 u8 features;
235
236 u8 lbal;
237 union { u8 lbam; u8 byte_count_low; };
238 union { u8 lbah; u8 byte_count_high; };
239 u8 device;
240
241 u8 lbal_exp;
242 u8 lbam_exp;
243 u8 lbah_exp;
244 u8 features_exp;
245
246 union { u8 sector_count; u8 interrupt_reason; };
247 u8 sector_count_exp;
248 u8 _r_a;
249 u8 control;
250
251 u32 _r_b;
252} __attribute__ ((packed));
253
254/* Prefer to have code clarity over header file clarity.
255 */
256#ifdef __LITTLE_ENDIAN_BITFIELD
257struct sas_identify_frame {
258 /* Byte 0 */
259 u8 frame_type:4;
260 u8 dev_type:3;
261 u8 _un0:1;
262
263 /* Byte 1 */
264 u8 _un1;
265
266 /* Byte 2 */
267 union {
268 struct {
269 u8 _un20:1;
270 u8 smp_iport:1;
271 u8 stp_iport:1;
272 u8 ssp_iport:1;
273 u8 _un247:4;
274 };
275 u8 initiator_bits;
276 };
277
278 /* Byte 3 */
279 union {
280 struct {
281 u8 _un30:1;
282 u8 smp_tport:1;
283 u8 stp_tport:1;
284 u8 ssp_tport:1;
285 u8 _un347:4;
286 };
287 u8 target_bits;
288 };
289
290 /* Byte 4 - 11 */
291 u8 _un4_11[8];
292
293 /* Byte 12 - 19 */
294 u8 sas_addr[SAS_ADDR_SIZE];
295
296 /* Byte 20 */
297 u8 phy_id;
298
299 u8 _un21_27[7];
300
301 __be32 crc;
302} __attribute__ ((packed));
303
304struct ssp_frame_hdr {
305 u8 frame_type;
306 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
307 u8 _r_a;
308 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
309 __be16 _r_b;
310
311 u8 changing_data_ptr:1;
312 u8 retransmit:1;
313 u8 retry_data_frames:1;
314 u8 _r_c:5;
315
316 u8 num_fill_bytes:2;
317 u8 _r_d:6;
318
319 u32 _r_e;
320 __be16 tag;
321 __be16 tptt;
322 __be32 data_offs;
323} __attribute__ ((packed));
324
325struct ssp_response_iu {
326 u8 _r_a[10];
327
328 u8 datapres:2;
329 u8 _r_b:6;
330
331 u8 status;
332
333 u32 _r_c;
334
335 __be32 sense_data_len;
336 __be32 response_data_len;
337
338 u8 resp_data[0];
339 u8 sense_data[0];
340} __attribute__ ((packed));
341
342/* ---------- SMP ---------- */
343
344struct report_general_resp {
345 __be16 change_count;
346 __be16 route_indexes;
347 u8 _r_a;
348 u8 num_phys;
349
350 u8 conf_route_table:1;
351 u8 configuring:1;
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700352 u8 config_others:1;
353 u8 orej_retry_supp:1;
354 u8 stp_cont_awt:1;
355 u8 self_config:1;
356 u8 zone_config:1;
357 u8 t2t_supp:1;
James Bottomley2908d772006-08-29 09:22:51 -0500358
359 u8 _r_c;
360
361 u8 enclosure_logical_id[8];
362
363 u8 _r_d[12];
364} __attribute__ ((packed));
365
366struct discover_resp {
367 u8 _r_a[5];
368
369 u8 phy_id;
370 __be16 _r_b;
371
372 u8 _r_c:4;
373 u8 attached_dev_type:3;
374 u8 _r_d:1;
375
376 u8 linkrate:4;
377 u8 _r_e:4;
378
379 u8 attached_sata_host:1;
380 u8 iproto:3;
381 u8 _r_f:4;
382
383 u8 attached_sata_dev:1;
384 u8 tproto:3;
385 u8 _r_g:3;
386 u8 attached_sata_ps:1;
387
388 u8 sas_addr[8];
389 u8 attached_sas_addr[8];
390 u8 attached_phy_id;
391
392 u8 _r_h[7];
393
394 u8 hmin_linkrate:4;
395 u8 pmin_linkrate:4;
396 u8 hmax_linkrate:4;
397 u8 pmax_linkrate:4;
398
399 u8 change_count;
400
401 u8 pptv:4;
402 u8 _r_i:3;
403 u8 virtual:1;
404
405 u8 routing_attr:4;
406 u8 _r_j:4;
407
408 u8 conn_type;
409 u8 conn_el_index;
410 u8 conn_phy_link;
411
412 u8 _r_k[8];
413} __attribute__ ((packed));
414
415struct report_phy_sata_resp {
416 u8 _r_a[5];
417
418 u8 phy_id;
419 u8 _r_b;
420
421 u8 affil_valid:1;
422 u8 affil_supp:1;
423 u8 _r_c:6;
424
425 u32 _r_d;
426
427 u8 stp_sas_addr[8];
428
429 struct dev_to_host_fis fis;
430
431 u32 _r_e;
432
433 u8 affil_stp_ini_addr[8];
434
435 __be32 crc;
436} __attribute__ ((packed));
437
438struct smp_resp {
439 u8 frame_type;
440 u8 function;
441 u8 result;
442 u8 reserved;
443 union {
444 struct report_general_resp rg;
445 struct discover_resp disc;
446 struct report_phy_sata_resp rps;
447 };
448} __attribute__ ((packed));
449
450#elif defined(__BIG_ENDIAN_BITFIELD)
451struct sas_identify_frame {
452 /* Byte 0 */
453 u8 _un0:1;
454 u8 dev_type:3;
455 u8 frame_type:4;
456
457 /* Byte 1 */
458 u8 _un1;
459
460 /* Byte 2 */
461 union {
462 struct {
463 u8 _un247:4;
464 u8 ssp_iport:1;
465 u8 stp_iport:1;
466 u8 smp_iport:1;
467 u8 _un20:1;
468 };
469 u8 initiator_bits;
470 };
471
472 /* Byte 3 */
473 union {
474 struct {
475 u8 _un347:4;
476 u8 ssp_tport:1;
477 u8 stp_tport:1;
478 u8 smp_tport:1;
479 u8 _un30:1;
480 };
481 u8 target_bits;
482 };
483
484 /* Byte 4 - 11 */
485 u8 _un4_11[8];
486
487 /* Byte 12 - 19 */
488 u8 sas_addr[SAS_ADDR_SIZE];
489
490 /* Byte 20 */
491 u8 phy_id;
492
493 u8 _un21_27[7];
494
495 __be32 crc;
496} __attribute__ ((packed));
497
498struct ssp_frame_hdr {
499 u8 frame_type;
500 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
501 u8 _r_a;
502 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
503 __be16 _r_b;
504
505 u8 _r_c:5;
506 u8 retry_data_frames:1;
507 u8 retransmit:1;
508 u8 changing_data_ptr:1;
509
510 u8 _r_d:6;
511 u8 num_fill_bytes:2;
512
513 u32 _r_e;
514 __be16 tag;
515 __be16 tptt;
516 __be32 data_offs;
517} __attribute__ ((packed));
518
519struct ssp_response_iu {
520 u8 _r_a[10];
521
522 u8 _r_b:6;
523 u8 datapres:2;
524
525 u8 status;
526
527 u32 _r_c;
528
529 __be32 sense_data_len;
530 __be32 response_data_len;
531
532 u8 resp_data[0];
533 u8 sense_data[0];
534} __attribute__ ((packed));
535
536/* ---------- SMP ---------- */
537
538struct report_general_resp {
539 __be16 change_count;
540 __be16 route_indexes;
541 u8 _r_a;
542 u8 num_phys;
543
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700544 u8 t2t_supp:1;
545 u8 zone_config:1;
546 u8 self_config:1;
547 u8 stp_cont_awt:1;
548 u8 orej_retry_supp:1;
549 u8 config_others:1;
James Bottomley2908d772006-08-29 09:22:51 -0500550 u8 configuring:1;
551 u8 conf_route_table:1;
552
553 u8 _r_c;
554
555 u8 enclosure_logical_id[8];
556
557 u8 _r_d[12];
558} __attribute__ ((packed));
559
560struct discover_resp {
561 u8 _r_a[5];
562
563 u8 phy_id;
564 __be16 _r_b;
565
566 u8 _r_d:1;
567 u8 attached_dev_type:3;
568 u8 _r_c:4;
569
570 u8 _r_e:4;
571 u8 linkrate:4;
572
573 u8 _r_f:4;
574 u8 iproto:3;
575 u8 attached_sata_host:1;
576
577 u8 attached_sata_ps:1;
578 u8 _r_g:3;
579 u8 tproto:3;
580 u8 attached_sata_dev:1;
581
582 u8 sas_addr[8];
583 u8 attached_sas_addr[8];
584 u8 attached_phy_id;
585
586 u8 _r_h[7];
587
588 u8 pmin_linkrate:4;
589 u8 hmin_linkrate:4;
590 u8 pmax_linkrate:4;
591 u8 hmax_linkrate:4;
592
593 u8 change_count;
594
595 u8 virtual:1;
596 u8 _r_i:3;
597 u8 pptv:4;
598
599 u8 _r_j:4;
600 u8 routing_attr:4;
601
602 u8 conn_type;
603 u8 conn_el_index;
604 u8 conn_phy_link;
605
606 u8 _r_k[8];
607} __attribute__ ((packed));
608
609struct report_phy_sata_resp {
610 u8 _r_a[5];
611
612 u8 phy_id;
613 u8 _r_b;
614
615 u8 _r_c:6;
616 u8 affil_supp:1;
617 u8 affil_valid:1;
618
619 u32 _r_d;
620
621 u8 stp_sas_addr[8];
622
623 struct dev_to_host_fis fis;
624
625 u32 _r_e;
626
627 u8 affil_stp_ini_addr[8];
628
629 __be32 crc;
630} __attribute__ ((packed));
631
632struct smp_resp {
633 u8 frame_type;
634 u8 function;
635 u8 result;
636 u8 reserved;
637 union {
638 struct report_general_resp rg;
639 struct discover_resp disc;
640 struct report_phy_sata_resp rps;
641 };
642} __attribute__ ((packed));
643
644#else
645#error "Bitfield order not defined!"
646#endif
647
648#endif /* _SAS_H_ */