blob: 316563141add95eccd1b8075efa0b4bc519f07db [file] [log] [blame]
Peter De Schrijver22b8b852012-01-26 18:22:03 +02001/*
2 * arch/arm/mach-tegra/cpuidle.c
3 *
4 * CPU idle driver for Tegra CPUs
5 *
6 * Copyright (c) 2010-2012, NVIDIA Corporation.
7 * Copyright (c) 2011 Google, Inc.
8 * Author: Colin Cross <ccross@android.com>
9 * Gary King <gking@nvidia.com>
10 *
11 * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful, but WITHOUT
19 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * more details.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
Peter De Schrijver22b8b852012-01-26 18:22:03 +020026
Thierry Reding304664e2014-07-11 09:52:41 +020027#include <soc/tegra/fuse.h>
28
Joseph Lo0b25e252012-10-31 17:41:15 +080029#include "cpuidle.h"
Peter De Schrijver22b8b852012-01-26 18:22:03 +020030
Joseph Loe22dc2b2013-06-04 18:47:32 +080031void __init tegra_cpuidle_init(void)
Peter De Schrijver22b8b852012-01-26 18:22:03 +020032{
Thierry Reding304664e2014-07-11 09:52:41 +020033 switch (tegra_get_chip_id()) {
Joseph Lo0b25e252012-10-31 17:41:15 +080034 case TEGRA20:
Joseph Lob046a652013-06-04 18:47:34 +080035 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
36 tegra20_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080037 break;
38 case TEGRA30:
Joseph Lob046a652013-06-04 18:47:34 +080039 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
40 tegra30_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080041 break;
Joseph Lo51dc5252013-01-21 17:49:06 +080042 case TEGRA114:
Joseph Lo24036fd2013-10-11 17:57:32 +080043 case TEGRA124:
44 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) ||
45 IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC))
Joseph Lob046a652013-06-04 18:47:34 +080046 tegra114_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080047 break;
Peter De Schrijver22b8b852012-01-26 18:22:03 +020048 }
Peter De Schrijver22b8b852012-01-26 18:22:03 +020049}
Stephen Warrenb4f17372013-05-06 14:19:19 -060050
51void tegra_cpuidle_pcie_irqs_in_use(void)
52{
Thierry Reding304664e2014-07-11 09:52:41 +020053 switch (tegra_get_chip_id()) {
Stephen Warrenb4f17372013-05-06 14:19:19 -060054 case TEGRA20:
55 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
56 tegra20_cpuidle_pcie_irqs_in_use();
57 break;
58 }
59}