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Michal Simek89272a52009-03-27 14:25:22 +01001/*
2 * Early printk support for Microblaze.
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2003-2006 Yasushi SHOJI <yashi@atmark-techno.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/console.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/string.h>
17#include <linux/tty.h>
18#include <linux/io.h>
19#include <asm/processor.h>
20#include <linux/fcntl.h>
21#include <asm/setup.h>
22#include <asm/prom.h>
23
Michal Simek89272a52009-03-27 14:25:22 +010024static u32 base_addr;
25
Michal Simek51f5fa52010-09-28 16:40:00 +100026#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
Michal Simek2af9ebe2010-09-28 16:33:53 +100027static void early_printk_uartlite_putc(char c)
Michal Simek89272a52009-03-27 14:25:22 +010028{
29 /*
30 * Limit how many times we'll spin waiting for TX FIFO status.
31 * This will prevent lockups if the base address is incorrectly
32 * set, or any other issue on the UARTLITE.
33 * This limit is pretty arbitrary, unless we are at about 10 baud
34 * we'll never timeout on a working UART.
35 */
36
Michal Simekca12adc2011-04-06 13:06:45 +020037 unsigned retries = 1000000;
Michal Simek89272a52009-03-27 14:25:22 +010038 /* read status bit - 0x8 offset */
Roel Kluin6e60c142009-04-16 22:49:17 +020039 while (--retries && (in_be32(base_addr + 8) & (1 << 3)))
Michal Simek89272a52009-03-27 14:25:22 +010040 ;
41
42 /* Only attempt the iowrite if we didn't timeout */
43 /* write to TX_FIFO - 0x4 offset */
44 if (retries)
45 out_be32(base_addr + 4, c & 0xff);
46}
47
Michal Simek2af9ebe2010-09-28 16:33:53 +100048static void early_printk_uartlite_write(struct console *unused,
Michal Simek89272a52009-03-27 14:25:22 +010049 const char *s, unsigned n)
50{
51 while (*s && n-- > 0) {
Michal Simek89272a52009-03-27 14:25:22 +010052 if (*s == '\n')
Michal Simek2af9ebe2010-09-28 16:33:53 +100053 early_printk_uartlite_putc('\r');
Michal Simeka8c2e552011-11-10 13:40:08 +010054 early_printk_uartlite_putc(*s);
Michal Simek89272a52009-03-27 14:25:22 +010055 s++;
56 }
57}
58
Michal Simek2af9ebe2010-09-28 16:33:53 +100059static struct console early_serial_uartlite_console = {
Michal Simek89272a52009-03-27 14:25:22 +010060 .name = "earlyser",
Michal Simek2af9ebe2010-09-28 16:33:53 +100061 .write = early_printk_uartlite_write,
Michal Simeke721a452011-04-04 15:45:06 +020062 .flags = CON_PRINTBUFFER | CON_BOOT,
Michal Simek89272a52009-03-27 14:25:22 +010063 .index = -1,
64};
Michal Simek51f5fa52010-09-28 16:40:00 +100065#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
Michal Simek89272a52009-03-27 14:25:22 +010066
Michal Simek67f4aaa2010-09-28 16:17:03 +100067#ifdef CONFIG_SERIAL_8250_CONSOLE
68static void early_printk_uart16550_putc(char c)
69{
70 /*
71 * Limit how many times we'll spin waiting for TX FIFO status.
72 * This will prevent lockups if the base address is incorrectly
73 * set, or any other issue on the UARTLITE.
74 * This limit is pretty arbitrary, unless we are at about 10 baud
75 * we'll never timeout on a working UART.
76 */
77
78 #define UART_LSR_TEMT 0x40 /* Transmitter empty */
79 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
80 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
81
82 unsigned retries = 10000;
83
84 while (--retries &&
85 !((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY))
86 ;
87
88 if (retries)
89 out_be32(base_addr, c & 0xff);
90}
91
92static void early_printk_uart16550_write(struct console *unused,
93 const char *s, unsigned n)
94{
95 while (*s && n-- > 0) {
Michal Simek67f4aaa2010-09-28 16:17:03 +100096 if (*s == '\n')
97 early_printk_uart16550_putc('\r');
Michal Simeka8c2e552011-11-10 13:40:08 +010098 early_printk_uart16550_putc(*s);
Michal Simek67f4aaa2010-09-28 16:17:03 +100099 s++;
100 }
101}
102
103static struct console early_serial_uart16550_console = {
104 .name = "earlyser",
105 .write = early_printk_uart16550_write,
Michal Simeke721a452011-04-04 15:45:06 +0200106 .flags = CON_PRINTBUFFER | CON_BOOT,
Michal Simek67f4aaa2010-09-28 16:17:03 +1000107 .index = -1,
108};
109#endif /* CONFIG_SERIAL_8250_CONSOLE */
110
Michal Simek89272a52009-03-27 14:25:22 +0100111int __init setup_early_printk(char *opt)
112{
Michal Simek2aa8e372011-04-14 11:48:43 +0200113 int version = 0;
114
Thomas Gleixnerd0380e62013-04-29 16:17:18 -0700115 if (early_console)
Michal Simek89272a52009-03-27 14:25:22 +0100116 return 1;
117
Michal Simek2aa8e372011-04-14 11:48:43 +0200118 base_addr = of_early_console(&version);
119 if (base_addr) {
120#ifdef CONFIG_MMU
121 early_console_reg_tlb_alloc(base_addr);
122#endif
123 switch (version) {
Michal Simek51f5fa52010-09-28 16:40:00 +1000124#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
Michal Simek2aa8e372011-04-14 11:48:43 +0200125 case UARTLITE:
Michal Simek6bd55f02012-12-27 10:40:38 +0100126 pr_info("Early console on uartlite at 0x%08x\n",
127 base_addr);
Michal Simek2aa8e372011-04-14 11:48:43 +0200128 early_console = &early_serial_uartlite_console;
129 break;
Michal Simeka43acfb2009-05-26 16:30:10 +0200130#endif
Michal Simek67f4aaa2010-09-28 16:17:03 +1000131#ifdef CONFIG_SERIAL_8250_CONSOLE
Michal Simek2aa8e372011-04-14 11:48:43 +0200132 case UART16550:
Michal Simek6bd55f02012-12-27 10:40:38 +0100133 pr_info("Early console on uart16650 at 0x%08x\n",
134 base_addr);
Michal Simek2aa8e372011-04-14 11:48:43 +0200135 early_console = &early_serial_uart16550_console;
136 break;
Michal Simek67f4aaa2010-09-28 16:17:03 +1000137#endif
Michal Simek2aa8e372011-04-14 11:48:43 +0200138 default:
Michal Simek6bd55f02012-12-27 10:40:38 +0100139 pr_info("Unsupported early console %d\n",
Michal Simek2aa8e372011-04-14 11:48:43 +0200140 version);
141 return 1;
142 }
Michal Simek67f4aaa2010-09-28 16:17:03 +1000143
Michal Simeke721a452011-04-04 15:45:06 +0200144 register_console(early_console);
Michal Simek67f4aaa2010-09-28 16:17:03 +1000145 return 0;
146 }
Michal Simek51f5fa52010-09-28 16:40:00 +1000147 return 1;
Michal Simek89272a52009-03-27 14:25:22 +0100148}
149
Michal Simeke721a452011-04-04 15:45:06 +0200150/* Remap early console to virtual address and do not allocate one TLB
151 * only for early console because of performance degression */
152void __init remap_early_printk(void)
153{
Thomas Gleixnerd0380e62013-04-29 16:17:18 -0700154 if (!early_console)
Michal Simeke721a452011-04-04 15:45:06 +0200155 return;
Michal Simek6bd55f02012-12-27 10:40:38 +0100156 pr_info("early_printk_console remapping from 0x%x to ", base_addr);
Michal Simeke721a452011-04-04 15:45:06 +0200157 base_addr = (u32) ioremap(base_addr, PAGE_SIZE);
Michal Simek6bd55f02012-12-27 10:40:38 +0100158 pr_cont("0x%x\n", base_addr);
Michal Simeke02db0a2010-02-08 16:41:38 +0100159
Michal Simek0fc73742012-04-02 12:50:54 +0200160#ifdef CONFIG_MMU
Michal Simeke02db0a2010-02-08 16:41:38 +0100161 /*
162 * Early console is on the top of skipped TLB entries
163 * decrease tlb_skip size ensure that hardcoded TLB entry will be
164 * used by generic algorithm
165 * FIXME check if early console mapping is on the top by rereading
166 * TLB entry and compare baseaddr
167 * mts rtlbx, (tlb_skip - 1)
168 * nop
169 * mfs rX, rtlblo
170 * nop
171 * cmp rX, orig_base_addr
172 */
173 tlb_skip -= 1;
Michal Simek0fc73742012-04-02 12:50:54 +0200174#endif
Michal Simeke721a452011-04-04 15:45:06 +0200175}
176
Michal Simek89272a52009-03-27 14:25:22 +0100177void __init disable_early_printk(void)
178{
Thomas Gleixnerd0380e62013-04-29 16:17:18 -0700179 if (!early_console)
Michal Simek89272a52009-03-27 14:25:22 +0100180 return;
Michal Simek6bd55f02012-12-27 10:40:38 +0100181 pr_warn("disabling early console\n");
Michal Simek89272a52009-03-27 14:25:22 +0100182 unregister_console(early_console);
Thomas Gleixnerd0380e62013-04-29 16:17:18 -0700183 early_console = NULL;
Michal Simek89272a52009-03-27 14:25:22 +0100184}