Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 82599 Virtual Function driver |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 4 | Copyright(c) 1999 - 2014 Intel Corporation. |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | |
| 29 | /****************************************************************************** |
| 30 | Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code |
| 31 | ******************************************************************************/ |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 32 | |
| 33 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 34 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 35 | #include <linux/types.h> |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 36 | #include <linux/bitops.h> |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 37 | #include <linux/module.h> |
| 38 | #include <linux/pci.h> |
| 39 | #include <linux/netdevice.h> |
| 40 | #include <linux/vmalloc.h> |
| 41 | #include <linux/string.h> |
| 42 | #include <linux/in.h> |
| 43 | #include <linux/ip.h> |
| 44 | #include <linux/tcp.h> |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 45 | #include <linux/sctp.h> |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 46 | #include <linux/ipv6.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 47 | #include <linux/slab.h> |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 48 | #include <net/checksum.h> |
| 49 | #include <net/ip6_checksum.h> |
| 50 | #include <linux/ethtool.h> |
Jiri Pirko | 0178934 | 2011-08-16 06:29:00 +0000 | [diff] [blame] | 51 | #include <linux/if.h> |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 52 | #include <linux/if_vlan.h> |
Paul Gortmaker | 70c7160 | 2011-05-22 16:47:17 -0400 | [diff] [blame] | 53 | #include <linux/prefetch.h> |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 54 | |
| 55 | #include "ixgbevf.h" |
| 56 | |
Stephen Hemminger | 3d8fe98 | 2012-01-18 22:13:34 +0000 | [diff] [blame] | 57 | const char ixgbevf_driver_name[] = "ixgbevf"; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 58 | static const char ixgbevf_driver_string[] = |
Greg Rose | 422e05d | 2011-03-12 02:01:29 +0000 | [diff] [blame] | 59 | "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver"; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 60 | |
Don Skidmore | 86f359f | 2014-01-17 01:21:38 -0800 | [diff] [blame] | 61 | #define DRV_VERSION "2.12.1-k" |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 62 | const char ixgbevf_driver_version[] = DRV_VERSION; |
Greg Rose | 66c87bd | 2010-11-16 19:26:43 -0800 | [diff] [blame] | 63 | static char ixgbevf_copyright[] = |
Greg Rose | 5c47a2b | 2012-01-06 02:53:30 +0000 | [diff] [blame] | 64 | "Copyright (c) 2009 - 2012 Intel Corporation."; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 65 | |
| 66 | static const struct ixgbevf_info *ixgbevf_info_tbl[] = { |
Greg Rose | 2316aa2 | 2010-12-02 07:12:26 +0000 | [diff] [blame] | 67 | [board_82599_vf] = &ixgbevf_82599_vf_info, |
| 68 | [board_X540_vf] = &ixgbevf_X540_vf_info, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | /* ixgbevf_pci_tbl - PCI Device ID Table |
| 72 | * |
| 73 | * Wildcard entries (PCI_ANY_ID) should come last |
| 74 | * Last entry must be all 0s |
| 75 | * |
| 76 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, |
| 77 | * Class, Class Mask, private data (not used) } |
| 78 | */ |
Stephen Hemminger | 39ba22b | 2013-02-06 02:37:04 +0000 | [diff] [blame] | 79 | static DEFINE_PCI_DEVICE_TABLE(ixgbevf_pci_tbl) = { |
| 80 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf }, |
| 81 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf }, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 82 | /* required last entry */ |
| 83 | {0, } |
| 84 | }; |
| 85 | MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); |
| 86 | |
| 87 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); |
| 88 | MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver"); |
| 89 | MODULE_LICENSE("GPL"); |
| 90 | MODULE_VERSION(DRV_VERSION); |
| 91 | |
stephen hemminger | b3f4d59 | 2012-03-13 06:04:20 +0000 | [diff] [blame] | 92 | #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) |
| 93 | static int debug = -1; |
| 94 | module_param(debug, int, 0); |
| 95 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 96 | |
| 97 | /* forward decls */ |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 98 | static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter); |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 99 | static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector); |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 100 | static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 101 | |
Don Skidmore | 5cdab2f | 2013-10-30 07:45:39 +0000 | [diff] [blame] | 102 | static inline void ixgbevf_release_rx_desc(struct ixgbevf_ring *rx_ring, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 103 | u32 val) |
| 104 | { |
Don Skidmore | 5cdab2f | 2013-10-30 07:45:39 +0000 | [diff] [blame] | 105 | rx_ring->next_to_use = val; |
| 106 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 107 | /* |
| 108 | * Force memory writes to complete before letting h/w |
| 109 | * know there are new descriptors to fetch. (Only |
| 110 | * applicable for weak-ordered memory model archs, |
| 111 | * such as IA-64). |
| 112 | */ |
| 113 | wmb(); |
Don Skidmore | 5cdab2f | 2013-10-30 07:45:39 +0000 | [diff] [blame] | 114 | writel(val, rx_ring->tail); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 115 | } |
| 116 | |
Ben Hutchings | 49ce9c2 | 2012-07-10 10:56:00 +0000 | [diff] [blame] | 117 | /** |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 118 | * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 119 | * @adapter: pointer to adapter struct |
| 120 | * @direction: 0 for Rx, 1 for Tx, -1 for other causes |
| 121 | * @queue: queue to map the corresponding interrupt to |
| 122 | * @msix_vector: the vector to map to the corresponding queue |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 123 | */ |
| 124 | static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, |
| 125 | u8 queue, u8 msix_vector) |
| 126 | { |
| 127 | u32 ivar, index; |
| 128 | struct ixgbe_hw *hw = &adapter->hw; |
| 129 | if (direction == -1) { |
| 130 | /* other causes */ |
| 131 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
| 132 | ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); |
| 133 | ivar &= ~0xFF; |
| 134 | ivar |= msix_vector; |
| 135 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); |
| 136 | } else { |
| 137 | /* tx or rx causes */ |
| 138 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
| 139 | index = ((16 * (queue & 1)) + (8 * direction)); |
| 140 | ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); |
| 141 | ivar &= ~(0xFF << index); |
| 142 | ivar |= (msix_vector << index); |
| 143 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); |
| 144 | } |
| 145 | } |
| 146 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 147 | static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring, |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 148 | struct ixgbevf_tx_buffer *tx_buffer) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 149 | { |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 150 | if (tx_buffer->skb) { |
| 151 | dev_kfree_skb_any(tx_buffer->skb); |
| 152 | if (dma_unmap_len(tx_buffer, len)) |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 153 | dma_unmap_single(tx_ring->dev, |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 154 | dma_unmap_addr(tx_buffer, dma), |
| 155 | dma_unmap_len(tx_buffer, len), |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 156 | DMA_TO_DEVICE); |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 157 | } else if (dma_unmap_len(tx_buffer, len)) { |
| 158 | dma_unmap_page(tx_ring->dev, |
| 159 | dma_unmap_addr(tx_buffer, dma), |
| 160 | dma_unmap_len(tx_buffer, len), |
| 161 | DMA_TO_DEVICE); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 162 | } |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 163 | tx_buffer->next_to_watch = NULL; |
| 164 | tx_buffer->skb = NULL; |
| 165 | dma_unmap_len_set(tx_buffer, len, 0); |
| 166 | /* tx_buffer must be completely set up in the transmit path */ |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 167 | } |
| 168 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 169 | #define IXGBE_MAX_TXD_PWR 14 |
| 170 | #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) |
| 171 | |
| 172 | /* Tx Descriptors needed, worst case */ |
Alexander Duyck | 3595990 | 2012-05-11 08:32:40 +0000 | [diff] [blame] | 173 | #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) |
| 174 | #define DESC_NEEDED (MAX_SKB_FRAGS + 4) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 175 | |
| 176 | static void ixgbevf_tx_timeout(struct net_device *netdev); |
| 177 | |
| 178 | /** |
| 179 | * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 180 | * @q_vector: board private structure |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 181 | * @tx_ring: tx ring to clean |
| 182 | **/ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 183 | static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 184 | struct ixgbevf_ring *tx_ring) |
| 185 | { |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 186 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 187 | struct ixgbevf_tx_buffer *tx_buffer; |
| 188 | union ixgbe_adv_tx_desc *tx_desc; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 189 | unsigned int total_bytes = 0, total_packets = 0; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 190 | unsigned int budget = tx_ring->count / 2; |
| 191 | unsigned int i = tx_ring->next_to_clean; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 192 | |
Alexander Duyck | 10cc1bd | 2012-07-16 23:44:48 +0000 | [diff] [blame] | 193 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) |
| 194 | return true; |
| 195 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 196 | tx_buffer = &tx_ring->tx_buffer_info[i]; |
| 197 | tx_desc = IXGBEVF_TX_DESC(tx_ring, i); |
| 198 | i -= tx_ring->count; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 199 | |
Alexander Duyck | e757e3e | 2013-01-31 07:43:22 +0000 | [diff] [blame] | 200 | do { |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 201 | union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; |
Alexander Duyck | e757e3e | 2013-01-31 07:43:22 +0000 | [diff] [blame] | 202 | |
| 203 | /* if next_to_watch is not set then there is no work pending */ |
| 204 | if (!eop_desc) |
| 205 | break; |
| 206 | |
| 207 | /* prevent any other reads prior to eop_desc */ |
| 208 | read_barrier_depends(); |
| 209 | |
| 210 | /* if DD is not set pending work has not been completed */ |
| 211 | if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) |
| 212 | break; |
| 213 | |
| 214 | /* clear next_to_watch to prevent false hangs */ |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 215 | tx_buffer->next_to_watch = NULL; |
Alexander Duyck | e757e3e | 2013-01-31 07:43:22 +0000 | [diff] [blame] | 216 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 217 | /* update the statistics for this packet */ |
| 218 | total_bytes += tx_buffer->bytecount; |
| 219 | total_packets += tx_buffer->gso_segs; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 220 | |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 221 | /* free the skb */ |
| 222 | dev_kfree_skb_any(tx_buffer->skb); |
| 223 | |
| 224 | /* unmap skb header data */ |
| 225 | dma_unmap_single(tx_ring->dev, |
| 226 | dma_unmap_addr(tx_buffer, dma), |
| 227 | dma_unmap_len(tx_buffer, len), |
| 228 | DMA_TO_DEVICE); |
| 229 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 230 | /* clear tx_buffer data */ |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 231 | tx_buffer->skb = NULL; |
| 232 | dma_unmap_len_set(tx_buffer, len, 0); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 233 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 234 | /* unmap remaining buffers */ |
| 235 | while (tx_desc != eop_desc) { |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 236 | tx_buffer++; |
| 237 | tx_desc++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 238 | i++; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 239 | if (unlikely(!i)) { |
| 240 | i -= tx_ring->count; |
| 241 | tx_buffer = tx_ring->tx_buffer_info; |
| 242 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); |
| 243 | } |
Alexander Duyck | e757e3e | 2013-01-31 07:43:22 +0000 | [diff] [blame] | 244 | |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 245 | /* unmap any remaining paged data */ |
| 246 | if (dma_unmap_len(tx_buffer, len)) { |
| 247 | dma_unmap_page(tx_ring->dev, |
| 248 | dma_unmap_addr(tx_buffer, dma), |
| 249 | dma_unmap_len(tx_buffer, len), |
| 250 | DMA_TO_DEVICE); |
| 251 | dma_unmap_len_set(tx_buffer, len, 0); |
| 252 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 255 | /* move us one more past the eop_desc for start of next pkt */ |
| 256 | tx_buffer++; |
| 257 | tx_desc++; |
| 258 | i++; |
| 259 | if (unlikely(!i)) { |
| 260 | i -= tx_ring->count; |
| 261 | tx_buffer = tx_ring->tx_buffer_info; |
| 262 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); |
| 263 | } |
| 264 | |
| 265 | /* issue prefetch for next Tx descriptor */ |
| 266 | prefetch(tx_desc); |
| 267 | |
| 268 | /* update budget accounting */ |
| 269 | budget--; |
| 270 | } while (likely(budget)); |
| 271 | |
| 272 | i += tx_ring->count; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 273 | tx_ring->next_to_clean = i; |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 274 | u64_stats_update_begin(&tx_ring->syncp); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 275 | tx_ring->stats.bytes += total_bytes; |
| 276 | tx_ring->stats.packets += total_packets; |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 277 | u64_stats_update_end(&tx_ring->syncp); |
Greg Rose | ac6ed8f | 2012-08-31 05:59:28 +0000 | [diff] [blame] | 278 | q_vector->tx.total_bytes += total_bytes; |
| 279 | q_vector->tx.total_packets += total_packets; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 280 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 281 | #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) |
| 282 | if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) && |
| 283 | (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) { |
| 284 | /* Make sure that anybody stopping the queue after this |
| 285 | * sees the new next_to_clean. |
| 286 | */ |
| 287 | smp_mb(); |
| 288 | |
| 289 | if (__netif_subqueue_stopped(tx_ring->netdev, |
| 290 | tx_ring->queue_index) && |
| 291 | !test_bit(__IXGBEVF_DOWN, &adapter->state)) { |
| 292 | netif_wake_subqueue(tx_ring->netdev, |
| 293 | tx_ring->queue_index); |
| 294 | ++tx_ring->tx_stats.restart_queue; |
| 295 | } |
| 296 | } |
| 297 | |
| 298 | return !!budget; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | /** |
| 302 | * ixgbevf_receive_skb - Send a completed packet up the stack |
| 303 | * @q_vector: structure containing interrupt and ring information |
| 304 | * @skb: packet to send up |
| 305 | * @status: hardware indication of status of receive |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 306 | * @rx_desc: rx descriptor |
| 307 | **/ |
| 308 | static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector, |
| 309 | struct sk_buff *skb, u8 status, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 310 | union ixgbe_adv_rx_desc *rx_desc) |
| 311 | { |
| 312 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
| 313 | bool is_vlan = (status & IXGBE_RXD_STAT_VP); |
Greg Rose | dd1ed3b | 2011-08-27 02:06:25 +0000 | [diff] [blame] | 314 | u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 315 | |
Pascal Bouchareine | 5d9a533 | 2012-06-14 02:18:18 +0000 | [diff] [blame] | 316 | if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans)) |
Patrick McHardy | 86a9bad | 2013-04-19 02:04:30 +0000 | [diff] [blame] | 317 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag); |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 318 | |
Greg Rose | 366c109 | 2012-11-13 04:03:18 +0000 | [diff] [blame] | 319 | if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) |
| 320 | napi_gro_receive(&q_vector->napi, skb); |
| 321 | else |
| 322 | netif_rx(skb); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 323 | } |
| 324 | |
| 325 | /** |
Jacob Keller | 0868161 | 2013-09-21 06:24:09 +0000 | [diff] [blame] | 326 | * ixgbevf_rx_skb - Helper function to determine proper Rx method |
| 327 | * @q_vector: structure containing interrupt and ring information |
| 328 | * @skb: packet to send up |
| 329 | * @status: hardware indication of status of receive |
| 330 | * @rx_desc: rx descriptor |
| 331 | **/ |
| 332 | static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector, |
| 333 | struct sk_buff *skb, u8 status, |
| 334 | union ixgbe_adv_rx_desc *rx_desc) |
| 335 | { |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 336 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 337 | skb_mark_napi_id(skb, &q_vector->napi); |
| 338 | |
| 339 | if (ixgbevf_qv_busy_polling(q_vector)) { |
| 340 | netif_receive_skb(skb); |
| 341 | /* exit early if we busy polled */ |
| 342 | return; |
| 343 | } |
| 344 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
| 345 | |
Jacob Keller | 0868161 | 2013-09-21 06:24:09 +0000 | [diff] [blame] | 346 | ixgbevf_receive_skb(q_vector, skb, status, rx_desc); |
| 347 | } |
| 348 | |
| 349 | /** |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 350 | * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 351 | * @ring: pointer to Rx descriptor ring structure |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 352 | * @status_err: hardware indication of status of receive |
| 353 | * @skb: skb currently being received and modified |
| 354 | **/ |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 355 | static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 356 | u32 status_err, struct sk_buff *skb) |
| 357 | { |
Eric Dumazet | bc8acf2 | 2010-09-02 13:07:41 -0700 | [diff] [blame] | 358 | skb_checksum_none_assert(skb); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 359 | |
| 360 | /* Rx csum disabled */ |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 361 | if (!(ring->netdev->features & NETIF_F_RXCSUM)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 362 | return; |
| 363 | |
| 364 | /* if IP and error */ |
| 365 | if ((status_err & IXGBE_RXD_STAT_IPCS) && |
| 366 | (status_err & IXGBE_RXDADV_ERR_IPE)) { |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 367 | ring->rx_stats.csum_err++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 368 | return; |
| 369 | } |
| 370 | |
| 371 | if (!(status_err & IXGBE_RXD_STAT_L4CS)) |
| 372 | return; |
| 373 | |
| 374 | if (status_err & IXGBE_RXDADV_ERR_TCPE) { |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 375 | ring->rx_stats.csum_err++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 376 | return; |
| 377 | } |
| 378 | |
| 379 | /* It must be a TCP or UDP packet with a valid checksum */ |
| 380 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 381 | } |
| 382 | |
| 383 | /** |
| 384 | * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 385 | * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 386 | **/ |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 387 | static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 388 | int cleaned_count) |
| 389 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 390 | union ixgbe_adv_rx_desc *rx_desc; |
| 391 | struct ixgbevf_rx_buffer *bi; |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 392 | unsigned int i = rx_ring->next_to_use; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 393 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 394 | while (cleaned_count--) { |
Alexander Duyck | 908421f | 2012-05-11 08:33:00 +0000 | [diff] [blame] | 395 | rx_desc = IXGBEVF_RX_DESC(rx_ring, i); |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 396 | bi = &rx_ring->rx_buffer_info[i]; |
Greg Rose | b9dd245 | 2012-11-02 05:50:21 +0000 | [diff] [blame] | 397 | |
| 398 | if (!bi->skb) { |
| 399 | struct sk_buff *skb; |
| 400 | |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 401 | skb = netdev_alloc_skb_ip_align(rx_ring->netdev, |
| 402 | rx_ring->rx_buf_len); |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 403 | if (!skb) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 404 | goto no_buffers; |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 405 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 406 | bi->skb = skb; |
Greg Rose | b9dd245 | 2012-11-02 05:50:21 +0000 | [diff] [blame] | 407 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 408 | bi->dma = dma_map_single(rx_ring->dev, skb->data, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 409 | rx_ring->rx_buf_len, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 410 | DMA_FROM_DEVICE); |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 411 | if (dma_mapping_error(rx_ring->dev, bi->dma)) { |
Greg Rose | 6132ee8 | 2012-09-21 00:14:14 +0000 | [diff] [blame] | 412 | dev_kfree_skb(skb); |
| 413 | bi->skb = NULL; |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 414 | dev_err(rx_ring->dev, "Rx DMA map failed\n"); |
Greg Rose | 6132ee8 | 2012-09-21 00:14:14 +0000 | [diff] [blame] | 415 | break; |
| 416 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 417 | } |
Alexander Duyck | 77d5dfc | 2012-05-11 08:32:19 +0000 | [diff] [blame] | 418 | rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 419 | |
| 420 | i++; |
| 421 | if (i == rx_ring->count) |
| 422 | i = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 423 | } |
| 424 | |
| 425 | no_buffers: |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 426 | rx_ring->rx_stats.alloc_rx_buff_failed++; |
Don Skidmore | 5cdab2f | 2013-10-30 07:45:39 +0000 | [diff] [blame] | 427 | if (rx_ring->next_to_use != i) |
| 428 | ixgbevf_release_rx_desc(rx_ring, i); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 432 | u32 qmask) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 433 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 434 | struct ixgbe_hw *hw = &adapter->hw; |
| 435 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 436 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 437 | } |
| 438 | |
Jacob Keller | 08e50a2 | 2013-09-21 06:24:14 +0000 | [diff] [blame] | 439 | static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, |
| 440 | struct ixgbevf_ring *rx_ring, |
| 441 | int budget) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 442 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 443 | union ixgbe_adv_rx_desc *rx_desc, *next_rxd; |
| 444 | struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer; |
| 445 | struct sk_buff *skb; |
| 446 | unsigned int i; |
| 447 | u32 len, staterr; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 448 | int cleaned_count = 0; |
| 449 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; |
| 450 | |
| 451 | i = rx_ring->next_to_clean; |
Alexander Duyck | 908421f | 2012-05-11 08:33:00 +0000 | [diff] [blame] | 452 | rx_desc = IXGBEVF_RX_DESC(rx_ring, i); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 453 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); |
| 454 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; |
| 455 | |
| 456 | while (staterr & IXGBE_RXD_STAT_DD) { |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 457 | if (!budget) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 458 | break; |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 459 | budget--; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 460 | |
Jeff Kirsher | 2d0bb1c | 2010-08-08 16:02:31 +0000 | [diff] [blame] | 461 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
Alexander Duyck | 77d5dfc | 2012-05-11 08:32:19 +0000 | [diff] [blame] | 462 | len = le16_to_cpu(rx_desc->wb.upper.length); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 463 | skb = rx_buffer_info->skb; |
| 464 | prefetch(skb->data - NET_IP_ALIGN); |
| 465 | rx_buffer_info->skb = NULL; |
| 466 | |
| 467 | if (rx_buffer_info->dma) { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 468 | dma_unmap_single(rx_ring->dev, rx_buffer_info->dma, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 469 | rx_ring->rx_buf_len, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 470 | DMA_FROM_DEVICE); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 471 | rx_buffer_info->dma = 0; |
| 472 | skb_put(skb, len); |
| 473 | } |
| 474 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 475 | i++; |
| 476 | if (i == rx_ring->count) |
| 477 | i = 0; |
| 478 | |
Alexander Duyck | 908421f | 2012-05-11 08:33:00 +0000 | [diff] [blame] | 479 | next_rxd = IXGBEVF_RX_DESC(rx_ring, i); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 480 | prefetch(next_rxd); |
| 481 | cleaned_count++; |
| 482 | |
| 483 | next_buffer = &rx_ring->rx_buffer_info[i]; |
| 484 | |
| 485 | if (!(staterr & IXGBE_RXD_STAT_EOP)) { |
Alexander Duyck | 77d5dfc | 2012-05-11 08:32:19 +0000 | [diff] [blame] | 486 | skb->next = next_buffer->skb; |
Alexander Duyck | 5c60f81 | 2012-09-01 05:12:38 +0000 | [diff] [blame] | 487 | IXGBE_CB(skb->next)->prev = skb; |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 488 | rx_ring->rx_stats.non_eop_descs++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 489 | goto next_desc; |
| 490 | } |
| 491 | |
Alexander Duyck | 5c60f81 | 2012-09-01 05:12:38 +0000 | [diff] [blame] | 492 | /* we should not be chaining buffers, if we did drop the skb */ |
| 493 | if (IXGBE_CB(skb)->prev) { |
| 494 | do { |
| 495 | struct sk_buff *this = skb; |
| 496 | skb = IXGBE_CB(skb)->prev; |
| 497 | dev_kfree_skb(this); |
| 498 | } while (skb); |
| 499 | goto next_desc; |
| 500 | } |
| 501 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 502 | /* ERR_MASK will only have valid bits if EOP set */ |
| 503 | if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) { |
| 504 | dev_kfree_skb_irq(skb); |
| 505 | goto next_desc; |
| 506 | } |
| 507 | |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 508 | ixgbevf_rx_checksum(rx_ring, staterr, skb); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 509 | |
| 510 | /* probably a little skewed due to removing CRC */ |
| 511 | total_rx_bytes += skb->len; |
| 512 | total_rx_packets++; |
| 513 | |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 514 | skb->protocol = eth_type_trans(skb, rx_ring->netdev); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 515 | |
John Fastabend | 815cccb | 2012-10-24 08:13:09 +0000 | [diff] [blame] | 516 | /* Workaround hardware that can't do proper VEPA multicast |
| 517 | * source pruning. |
| 518 | */ |
Florian Fainelli | bd9d559 | 2014-02-28 15:46:49 -0800 | [diff] [blame] | 519 | if ((skb->pkt_type == PACKET_BROADCAST || |
| 520 | skb->pkt_type == PACKET_MULTICAST) && |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 521 | ether_addr_equal(rx_ring->netdev->dev_addr, |
Joe Perches | 7367d0b | 2013-09-01 11:51:23 -0700 | [diff] [blame] | 522 | eth_hdr(skb)->h_source)) { |
John Fastabend | 815cccb | 2012-10-24 08:13:09 +0000 | [diff] [blame] | 523 | dev_kfree_skb_irq(skb); |
| 524 | goto next_desc; |
| 525 | } |
| 526 | |
Jacob Keller | 0868161 | 2013-09-21 06:24:09 +0000 | [diff] [blame] | 527 | ixgbevf_rx_skb(q_vector, skb, staterr, rx_desc); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 528 | |
| 529 | next_desc: |
| 530 | rx_desc->wb.upper.status_error = 0; |
| 531 | |
| 532 | /* return some buffers to hardware, one at a time is too slow */ |
| 533 | if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 534 | ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 535 | cleaned_count = 0; |
| 536 | } |
| 537 | |
| 538 | /* use prefetched values */ |
| 539 | rx_desc = next_rxd; |
| 540 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; |
| 541 | |
| 542 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); |
| 543 | } |
| 544 | |
| 545 | rx_ring->next_to_clean = i; |
Don Skidmore | f880d07 | 2013-10-23 02:17:52 +0000 | [diff] [blame] | 546 | cleaned_count = ixgbevf_desc_unused(rx_ring); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 547 | |
| 548 | if (cleaned_count) |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 549 | ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 550 | |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 551 | u64_stats_update_begin(&rx_ring->syncp); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 552 | rx_ring->stats.packets += total_rx_packets; |
| 553 | rx_ring->stats.bytes += total_rx_bytes; |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 554 | u64_stats_update_end(&rx_ring->syncp); |
Greg Rose | ac6ed8f | 2012-08-31 05:59:28 +0000 | [diff] [blame] | 555 | q_vector->rx.total_packets += total_rx_packets; |
| 556 | q_vector->rx.total_bytes += total_rx_bytes; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 557 | |
Jacob Keller | 08e50a2 | 2013-09-21 06:24:14 +0000 | [diff] [blame] | 558 | return total_rx_packets; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 559 | } |
| 560 | |
| 561 | /** |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 562 | * ixgbevf_poll - NAPI polling calback |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 563 | * @napi: napi struct with our devices info in it |
| 564 | * @budget: amount of work driver is allowed to do this pass, in packets |
| 565 | * |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 566 | * This function will clean more than one or more rings associated with a |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 567 | * q_vector. |
| 568 | **/ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 569 | static int ixgbevf_poll(struct napi_struct *napi, int budget) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 570 | { |
| 571 | struct ixgbevf_q_vector *q_vector = |
| 572 | container_of(napi, struct ixgbevf_q_vector, napi); |
| 573 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 574 | struct ixgbevf_ring *ring; |
| 575 | int per_ring_budget; |
| 576 | bool clean_complete = true; |
| 577 | |
| 578 | ixgbevf_for_each_ring(ring, q_vector->tx) |
| 579 | clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 580 | |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 581 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 582 | if (!ixgbevf_qv_lock_napi(q_vector)) |
| 583 | return budget; |
| 584 | #endif |
| 585 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 586 | /* attempt to distribute budget to each queue fairly, but don't allow |
| 587 | * the budget to go below 1 because we'll exit polling */ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 588 | if (q_vector->rx.count > 1) |
| 589 | per_ring_budget = max(budget/q_vector->rx.count, 1); |
| 590 | else |
| 591 | per_ring_budget = budget; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 592 | |
Greg Rose | 366c109 | 2012-11-13 04:03:18 +0000 | [diff] [blame] | 593 | adapter->flags |= IXGBE_FLAG_IN_NETPOLL; |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 594 | ixgbevf_for_each_ring(ring, q_vector->rx) |
Jacob Keller | 08e50a2 | 2013-09-21 06:24:14 +0000 | [diff] [blame] | 595 | clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring, |
| 596 | per_ring_budget) |
| 597 | < per_ring_budget); |
Greg Rose | 366c109 | 2012-11-13 04:03:18 +0000 | [diff] [blame] | 598 | adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 599 | |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 600 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 601 | ixgbevf_qv_unlock_napi(q_vector); |
| 602 | #endif |
| 603 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 604 | /* If all work not completed, return budget and keep polling */ |
| 605 | if (!clean_complete) |
| 606 | return budget; |
| 607 | /* all work done, exit the polling mode */ |
| 608 | napi_complete(napi); |
| 609 | if (adapter->rx_itr_setting & 1) |
| 610 | ixgbevf_set_itr(q_vector); |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 611 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && |
| 612 | !test_bit(__IXGBEVF_REMOVING, &adapter->state)) |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 613 | ixgbevf_irq_enable_queues(adapter, |
| 614 | 1 << q_vector->v_idx); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 615 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 616 | return 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 617 | } |
| 618 | |
Greg Rose | ce42260 | 2012-05-22 02:17:49 +0000 | [diff] [blame] | 619 | /** |
| 620 | * ixgbevf_write_eitr - write VTEITR register in hardware specific way |
| 621 | * @q_vector: structure containing interrupt and ring information |
| 622 | */ |
Jacob Keller | 3849623 | 2013-10-22 06:19:18 +0000 | [diff] [blame] | 623 | void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector) |
Greg Rose | ce42260 | 2012-05-22 02:17:49 +0000 | [diff] [blame] | 624 | { |
| 625 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
| 626 | struct ixgbe_hw *hw = &adapter->hw; |
| 627 | int v_idx = q_vector->v_idx; |
| 628 | u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; |
| 629 | |
| 630 | /* |
| 631 | * set the WDIS bit to not clear the timer bits and cause an |
| 632 | * immediate assertion of the interrupt |
| 633 | */ |
| 634 | itr_reg |= IXGBE_EITR_CNT_WDIS; |
| 635 | |
| 636 | IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); |
| 637 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 638 | |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 639 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 640 | /* must be called with local_bh_disable()d */ |
| 641 | static int ixgbevf_busy_poll_recv(struct napi_struct *napi) |
| 642 | { |
| 643 | struct ixgbevf_q_vector *q_vector = |
| 644 | container_of(napi, struct ixgbevf_q_vector, napi); |
| 645 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
| 646 | struct ixgbevf_ring *ring; |
| 647 | int found = 0; |
| 648 | |
| 649 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) |
| 650 | return LL_FLUSH_FAILED; |
| 651 | |
| 652 | if (!ixgbevf_qv_lock_poll(q_vector)) |
| 653 | return LL_FLUSH_BUSY; |
| 654 | |
| 655 | ixgbevf_for_each_ring(ring, q_vector->rx) { |
| 656 | found = ixgbevf_clean_rx_irq(q_vector, ring, 4); |
Jacob Keller | 3b5dca2 | 2013-09-21 06:24:25 +0000 | [diff] [blame] | 657 | #ifdef BP_EXTENDED_STATS |
| 658 | if (found) |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 659 | ring->stats.cleaned += found; |
Jacob Keller | 3b5dca2 | 2013-09-21 06:24:25 +0000 | [diff] [blame] | 660 | else |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 661 | ring->stats.misses++; |
Jacob Keller | 3b5dca2 | 2013-09-21 06:24:25 +0000 | [diff] [blame] | 662 | #endif |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 663 | if (found) |
| 664 | break; |
| 665 | } |
| 666 | |
| 667 | ixgbevf_qv_unlock_poll(q_vector); |
| 668 | |
| 669 | return found; |
| 670 | } |
| 671 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
| 672 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 673 | /** |
| 674 | * ixgbevf_configure_msix - Configure MSI-X hardware |
| 675 | * @adapter: board private structure |
| 676 | * |
| 677 | * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X |
| 678 | * interrupts. |
| 679 | **/ |
| 680 | static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) |
| 681 | { |
| 682 | struct ixgbevf_q_vector *q_vector; |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 683 | int q_vectors, v_idx; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 684 | |
| 685 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 686 | adapter->eims_enable_mask = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 687 | |
| 688 | /* |
| 689 | * Populate the IVAR table and set the ITR values to the |
| 690 | * corresponding register. |
| 691 | */ |
| 692 | for (v_idx = 0; v_idx < q_vectors; v_idx++) { |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 693 | struct ixgbevf_ring *ring; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 694 | q_vector = adapter->q_vector[v_idx]; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 695 | |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 696 | ixgbevf_for_each_ring(ring, q_vector->rx) |
| 697 | ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 698 | |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 699 | ixgbevf_for_each_ring(ring, q_vector->tx) |
| 700 | ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 701 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 702 | if (q_vector->tx.ring && !q_vector->rx.ring) { |
| 703 | /* tx only vector */ |
| 704 | if (adapter->tx_itr_setting == 1) |
| 705 | q_vector->itr = IXGBE_10K_ITR; |
| 706 | else |
| 707 | q_vector->itr = adapter->tx_itr_setting; |
| 708 | } else { |
| 709 | /* rx or rx/tx vector */ |
| 710 | if (adapter->rx_itr_setting == 1) |
| 711 | q_vector->itr = IXGBE_20K_ITR; |
| 712 | else |
| 713 | q_vector->itr = adapter->rx_itr_setting; |
| 714 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 715 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 716 | /* add q_vector eims value to global eims_enable_mask */ |
| 717 | adapter->eims_enable_mask |= 1 << v_idx; |
| 718 | |
| 719 | ixgbevf_write_eitr(q_vector); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 720 | } |
| 721 | |
| 722 | ixgbevf_set_ivar(adapter, -1, 1, v_idx); |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 723 | /* setup eims_other and add value to global eims_enable_mask */ |
| 724 | adapter->eims_other = 1 << v_idx; |
| 725 | adapter->eims_enable_mask |= adapter->eims_other; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 726 | } |
| 727 | |
| 728 | enum latency_range { |
| 729 | lowest_latency = 0, |
| 730 | low_latency = 1, |
| 731 | bulk_latency = 2, |
| 732 | latency_invalid = 255 |
| 733 | }; |
| 734 | |
| 735 | /** |
| 736 | * ixgbevf_update_itr - update the dynamic ITR value based on statistics |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 737 | * @q_vector: structure containing interrupt and ring information |
| 738 | * @ring_container: structure containing ring performance data |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 739 | * |
| 740 | * Stores a new ITR value based on packets and byte |
| 741 | * counts during the last interrupt. The advantage of per interrupt |
| 742 | * computation is faster updates and more accurate ITR for the current |
| 743 | * traffic pattern. Constants in this function were computed |
| 744 | * based on theoretical maximum wire speed and thresholds were set based |
| 745 | * on testing data as well as attempting to minimize response time |
| 746 | * while increasing bulk throughput. |
| 747 | **/ |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 748 | static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector, |
| 749 | struct ixgbevf_ring_container *ring_container) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 750 | { |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 751 | int bytes = ring_container->total_bytes; |
| 752 | int packets = ring_container->total_packets; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 753 | u32 timepassed_us; |
| 754 | u64 bytes_perint; |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 755 | u8 itr_setting = ring_container->itr; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 756 | |
| 757 | if (packets == 0) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 758 | return; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 759 | |
| 760 | /* simple throttlerate management |
| 761 | * 0-20MB/s lowest (100000 ints/s) |
| 762 | * 20-100MB/s low (20000 ints/s) |
| 763 | * 100-1249MB/s bulk (8000 ints/s) |
| 764 | */ |
| 765 | /* what was last interrupt timeslice? */ |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 766 | timepassed_us = q_vector->itr >> 2; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 767 | bytes_perint = bytes / timepassed_us; /* bytes/usec */ |
| 768 | |
| 769 | switch (itr_setting) { |
| 770 | case lowest_latency: |
Alexander Duyck | e2c28ce | 2012-05-11 08:32:34 +0000 | [diff] [blame] | 771 | if (bytes_perint > 10) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 772 | itr_setting = low_latency; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 773 | break; |
| 774 | case low_latency: |
Alexander Duyck | e2c28ce | 2012-05-11 08:32:34 +0000 | [diff] [blame] | 775 | if (bytes_perint > 20) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 776 | itr_setting = bulk_latency; |
Alexander Duyck | e2c28ce | 2012-05-11 08:32:34 +0000 | [diff] [blame] | 777 | else if (bytes_perint <= 10) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 778 | itr_setting = lowest_latency; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 779 | break; |
| 780 | case bulk_latency: |
Alexander Duyck | e2c28ce | 2012-05-11 08:32:34 +0000 | [diff] [blame] | 781 | if (bytes_perint <= 20) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 782 | itr_setting = low_latency; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 783 | break; |
| 784 | } |
| 785 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 786 | /* clear work counters since we have the values we need */ |
| 787 | ring_container->total_bytes = 0; |
| 788 | ring_container->total_packets = 0; |
| 789 | |
| 790 | /* write updated itr to ring container */ |
| 791 | ring_container->itr = itr_setting; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 792 | } |
| 793 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 794 | static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 795 | { |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 796 | u32 new_itr = q_vector->itr; |
| 797 | u8 current_itr; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 798 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 799 | ixgbevf_update_itr(q_vector, &q_vector->tx); |
| 800 | ixgbevf_update_itr(q_vector, &q_vector->rx); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 801 | |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 802 | current_itr = max(q_vector->rx.itr, q_vector->tx.itr); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 803 | |
| 804 | switch (current_itr) { |
| 805 | /* counts and packets in update_itr are dependent on these numbers */ |
| 806 | case lowest_latency: |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 807 | new_itr = IXGBE_100K_ITR; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 808 | break; |
| 809 | case low_latency: |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 810 | new_itr = IXGBE_20K_ITR; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 811 | break; |
| 812 | case bulk_latency: |
| 813 | default: |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 814 | new_itr = IXGBE_8K_ITR; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 815 | break; |
| 816 | } |
| 817 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 818 | if (new_itr != q_vector->itr) { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 819 | /* do an exponential smoothing */ |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 820 | new_itr = (10 * new_itr * q_vector->itr) / |
| 821 | ((9 * new_itr) + q_vector->itr); |
| 822 | |
| 823 | /* save the algorithm value here */ |
| 824 | q_vector->itr = new_itr; |
| 825 | |
| 826 | ixgbevf_write_eitr(q_vector); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 827 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 828 | } |
| 829 | |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 830 | static irqreturn_t ixgbevf_msix_other(int irq, void *data) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 831 | { |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 832 | struct ixgbevf_adapter *adapter = data; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 833 | struct ixgbe_hw *hw = &adapter->hw; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 834 | |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 835 | hw->mac.get_link_status = 1; |
Greg Rose | 375b27c | 2012-01-18 22:13:31 +0000 | [diff] [blame] | 836 | |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 837 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && |
| 838 | !test_bit(__IXGBEVF_REMOVING, &adapter->state)) |
Don Skidmore | c7bb417 | 2013-10-01 04:33:49 -0700 | [diff] [blame] | 839 | mod_timer(&adapter->watchdog_timer, jiffies); |
Greg Rose | 3a2c403 | 2012-02-01 01:28:15 +0000 | [diff] [blame] | 840 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 841 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other); |
| 842 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 843 | return IRQ_HANDLED; |
| 844 | } |
| 845 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 846 | /** |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 847 | * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 848 | * @irq: unused |
| 849 | * @data: pointer to our q_vector struct for this interrupt vector |
| 850 | **/ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 851 | static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 852 | { |
| 853 | struct ixgbevf_q_vector *q_vector = data; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 854 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 855 | /* EIAM disabled interrupts (on this vector) for us */ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 856 | if (q_vector->rx.ring || q_vector->tx.ring) |
| 857 | napi_schedule(&q_vector->napi); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 858 | |
| 859 | return IRQ_HANDLED; |
| 860 | } |
| 861 | |
| 862 | static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx, |
| 863 | int r_idx) |
| 864 | { |
| 865 | struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; |
| 866 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 867 | a->rx_ring[r_idx]->next = q_vector->rx.ring; |
| 868 | q_vector->rx.ring = a->rx_ring[r_idx]; |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 869 | q_vector->rx.count++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 870 | } |
| 871 | |
| 872 | static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx, |
| 873 | int t_idx) |
| 874 | { |
| 875 | struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; |
| 876 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 877 | a->tx_ring[t_idx]->next = q_vector->tx.ring; |
| 878 | q_vector->tx.ring = a->tx_ring[t_idx]; |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 879 | q_vector->tx.count++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 880 | } |
| 881 | |
| 882 | /** |
| 883 | * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors |
| 884 | * @adapter: board private structure to initialize |
| 885 | * |
| 886 | * This function maps descriptor rings to the queue-specific vectors |
| 887 | * we were allotted through the MSI-X enabling code. Ideally, we'd have |
| 888 | * one vector per ring/queue, but on a constrained vector budget, we |
| 889 | * group the rings as "efficiently" as possible. You would add new |
| 890 | * mapping configurations in here. |
| 891 | **/ |
| 892 | static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter) |
| 893 | { |
| 894 | int q_vectors; |
| 895 | int v_start = 0; |
| 896 | int rxr_idx = 0, txr_idx = 0; |
| 897 | int rxr_remaining = adapter->num_rx_queues; |
| 898 | int txr_remaining = adapter->num_tx_queues; |
| 899 | int i, j; |
| 900 | int rqpv, tqpv; |
| 901 | int err = 0; |
| 902 | |
| 903 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
| 904 | |
| 905 | /* |
| 906 | * The ideal configuration... |
| 907 | * We have enough vectors to map one per queue. |
| 908 | */ |
| 909 | if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) { |
| 910 | for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) |
| 911 | map_vector_to_rxq(adapter, v_start, rxr_idx); |
| 912 | |
| 913 | for (; txr_idx < txr_remaining; v_start++, txr_idx++) |
| 914 | map_vector_to_txq(adapter, v_start, txr_idx); |
| 915 | goto out; |
| 916 | } |
| 917 | |
| 918 | /* |
| 919 | * If we don't have enough vectors for a 1-to-1 |
| 920 | * mapping, we'll have to group them so there are |
| 921 | * multiple queues per vector. |
| 922 | */ |
| 923 | /* Re-adjusting *qpv takes care of the remainder. */ |
| 924 | for (i = v_start; i < q_vectors; i++) { |
| 925 | rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i); |
| 926 | for (j = 0; j < rqpv; j++) { |
| 927 | map_vector_to_rxq(adapter, i, rxr_idx); |
| 928 | rxr_idx++; |
| 929 | rxr_remaining--; |
| 930 | } |
| 931 | } |
| 932 | for (i = v_start; i < q_vectors; i++) { |
| 933 | tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i); |
| 934 | for (j = 0; j < tqpv; j++) { |
| 935 | map_vector_to_txq(adapter, i, txr_idx); |
| 936 | txr_idx++; |
| 937 | txr_remaining--; |
| 938 | } |
| 939 | } |
| 940 | |
| 941 | out: |
| 942 | return err; |
| 943 | } |
| 944 | |
| 945 | /** |
| 946 | * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts |
| 947 | * @adapter: board private structure |
| 948 | * |
| 949 | * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests |
| 950 | * interrupts from the kernel. |
| 951 | **/ |
| 952 | static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) |
| 953 | { |
| 954 | struct net_device *netdev = adapter->netdev; |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 955 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
| 956 | int vector, err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 957 | int ri = 0, ti = 0; |
| 958 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 959 | for (vector = 0; vector < q_vectors; vector++) { |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 960 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector]; |
| 961 | struct msix_entry *entry = &adapter->msix_entries[vector]; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 962 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 963 | if (q_vector->tx.ring && q_vector->rx.ring) { |
| 964 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
| 965 | "%s-%s-%d", netdev->name, "TxRx", ri++); |
| 966 | ti++; |
| 967 | } else if (q_vector->rx.ring) { |
| 968 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
| 969 | "%s-%s-%d", netdev->name, "rx", ri++); |
| 970 | } else if (q_vector->tx.ring) { |
| 971 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
| 972 | "%s-%s-%d", netdev->name, "tx", ti++); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 973 | } else { |
| 974 | /* skip this unused q_vector */ |
| 975 | continue; |
| 976 | } |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 977 | err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0, |
| 978 | q_vector->name, q_vector); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 979 | if (err) { |
| 980 | hw_dbg(&adapter->hw, |
| 981 | "request_irq failed for MSIX interrupt " |
| 982 | "Error: %d\n", err); |
| 983 | goto free_queue_irqs; |
| 984 | } |
| 985 | } |
| 986 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 987 | err = request_irq(adapter->msix_entries[vector].vector, |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 988 | &ixgbevf_msix_other, 0, netdev->name, adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 989 | if (err) { |
| 990 | hw_dbg(&adapter->hw, |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 991 | "request_irq for msix_other failed: %d\n", err); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 992 | goto free_queue_irqs; |
| 993 | } |
| 994 | |
| 995 | return 0; |
| 996 | |
| 997 | free_queue_irqs: |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 998 | while (vector) { |
| 999 | vector--; |
| 1000 | free_irq(adapter->msix_entries[vector].vector, |
| 1001 | adapter->q_vector[vector]); |
| 1002 | } |
xunleer | a1f6c6b | 2013-03-05 07:44:20 +0000 | [diff] [blame] | 1003 | /* This failure is non-recoverable - it indicates the system is |
| 1004 | * out of MSIX vector resources and the VF driver cannot run |
| 1005 | * without them. Set the number of msix vectors to zero |
| 1006 | * indicating that not enough can be allocated. The error |
| 1007 | * will be returned to the user indicating device open failed. |
| 1008 | * Any further attempts to force the driver to open will also |
| 1009 | * fail. The only way to recover is to unload the driver and |
| 1010 | * reload it again. If the system has recovered some MSIX |
| 1011 | * vectors then it may succeed. |
| 1012 | */ |
| 1013 | adapter->num_msix_vectors = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1014 | return err; |
| 1015 | } |
| 1016 | |
| 1017 | static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter) |
| 1018 | { |
| 1019 | int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
| 1020 | |
| 1021 | for (i = 0; i < q_vectors; i++) { |
| 1022 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[i]; |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 1023 | q_vector->rx.ring = NULL; |
| 1024 | q_vector->tx.ring = NULL; |
| 1025 | q_vector->rx.count = 0; |
| 1026 | q_vector->tx.count = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1027 | } |
| 1028 | } |
| 1029 | |
| 1030 | /** |
| 1031 | * ixgbevf_request_irq - initialize interrupts |
| 1032 | * @adapter: board private structure |
| 1033 | * |
| 1034 | * Attempts to configure interrupts using the best available |
| 1035 | * capabilities of the hardware and kernel. |
| 1036 | **/ |
| 1037 | static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) |
| 1038 | { |
| 1039 | int err = 0; |
| 1040 | |
| 1041 | err = ixgbevf_request_msix_irqs(adapter); |
| 1042 | |
| 1043 | if (err) |
| 1044 | hw_dbg(&adapter->hw, |
| 1045 | "request_irq failed, Error %d\n", err); |
| 1046 | |
| 1047 | return err; |
| 1048 | } |
| 1049 | |
| 1050 | static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) |
| 1051 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1052 | int i, q_vectors; |
| 1053 | |
| 1054 | q_vectors = adapter->num_msix_vectors; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1055 | i = q_vectors - 1; |
| 1056 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1057 | free_irq(adapter->msix_entries[i].vector, adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1058 | i--; |
| 1059 | |
| 1060 | for (; i >= 0; i--) { |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1061 | /* free only the irqs that were actually requested */ |
| 1062 | if (!adapter->q_vector[i]->rx.ring && |
| 1063 | !adapter->q_vector[i]->tx.ring) |
| 1064 | continue; |
| 1065 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1066 | free_irq(adapter->msix_entries[i].vector, |
| 1067 | adapter->q_vector[i]); |
| 1068 | } |
| 1069 | |
| 1070 | ixgbevf_reset_q_vectors(adapter); |
| 1071 | } |
| 1072 | |
| 1073 | /** |
| 1074 | * ixgbevf_irq_disable - Mask off interrupt generation on the NIC |
| 1075 | * @adapter: board private structure |
| 1076 | **/ |
| 1077 | static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) |
| 1078 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1079 | struct ixgbe_hw *hw = &adapter->hw; |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1080 | int i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1081 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1082 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1083 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1084 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1085 | |
| 1086 | IXGBE_WRITE_FLUSH(hw); |
| 1087 | |
| 1088 | for (i = 0; i < adapter->num_msix_vectors; i++) |
| 1089 | synchronize_irq(adapter->msix_entries[i].vector); |
| 1090 | } |
| 1091 | |
| 1092 | /** |
| 1093 | * ixgbevf_irq_enable - Enable default interrupt generation settings |
| 1094 | * @adapter: board private structure |
| 1095 | **/ |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1096 | static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1097 | { |
| 1098 | struct ixgbe_hw *hw = &adapter->hw; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1099 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1100 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask); |
| 1101 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask); |
| 1102 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1103 | } |
| 1104 | |
| 1105 | /** |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1106 | * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset |
| 1107 | * @adapter: board private structure |
| 1108 | * @ring: structure containing ring specific data |
| 1109 | * |
| 1110 | * Configure the Tx descriptor ring after a reset. |
| 1111 | **/ |
| 1112 | static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter, |
| 1113 | struct ixgbevf_ring *ring) |
| 1114 | { |
| 1115 | struct ixgbe_hw *hw = &adapter->hw; |
| 1116 | u64 tdba = ring->dma; |
| 1117 | int wait_loop = 10; |
| 1118 | u32 txdctl = IXGBE_TXDCTL_ENABLE; |
| 1119 | u8 reg_idx = ring->reg_idx; |
| 1120 | |
| 1121 | /* disable queue to avoid issues while updating state */ |
| 1122 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); |
| 1123 | IXGBE_WRITE_FLUSH(hw); |
| 1124 | |
| 1125 | IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); |
| 1126 | IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32); |
| 1127 | IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx), |
| 1128 | ring->count * sizeof(union ixgbe_adv_tx_desc)); |
| 1129 | |
| 1130 | /* disable head writeback */ |
| 1131 | IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0); |
| 1132 | IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0); |
| 1133 | |
| 1134 | /* enable relaxed ordering */ |
| 1135 | IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx), |
| 1136 | (IXGBE_DCA_TXCTRL_DESC_RRO_EN | |
| 1137 | IXGBE_DCA_TXCTRL_DATA_RRO_EN)); |
| 1138 | |
| 1139 | /* reset head and tail pointers */ |
| 1140 | IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0); |
| 1141 | IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0); |
| 1142 | ring->tail = hw->hw_addr + IXGBE_VFTDT(reg_idx); |
| 1143 | |
| 1144 | /* reset ntu and ntc to place SW in sync with hardwdare */ |
| 1145 | ring->next_to_clean = 0; |
| 1146 | ring->next_to_use = 0; |
| 1147 | |
| 1148 | /* In order to avoid issues WTHRESH + PTHRESH should always be equal |
| 1149 | * to or less than the number of on chip descriptors, which is |
| 1150 | * currently 40. |
| 1151 | */ |
| 1152 | txdctl |= (8 << 16); /* WTHRESH = 8 */ |
| 1153 | |
| 1154 | /* Setting PTHRESH to 32 both improves performance */ |
| 1155 | txdctl |= (1 << 8) | /* HTHRESH = 1 */ |
| 1156 | 32; /* PTHRESH = 32 */ |
| 1157 | |
| 1158 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); |
| 1159 | |
| 1160 | /* poll to verify queue is enabled */ |
| 1161 | do { |
| 1162 | usleep_range(1000, 2000); |
| 1163 | txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); |
| 1164 | } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); |
| 1165 | if (!wait_loop) |
| 1166 | pr_err("Could not enable Tx Queue %d\n", reg_idx); |
| 1167 | } |
| 1168 | |
| 1169 | /** |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1170 | * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset |
| 1171 | * @adapter: board private structure |
| 1172 | * |
| 1173 | * Configure the Tx unit of the MAC after a reset. |
| 1174 | **/ |
| 1175 | static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) |
| 1176 | { |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1177 | u32 i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1178 | |
| 1179 | /* Setup the HW Tx Head and Tail descriptor pointers */ |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1180 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 1181 | ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1182 | } |
| 1183 | |
| 1184 | #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 |
| 1185 | |
| 1186 | static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index) |
| 1187 | { |
| 1188 | struct ixgbevf_ring *rx_ring; |
| 1189 | struct ixgbe_hw *hw = &adapter->hw; |
| 1190 | u32 srrctl; |
| 1191 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1192 | rx_ring = adapter->rx_ring[index]; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1193 | |
| 1194 | srrctl = IXGBE_SRRCTL_DROP_EN; |
| 1195 | |
Alexander Duyck | 77d5dfc | 2012-05-11 08:32:19 +0000 | [diff] [blame] | 1196 | srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1197 | |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1198 | srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >> |
| 1199 | IXGBE_SRRCTL_BSIZEPKT_SHIFT; |
| 1200 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1201 | IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); |
| 1202 | } |
| 1203 | |
Don Skidmore | 1bb9c63 | 2013-09-21 01:57:33 +0000 | [diff] [blame] | 1204 | static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter) |
| 1205 | { |
| 1206 | struct ixgbe_hw *hw = &adapter->hw; |
| 1207 | |
| 1208 | /* PSRTYPE must be initialized in 82599 */ |
| 1209 | u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR | |
| 1210 | IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR | |
| 1211 | IXGBE_PSRTYPE_L2HDR; |
| 1212 | |
| 1213 | if (adapter->num_rx_queues > 1) |
| 1214 | psrtype |= 1 << 29; |
| 1215 | |
| 1216 | IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); |
| 1217 | } |
| 1218 | |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1219 | static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter) |
| 1220 | { |
| 1221 | struct ixgbe_hw *hw = &adapter->hw; |
| 1222 | struct net_device *netdev = adapter->netdev; |
| 1223 | int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
| 1224 | int i; |
| 1225 | u16 rx_buf_len; |
| 1226 | |
| 1227 | /* notify the PF of our intent to use this size of frame */ |
| 1228 | ixgbevf_rlpml_set_vf(hw, max_frame); |
| 1229 | |
| 1230 | /* PF will allow an extra 4 bytes past for vlan tagged frames */ |
| 1231 | max_frame += VLAN_HLEN; |
| 1232 | |
| 1233 | /* |
Greg Rose | 85624ca | 2012-11-13 04:03:19 +0000 | [diff] [blame] | 1234 | * Allocate buffer sizes that fit well into 32K and |
| 1235 | * take into account max frame size of 9.5K |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1236 | */ |
| 1237 | if ((hw->mac.type == ixgbe_mac_X540_vf) && |
| 1238 | (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE)) |
| 1239 | rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
Greg Rose | 85624ca | 2012-11-13 04:03:19 +0000 | [diff] [blame] | 1240 | else if (max_frame <= IXGBEVF_RXBUFFER_2K) |
| 1241 | rx_buf_len = IXGBEVF_RXBUFFER_2K; |
| 1242 | else if (max_frame <= IXGBEVF_RXBUFFER_4K) |
| 1243 | rx_buf_len = IXGBEVF_RXBUFFER_4K; |
| 1244 | else if (max_frame <= IXGBEVF_RXBUFFER_8K) |
| 1245 | rx_buf_len = IXGBEVF_RXBUFFER_8K; |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1246 | else |
Greg Rose | 85624ca | 2012-11-13 04:03:19 +0000 | [diff] [blame] | 1247 | rx_buf_len = IXGBEVF_RXBUFFER_10K; |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1248 | |
| 1249 | for (i = 0; i < adapter->num_rx_queues; i++) |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1250 | adapter->rx_ring[i]->rx_buf_len = rx_buf_len; |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1251 | } |
| 1252 | |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1253 | #define IXGBEVF_MAX_RX_DESC_POLL 10 |
| 1254 | static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter, |
| 1255 | struct ixgbevf_ring *ring) |
| 1256 | { |
| 1257 | struct ixgbe_hw *hw = &adapter->hw; |
| 1258 | int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; |
| 1259 | u32 rxdctl; |
| 1260 | u8 reg_idx = ring->reg_idx; |
| 1261 | |
| 1262 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); |
| 1263 | rxdctl &= ~IXGBE_RXDCTL_ENABLE; |
| 1264 | |
| 1265 | /* write value back with RXDCTL.ENABLE bit cleared */ |
| 1266 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); |
| 1267 | |
| 1268 | /* the hardware may take up to 100us to really disable the rx queue */ |
| 1269 | do { |
| 1270 | udelay(10); |
| 1271 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); |
| 1272 | } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE)); |
| 1273 | |
| 1274 | if (!wait_loop) |
| 1275 | pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n", |
| 1276 | reg_idx); |
| 1277 | } |
| 1278 | |
| 1279 | static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, |
| 1280 | struct ixgbevf_ring *ring) |
| 1281 | { |
| 1282 | struct ixgbe_hw *hw = &adapter->hw; |
| 1283 | int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; |
| 1284 | u32 rxdctl; |
| 1285 | u8 reg_idx = ring->reg_idx; |
| 1286 | |
| 1287 | do { |
| 1288 | usleep_range(1000, 2000); |
| 1289 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); |
| 1290 | } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); |
| 1291 | |
| 1292 | if (!wait_loop) |
| 1293 | pr_err("RXDCTL.ENABLE queue %d not set while polling\n", |
| 1294 | reg_idx); |
| 1295 | } |
| 1296 | |
| 1297 | static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter, |
| 1298 | struct ixgbevf_ring *ring) |
| 1299 | { |
| 1300 | struct ixgbe_hw *hw = &adapter->hw; |
| 1301 | u64 rdba = ring->dma; |
| 1302 | u32 rxdctl; |
| 1303 | u8 reg_idx = ring->reg_idx; |
| 1304 | |
| 1305 | /* disable queue to avoid issues while updating state */ |
| 1306 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); |
| 1307 | ixgbevf_disable_rx_queue(adapter, ring); |
| 1308 | |
| 1309 | IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); |
| 1310 | IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32); |
| 1311 | IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx), |
| 1312 | ring->count * sizeof(union ixgbe_adv_rx_desc)); |
| 1313 | |
| 1314 | /* enable relaxed ordering */ |
| 1315 | IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx), |
| 1316 | IXGBE_DCA_RXCTRL_DESC_RRO_EN); |
| 1317 | |
| 1318 | /* reset head and tail pointers */ |
| 1319 | IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0); |
| 1320 | IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0); |
| 1321 | ring->tail = hw->hw_addr + IXGBE_VFRDT(reg_idx); |
| 1322 | |
| 1323 | /* reset ntu and ntc to place SW in sync with hardwdare */ |
| 1324 | ring->next_to_clean = 0; |
| 1325 | ring->next_to_use = 0; |
| 1326 | |
| 1327 | ixgbevf_configure_srrctl(adapter, reg_idx); |
| 1328 | |
| 1329 | /* prevent DMA from exceeding buffer space available */ |
| 1330 | rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK; |
| 1331 | rxdctl |= ring->rx_buf_len | IXGBE_RXDCTL_RLPML_EN; |
| 1332 | rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME; |
| 1333 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); |
| 1334 | |
| 1335 | ixgbevf_rx_desc_queue_enable(adapter, ring); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 1336 | ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring)); |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1337 | } |
| 1338 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1339 | /** |
| 1340 | * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset |
| 1341 | * @adapter: board private structure |
| 1342 | * |
| 1343 | * Configure the Rx unit of the MAC after a reset. |
| 1344 | **/ |
| 1345 | static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) |
| 1346 | { |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1347 | int i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1348 | |
Don Skidmore | 1bb9c63 | 2013-09-21 01:57:33 +0000 | [diff] [blame] | 1349 | ixgbevf_setup_psrtype(adapter); |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 1350 | |
| 1351 | /* set_rx_buffer_len must be called before ring initialization */ |
| 1352 | ixgbevf_set_rx_buffer_len(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1353 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1354 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
| 1355 | * the Base and Length of the Rx Descriptor Ring */ |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1356 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1357 | ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1358 | } |
| 1359 | |
Patrick McHardy | 80d5c36 | 2013-04-19 02:04:28 +0000 | [diff] [blame] | 1360 | static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, |
| 1361 | __be16 proto, u16 vid) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1362 | { |
| 1363 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 1364 | struct ixgbe_hw *hw = &adapter->hw; |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1365 | int err; |
| 1366 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1367 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1368 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1369 | /* add VID to filter table */ |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1370 | err = hw->mac.ops.set_vfta(hw, vid, 0, true); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1371 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1372 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1373 | |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1374 | /* translate error return types so error makes sense */ |
| 1375 | if (err == IXGBE_ERR_MBX) |
| 1376 | return -EIO; |
| 1377 | |
| 1378 | if (err == IXGBE_ERR_INVALID_ARGUMENT) |
| 1379 | return -EACCES; |
| 1380 | |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 1381 | set_bit(vid, adapter->active_vlans); |
Jiri Pirko | 8e58613 | 2011-12-08 19:52:37 -0500 | [diff] [blame] | 1382 | |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1383 | return err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1384 | } |
| 1385 | |
Patrick McHardy | 80d5c36 | 2013-04-19 02:04:28 +0000 | [diff] [blame] | 1386 | static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, |
| 1387 | __be16 proto, u16 vid) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1388 | { |
| 1389 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 1390 | struct ixgbe_hw *hw = &adapter->hw; |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1391 | int err = -EOPNOTSUPP; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1392 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1393 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1394 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1395 | /* remove VID from filter table */ |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 1396 | err = hw->mac.ops.set_vfta(hw, vid, 0, false); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1397 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1398 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1399 | |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 1400 | clear_bit(vid, adapter->active_vlans); |
Jiri Pirko | 8e58613 | 2011-12-08 19:52:37 -0500 | [diff] [blame] | 1401 | |
Alexander Duyck | 2ddc7fe | 2012-08-21 00:15:13 +0000 | [diff] [blame] | 1402 | return err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1403 | } |
| 1404 | |
| 1405 | static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) |
| 1406 | { |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 1407 | u16 vid; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1408 | |
Jiri Pirko | dadcd65 | 2011-07-21 03:25:09 +0000 | [diff] [blame] | 1409 | for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) |
Patrick McHardy | 80d5c36 | 2013-04-19 02:04:28 +0000 | [diff] [blame] | 1410 | ixgbevf_vlan_rx_add_vid(adapter->netdev, |
| 1411 | htons(ETH_P_8021Q), vid); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1412 | } |
| 1413 | |
Greg Rose | 46ec20f | 2011-05-13 01:33:42 +0000 | [diff] [blame] | 1414 | static int ixgbevf_write_uc_addr_list(struct net_device *netdev) |
| 1415 | { |
| 1416 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 1417 | struct ixgbe_hw *hw = &adapter->hw; |
| 1418 | int count = 0; |
| 1419 | |
| 1420 | if ((netdev_uc_count(netdev)) > 10) { |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 1421 | pr_err("Too many unicast filters - No Space\n"); |
Greg Rose | 46ec20f | 2011-05-13 01:33:42 +0000 | [diff] [blame] | 1422 | return -ENOSPC; |
| 1423 | } |
| 1424 | |
| 1425 | if (!netdev_uc_empty(netdev)) { |
| 1426 | struct netdev_hw_addr *ha; |
| 1427 | netdev_for_each_uc_addr(ha, netdev) { |
| 1428 | hw->mac.ops.set_uc_addr(hw, ++count, ha->addr); |
| 1429 | udelay(200); |
| 1430 | } |
| 1431 | } else { |
| 1432 | /* |
| 1433 | * If the list is empty then send message to PF driver to |
| 1434 | * clear all macvlans on this VF. |
| 1435 | */ |
| 1436 | hw->mac.ops.set_uc_addr(hw, 0, NULL); |
| 1437 | } |
| 1438 | |
| 1439 | return count; |
| 1440 | } |
| 1441 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1442 | /** |
Greg Rose | dee847f | 2012-11-02 05:50:57 +0000 | [diff] [blame] | 1443 | * ixgbevf_set_rx_mode - Multicast and unicast set |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1444 | * @netdev: network interface device structure |
| 1445 | * |
| 1446 | * The set_rx_method entry point is called whenever the multicast address |
Greg Rose | dee847f | 2012-11-02 05:50:57 +0000 | [diff] [blame] | 1447 | * list, unicast address list or the network interface flags are updated. |
| 1448 | * This routine is responsible for configuring the hardware for proper |
| 1449 | * multicast mode and configuring requested unicast filters. |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1450 | **/ |
| 1451 | static void ixgbevf_set_rx_mode(struct net_device *netdev) |
| 1452 | { |
| 1453 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 1454 | struct ixgbe_hw *hw = &adapter->hw; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1455 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1456 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1457 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1458 | /* reprogram multicast list */ |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 1459 | hw->mac.ops.update_mc_addr_list(hw, netdev); |
Greg Rose | 46ec20f | 2011-05-13 01:33:42 +0000 | [diff] [blame] | 1460 | |
| 1461 | ixgbevf_write_uc_addr_list(netdev); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1462 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1463 | spin_unlock_bh(&adapter->mbx_lock); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1464 | } |
| 1465 | |
| 1466 | static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) |
| 1467 | { |
| 1468 | int q_idx; |
| 1469 | struct ixgbevf_q_vector *q_vector; |
| 1470 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
| 1471 | |
| 1472 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1473 | q_vector = adapter->q_vector[q_idx]; |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 1474 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 1475 | ixgbevf_qv_init_lock(adapter->q_vector[q_idx]); |
| 1476 | #endif |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1477 | napi_enable(&q_vector->napi); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1478 | } |
| 1479 | } |
| 1480 | |
| 1481 | static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) |
| 1482 | { |
| 1483 | int q_idx; |
| 1484 | struct ixgbevf_q_vector *q_vector; |
| 1485 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
| 1486 | |
| 1487 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { |
| 1488 | q_vector = adapter->q_vector[q_idx]; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1489 | napi_disable(&q_vector->napi); |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 1490 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 1491 | while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) { |
| 1492 | pr_info("QV %d locked\n", q_idx); |
| 1493 | usleep_range(1000, 20000); |
| 1494 | } |
| 1495 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1496 | } |
| 1497 | } |
| 1498 | |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 1499 | static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter) |
| 1500 | { |
| 1501 | struct ixgbe_hw *hw = &adapter->hw; |
| 1502 | unsigned int def_q = 0; |
| 1503 | unsigned int num_tcs = 0; |
| 1504 | unsigned int num_rx_queues = 1; |
| 1505 | int err; |
| 1506 | |
| 1507 | spin_lock_bh(&adapter->mbx_lock); |
| 1508 | |
| 1509 | /* fetch queue configuration from the PF */ |
| 1510 | err = ixgbevf_get_queues(hw, &num_tcs, &def_q); |
| 1511 | |
| 1512 | spin_unlock_bh(&adapter->mbx_lock); |
| 1513 | |
| 1514 | if (err) |
| 1515 | return err; |
| 1516 | |
| 1517 | if (num_tcs > 1) { |
| 1518 | /* update default Tx ring register index */ |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1519 | adapter->tx_ring[0]->reg_idx = def_q; |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 1520 | |
| 1521 | /* we need as many queues as traffic classes */ |
| 1522 | num_rx_queues = num_tcs; |
| 1523 | } |
| 1524 | |
| 1525 | /* if we have a bad config abort request queue reset */ |
| 1526 | if (adapter->num_rx_queues != num_rx_queues) { |
| 1527 | /* force mailbox timeout to prevent further messages */ |
| 1528 | hw->mbx.timeout = 0; |
| 1529 | |
| 1530 | /* wait for watchdog to come around and bail us out */ |
| 1531 | adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED; |
| 1532 | } |
| 1533 | |
| 1534 | return 0; |
| 1535 | } |
| 1536 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1537 | static void ixgbevf_configure(struct ixgbevf_adapter *adapter) |
| 1538 | { |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 1539 | ixgbevf_configure_dcb(adapter); |
| 1540 | |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1541 | ixgbevf_set_rx_mode(adapter->netdev); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1542 | |
| 1543 | ixgbevf_restore_vlan(adapter); |
| 1544 | |
| 1545 | ixgbevf_configure_tx(adapter); |
| 1546 | ixgbevf_configure_rx(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1547 | } |
| 1548 | |
Greg Rose | 33bd9f6 | 2010-03-19 02:59:52 +0000 | [diff] [blame] | 1549 | static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) |
| 1550 | { |
| 1551 | /* Only save pre-reset stats if there are some */ |
| 1552 | if (adapter->stats.vfgprc || adapter->stats.vfgptc) { |
| 1553 | adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - |
| 1554 | adapter->stats.base_vfgprc; |
| 1555 | adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - |
| 1556 | adapter->stats.base_vfgptc; |
| 1557 | adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - |
| 1558 | adapter->stats.base_vfgorc; |
| 1559 | adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - |
| 1560 | adapter->stats.base_vfgotc; |
| 1561 | adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - |
| 1562 | adapter->stats.base_vfmprc; |
| 1563 | } |
| 1564 | } |
| 1565 | |
| 1566 | static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) |
| 1567 | { |
| 1568 | struct ixgbe_hw *hw = &adapter->hw; |
| 1569 | |
| 1570 | adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); |
| 1571 | adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); |
| 1572 | adapter->stats.last_vfgorc |= |
| 1573 | (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); |
| 1574 | adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); |
| 1575 | adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); |
| 1576 | adapter->stats.last_vfgotc |= |
| 1577 | (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); |
| 1578 | adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); |
| 1579 | |
| 1580 | adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; |
| 1581 | adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; |
| 1582 | adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; |
| 1583 | adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; |
| 1584 | adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; |
| 1585 | } |
| 1586 | |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 1587 | static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter) |
| 1588 | { |
| 1589 | struct ixgbe_hw *hw = &adapter->hw; |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 1590 | int api[] = { ixgbe_mbox_api_11, |
| 1591 | ixgbe_mbox_api_10, |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 1592 | ixgbe_mbox_api_unknown }; |
| 1593 | int err = 0, idx = 0; |
| 1594 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1595 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 1596 | |
| 1597 | while (api[idx] != ixgbe_mbox_api_unknown) { |
| 1598 | err = ixgbevf_negotiate_api_version(hw, api[idx]); |
| 1599 | if (!err) |
| 1600 | break; |
| 1601 | idx++; |
| 1602 | } |
| 1603 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1604 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 1605 | } |
| 1606 | |
Greg Rose | 795180d | 2012-04-17 04:29:34 +0000 | [diff] [blame] | 1607 | static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1608 | { |
| 1609 | struct net_device *netdev = adapter->netdev; |
| 1610 | struct ixgbe_hw *hw = &adapter->hw; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1611 | |
| 1612 | ixgbevf_configure_msix(adapter); |
| 1613 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1614 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1615 | |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 1616 | if (is_valid_ether_addr(hw->mac.addr)) |
| 1617 | hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); |
| 1618 | else |
| 1619 | hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1620 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 1621 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 1622 | |
Mark Rustad | 5b346dc | 2014-03-04 03:02:18 +0000 | [diff] [blame] | 1623 | smp_mb__before_clear_bit(); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1624 | clear_bit(__IXGBEVF_DOWN, &adapter->state); |
| 1625 | ixgbevf_napi_enable_all(adapter); |
| 1626 | |
| 1627 | /* enable transmits */ |
| 1628 | netif_tx_start_all_queues(netdev); |
| 1629 | |
Greg Rose | 33bd9f6 | 2010-03-19 02:59:52 +0000 | [diff] [blame] | 1630 | ixgbevf_save_reset_stats(adapter); |
| 1631 | ixgbevf_init_last_counter_stats(adapter); |
| 1632 | |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 1633 | hw->mac.get_link_status = 1; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1634 | mod_timer(&adapter->watchdog_timer, jiffies); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1635 | } |
| 1636 | |
Greg Rose | 795180d | 2012-04-17 04:29:34 +0000 | [diff] [blame] | 1637 | void ixgbevf_up(struct ixgbevf_adapter *adapter) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1638 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1639 | struct ixgbe_hw *hw = &adapter->hw; |
| 1640 | |
| 1641 | ixgbevf_configure(adapter); |
| 1642 | |
Greg Rose | 795180d | 2012-04-17 04:29:34 +0000 | [diff] [blame] | 1643 | ixgbevf_up_complete(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1644 | |
| 1645 | /* clear any pending interrupts, may auto mask */ |
| 1646 | IXGBE_READ_REG(hw, IXGBE_VTEICR); |
| 1647 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 1648 | ixgbevf_irq_enable(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1649 | } |
| 1650 | |
| 1651 | /** |
| 1652 | * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1653 | * @rx_ring: ring to free buffers from |
| 1654 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 1655 | static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1656 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1657 | unsigned long size; |
| 1658 | unsigned int i; |
| 1659 | |
Greg Rose | c0456c2 | 2010-01-22 22:47:18 +0000 | [diff] [blame] | 1660 | if (!rx_ring->rx_buffer_info) |
| 1661 | return; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1662 | |
Greg Rose | c0456c2 | 2010-01-22 22:47:18 +0000 | [diff] [blame] | 1663 | /* Free all the Rx ring sk_buffs */ |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1664 | for (i = 0; i < rx_ring->count; i++) { |
| 1665 | struct ixgbevf_rx_buffer *rx_buffer_info; |
| 1666 | |
| 1667 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; |
| 1668 | if (rx_buffer_info->dma) { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 1669 | dma_unmap_single(rx_ring->dev, rx_buffer_info->dma, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1670 | rx_ring->rx_buf_len, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 1671 | DMA_FROM_DEVICE); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1672 | rx_buffer_info->dma = 0; |
| 1673 | } |
| 1674 | if (rx_buffer_info->skb) { |
| 1675 | struct sk_buff *skb = rx_buffer_info->skb; |
| 1676 | rx_buffer_info->skb = NULL; |
| 1677 | do { |
| 1678 | struct sk_buff *this = skb; |
Alexander Duyck | 5c60f81 | 2012-09-01 05:12:38 +0000 | [diff] [blame] | 1679 | skb = IXGBE_CB(skb)->prev; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1680 | dev_kfree_skb(this); |
| 1681 | } while (skb); |
| 1682 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1683 | } |
| 1684 | |
| 1685 | size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; |
| 1686 | memset(rx_ring->rx_buffer_info, 0, size); |
| 1687 | |
| 1688 | /* Zero out the descriptor ring */ |
| 1689 | memset(rx_ring->desc, 0, rx_ring->size); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1690 | } |
| 1691 | |
| 1692 | /** |
| 1693 | * ixgbevf_clean_tx_ring - Free Tx Buffers |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1694 | * @tx_ring: ring to be cleaned |
| 1695 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 1696 | static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1697 | { |
| 1698 | struct ixgbevf_tx_buffer *tx_buffer_info; |
| 1699 | unsigned long size; |
| 1700 | unsigned int i; |
| 1701 | |
Greg Rose | c0456c2 | 2010-01-22 22:47:18 +0000 | [diff] [blame] | 1702 | if (!tx_ring->tx_buffer_info) |
| 1703 | return; |
| 1704 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1705 | /* Free all the Tx ring sk_buffs */ |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1706 | for (i = 0; i < tx_ring->count; i++) { |
| 1707 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 1708 | ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1709 | } |
| 1710 | |
| 1711 | size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; |
| 1712 | memset(tx_ring->tx_buffer_info, 0, size); |
| 1713 | |
| 1714 | memset(tx_ring->desc, 0, tx_ring->size); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1715 | } |
| 1716 | |
| 1717 | /** |
| 1718 | * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues |
| 1719 | * @adapter: board private structure |
| 1720 | **/ |
| 1721 | static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) |
| 1722 | { |
| 1723 | int i; |
| 1724 | |
| 1725 | for (i = 0; i < adapter->num_rx_queues; i++) |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 1726 | ixgbevf_clean_rx_ring(adapter->rx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1727 | } |
| 1728 | |
| 1729 | /** |
| 1730 | * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues |
| 1731 | * @adapter: board private structure |
| 1732 | **/ |
| 1733 | static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) |
| 1734 | { |
| 1735 | int i; |
| 1736 | |
| 1737 | for (i = 0; i < adapter->num_tx_queues; i++) |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 1738 | ixgbevf_clean_tx_ring(adapter->tx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1739 | } |
| 1740 | |
| 1741 | void ixgbevf_down(struct ixgbevf_adapter *adapter) |
| 1742 | { |
| 1743 | struct net_device *netdev = adapter->netdev; |
| 1744 | struct ixgbe_hw *hw = &adapter->hw; |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1745 | int i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1746 | |
| 1747 | /* signal that we are down to the interrupt handler */ |
Mark Rustad | 5b346dc | 2014-03-04 03:02:18 +0000 | [diff] [blame] | 1748 | if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state)) |
| 1749 | return; /* do nothing if already down */ |
Don Skidmore | 858c3dd | 2013-10-01 04:33:50 -0700 | [diff] [blame] | 1750 | |
| 1751 | /* disable all enabled rx queues */ |
| 1752 | for (i = 0; i < adapter->num_rx_queues; i++) |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1753 | ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1754 | |
| 1755 | netif_tx_disable(netdev); |
| 1756 | |
| 1757 | msleep(10); |
| 1758 | |
| 1759 | netif_tx_stop_all_queues(netdev); |
| 1760 | |
| 1761 | ixgbevf_irq_disable(adapter); |
| 1762 | |
| 1763 | ixgbevf_napi_disable_all(adapter); |
| 1764 | |
| 1765 | del_timer_sync(&adapter->watchdog_timer); |
| 1766 | /* can't call flush scheduled work here because it can deadlock |
| 1767 | * if linkwatch_event tries to acquire the rtnl_lock which we are |
| 1768 | * holding */ |
| 1769 | while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK) |
| 1770 | msleep(1); |
| 1771 | |
| 1772 | /* disable transmits in the hardware now that interrupts are off */ |
| 1773 | for (i = 0; i < adapter->num_tx_queues; i++) { |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 1774 | u8 reg_idx = adapter->tx_ring[i]->reg_idx; |
| 1775 | |
| 1776 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), |
| 1777 | IXGBE_TXDCTL_SWFLSH); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1778 | } |
| 1779 | |
| 1780 | netif_carrier_off(netdev); |
| 1781 | |
| 1782 | if (!pci_channel_offline(adapter->pdev)) |
| 1783 | ixgbevf_reset(adapter); |
| 1784 | |
| 1785 | ixgbevf_clean_all_tx_rings(adapter); |
| 1786 | ixgbevf_clean_all_rx_rings(adapter); |
| 1787 | } |
| 1788 | |
| 1789 | void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) |
| 1790 | { |
| 1791 | WARN_ON(in_interrupt()); |
Greg Rose | c0456c2 | 2010-01-22 22:47:18 +0000 | [diff] [blame] | 1792 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1793 | while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) |
| 1794 | msleep(1); |
| 1795 | |
Alexander Duyck | 4b2cd27 | 2012-08-02 01:16:59 +0000 | [diff] [blame] | 1796 | ixgbevf_down(adapter); |
| 1797 | ixgbevf_up(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1798 | |
| 1799 | clear_bit(__IXGBEVF_RESETTING, &adapter->state); |
| 1800 | } |
| 1801 | |
| 1802 | void ixgbevf_reset(struct ixgbevf_adapter *adapter) |
| 1803 | { |
| 1804 | struct ixgbe_hw *hw = &adapter->hw; |
| 1805 | struct net_device *netdev = adapter->netdev; |
| 1806 | |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 1807 | if (hw->mac.ops.reset_hw(hw)) { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1808 | hw_dbg(hw, "PF still resetting\n"); |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 1809 | } else { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1810 | hw->mac.ops.init_hw(hw); |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 1811 | ixgbevf_negotiate_api(adapter); |
| 1812 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1813 | |
| 1814 | if (is_valid_ether_addr(adapter->hw.mac.addr)) { |
| 1815 | memcpy(netdev->dev_addr, adapter->hw.mac.addr, |
| 1816 | netdev->addr_len); |
| 1817 | memcpy(netdev->perm_addr, adapter->hw.mac.addr, |
| 1818 | netdev->addr_len); |
| 1819 | } |
| 1820 | } |
| 1821 | |
Jakub Kicinski | e45dd5f | 2012-11-13 04:03:16 +0000 | [diff] [blame] | 1822 | static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, |
| 1823 | int vectors) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1824 | { |
Emil Tantilov | a5f9337 | 2012-11-13 04:03:17 +0000 | [diff] [blame] | 1825 | int vector_threshold; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1826 | |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1827 | /* We'll want at least 2 (vector_threshold): |
| 1828 | * 1) TxQ[0] + RxQ[0] handler |
| 1829 | * 2) Other (Link Status Change, etc.) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1830 | */ |
| 1831 | vector_threshold = MIN_MSIX_COUNT; |
| 1832 | |
| 1833 | /* The more we get, the more we will assign to Tx/Rx Cleanup |
| 1834 | * for the separate queues...where Rx Cleanup >= Tx Cleanup. |
| 1835 | * Right now, we simply care about how many we'll get; we'll |
| 1836 | * set them up later while requesting irq's. |
| 1837 | */ |
Alexander Gordeev | 5c1e3588 | 2014-02-18 11:11:46 +0100 | [diff] [blame] | 1838 | vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries, |
| 1839 | vector_threshold, vectors); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1840 | |
Alexander Gordeev | 5c1e3588 | 2014-02-18 11:11:46 +0100 | [diff] [blame] | 1841 | if (vectors < 0) { |
Jakub Kicinski | e45dd5f | 2012-11-13 04:03:16 +0000 | [diff] [blame] | 1842 | dev_err(&adapter->pdev->dev, |
| 1843 | "Unable to allocate MSI-X interrupts\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1844 | kfree(adapter->msix_entries); |
| 1845 | adapter->msix_entries = NULL; |
Alexander Gordeev | 5c1e3588 | 2014-02-18 11:11:46 +0100 | [diff] [blame] | 1846 | return vectors; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1847 | } |
Greg Rose | dee847f | 2012-11-02 05:50:57 +0000 | [diff] [blame] | 1848 | |
Alexander Gordeev | 5c1e3588 | 2014-02-18 11:11:46 +0100 | [diff] [blame] | 1849 | /* Adjust for only the vectors we'll use, which is minimum |
| 1850 | * of max_msix_q_vectors + NON_Q_VECTORS, or the number of |
| 1851 | * vectors we were allocated. |
| 1852 | */ |
| 1853 | adapter->num_msix_vectors = vectors; |
| 1854 | |
| 1855 | return 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1856 | } |
| 1857 | |
Ben Hutchings | 49ce9c2 | 2012-07-10 10:56:00 +0000 | [diff] [blame] | 1858 | /** |
| 1859 | * ixgbevf_set_num_queues - Allocate queues for device, feature dependent |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1860 | * @adapter: board private structure to initialize |
| 1861 | * |
| 1862 | * This is the top level queue allocation routine. The order here is very |
| 1863 | * important, starting with the "most" number of features turned on at once, |
| 1864 | * and ending with the smallest set of features. This way large combinations |
| 1865 | * can be allocated if they're turned on, and smaller combinations are the |
| 1866 | * fallthrough conditions. |
| 1867 | * |
| 1868 | **/ |
| 1869 | static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) |
| 1870 | { |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 1871 | struct ixgbe_hw *hw = &adapter->hw; |
| 1872 | unsigned int def_q = 0; |
| 1873 | unsigned int num_tcs = 0; |
| 1874 | int err; |
| 1875 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1876 | /* Start with base case */ |
| 1877 | adapter->num_rx_queues = 1; |
| 1878 | adapter->num_tx_queues = 1; |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 1879 | |
| 1880 | spin_lock_bh(&adapter->mbx_lock); |
| 1881 | |
| 1882 | /* fetch queue configuration from the PF */ |
| 1883 | err = ixgbevf_get_queues(hw, &num_tcs, &def_q); |
| 1884 | |
| 1885 | spin_unlock_bh(&adapter->mbx_lock); |
| 1886 | |
| 1887 | if (err) |
| 1888 | return; |
| 1889 | |
| 1890 | /* we need as many queues as traffic classes */ |
| 1891 | if (num_tcs > 1) |
| 1892 | adapter->num_rx_queues = num_tcs; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1893 | } |
| 1894 | |
| 1895 | /** |
| 1896 | * ixgbevf_alloc_queues - Allocate memory for all rings |
| 1897 | * @adapter: board private structure to initialize |
| 1898 | * |
| 1899 | * We allocate one ring per queue at run-time since we don't know the |
| 1900 | * number of queues at compile-time. The polling_netdev array is |
| 1901 | * intended for Multiqueue, but should work fine with a single queue. |
| 1902 | **/ |
| 1903 | static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter) |
| 1904 | { |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1905 | struct ixgbevf_ring *ring; |
| 1906 | int rx = 0, tx = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1907 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1908 | for (; tx < adapter->num_tx_queues; tx++) { |
| 1909 | ring = kzalloc(sizeof(*ring), GFP_KERNEL); |
| 1910 | if (!ring) |
| 1911 | goto err_allocation; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1912 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1913 | ring->dev = &adapter->pdev->dev; |
| 1914 | ring->netdev = adapter->netdev; |
| 1915 | ring->count = adapter->tx_ring_count; |
| 1916 | ring->queue_index = tx; |
| 1917 | ring->reg_idx = tx; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1918 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1919 | adapter->tx_ring[tx] = ring; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1920 | } |
| 1921 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1922 | for (; rx < adapter->num_rx_queues; rx++) { |
| 1923 | ring = kzalloc(sizeof(*ring), GFP_KERNEL); |
| 1924 | if (!ring) |
| 1925 | goto err_allocation; |
| 1926 | |
| 1927 | ring->dev = &adapter->pdev->dev; |
| 1928 | ring->netdev = adapter->netdev; |
| 1929 | |
| 1930 | ring->count = adapter->rx_ring_count; |
| 1931 | ring->queue_index = rx; |
| 1932 | ring->reg_idx = rx; |
| 1933 | |
| 1934 | adapter->rx_ring[rx] = ring; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1935 | } |
| 1936 | |
| 1937 | return 0; |
| 1938 | |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 1939 | err_allocation: |
| 1940 | while (tx) { |
| 1941 | kfree(adapter->tx_ring[--tx]); |
| 1942 | adapter->tx_ring[tx] = NULL; |
| 1943 | } |
| 1944 | |
| 1945 | while (rx) { |
| 1946 | kfree(adapter->rx_ring[--rx]); |
| 1947 | adapter->rx_ring[rx] = NULL; |
| 1948 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1949 | return -ENOMEM; |
| 1950 | } |
| 1951 | |
| 1952 | /** |
| 1953 | * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported |
| 1954 | * @adapter: board private structure to initialize |
| 1955 | * |
| 1956 | * Attempt to configure the interrupts using the best available |
| 1957 | * capabilities of the hardware and the kernel. |
| 1958 | **/ |
| 1959 | static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) |
| 1960 | { |
Greg Rose | 91e2b89 | 2012-10-03 00:57:23 +0000 | [diff] [blame] | 1961 | struct net_device *netdev = adapter->netdev; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1962 | int err = 0; |
| 1963 | int vector, v_budget; |
| 1964 | |
| 1965 | /* |
| 1966 | * It's easy to be greedy for MSI-X vectors, but it really |
| 1967 | * doesn't do us much good if we have a lot more vectors |
| 1968 | * than CPU's. So let's be conservative and only ask for |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1969 | * (roughly) the same number of vectors as there are CPU's. |
| 1970 | * The default is to use pairs of vectors. |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1971 | */ |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 1972 | v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues); |
| 1973 | v_budget = min_t(int, v_budget, num_online_cpus()); |
| 1974 | v_budget += NON_Q_VECTORS; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1975 | |
| 1976 | /* A failure in MSI-X entry allocation isn't fatal, but it does |
| 1977 | * mean we disable MSI-X capabilities of the adapter. */ |
| 1978 | adapter->msix_entries = kcalloc(v_budget, |
| 1979 | sizeof(struct msix_entry), GFP_KERNEL); |
| 1980 | if (!adapter->msix_entries) { |
| 1981 | err = -ENOMEM; |
| 1982 | goto out; |
| 1983 | } |
| 1984 | |
| 1985 | for (vector = 0; vector < v_budget; vector++) |
| 1986 | adapter->msix_entries[vector].entry = vector; |
| 1987 | |
Jakub Kicinski | e45dd5f | 2012-11-13 04:03:16 +0000 | [diff] [blame] | 1988 | err = ixgbevf_acquire_msix_vectors(adapter, v_budget); |
| 1989 | if (err) |
| 1990 | goto out; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1991 | |
Greg Rose | 91e2b89 | 2012-10-03 00:57:23 +0000 | [diff] [blame] | 1992 | err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues); |
| 1993 | if (err) |
| 1994 | goto out; |
| 1995 | |
| 1996 | err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues); |
| 1997 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 1998 | out: |
| 1999 | return err; |
| 2000 | } |
| 2001 | |
| 2002 | /** |
| 2003 | * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors |
| 2004 | * @adapter: board private structure to initialize |
| 2005 | * |
| 2006 | * We allocate one q_vector per queue interrupt. If allocation fails we |
| 2007 | * return -ENOMEM. |
| 2008 | **/ |
| 2009 | static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) |
| 2010 | { |
| 2011 | int q_idx, num_q_vectors; |
| 2012 | struct ixgbevf_q_vector *q_vector; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2013 | |
| 2014 | num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2015 | |
| 2016 | for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { |
| 2017 | q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL); |
| 2018 | if (!q_vector) |
| 2019 | goto err_out; |
| 2020 | q_vector->adapter = adapter; |
| 2021 | q_vector->v_idx = q_idx; |
Alexander Duyck | fa71ae2 | 2012-05-11 08:32:50 +0000 | [diff] [blame] | 2022 | netif_napi_add(adapter->netdev, &q_vector->napi, |
| 2023 | ixgbevf_poll, 64); |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 2024 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 2025 | napi_hash_add(&q_vector->napi); |
| 2026 | #endif |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2027 | adapter->q_vector[q_idx] = q_vector; |
| 2028 | } |
| 2029 | |
| 2030 | return 0; |
| 2031 | |
| 2032 | err_out: |
| 2033 | while (q_idx) { |
| 2034 | q_idx--; |
| 2035 | q_vector = adapter->q_vector[q_idx]; |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 2036 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 2037 | napi_hash_del(&q_vector->napi); |
| 2038 | #endif |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2039 | netif_napi_del(&q_vector->napi); |
| 2040 | kfree(q_vector); |
| 2041 | adapter->q_vector[q_idx] = NULL; |
| 2042 | } |
| 2043 | return -ENOMEM; |
| 2044 | } |
| 2045 | |
| 2046 | /** |
| 2047 | * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors |
| 2048 | * @adapter: board private structure to initialize |
| 2049 | * |
| 2050 | * This function frees the memory allocated to the q_vectors. In addition if |
| 2051 | * NAPI is enabled it will delete any references to the NAPI struct prior |
| 2052 | * to freeing the q_vector. |
| 2053 | **/ |
| 2054 | static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) |
| 2055 | { |
John Fastabend | f447770 | 2012-09-16 08:19:46 +0000 | [diff] [blame] | 2056 | int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2057 | |
| 2058 | for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { |
| 2059 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx]; |
| 2060 | |
| 2061 | adapter->q_vector[q_idx] = NULL; |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 2062 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 2063 | napi_hash_del(&q_vector->napi); |
| 2064 | #endif |
John Fastabend | f447770 | 2012-09-16 08:19:46 +0000 | [diff] [blame] | 2065 | netif_napi_del(&q_vector->napi); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2066 | kfree(q_vector); |
| 2067 | } |
| 2068 | } |
| 2069 | |
| 2070 | /** |
| 2071 | * ixgbevf_reset_interrupt_capability - Reset MSIX setup |
| 2072 | * @adapter: board private structure |
| 2073 | * |
| 2074 | **/ |
| 2075 | static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) |
| 2076 | { |
| 2077 | pci_disable_msix(adapter->pdev); |
| 2078 | kfree(adapter->msix_entries); |
| 2079 | adapter->msix_entries = NULL; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2080 | } |
| 2081 | |
| 2082 | /** |
| 2083 | * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init |
| 2084 | * @adapter: board private structure to initialize |
| 2085 | * |
| 2086 | **/ |
| 2087 | static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) |
| 2088 | { |
| 2089 | int err; |
| 2090 | |
| 2091 | /* Number of supported queues */ |
| 2092 | ixgbevf_set_num_queues(adapter); |
| 2093 | |
| 2094 | err = ixgbevf_set_interrupt_capability(adapter); |
| 2095 | if (err) { |
| 2096 | hw_dbg(&adapter->hw, |
| 2097 | "Unable to setup interrupt capabilities\n"); |
| 2098 | goto err_set_interrupt; |
| 2099 | } |
| 2100 | |
| 2101 | err = ixgbevf_alloc_q_vectors(adapter); |
| 2102 | if (err) { |
| 2103 | hw_dbg(&adapter->hw, "Unable to allocate memory for queue " |
| 2104 | "vectors\n"); |
| 2105 | goto err_alloc_q_vectors; |
| 2106 | } |
| 2107 | |
| 2108 | err = ixgbevf_alloc_queues(adapter); |
| 2109 | if (err) { |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 2110 | pr_err("Unable to allocate memory for queues\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2111 | goto err_alloc_queues; |
| 2112 | } |
| 2113 | |
| 2114 | hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, " |
| 2115 | "Tx Queue count = %u\n", |
| 2116 | (adapter->num_rx_queues > 1) ? "Enabled" : |
| 2117 | "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); |
| 2118 | |
| 2119 | set_bit(__IXGBEVF_DOWN, &adapter->state); |
| 2120 | |
| 2121 | return 0; |
| 2122 | err_alloc_queues: |
| 2123 | ixgbevf_free_q_vectors(adapter); |
| 2124 | err_alloc_q_vectors: |
| 2125 | ixgbevf_reset_interrupt_capability(adapter); |
| 2126 | err_set_interrupt: |
| 2127 | return err; |
| 2128 | } |
| 2129 | |
| 2130 | /** |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 2131 | * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings |
| 2132 | * @adapter: board private structure to clear interrupt scheme on |
| 2133 | * |
| 2134 | * We go through and clear interrupt specific resources and reset the structure |
| 2135 | * to pre-load conditions |
| 2136 | **/ |
| 2137 | static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter) |
| 2138 | { |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 2139 | int i; |
| 2140 | |
| 2141 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 2142 | kfree(adapter->tx_ring[i]); |
| 2143 | adapter->tx_ring[i] = NULL; |
| 2144 | } |
| 2145 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 2146 | kfree(adapter->rx_ring[i]); |
| 2147 | adapter->rx_ring[i] = NULL; |
| 2148 | } |
| 2149 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 2150 | adapter->num_tx_queues = 0; |
| 2151 | adapter->num_rx_queues = 0; |
| 2152 | |
| 2153 | ixgbevf_free_q_vectors(adapter); |
| 2154 | ixgbevf_reset_interrupt_capability(adapter); |
| 2155 | } |
| 2156 | |
| 2157 | /** |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2158 | * ixgbevf_sw_init - Initialize general software structures |
| 2159 | * (struct ixgbevf_adapter) |
| 2160 | * @adapter: board private structure to initialize |
| 2161 | * |
| 2162 | * ixgbevf_sw_init initializes the Adapter private data structure. |
| 2163 | * Fields are initialized based on PCI device information and |
| 2164 | * OS network device settings (MTU size). |
| 2165 | **/ |
Bill Pemberton | 9f9a12f | 2012-12-03 09:24:25 -0500 | [diff] [blame] | 2166 | static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2167 | { |
| 2168 | struct ixgbe_hw *hw = &adapter->hw; |
| 2169 | struct pci_dev *pdev = adapter->pdev; |
Greg Rose | e1941a7 | 2013-02-13 03:02:05 +0000 | [diff] [blame] | 2170 | struct net_device *netdev = adapter->netdev; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2171 | int err; |
| 2172 | |
| 2173 | /* PCI config space info */ |
| 2174 | |
| 2175 | hw->vendor_id = pdev->vendor; |
| 2176 | hw->device_id = pdev->device; |
Sergei Shtylyov | ff938e4 | 2011-02-28 11:57:33 -0800 | [diff] [blame] | 2177 | hw->revision_id = pdev->revision; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2178 | hw->subsystem_vendor_id = pdev->subsystem_vendor; |
| 2179 | hw->subsystem_device_id = pdev->subsystem_device; |
| 2180 | |
| 2181 | hw->mbx.ops.init_params(hw); |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 2182 | |
| 2183 | /* assume legacy case in which PF would only give VF 2 queues */ |
| 2184 | hw->mac.max_tx_queues = 2; |
| 2185 | hw->mac.max_rx_queues = 2; |
| 2186 | |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 2187 | /* lock to protect mailbox accesses */ |
| 2188 | spin_lock_init(&adapter->mbx_lock); |
| 2189 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2190 | err = hw->mac.ops.reset_hw(hw); |
| 2191 | if (err) { |
| 2192 | dev_info(&pdev->dev, |
Greg Rose | e1941a7 | 2013-02-13 03:02:05 +0000 | [diff] [blame] | 2193 | "PF still in reset state. Is the PF interface up?\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2194 | } else { |
| 2195 | err = hw->mac.ops.init_hw(hw); |
| 2196 | if (err) { |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 2197 | pr_err("init_shared_code failed: %d\n", err); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2198 | goto out; |
| 2199 | } |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 2200 | ixgbevf_negotiate_api(adapter); |
Greg Rose | e1941a7 | 2013-02-13 03:02:05 +0000 | [diff] [blame] | 2201 | err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr); |
| 2202 | if (err) |
| 2203 | dev_info(&pdev->dev, "Error reading MAC address\n"); |
| 2204 | else if (is_zero_ether_addr(adapter->hw.mac.addr)) |
| 2205 | dev_info(&pdev->dev, |
| 2206 | "MAC address not assigned by administrator.\n"); |
| 2207 | memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); |
| 2208 | } |
| 2209 | |
| 2210 | if (!is_valid_ether_addr(netdev->dev_addr)) { |
| 2211 | dev_info(&pdev->dev, "Assigning random MAC address\n"); |
| 2212 | eth_hw_addr_random(netdev); |
| 2213 | memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2214 | } |
| 2215 | |
| 2216 | /* Enable dynamic interrupt throttling rates */ |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 2217 | adapter->rx_itr_setting = 1; |
| 2218 | adapter->tx_itr_setting = 1; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2219 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2220 | /* set default ring sizes */ |
| 2221 | adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; |
| 2222 | adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; |
| 2223 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2224 | set_bit(__IXGBEVF_DOWN, &adapter->state); |
Danny Kukawka | 1a0d6ae | 2012-02-09 09:48:54 +0000 | [diff] [blame] | 2225 | return 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2226 | |
| 2227 | out: |
| 2228 | return err; |
| 2229 | } |
| 2230 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2231 | #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ |
| 2232 | { \ |
| 2233 | u32 current_counter = IXGBE_READ_REG(hw, reg); \ |
| 2234 | if (current_counter < last_counter) \ |
| 2235 | counter += 0x100000000LL; \ |
| 2236 | last_counter = current_counter; \ |
| 2237 | counter &= 0xFFFFFFFF00000000LL; \ |
| 2238 | counter |= current_counter; \ |
| 2239 | } |
| 2240 | |
| 2241 | #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ |
| 2242 | { \ |
| 2243 | u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ |
| 2244 | u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ |
| 2245 | u64 current_counter = (current_counter_msb << 32) | \ |
| 2246 | current_counter_lsb; \ |
| 2247 | if (current_counter < last_counter) \ |
| 2248 | counter += 0x1000000000LL; \ |
| 2249 | last_counter = current_counter; \ |
| 2250 | counter &= 0xFFFFFFF000000000LL; \ |
| 2251 | counter |= current_counter; \ |
| 2252 | } |
| 2253 | /** |
| 2254 | * ixgbevf_update_stats - Update the board statistics counters. |
| 2255 | * @adapter: board private structure |
| 2256 | **/ |
| 2257 | void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) |
| 2258 | { |
| 2259 | struct ixgbe_hw *hw = &adapter->hw; |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 2260 | int i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2261 | |
Greg Rose | 088245a | 2013-01-04 07:37:31 +0000 | [diff] [blame] | 2262 | if (!adapter->link_up) |
| 2263 | return; |
| 2264 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2265 | UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, |
| 2266 | adapter->stats.vfgprc); |
| 2267 | UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, |
| 2268 | adapter->stats.vfgptc); |
| 2269 | UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, |
| 2270 | adapter->stats.last_vfgorc, |
| 2271 | adapter->stats.vfgorc); |
| 2272 | UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, |
| 2273 | adapter->stats.last_vfgotc, |
| 2274 | adapter->stats.vfgotc); |
| 2275 | UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, |
| 2276 | adapter->stats.vfmprc); |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 2277 | |
| 2278 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 2279 | adapter->hw_csum_rx_error += |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 2280 | adapter->rx_ring[i]->hw_csum_rx_error; |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 2281 | adapter->rx_ring[i]->hw_csum_rx_error = 0; |
Greg Rose | 55fb277 | 2012-11-06 05:53:32 +0000 | [diff] [blame] | 2282 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2283 | } |
| 2284 | |
| 2285 | /** |
| 2286 | * ixgbevf_watchdog - Timer Call-back |
| 2287 | * @data: pointer to adapter cast into an unsigned long |
| 2288 | **/ |
| 2289 | static void ixgbevf_watchdog(unsigned long data) |
| 2290 | { |
| 2291 | struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data; |
| 2292 | struct ixgbe_hw *hw = &adapter->hw; |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 2293 | u32 eics = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2294 | int i; |
| 2295 | |
| 2296 | /* |
| 2297 | * Do the watchdog outside of interrupt context due to the lovely |
| 2298 | * delays that some of the newer hardware requires |
| 2299 | */ |
| 2300 | |
| 2301 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) |
| 2302 | goto watchdog_short_circuit; |
| 2303 | |
| 2304 | /* get one bit for every active tx/rx interrupt vector */ |
| 2305 | for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { |
| 2306 | struct ixgbevf_q_vector *qv = adapter->q_vector[i]; |
Alexander Duyck | 6b43c44 | 2012-05-11 08:32:45 +0000 | [diff] [blame] | 2307 | if (qv->rx.ring || qv->tx.ring) |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 2308 | eics |= 1 << i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2309 | } |
| 2310 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 2311 | IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2312 | |
| 2313 | watchdog_short_circuit: |
| 2314 | schedule_work(&adapter->watchdog_task); |
| 2315 | } |
| 2316 | |
| 2317 | /** |
| 2318 | * ixgbevf_tx_timeout - Respond to a Tx Hang |
| 2319 | * @netdev: network interface device structure |
| 2320 | **/ |
| 2321 | static void ixgbevf_tx_timeout(struct net_device *netdev) |
| 2322 | { |
| 2323 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 2324 | |
| 2325 | /* Do the reset outside of interrupt context */ |
| 2326 | schedule_work(&adapter->reset_task); |
| 2327 | } |
| 2328 | |
| 2329 | static void ixgbevf_reset_task(struct work_struct *work) |
| 2330 | { |
| 2331 | struct ixgbevf_adapter *adapter; |
| 2332 | adapter = container_of(work, struct ixgbevf_adapter, reset_task); |
| 2333 | |
| 2334 | /* If we're already down or resetting, just bail */ |
| 2335 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 2336 | test_bit(__IXGBEVF_REMOVING, &adapter->state) || |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2337 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) |
| 2338 | return; |
| 2339 | |
| 2340 | adapter->tx_timeout_count++; |
| 2341 | |
| 2342 | ixgbevf_reinit_locked(adapter); |
| 2343 | } |
| 2344 | |
| 2345 | /** |
| 2346 | * ixgbevf_watchdog_task - worker thread to bring link up |
| 2347 | * @work: pointer to work_struct containing our data |
| 2348 | **/ |
| 2349 | static void ixgbevf_watchdog_task(struct work_struct *work) |
| 2350 | { |
| 2351 | struct ixgbevf_adapter *adapter = container_of(work, |
| 2352 | struct ixgbevf_adapter, |
| 2353 | watchdog_task); |
| 2354 | struct net_device *netdev = adapter->netdev; |
| 2355 | struct ixgbe_hw *hw = &adapter->hw; |
| 2356 | u32 link_speed = adapter->link_speed; |
| 2357 | bool link_up = adapter->link_up; |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 2358 | s32 need_reset; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2359 | |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 2360 | ixgbevf_queue_reset_subtask(adapter); |
| 2361 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2362 | adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK; |
| 2363 | |
| 2364 | /* |
| 2365 | * Always check the link on the watchdog because we have |
| 2366 | * no LSC interrupt |
| 2367 | */ |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 2368 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 2369 | |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 2370 | need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 2371 | |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 2372 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 2373 | |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 2374 | if (need_reset) { |
| 2375 | adapter->link_up = link_up; |
| 2376 | adapter->link_speed = link_speed; |
| 2377 | netif_carrier_off(netdev); |
| 2378 | netif_tx_stop_all_queues(netdev); |
| 2379 | schedule_work(&adapter->reset_task); |
| 2380 | goto pf_has_reset; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2381 | } |
| 2382 | adapter->link_up = link_up; |
| 2383 | adapter->link_speed = link_speed; |
| 2384 | |
| 2385 | if (link_up) { |
| 2386 | if (!netif_carrier_ok(netdev)) { |
Greg Rose | b876a74 | 2013-01-19 06:40:22 +0000 | [diff] [blame] | 2387 | char *link_speed_string; |
| 2388 | switch (link_speed) { |
| 2389 | case IXGBE_LINK_SPEED_10GB_FULL: |
| 2390 | link_speed_string = "10 Gbps"; |
| 2391 | break; |
| 2392 | case IXGBE_LINK_SPEED_1GB_FULL: |
| 2393 | link_speed_string = "1 Gbps"; |
| 2394 | break; |
| 2395 | case IXGBE_LINK_SPEED_100_FULL: |
| 2396 | link_speed_string = "100 Mbps"; |
| 2397 | break; |
| 2398 | default: |
| 2399 | link_speed_string = "unknown speed"; |
| 2400 | break; |
| 2401 | } |
Greg Rose | 6fe5967 | 2013-01-04 07:37:26 +0000 | [diff] [blame] | 2402 | dev_info(&adapter->pdev->dev, |
Greg Rose | b876a74 | 2013-01-19 06:40:22 +0000 | [diff] [blame] | 2403 | "NIC Link is Up, %s\n", link_speed_string); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2404 | netif_carrier_on(netdev); |
| 2405 | netif_tx_wake_all_queues(netdev); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2406 | } |
| 2407 | } else { |
| 2408 | adapter->link_up = false; |
| 2409 | adapter->link_speed = 0; |
| 2410 | if (netif_carrier_ok(netdev)) { |
Greg Rose | 6fe5967 | 2013-01-04 07:37:26 +0000 | [diff] [blame] | 2411 | dev_info(&adapter->pdev->dev, "NIC Link is Down\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2412 | netif_carrier_off(netdev); |
| 2413 | netif_tx_stop_all_queues(netdev); |
| 2414 | } |
| 2415 | } |
| 2416 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2417 | ixgbevf_update_stats(adapter); |
| 2418 | |
Greg Rose | 33bd9f6 | 2010-03-19 02:59:52 +0000 | [diff] [blame] | 2419 | pf_has_reset: |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2420 | /* Reset the timer */ |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 2421 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && |
| 2422 | !test_bit(__IXGBEVF_REMOVING, &adapter->state)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2423 | mod_timer(&adapter->watchdog_timer, |
| 2424 | round_jiffies(jiffies + (2 * HZ))); |
| 2425 | |
| 2426 | adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK; |
| 2427 | } |
| 2428 | |
| 2429 | /** |
| 2430 | * ixgbevf_free_tx_resources - Free Tx Resources per Queue |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2431 | * @tx_ring: Tx descriptor ring for a specific queue |
| 2432 | * |
| 2433 | * Free all transmit software resources |
| 2434 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2435 | void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2436 | { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2437 | ixgbevf_clean_tx_ring(tx_ring); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2438 | |
| 2439 | vfree(tx_ring->tx_buffer_info); |
| 2440 | tx_ring->tx_buffer_info = NULL; |
| 2441 | |
Don Skidmore | de02dec | 2014-01-16 02:30:09 -0800 | [diff] [blame] | 2442 | /* if not set, then don't free */ |
| 2443 | if (!tx_ring->desc) |
| 2444 | return; |
| 2445 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2446 | dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 2447 | tx_ring->dma); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2448 | |
| 2449 | tx_ring->desc = NULL; |
| 2450 | } |
| 2451 | |
| 2452 | /** |
| 2453 | * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues |
| 2454 | * @adapter: board private structure |
| 2455 | * |
| 2456 | * Free all transmit software resources |
| 2457 | **/ |
| 2458 | static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) |
| 2459 | { |
| 2460 | int i; |
| 2461 | |
| 2462 | for (i = 0; i < adapter->num_tx_queues; i++) |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 2463 | if (adapter->tx_ring[i]->desc) |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2464 | ixgbevf_free_tx_resources(adapter->tx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2465 | } |
| 2466 | |
| 2467 | /** |
| 2468 | * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2469 | * @tx_ring: tx descriptor ring (for a specific queue) to setup |
| 2470 | * |
| 2471 | * Return 0 on success, negative on failure |
| 2472 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2473 | int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2474 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2475 | int size; |
| 2476 | |
| 2477 | size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; |
Eric Dumazet | 89bf67f | 2010-11-22 00:15:06 +0000 | [diff] [blame] | 2478 | tx_ring->tx_buffer_info = vzalloc(size); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2479 | if (!tx_ring->tx_buffer_info) |
| 2480 | goto err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2481 | |
| 2482 | /* round up to nearest 4K */ |
| 2483 | tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); |
| 2484 | tx_ring->size = ALIGN(tx_ring->size, 4096); |
| 2485 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2486 | tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 2487 | &tx_ring->dma, GFP_KERNEL); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2488 | if (!tx_ring->desc) |
| 2489 | goto err; |
| 2490 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2491 | return 0; |
| 2492 | |
| 2493 | err: |
| 2494 | vfree(tx_ring->tx_buffer_info); |
| 2495 | tx_ring->tx_buffer_info = NULL; |
| 2496 | hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit " |
| 2497 | "descriptor ring\n"); |
| 2498 | return -ENOMEM; |
| 2499 | } |
| 2500 | |
| 2501 | /** |
| 2502 | * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources |
| 2503 | * @adapter: board private structure |
| 2504 | * |
| 2505 | * If this function returns with an error, then it's possible one or |
| 2506 | * more of the rings is populated (while the rest are not). It is the |
| 2507 | * callers duty to clean those orphaned rings. |
| 2508 | * |
| 2509 | * Return 0 on success, negative on failure |
| 2510 | **/ |
| 2511 | static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) |
| 2512 | { |
| 2513 | int i, err = 0; |
| 2514 | |
| 2515 | for (i = 0; i < adapter->num_tx_queues; i++) { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2516 | err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2517 | if (!err) |
| 2518 | continue; |
| 2519 | hw_dbg(&adapter->hw, |
| 2520 | "Allocation for Tx Queue %u failed\n", i); |
| 2521 | break; |
| 2522 | } |
| 2523 | |
| 2524 | return err; |
| 2525 | } |
| 2526 | |
| 2527 | /** |
| 2528 | * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2529 | * @rx_ring: rx descriptor ring (for a specific queue) to setup |
| 2530 | * |
| 2531 | * Returns 0 on success, negative on failure |
| 2532 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2533 | int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2534 | { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2535 | int size; |
| 2536 | |
| 2537 | size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; |
Eric Dumazet | 89bf67f | 2010-11-22 00:15:06 +0000 | [diff] [blame] | 2538 | rx_ring->rx_buffer_info = vzalloc(size); |
Joe Perches | e404dec | 2012-01-29 12:56:23 +0000 | [diff] [blame] | 2539 | if (!rx_ring->rx_buffer_info) |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2540 | goto err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2541 | |
| 2542 | /* Round up to nearest 4K */ |
| 2543 | rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); |
| 2544 | rx_ring->size = ALIGN(rx_ring->size, 4096); |
| 2545 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2546 | rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 2547 | &rx_ring->dma, GFP_KERNEL); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2548 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2549 | if (!rx_ring->desc) |
| 2550 | goto err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2551 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2552 | return 0; |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2553 | err: |
| 2554 | vfree(rx_ring->rx_buffer_info); |
| 2555 | rx_ring->rx_buffer_info = NULL; |
| 2556 | dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2557 | return -ENOMEM; |
| 2558 | } |
| 2559 | |
| 2560 | /** |
| 2561 | * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources |
| 2562 | * @adapter: board private structure |
| 2563 | * |
| 2564 | * If this function returns with an error, then it's possible one or |
| 2565 | * more of the rings is populated (while the rest are not). It is the |
| 2566 | * callers duty to clean those orphaned rings. |
| 2567 | * |
| 2568 | * Return 0 on success, negative on failure |
| 2569 | **/ |
| 2570 | static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) |
| 2571 | { |
| 2572 | int i, err = 0; |
| 2573 | |
| 2574 | for (i = 0; i < adapter->num_rx_queues; i++) { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2575 | err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2576 | if (!err) |
| 2577 | continue; |
| 2578 | hw_dbg(&adapter->hw, |
| 2579 | "Allocation for Rx Queue %u failed\n", i); |
| 2580 | break; |
| 2581 | } |
| 2582 | return err; |
| 2583 | } |
| 2584 | |
| 2585 | /** |
| 2586 | * ixgbevf_free_rx_resources - Free Rx Resources |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2587 | * @rx_ring: ring to clean the resources from |
| 2588 | * |
| 2589 | * Free all receive software resources |
| 2590 | **/ |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2591 | void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2592 | { |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2593 | ixgbevf_clean_rx_ring(rx_ring); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2594 | |
| 2595 | vfree(rx_ring->rx_buffer_info); |
| 2596 | rx_ring->rx_buffer_info = NULL; |
| 2597 | |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2598 | dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc, |
Nick Nunley | 2a1f879 | 2010-04-27 13:10:50 +0000 | [diff] [blame] | 2599 | rx_ring->dma); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2600 | |
| 2601 | rx_ring->desc = NULL; |
| 2602 | } |
| 2603 | |
| 2604 | /** |
| 2605 | * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues |
| 2606 | * @adapter: board private structure |
| 2607 | * |
| 2608 | * Free all receive software resources |
| 2609 | **/ |
| 2610 | static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) |
| 2611 | { |
| 2612 | int i; |
| 2613 | |
| 2614 | for (i = 0; i < adapter->num_rx_queues; i++) |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 2615 | if (adapter->rx_ring[i]->desc) |
Emil Tantilov | 05d063a | 2014-01-17 18:29:59 -0800 | [diff] [blame] | 2616 | ixgbevf_free_rx_resources(adapter->rx_ring[i]); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2617 | } |
| 2618 | |
| 2619 | /** |
| 2620 | * ixgbevf_open - Called when a network interface is made active |
| 2621 | * @netdev: network interface device structure |
| 2622 | * |
| 2623 | * Returns 0 on success, negative value on failure |
| 2624 | * |
| 2625 | * The open entry point is called when a network interface is made |
| 2626 | * active by the system (IFF_UP). At this point all resources needed |
| 2627 | * for transmit and receive operations are allocated, the interrupt |
| 2628 | * handler is registered with the OS, the watchdog timer is started, |
| 2629 | * and the stack is notified that the interface is ready. |
| 2630 | **/ |
| 2631 | static int ixgbevf_open(struct net_device *netdev) |
| 2632 | { |
| 2633 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 2634 | struct ixgbe_hw *hw = &adapter->hw; |
| 2635 | int err; |
| 2636 | |
xunleer | a1f6c6b | 2013-03-05 07:44:20 +0000 | [diff] [blame] | 2637 | /* A previous failure to open the device because of a lack of |
| 2638 | * available MSIX vector resources may have reset the number |
| 2639 | * of msix vectors variable to zero. The only way to recover |
| 2640 | * is to unload/reload the driver and hope that the system has |
| 2641 | * been able to recover some MSIX vector resources. |
| 2642 | */ |
| 2643 | if (!adapter->num_msix_vectors) |
| 2644 | return -ENOMEM; |
| 2645 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2646 | /* disallow open during test */ |
| 2647 | if (test_bit(__IXGBEVF_TESTING, &adapter->state)) |
| 2648 | return -EBUSY; |
| 2649 | |
| 2650 | if (hw->adapter_stopped) { |
| 2651 | ixgbevf_reset(adapter); |
| 2652 | /* if adapter is still stopped then PF isn't up and |
| 2653 | * the vf can't start. */ |
| 2654 | if (hw->adapter_stopped) { |
| 2655 | err = IXGBE_ERR_MBX; |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 2656 | pr_err("Unable to start - perhaps the PF Driver isn't " |
| 2657 | "up yet\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2658 | goto err_setup_reset; |
| 2659 | } |
| 2660 | } |
| 2661 | |
| 2662 | /* allocate transmit descriptors */ |
| 2663 | err = ixgbevf_setup_all_tx_resources(adapter); |
| 2664 | if (err) |
| 2665 | goto err_setup_tx; |
| 2666 | |
| 2667 | /* allocate receive descriptors */ |
| 2668 | err = ixgbevf_setup_all_rx_resources(adapter); |
| 2669 | if (err) |
| 2670 | goto err_setup_rx; |
| 2671 | |
| 2672 | ixgbevf_configure(adapter); |
| 2673 | |
| 2674 | /* |
| 2675 | * Map the Tx/Rx rings to the vectors we were allotted. |
| 2676 | * if request_irq will be called in this function map_rings |
| 2677 | * must be called *before* up_complete |
| 2678 | */ |
| 2679 | ixgbevf_map_rings_to_vectors(adapter); |
| 2680 | |
Greg Rose | 795180d | 2012-04-17 04:29:34 +0000 | [diff] [blame] | 2681 | ixgbevf_up_complete(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2682 | |
| 2683 | /* clear any pending interrupts, may auto mask */ |
| 2684 | IXGBE_READ_REG(hw, IXGBE_VTEICR); |
| 2685 | err = ixgbevf_request_irq(adapter); |
| 2686 | if (err) |
| 2687 | goto err_req_irq; |
| 2688 | |
Alexander Duyck | 5f3600e | 2012-05-11 08:32:55 +0000 | [diff] [blame] | 2689 | ixgbevf_irq_enable(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2690 | |
| 2691 | return 0; |
| 2692 | |
| 2693 | err_req_irq: |
| 2694 | ixgbevf_down(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2695 | err_setup_rx: |
| 2696 | ixgbevf_free_all_rx_resources(adapter); |
| 2697 | err_setup_tx: |
| 2698 | ixgbevf_free_all_tx_resources(adapter); |
| 2699 | ixgbevf_reset(adapter); |
| 2700 | |
| 2701 | err_setup_reset: |
| 2702 | |
| 2703 | return err; |
| 2704 | } |
| 2705 | |
| 2706 | /** |
| 2707 | * ixgbevf_close - Disables a network interface |
| 2708 | * @netdev: network interface device structure |
| 2709 | * |
| 2710 | * Returns 0, this is not allowed to fail |
| 2711 | * |
| 2712 | * The close entry point is called when an interface is de-activated |
| 2713 | * by the OS. The hardware is still under the drivers control, but |
| 2714 | * needs to be disabled. A global MAC reset is issued to stop the |
| 2715 | * hardware, and all transmit and receive resources are freed. |
| 2716 | **/ |
| 2717 | static int ixgbevf_close(struct net_device *netdev) |
| 2718 | { |
| 2719 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 2720 | |
| 2721 | ixgbevf_down(adapter); |
| 2722 | ixgbevf_free_irq(adapter); |
| 2723 | |
| 2724 | ixgbevf_free_all_tx_resources(adapter); |
| 2725 | ixgbevf_free_all_rx_resources(adapter); |
| 2726 | |
| 2727 | return 0; |
| 2728 | } |
| 2729 | |
Don Skidmore | 220fe05 | 2013-09-21 01:40:49 +0000 | [diff] [blame] | 2730 | static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter) |
| 2731 | { |
| 2732 | struct net_device *dev = adapter->netdev; |
| 2733 | |
| 2734 | if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED)) |
| 2735 | return; |
| 2736 | |
| 2737 | adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED; |
| 2738 | |
| 2739 | /* if interface is down do nothing */ |
| 2740 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || |
| 2741 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) |
| 2742 | return; |
| 2743 | |
| 2744 | /* Hardware has to reinitialize queues and interrupts to |
| 2745 | * match packet buffer alignment. Unfortunately, the |
| 2746 | * hardware is not flexible enough to do this dynamically. |
| 2747 | */ |
| 2748 | if (netif_running(dev)) |
| 2749 | ixgbevf_close(dev); |
| 2750 | |
| 2751 | ixgbevf_clear_interrupt_scheme(adapter); |
| 2752 | ixgbevf_init_interrupt_scheme(adapter); |
| 2753 | |
| 2754 | if (netif_running(dev)) |
| 2755 | ixgbevf_open(dev); |
| 2756 | } |
| 2757 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2758 | static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring, |
| 2759 | u32 vlan_macip_lens, u32 type_tucmd, |
| 2760 | u32 mss_l4len_idx) |
| 2761 | { |
| 2762 | struct ixgbe_adv_tx_context_desc *context_desc; |
| 2763 | u16 i = tx_ring->next_to_use; |
| 2764 | |
| 2765 | context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i); |
| 2766 | |
| 2767 | i++; |
| 2768 | tx_ring->next_to_use = (i < tx_ring->count) ? i : 0; |
| 2769 | |
| 2770 | /* set bits to identify this as an advanced context descriptor */ |
| 2771 | type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; |
| 2772 | |
| 2773 | context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); |
| 2774 | context_desc->seqnum_seed = 0; |
| 2775 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd); |
| 2776 | context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); |
| 2777 | } |
| 2778 | |
| 2779 | static int ixgbevf_tso(struct ixgbevf_ring *tx_ring, |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2780 | struct ixgbevf_tx_buffer *first, |
| 2781 | u8 *hdr_len) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2782 | { |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2783 | struct sk_buff *skb = first->skb; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2784 | u32 vlan_macip_lens, type_tucmd; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2785 | u32 mss_l4len_idx, l4len; |
| 2786 | |
Emil Tantilov | 01a545c | 2014-02-27 20:32:45 -0800 | [diff] [blame] | 2787 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
| 2788 | return 0; |
| 2789 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2790 | if (!skb_is_gso(skb)) |
| 2791 | return 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2792 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2793 | if (skb_header_cloned(skb)) { |
| 2794 | int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); |
| 2795 | if (err) |
| 2796 | return err; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2797 | } |
| 2798 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2799 | /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ |
| 2800 | type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; |
| 2801 | |
| 2802 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2803 | struct iphdr *iph = ip_hdr(skb); |
| 2804 | iph->tot_len = 0; |
| 2805 | iph->check = 0; |
| 2806 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
| 2807 | iph->daddr, 0, |
| 2808 | IPPROTO_TCP, |
| 2809 | 0); |
| 2810 | type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2811 | first->tx_flags |= IXGBE_TX_FLAGS_TSO | |
| 2812 | IXGBE_TX_FLAGS_CSUM | |
| 2813 | IXGBE_TX_FLAGS_IPV4; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2814 | } else if (skb_is_gso_v6(skb)) { |
| 2815 | ipv6_hdr(skb)->payload_len = 0; |
| 2816 | tcp_hdr(skb)->check = |
| 2817 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
| 2818 | &ipv6_hdr(skb)->daddr, |
| 2819 | 0, IPPROTO_TCP, 0); |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2820 | first->tx_flags |= IXGBE_TX_FLAGS_TSO | |
| 2821 | IXGBE_TX_FLAGS_CSUM; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2822 | } |
| 2823 | |
| 2824 | /* compute header lengths */ |
| 2825 | l4len = tcp_hdrlen(skb); |
| 2826 | *hdr_len += l4len; |
| 2827 | *hdr_len = skb_transport_offset(skb) + l4len; |
| 2828 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2829 | /* update gso size and bytecount with header size */ |
| 2830 | first->gso_segs = skb_shinfo(skb)->gso_segs; |
| 2831 | first->bytecount += (first->gso_segs - 1) * *hdr_len; |
| 2832 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2833 | /* mss_l4len_id: use 1 as index for TSO */ |
| 2834 | mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT; |
| 2835 | mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; |
| 2836 | mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT; |
| 2837 | |
| 2838 | /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ |
| 2839 | vlan_macip_lens = skb_network_header_len(skb); |
| 2840 | vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2841 | vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2842 | |
| 2843 | ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, |
| 2844 | type_tucmd, mss_l4len_idx); |
| 2845 | |
| 2846 | return 1; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2847 | } |
| 2848 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2849 | static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring, |
| 2850 | struct ixgbevf_tx_buffer *first) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2851 | { |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2852 | struct sk_buff *skb = first->skb; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2853 | u32 vlan_macip_lens = 0; |
| 2854 | u32 mss_l4len_idx = 0; |
| 2855 | u32 type_tucmd = 0; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2856 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2857 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 2858 | u8 l4_hdr = 0; |
| 2859 | switch (skb->protocol) { |
| 2860 | case __constant_htons(ETH_P_IP): |
| 2861 | vlan_macip_lens |= skb_network_header_len(skb); |
| 2862 | type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; |
| 2863 | l4_hdr = ip_hdr(skb)->protocol; |
| 2864 | break; |
| 2865 | case __constant_htons(ETH_P_IPV6): |
| 2866 | vlan_macip_lens |= skb_network_header_len(skb); |
| 2867 | l4_hdr = ipv6_hdr(skb)->nexthdr; |
| 2868 | break; |
| 2869 | default: |
| 2870 | if (unlikely(net_ratelimit())) { |
| 2871 | dev_warn(tx_ring->dev, |
| 2872 | "partial checksum but proto=%x!\n", |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2873 | first->protocol); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2874 | } |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2875 | break; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2876 | } |
| 2877 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2878 | switch (l4_hdr) { |
| 2879 | case IPPROTO_TCP: |
| 2880 | type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP; |
| 2881 | mss_l4len_idx = tcp_hdrlen(skb) << |
| 2882 | IXGBE_ADVTXD_L4LEN_SHIFT; |
| 2883 | break; |
| 2884 | case IPPROTO_SCTP: |
| 2885 | type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP; |
| 2886 | mss_l4len_idx = sizeof(struct sctphdr) << |
| 2887 | IXGBE_ADVTXD_L4LEN_SHIFT; |
| 2888 | break; |
| 2889 | case IPPROTO_UDP: |
| 2890 | mss_l4len_idx = sizeof(struct udphdr) << |
| 2891 | IXGBE_ADVTXD_L4LEN_SHIFT; |
| 2892 | break; |
| 2893 | default: |
| 2894 | if (unlikely(net_ratelimit())) { |
| 2895 | dev_warn(tx_ring->dev, |
| 2896 | "partial checksum but l4 proto=%x!\n", |
| 2897 | l4_hdr); |
| 2898 | } |
| 2899 | break; |
| 2900 | } |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2901 | |
| 2902 | /* update TX checksum flag */ |
| 2903 | first->tx_flags |= IXGBE_TX_FLAGS_CSUM; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2904 | } |
| 2905 | |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2906 | /* vlan_macip_lens: MACLEN, VLAN tag */ |
| 2907 | vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2908 | vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 2909 | |
| 2910 | ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, |
| 2911 | type_tucmd, mss_l4len_idx); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2912 | } |
| 2913 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 2914 | static __le32 ixgbevf_tx_cmd_type(u32 tx_flags) |
| 2915 | { |
| 2916 | /* set type for advanced descriptor with frame checksum insertion */ |
| 2917 | __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA | |
| 2918 | IXGBE_ADVTXD_DCMD_IFCS | |
| 2919 | IXGBE_ADVTXD_DCMD_DEXT); |
| 2920 | |
| 2921 | /* set HW vlan bit if vlan is present */ |
| 2922 | if (tx_flags & IXGBE_TX_FLAGS_VLAN) |
| 2923 | cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE); |
| 2924 | |
| 2925 | /* set segmentation enable bits for TSO/FSO */ |
| 2926 | if (tx_flags & IXGBE_TX_FLAGS_TSO) |
| 2927 | cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE); |
| 2928 | |
| 2929 | return cmd_type; |
| 2930 | } |
| 2931 | |
| 2932 | static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, |
| 2933 | u32 tx_flags, unsigned int paylen) |
| 2934 | { |
| 2935 | __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT); |
| 2936 | |
| 2937 | /* enable L4 checksum for TSO and TX checksum offload */ |
| 2938 | if (tx_flags & IXGBE_TX_FLAGS_CSUM) |
| 2939 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM); |
| 2940 | |
| 2941 | /* enble IPv4 checksum for TSO */ |
| 2942 | if (tx_flags & IXGBE_TX_FLAGS_IPV4) |
| 2943 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM); |
| 2944 | |
| 2945 | /* use index 1 context for TSO/FSO/FCOE */ |
| 2946 | if (tx_flags & IXGBE_TX_FLAGS_TSO) |
| 2947 | olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT); |
| 2948 | |
| 2949 | /* Check Context must be set if Tx switch is enabled, which it |
| 2950 | * always is for case where virtual functions are running |
| 2951 | */ |
| 2952 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC); |
| 2953 | |
| 2954 | tx_desc->read.olinfo_status = olinfo_status; |
| 2955 | } |
| 2956 | |
| 2957 | static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring, |
| 2958 | struct ixgbevf_tx_buffer *first, |
| 2959 | const u8 hdr_len) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2960 | { |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 2961 | dma_addr_t dma; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 2962 | struct sk_buff *skb = first->skb; |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 2963 | struct ixgbevf_tx_buffer *tx_buffer; |
| 2964 | union ixgbe_adv_tx_desc *tx_desc; |
| 2965 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0]; |
| 2966 | unsigned int data_len = skb->data_len; |
| 2967 | unsigned int size = skb_headlen(skb); |
| 2968 | unsigned int paylen = skb->len - hdr_len; |
| 2969 | u32 tx_flags = first->tx_flags; |
| 2970 | __le32 cmd_type; |
| 2971 | u16 i = tx_ring->next_to_use; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2972 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 2973 | tx_desc = IXGBEVF_TX_DESC(tx_ring, i); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2974 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 2975 | ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen); |
| 2976 | cmd_type = ixgbevf_tx_cmd_type(tx_flags); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 2977 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 2978 | dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); |
| 2979 | if (dma_mapping_error(tx_ring->dev, dma)) |
| 2980 | goto dma_error; |
| 2981 | |
| 2982 | /* record length, and DMA address */ |
| 2983 | dma_unmap_len_set(first, len, size); |
| 2984 | dma_unmap_addr_set(first, dma, dma); |
| 2985 | |
| 2986 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
| 2987 | |
| 2988 | for (;;) { |
| 2989 | while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { |
| 2990 | tx_desc->read.cmd_type_len = |
| 2991 | cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD); |
| 2992 | |
| 2993 | i++; |
| 2994 | tx_desc++; |
| 2995 | if (i == tx_ring->count) { |
| 2996 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); |
| 2997 | i = 0; |
| 2998 | } |
| 2999 | |
| 3000 | dma += IXGBE_MAX_DATA_PER_TXD; |
| 3001 | size -= IXGBE_MAX_DATA_PER_TXD; |
| 3002 | |
| 3003 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
| 3004 | tx_desc->read.olinfo_status = 0; |
| 3005 | } |
| 3006 | |
| 3007 | if (likely(!data_len)) |
| 3008 | break; |
| 3009 | |
| 3010 | tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size); |
| 3011 | |
| 3012 | i++; |
| 3013 | tx_desc++; |
| 3014 | if (i == tx_ring->count) { |
| 3015 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); |
| 3016 | i = 0; |
| 3017 | } |
| 3018 | |
| 3019 | size = skb_frag_size(frag); |
| 3020 | data_len -= size; |
| 3021 | |
| 3022 | dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, |
| 3023 | DMA_TO_DEVICE); |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 3024 | if (dma_mapping_error(tx_ring->dev, dma)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3025 | goto dma_error; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3026 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3027 | tx_buffer = &tx_ring->tx_buffer_info[i]; |
| 3028 | dma_unmap_len_set(tx_buffer, len, size); |
| 3029 | dma_unmap_addr_set(tx_buffer, dma, dma); |
Emil Tantilov | 9bdfefd | 2014-01-17 18:30:04 -0800 | [diff] [blame] | 3030 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3031 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
| 3032 | tx_desc->read.olinfo_status = 0; |
| 3033 | |
| 3034 | frag++; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3035 | } |
| 3036 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3037 | /* write last descriptor with RS and EOP bits */ |
| 3038 | cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD); |
| 3039 | tx_desc->read.cmd_type_len = cmd_type; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3040 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3041 | /* set the timestamp */ |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3042 | first->time_stamp = jiffies; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3043 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3044 | /* Force memory writes to complete before letting h/w know there |
| 3045 | * are new descriptors to fetch. (Only applicable for weak-ordered |
| 3046 | * memory model archs, such as IA-64). |
| 3047 | * |
| 3048 | * We also need this memory barrier (wmb) to make certain all of the |
| 3049 | * status bits have been updated before next_to_watch is written. |
| 3050 | */ |
| 3051 | wmb(); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3052 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3053 | /* set next_to_watch value indicating a packet is present */ |
| 3054 | first->next_to_watch = tx_desc; |
| 3055 | |
| 3056 | i++; |
| 3057 | if (i == tx_ring->count) |
| 3058 | i = 0; |
| 3059 | |
| 3060 | tx_ring->next_to_use = i; |
| 3061 | |
| 3062 | /* notify HW of packet */ |
| 3063 | writel(i, tx_ring->tail); |
| 3064 | |
| 3065 | return; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3066 | dma_error: |
Alexander Duyck | 70a10e2 | 2012-05-11 08:33:21 +0000 | [diff] [blame] | 3067 | dev_err(tx_ring->dev, "TX DMA map failed\n"); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3068 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3069 | /* clear dma mappings for failed tx_buffer_info map */ |
| 3070 | for (;;) { |
| 3071 | tx_buffer = &tx_ring->tx_buffer_info[i]; |
| 3072 | ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer); |
| 3073 | if (tx_buffer == first) |
| 3074 | break; |
| 3075 | if (i == 0) |
| 3076 | i = tx_ring->count; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3077 | i--; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3078 | } |
| 3079 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3080 | tx_ring->next_to_use = i; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3081 | } |
| 3082 | |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3083 | static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3084 | { |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3085 | netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3086 | /* Herbert's original patch had: |
| 3087 | * smp_mb__after_netif_stop_queue(); |
| 3088 | * but since that doesn't exist yet, just open code it. */ |
| 3089 | smp_mb(); |
| 3090 | |
| 3091 | /* We need to check again in a case another CPU has just |
| 3092 | * made room available. */ |
Don Skidmore | f880d07 | 2013-10-23 02:17:52 +0000 | [diff] [blame] | 3093 | if (likely(ixgbevf_desc_unused(tx_ring) < size)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3094 | return -EBUSY; |
| 3095 | |
| 3096 | /* A reprieve! - use start_queue because it doesn't call schedule */ |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3097 | netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 3098 | ++tx_ring->tx_stats.restart_queue; |
| 3099 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3100 | return 0; |
| 3101 | } |
| 3102 | |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3103 | static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3104 | { |
Don Skidmore | f880d07 | 2013-10-23 02:17:52 +0000 | [diff] [blame] | 3105 | if (likely(ixgbevf_desc_unused(tx_ring) >= size)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3106 | return 0; |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3107 | return __ixgbevf_maybe_stop_tx(tx_ring, size); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3108 | } |
| 3109 | |
| 3110 | static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) |
| 3111 | { |
| 3112 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3113 | struct ixgbevf_tx_buffer *first; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3114 | struct ixgbevf_ring *tx_ring; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3115 | int tso; |
| 3116 | u32 tx_flags = 0; |
Alexander Duyck | 3595990 | 2012-05-11 08:32:40 +0000 | [diff] [blame] | 3117 | u16 count = TXD_USE_COUNT(skb_headlen(skb)); |
| 3118 | #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD |
| 3119 | unsigned short f; |
| 3120 | #endif |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3121 | u8 hdr_len = 0; |
Greg Rose | f9d08f16 | 2012-10-02 00:50:52 +0000 | [diff] [blame] | 3122 | u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL); |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3123 | |
Ben Hutchings | 46acc46 | 2012-11-01 09:11:11 +0000 | [diff] [blame] | 3124 | if (!dst_mac || is_link_local_ether_addr(dst_mac)) { |
Greg Rose | f9d08f16 | 2012-10-02 00:50:52 +0000 | [diff] [blame] | 3125 | dev_kfree_skb(skb); |
| 3126 | return NETDEV_TX_OK; |
| 3127 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3128 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3129 | tx_ring = adapter->tx_ring[skb->queue_mapping]; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3130 | |
Alexander Duyck | 3595990 | 2012-05-11 08:32:40 +0000 | [diff] [blame] | 3131 | /* |
| 3132 | * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, |
| 3133 | * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, |
| 3134 | * + 2 desc gap to keep tail from touching head, |
| 3135 | * + 1 desc for context descriptor, |
| 3136 | * otherwise try next time |
| 3137 | */ |
| 3138 | #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD |
| 3139 | for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) |
| 3140 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); |
| 3141 | #else |
| 3142 | count += skb_shinfo(skb)->nr_frags; |
| 3143 | #endif |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3144 | if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) { |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 3145 | tx_ring->tx_stats.tx_busy++; |
Alexander Duyck | 3595990 | 2012-05-11 08:32:40 +0000 | [diff] [blame] | 3146 | return NETDEV_TX_BUSY; |
| 3147 | } |
| 3148 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3149 | /* record the location of the first descriptor for this packet */ |
| 3150 | first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; |
| 3151 | first->skb = skb; |
| 3152 | first->bytecount = skb->len; |
| 3153 | first->gso_segs = 1; |
| 3154 | |
Jesse Gross | eab6d18 | 2010-10-20 13:56:03 +0000 | [diff] [blame] | 3155 | if (vlan_tx_tag_present(skb)) { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3156 | tx_flags |= vlan_tx_tag_get(skb); |
| 3157 | tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; |
| 3158 | tx_flags |= IXGBE_TX_FLAGS_VLAN; |
| 3159 | } |
| 3160 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3161 | /* record initial flags and protocol */ |
| 3162 | first->tx_flags = tx_flags; |
| 3163 | first->protocol = vlan_get_protocol(skb); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3164 | |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3165 | tso = ixgbevf_tso(tx_ring, first, &hdr_len); |
| 3166 | if (tso < 0) |
| 3167 | goto out_drop; |
Emil Tantilov | b5d217f | 2014-02-27 20:32:44 -0800 | [diff] [blame] | 3168 | else if (!tso) |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3169 | ixgbevf_tx_csum(tx_ring, first); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3170 | |
Emil Tantilov | 29d37fa | 2014-01-17 18:30:05 -0800 | [diff] [blame] | 3171 | ixgbevf_tx_map(tx_ring, first, hdr_len); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3172 | |
Alexander Duyck | fb40195 | 2012-05-11 08:33:16 +0000 | [diff] [blame] | 3173 | ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3174 | |
| 3175 | return NETDEV_TX_OK; |
Emil Tantilov | 7ad1a09 | 2014-01-17 18:30:03 -0800 | [diff] [blame] | 3176 | |
| 3177 | out_drop: |
| 3178 | dev_kfree_skb_any(first->skb); |
| 3179 | first->skb = NULL; |
| 3180 | |
| 3181 | return NETDEV_TX_OK; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3182 | } |
| 3183 | |
| 3184 | /** |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3185 | * ixgbevf_set_mac - Change the Ethernet Address of the NIC |
| 3186 | * @netdev: network interface device structure |
| 3187 | * @p: pointer to an address structure |
| 3188 | * |
| 3189 | * Returns 0 on success, negative on failure |
| 3190 | **/ |
| 3191 | static int ixgbevf_set_mac(struct net_device *netdev, void *p) |
| 3192 | { |
| 3193 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3194 | struct ixgbe_hw *hw = &adapter->hw; |
| 3195 | struct sockaddr *addr = p; |
| 3196 | |
| 3197 | if (!is_valid_ether_addr(addr->sa_data)) |
| 3198 | return -EADDRNOTAVAIL; |
| 3199 | |
| 3200 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
| 3201 | memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); |
| 3202 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 3203 | spin_lock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 3204 | |
Greg Rose | 92fe0bf | 2012-11-02 05:50:47 +0000 | [diff] [blame] | 3205 | hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3206 | |
John Fastabend | 55fdd45b | 2012-10-01 14:52:20 +0000 | [diff] [blame] | 3207 | spin_unlock_bh(&adapter->mbx_lock); |
Alexander Duyck | 1c55ed7 | 2012-05-11 08:33:06 +0000 | [diff] [blame] | 3208 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3209 | return 0; |
| 3210 | } |
| 3211 | |
| 3212 | /** |
| 3213 | * ixgbevf_change_mtu - Change the Maximum Transfer Unit |
| 3214 | * @netdev: network interface device structure |
| 3215 | * @new_mtu: new value for maximum frame size |
| 3216 | * |
| 3217 | * Returns 0 on success, negative on failure |
| 3218 | **/ |
| 3219 | static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) |
| 3220 | { |
| 3221 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3222 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; |
Greg Rose | 69bfbec | 2011-01-26 01:06:12 +0000 | [diff] [blame] | 3223 | int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE; |
Greg Rose | 69bfbec | 2011-01-26 01:06:12 +0000 | [diff] [blame] | 3224 | |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 3225 | switch (adapter->hw.api_version) { |
| 3226 | case ixgbe_mbox_api_11: |
Greg Rose | 69bfbec | 2011-01-26 01:06:12 +0000 | [diff] [blame] | 3227 | max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE; |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 3228 | break; |
| 3229 | default: |
| 3230 | if (adapter->hw.mac.type == ixgbe_mac_X540_vf) |
| 3231 | max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE; |
| 3232 | break; |
| 3233 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3234 | |
| 3235 | /* MTU < 68 is an error and causes problems on some kernels */ |
Greg Rose | 69bfbec | 2011-01-26 01:06:12 +0000 | [diff] [blame] | 3236 | if ((new_mtu < 68) || (max_frame > max_possible_frame)) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3237 | return -EINVAL; |
| 3238 | |
| 3239 | hw_dbg(&adapter->hw, "changing MTU from %d to %d\n", |
| 3240 | netdev->mtu, new_mtu); |
| 3241 | /* must set new MTU before calling down or up */ |
| 3242 | netdev->mtu = new_mtu; |
| 3243 | |
| 3244 | if (netif_running(netdev)) |
| 3245 | ixgbevf_reinit_locked(adapter); |
| 3246 | |
| 3247 | return 0; |
| 3248 | } |
| 3249 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3250 | static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3251 | { |
| 3252 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3253 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3254 | #ifdef CONFIG_PM |
| 3255 | int retval = 0; |
| 3256 | #endif |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3257 | |
| 3258 | netif_device_detach(netdev); |
| 3259 | |
| 3260 | if (netif_running(netdev)) { |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3261 | rtnl_lock(); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3262 | ixgbevf_down(adapter); |
| 3263 | ixgbevf_free_irq(adapter); |
| 3264 | ixgbevf_free_all_tx_resources(adapter); |
| 3265 | ixgbevf_free_all_rx_resources(adapter); |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3266 | rtnl_unlock(); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3267 | } |
| 3268 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3269 | ixgbevf_clear_interrupt_scheme(adapter); |
| 3270 | |
| 3271 | #ifdef CONFIG_PM |
| 3272 | retval = pci_save_state(pdev); |
| 3273 | if (retval) |
| 3274 | return retval; |
| 3275 | |
| 3276 | #endif |
| 3277 | pci_disable_device(pdev); |
| 3278 | |
| 3279 | return 0; |
| 3280 | } |
| 3281 | |
| 3282 | #ifdef CONFIG_PM |
| 3283 | static int ixgbevf_resume(struct pci_dev *pdev) |
| 3284 | { |
Wei Yongjun | 27ae296 | 2014-01-16 02:30:07 -0800 | [diff] [blame] | 3285 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3286 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3287 | u32 err; |
| 3288 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3289 | pci_restore_state(pdev); |
| 3290 | /* |
| 3291 | * pci_restore_state clears dev->state_saved so call |
| 3292 | * pci_save_state to restore it. |
| 3293 | */ |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3294 | pci_save_state(pdev); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3295 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3296 | err = pci_enable_device_mem(pdev); |
| 3297 | if (err) { |
| 3298 | dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); |
| 3299 | return err; |
| 3300 | } |
| 3301 | pci_set_master(pdev); |
| 3302 | |
Don Skidmore | 798e381 | 2013-10-01 04:33:51 -0700 | [diff] [blame] | 3303 | ixgbevf_reset(adapter); |
| 3304 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3305 | rtnl_lock(); |
| 3306 | err = ixgbevf_init_interrupt_scheme(adapter); |
| 3307 | rtnl_unlock(); |
| 3308 | if (err) { |
| 3309 | dev_err(&pdev->dev, "Cannot initialize interrupts\n"); |
| 3310 | return err; |
| 3311 | } |
| 3312 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3313 | if (netif_running(netdev)) { |
| 3314 | err = ixgbevf_open(netdev); |
| 3315 | if (err) |
| 3316 | return err; |
| 3317 | } |
| 3318 | |
| 3319 | netif_device_attach(netdev); |
| 3320 | |
| 3321 | return err; |
| 3322 | } |
| 3323 | |
| 3324 | #endif /* CONFIG_PM */ |
| 3325 | static void ixgbevf_shutdown(struct pci_dev *pdev) |
| 3326 | { |
| 3327 | ixgbevf_suspend(pdev, PMSG_SUSPEND); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3328 | } |
| 3329 | |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3330 | static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev, |
| 3331 | struct rtnl_link_stats64 *stats) |
| 3332 | { |
| 3333 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3334 | unsigned int start; |
| 3335 | u64 bytes, packets; |
| 3336 | const struct ixgbevf_ring *ring; |
| 3337 | int i; |
| 3338 | |
| 3339 | ixgbevf_update_stats(adapter); |
| 3340 | |
| 3341 | stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc; |
| 3342 | |
| 3343 | for (i = 0; i < adapter->num_rx_queues; i++) { |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 3344 | ring = adapter->rx_ring[i]; |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3345 | do { |
Eric W. Biederman | 57a7744 | 2014-03-13 21:26:42 -0700 | [diff] [blame] | 3346 | start = u64_stats_fetch_begin_irq(&ring->syncp); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 3347 | bytes = ring->stats.bytes; |
| 3348 | packets = ring->stats.packets; |
Eric W. Biederman | 57a7744 | 2014-03-13 21:26:42 -0700 | [diff] [blame] | 3349 | } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3350 | stats->rx_bytes += bytes; |
| 3351 | stats->rx_packets += packets; |
| 3352 | } |
| 3353 | |
| 3354 | for (i = 0; i < adapter->num_tx_queues; i++) { |
Don Skidmore | 87e70ab | 2014-01-16 02:30:08 -0800 | [diff] [blame] | 3355 | ring = adapter->tx_ring[i]; |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3356 | do { |
Eric W. Biederman | 57a7744 | 2014-03-13 21:26:42 -0700 | [diff] [blame] | 3357 | start = u64_stats_fetch_begin_irq(&ring->syncp); |
Emil Tantilov | 095e261 | 2014-01-17 18:30:00 -0800 | [diff] [blame] | 3358 | bytes = ring->stats.bytes; |
| 3359 | packets = ring->stats.packets; |
Eric W. Biederman | 57a7744 | 2014-03-13 21:26:42 -0700 | [diff] [blame] | 3360 | } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3361 | stats->tx_bytes += bytes; |
| 3362 | stats->tx_packets += packets; |
| 3363 | } |
| 3364 | |
| 3365 | return stats; |
| 3366 | } |
| 3367 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3368 | static const struct net_device_ops ixgbevf_netdev_ops = { |
Stephen Hemminger | c12db76 | 2011-06-09 02:58:39 +0000 | [diff] [blame] | 3369 | .ndo_open = ixgbevf_open, |
| 3370 | .ndo_stop = ixgbevf_close, |
| 3371 | .ndo_start_xmit = ixgbevf_xmit_frame, |
| 3372 | .ndo_set_rx_mode = ixgbevf_set_rx_mode, |
Eric Dumazet | 4197aa7 | 2011-06-22 05:01:35 +0000 | [diff] [blame] | 3373 | .ndo_get_stats64 = ixgbevf_get_stats, |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3374 | .ndo_validate_addr = eth_validate_addr, |
Stephen Hemminger | c12db76 | 2011-06-09 02:58:39 +0000 | [diff] [blame] | 3375 | .ndo_set_mac_address = ixgbevf_set_mac, |
| 3376 | .ndo_change_mtu = ixgbevf_change_mtu, |
| 3377 | .ndo_tx_timeout = ixgbevf_tx_timeout, |
Stephen Hemminger | c12db76 | 2011-06-09 02:58:39 +0000 | [diff] [blame] | 3378 | .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid, |
| 3379 | .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid, |
Jacob Keller | c777cdf | 2013-09-21 06:24:20 +0000 | [diff] [blame] | 3380 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 3381 | .ndo_busy_poll = ixgbevf_busy_poll_recv, |
| 3382 | #endif |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3383 | }; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3384 | |
| 3385 | static void ixgbevf_assign_netdev_ops(struct net_device *dev) |
| 3386 | { |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3387 | dev->netdev_ops = &ixgbevf_netdev_ops; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3388 | ixgbevf_set_ethtool_ops(dev); |
| 3389 | dev->watchdog_timeo = 5 * HZ; |
| 3390 | } |
| 3391 | |
| 3392 | /** |
| 3393 | * ixgbevf_probe - Device Initialization Routine |
| 3394 | * @pdev: PCI device information struct |
| 3395 | * @ent: entry in ixgbevf_pci_tbl |
| 3396 | * |
| 3397 | * Returns 0 on success, negative on failure |
| 3398 | * |
| 3399 | * ixgbevf_probe initializes an adapter identified by a pci_dev structure. |
| 3400 | * The OS initialization, configuring of the adapter private structure, |
| 3401 | * and a hardware reset occur. |
| 3402 | **/ |
Greg Kroah-Hartman | 1dd06ae | 2012-12-06 14:30:56 +0000 | [diff] [blame] | 3403 | static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3404 | { |
| 3405 | struct net_device *netdev; |
| 3406 | struct ixgbevf_adapter *adapter = NULL; |
| 3407 | struct ixgbe_hw *hw = NULL; |
| 3408 | const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; |
| 3409 | static int cards_found; |
| 3410 | int err, pci_using_dac; |
| 3411 | |
| 3412 | err = pci_enable_device(pdev); |
| 3413 | if (err) |
| 3414 | return err; |
| 3415 | |
Russell King | 53567aa | 2013-06-10 12:49:38 +0100 | [diff] [blame] | 3416 | if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3417 | pci_using_dac = 1; |
| 3418 | } else { |
Russell King | 53567aa | 2013-06-10 12:49:38 +0100 | [diff] [blame] | 3419 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3420 | if (err) { |
Russell King | 53567aa | 2013-06-10 12:49:38 +0100 | [diff] [blame] | 3421 | dev_err(&pdev->dev, "No usable DMA " |
| 3422 | "configuration, aborting\n"); |
| 3423 | goto err_dma; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3424 | } |
| 3425 | pci_using_dac = 0; |
| 3426 | } |
| 3427 | |
| 3428 | err = pci_request_regions(pdev, ixgbevf_driver_name); |
| 3429 | if (err) { |
| 3430 | dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); |
| 3431 | goto err_pci_reg; |
| 3432 | } |
| 3433 | |
| 3434 | pci_set_master(pdev); |
| 3435 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3436 | netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), |
| 3437 | MAX_TX_QUEUES); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3438 | if (!netdev) { |
| 3439 | err = -ENOMEM; |
| 3440 | goto err_alloc_etherdev; |
| 3441 | } |
| 3442 | |
| 3443 | SET_NETDEV_DEV(netdev, &pdev->dev); |
| 3444 | |
| 3445 | pci_set_drvdata(pdev, netdev); |
| 3446 | adapter = netdev_priv(netdev); |
| 3447 | |
| 3448 | adapter->netdev = netdev; |
| 3449 | adapter->pdev = pdev; |
| 3450 | hw = &adapter->hw; |
| 3451 | hw->back = adapter; |
stephen hemminger | b3f4d59 | 2012-03-13 06:04:20 +0000 | [diff] [blame] | 3452 | adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3453 | |
| 3454 | /* |
| 3455 | * call save state here in standalone driver because it relies on |
| 3456 | * adapter struct to exist, and needs to call netdev_priv |
| 3457 | */ |
| 3458 | pci_save_state(pdev); |
| 3459 | |
| 3460 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), |
| 3461 | pci_resource_len(pdev, 0)); |
| 3462 | if (!hw->hw_addr) { |
| 3463 | err = -EIO; |
| 3464 | goto err_ioremap; |
| 3465 | } |
| 3466 | |
| 3467 | ixgbevf_assign_netdev_ops(netdev); |
| 3468 | |
| 3469 | adapter->bd_number = cards_found; |
| 3470 | |
| 3471 | /* Setup hw api */ |
| 3472 | memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); |
| 3473 | hw->mac.type = ii->mac; |
| 3474 | |
| 3475 | memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, |
Greg Rose | f416dfc | 2011-06-08 07:32:38 +0000 | [diff] [blame] | 3476 | sizeof(struct ixgbe_mbx_operations)); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3477 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3478 | /* setup the private structure */ |
| 3479 | err = ixgbevf_sw_init(adapter); |
Danny Kukawka | 1a0d6ae | 2012-02-09 09:48:54 +0000 | [diff] [blame] | 3480 | if (err) |
| 3481 | goto err_sw_init; |
| 3482 | |
| 3483 | /* The HW MAC address was set and/or determined in sw_init */ |
Danny Kukawka | 1a0d6ae | 2012-02-09 09:48:54 +0000 | [diff] [blame] | 3484 | if (!is_valid_ether_addr(netdev->dev_addr)) { |
| 3485 | pr_err("invalid MAC address\n"); |
| 3486 | err = -EIO; |
| 3487 | goto err_sw_init; |
| 3488 | } |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3489 | |
Michał Mirosław | 471a76d | 2011-06-08 08:53:03 +0000 | [diff] [blame] | 3490 | netdev->hw_features = NETIF_F_SG | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3491 | NETIF_F_IP_CSUM | |
Michał Mirosław | 471a76d | 2011-06-08 08:53:03 +0000 | [diff] [blame] | 3492 | NETIF_F_IPV6_CSUM | |
| 3493 | NETIF_F_TSO | |
| 3494 | NETIF_F_TSO6 | |
| 3495 | NETIF_F_RXCSUM; |
| 3496 | |
| 3497 | netdev->features = netdev->hw_features | |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 3498 | NETIF_F_HW_VLAN_CTAG_TX | |
| 3499 | NETIF_F_HW_VLAN_CTAG_RX | |
| 3500 | NETIF_F_HW_VLAN_CTAG_FILTER; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3501 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3502 | netdev->vlan_features |= NETIF_F_TSO; |
| 3503 | netdev->vlan_features |= NETIF_F_TSO6; |
| 3504 | netdev->vlan_features |= NETIF_F_IP_CSUM; |
Alexander Duyck | 3bfacf9 | 2010-08-02 14:59:04 +0000 | [diff] [blame] | 3505 | netdev->vlan_features |= NETIF_F_IPV6_CSUM; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3506 | netdev->vlan_features |= NETIF_F_SG; |
| 3507 | |
| 3508 | if (pci_using_dac) |
| 3509 | netdev->features |= NETIF_F_HIGHDMA; |
| 3510 | |
Jiri Pirko | 0178934 | 2011-08-16 06:29:00 +0000 | [diff] [blame] | 3511 | netdev->priv_flags |= IFF_UNICAST_FLT; |
| 3512 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3513 | init_timer(&adapter->watchdog_timer); |
Joe Perches | c061b18 | 2010-08-23 18:20:03 +0000 | [diff] [blame] | 3514 | adapter->watchdog_timer.function = ixgbevf_watchdog; |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3515 | adapter->watchdog_timer.data = (unsigned long)adapter; |
| 3516 | |
| 3517 | INIT_WORK(&adapter->reset_task, ixgbevf_reset_task); |
| 3518 | INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task); |
| 3519 | |
| 3520 | err = ixgbevf_init_interrupt_scheme(adapter); |
| 3521 | if (err) |
| 3522 | goto err_sw_init; |
| 3523 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3524 | strcpy(netdev->name, "eth%d"); |
| 3525 | |
| 3526 | err = register_netdev(netdev); |
| 3527 | if (err) |
| 3528 | goto err_register; |
| 3529 | |
Greg Rose | 5d426ad | 2010-11-16 19:27:19 -0800 | [diff] [blame] | 3530 | netif_carrier_off(netdev); |
| 3531 | |
Greg Rose | 33bd9f6 | 2010-03-19 02:59:52 +0000 | [diff] [blame] | 3532 | ixgbevf_init_last_counter_stats(adapter); |
| 3533 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3534 | /* print the MAC address */ |
Danny Kukawka | f794e7e | 2012-02-24 03:45:56 +0000 | [diff] [blame] | 3535 | hw_dbg(hw, "%pM\n", netdev->dev_addr); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3536 | |
| 3537 | hw_dbg(hw, "MAC: %d\n", hw->mac.type); |
| 3538 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3539 | hw_dbg(hw, "Intel(R) 82599 Virtual Function\n"); |
| 3540 | cards_found++; |
| 3541 | return 0; |
| 3542 | |
| 3543 | err_register: |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3544 | ixgbevf_clear_interrupt_scheme(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3545 | err_sw_init: |
| 3546 | ixgbevf_reset_interrupt_capability(adapter); |
| 3547 | iounmap(hw->hw_addr); |
| 3548 | err_ioremap: |
| 3549 | free_netdev(netdev); |
| 3550 | err_alloc_etherdev: |
| 3551 | pci_release_regions(pdev); |
| 3552 | err_pci_reg: |
| 3553 | err_dma: |
| 3554 | pci_disable_device(pdev); |
| 3555 | return err; |
| 3556 | } |
| 3557 | |
| 3558 | /** |
| 3559 | * ixgbevf_remove - Device Removal Routine |
| 3560 | * @pdev: PCI device information struct |
| 3561 | * |
| 3562 | * ixgbevf_remove is called by the PCI subsystem to alert the driver |
| 3563 | * that it should release a PCI device. The could be caused by a |
| 3564 | * Hot-Plug event, or because the driver is going to be removed from |
| 3565 | * memory. |
| 3566 | **/ |
Bill Pemberton | 9f9a12f | 2012-12-03 09:24:25 -0500 | [diff] [blame] | 3567 | static void ixgbevf_remove(struct pci_dev *pdev) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3568 | { |
| 3569 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3570 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3571 | |
Mark Rustad | 2e7cfbd | 2014-03-04 03:02:13 +0000 | [diff] [blame] | 3572 | set_bit(__IXGBEVF_REMOVING, &adapter->state); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3573 | |
| 3574 | del_timer_sync(&adapter->watchdog_timer); |
| 3575 | |
Tejun Heo | 23f333a | 2010-12-12 16:45:14 +0100 | [diff] [blame] | 3576 | cancel_work_sync(&adapter->reset_task); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3577 | cancel_work_sync(&adapter->watchdog_task); |
| 3578 | |
Alexander Duyck | fd13a9a | 2012-05-11 08:32:24 +0000 | [diff] [blame] | 3579 | if (netdev->reg_state == NETREG_REGISTERED) |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3580 | unregister_netdev(netdev); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3581 | |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3582 | ixgbevf_clear_interrupt_scheme(adapter); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3583 | ixgbevf_reset_interrupt_capability(adapter); |
| 3584 | |
| 3585 | iounmap(adapter->hw.hw_addr); |
| 3586 | pci_release_regions(pdev); |
| 3587 | |
| 3588 | hw_dbg(&adapter->hw, "Remove complete\n"); |
| 3589 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3590 | free_netdev(netdev); |
| 3591 | |
| 3592 | pci_disable_device(pdev); |
| 3593 | } |
| 3594 | |
Alexander Duyck | 9f19f31 | 2012-05-11 08:33:32 +0000 | [diff] [blame] | 3595 | /** |
| 3596 | * ixgbevf_io_error_detected - called when PCI error is detected |
| 3597 | * @pdev: Pointer to PCI device |
| 3598 | * @state: The current pci connection state |
| 3599 | * |
| 3600 | * This function is called after a PCI bus error affecting |
| 3601 | * this device has been detected. |
| 3602 | */ |
| 3603 | static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev, |
| 3604 | pci_channel_state_t state) |
| 3605 | { |
| 3606 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3607 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3608 | |
| 3609 | netif_device_detach(netdev); |
| 3610 | |
| 3611 | if (state == pci_channel_io_perm_failure) |
| 3612 | return PCI_ERS_RESULT_DISCONNECT; |
| 3613 | |
| 3614 | if (netif_running(netdev)) |
| 3615 | ixgbevf_down(adapter); |
| 3616 | |
| 3617 | pci_disable_device(pdev); |
| 3618 | |
| 3619 | /* Request a slot slot reset. */ |
| 3620 | return PCI_ERS_RESULT_NEED_RESET; |
| 3621 | } |
| 3622 | |
| 3623 | /** |
| 3624 | * ixgbevf_io_slot_reset - called after the pci bus has been reset. |
| 3625 | * @pdev: Pointer to PCI device |
| 3626 | * |
| 3627 | * Restart the card from scratch, as if from a cold-boot. Implementation |
| 3628 | * resembles the first-half of the ixgbevf_resume routine. |
| 3629 | */ |
| 3630 | static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev) |
| 3631 | { |
| 3632 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3633 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3634 | |
| 3635 | if (pci_enable_device_mem(pdev)) { |
| 3636 | dev_err(&pdev->dev, |
| 3637 | "Cannot re-enable PCI device after reset.\n"); |
| 3638 | return PCI_ERS_RESULT_DISCONNECT; |
| 3639 | } |
| 3640 | |
| 3641 | pci_set_master(pdev); |
| 3642 | |
| 3643 | ixgbevf_reset(adapter); |
| 3644 | |
| 3645 | return PCI_ERS_RESULT_RECOVERED; |
| 3646 | } |
| 3647 | |
| 3648 | /** |
| 3649 | * ixgbevf_io_resume - called when traffic can start flowing again. |
| 3650 | * @pdev: Pointer to PCI device |
| 3651 | * |
| 3652 | * This callback is called when the error recovery driver tells us that |
| 3653 | * its OK to resume normal operation. Implementation resembles the |
| 3654 | * second-half of the ixgbevf_resume routine. |
| 3655 | */ |
| 3656 | static void ixgbevf_io_resume(struct pci_dev *pdev) |
| 3657 | { |
| 3658 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3659 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); |
| 3660 | |
| 3661 | if (netif_running(netdev)) |
| 3662 | ixgbevf_up(adapter); |
| 3663 | |
| 3664 | netif_device_attach(netdev); |
| 3665 | } |
| 3666 | |
| 3667 | /* PCI Error Recovery (ERS) */ |
Stephen Hemminger | 3646f0e | 2012-09-07 09:33:15 -0700 | [diff] [blame] | 3668 | static const struct pci_error_handlers ixgbevf_err_handler = { |
Alexander Duyck | 9f19f31 | 2012-05-11 08:33:32 +0000 | [diff] [blame] | 3669 | .error_detected = ixgbevf_io_error_detected, |
| 3670 | .slot_reset = ixgbevf_io_slot_reset, |
| 3671 | .resume = ixgbevf_io_resume, |
| 3672 | }; |
| 3673 | |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3674 | static struct pci_driver ixgbevf_driver = { |
| 3675 | .name = ixgbevf_driver_name, |
| 3676 | .id_table = ixgbevf_pci_tbl, |
| 3677 | .probe = ixgbevf_probe, |
Bill Pemberton | 9f9a12f | 2012-12-03 09:24:25 -0500 | [diff] [blame] | 3678 | .remove = ixgbevf_remove, |
Alexander Duyck | 0ac1e8c | 2012-05-11 08:33:26 +0000 | [diff] [blame] | 3679 | #ifdef CONFIG_PM |
| 3680 | /* Power Management Hooks */ |
| 3681 | .suspend = ixgbevf_suspend, |
| 3682 | .resume = ixgbevf_resume, |
| 3683 | #endif |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3684 | .shutdown = ixgbevf_shutdown, |
Alexander Duyck | 9f19f31 | 2012-05-11 08:33:32 +0000 | [diff] [blame] | 3685 | .err_handler = &ixgbevf_err_handler |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3686 | }; |
| 3687 | |
| 3688 | /** |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 3689 | * ixgbevf_init_module - Driver Registration Routine |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3690 | * |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 3691 | * ixgbevf_init_module is the first routine called when the driver is |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3692 | * loaded. All it does is register with the PCI subsystem. |
| 3693 | **/ |
| 3694 | static int __init ixgbevf_init_module(void) |
| 3695 | { |
| 3696 | int ret; |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 3697 | pr_info("%s - version %s\n", ixgbevf_driver_string, |
| 3698 | ixgbevf_driver_version); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3699 | |
Jeff Kirsher | dbd9636 | 2011-10-21 19:38:18 +0000 | [diff] [blame] | 3700 | pr_info("%s\n", ixgbevf_copyright); |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3701 | |
| 3702 | ret = pci_register_driver(&ixgbevf_driver); |
| 3703 | return ret; |
| 3704 | } |
| 3705 | |
| 3706 | module_init(ixgbevf_init_module); |
| 3707 | |
| 3708 | /** |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 3709 | * ixgbevf_exit_module - Driver Exit Cleanup Routine |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3710 | * |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 3711 | * ixgbevf_exit_module is called just before the driver is removed |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3712 | * from memory. |
| 3713 | **/ |
| 3714 | static void __exit ixgbevf_exit_module(void) |
| 3715 | { |
| 3716 | pci_unregister_driver(&ixgbevf_driver); |
| 3717 | } |
| 3718 | |
| 3719 | #ifdef DEBUG |
| 3720 | /** |
Greg Rose | 65d676c | 2011-02-03 06:54:13 +0000 | [diff] [blame] | 3721 | * ixgbevf_get_hw_dev_name - return device name string |
Greg Rose | 92915f7 | 2010-01-09 02:24:10 +0000 | [diff] [blame] | 3722 | * used by hardware layer to print debugging information |
| 3723 | **/ |
| 3724 | char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) |
| 3725 | { |
| 3726 | struct ixgbevf_adapter *adapter = hw->back; |
| 3727 | return adapter->netdev->name; |
| 3728 | } |
| 3729 | |
| 3730 | #endif |
| 3731 | module_exit(ixgbevf_exit_module); |
| 3732 | |
| 3733 | /* ixgbevf_main.c */ |