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Greg Rose92915f72010-01-09 02:24:10 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Greg Rose5c47a2b2012-01-06 02:53:30 +00004 Copyright(c) 1999 - 2012 Intel Corporation.
Greg Rose92915f72010-01-09 02:24:10 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
Jeff Kirsherdbd96362011-10-21 19:38:18 +000032
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
Greg Rose92915f72010-01-09 02:24:10 +000035#include <linux/types.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000036#include <linux/bitops.h>
Greg Rose92915f72010-01-09 02:24:10 +000037#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
Alexander Duyck70a10e22012-05-11 08:33:21 +000045#include <linux/sctp.h>
Greg Rose92915f72010-01-09 02:24:10 +000046#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/slab.h>
Greg Rose92915f72010-01-09 02:24:10 +000048#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
Jiri Pirko01789342011-08-16 06:29:00 +000051#include <linux/if.h>
Greg Rose92915f72010-01-09 02:24:10 +000052#include <linux/if_vlan.h>
Paul Gortmaker70c71602011-05-22 16:47:17 -040053#include <linux/prefetch.h>
Greg Rose92915f72010-01-09 02:24:10 +000054
55#include "ixgbevf.h"
56
Stephen Hemminger3d8fe982012-01-18 22:13:34 +000057const char ixgbevf_driver_name[] = "ixgbevf";
Greg Rose92915f72010-01-09 02:24:10 +000058static const char ixgbevf_driver_string[] =
Greg Rose422e05d2011-03-12 02:01:29 +000059 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
Greg Rose92915f72010-01-09 02:24:10 +000060
Don Skidmore86f359f2014-01-17 01:21:38 -080061#define DRV_VERSION "2.12.1-k"
Greg Rose92915f72010-01-09 02:24:10 +000062const char ixgbevf_driver_version[] = DRV_VERSION;
Greg Rose66c87bd2010-11-16 19:26:43 -080063static char ixgbevf_copyright[] =
Greg Rose5c47a2b2012-01-06 02:53:30 +000064 "Copyright (c) 2009 - 2012 Intel Corporation.";
Greg Rose92915f72010-01-09 02:24:10 +000065
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
Greg Rose2316aa22010-12-02 07:12:26 +000067 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
Greg Rose92915f72010-01-09 02:24:10 +000069};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
Stephen Hemminger39ba22b2013-02-06 02:37:04 +000079static DEFINE_PCI_DEVICE_TABLE(ixgbevf_pci_tbl) = {
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
Greg Rose92915f72010-01-09 02:24:10 +000082 /* required last entry */
83 {0, }
84};
85MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
86
87MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
88MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
stephen hemmingerb3f4d592012-03-13 06:04:20 +000092#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
93static int debug = -1;
94module_param(debug, int, 0);
95MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
Greg Rose92915f72010-01-09 02:24:10 +000096
97/* forward decls */
Don Skidmore220fe052013-09-21 01:40:49 +000098static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
Alexander Duyckfa71ae22012-05-11 08:32:50 +000099static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
Alexander Duyck56e94092012-07-20 08:10:03 +0000100static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000101
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000102static inline void ixgbevf_release_rx_desc(struct ixgbevf_ring *rx_ring,
Greg Rose92915f72010-01-09 02:24:10 +0000103 u32 val)
104{
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000105 rx_ring->next_to_use = val;
106
Greg Rose92915f72010-01-09 02:24:10 +0000107 /*
108 * Force memory writes to complete before letting h/w
109 * know there are new descriptors to fetch. (Only
110 * applicable for weak-ordered memory model archs,
111 * such as IA-64).
112 */
113 wmb();
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000114 writel(val, rx_ring->tail);
Greg Rose92915f72010-01-09 02:24:10 +0000115}
116
Ben Hutchings49ce9c22012-07-10 10:56:00 +0000117/**
Greg Rose65d676c2011-02-03 06:54:13 +0000118 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
Greg Rose92915f72010-01-09 02:24:10 +0000119 * @adapter: pointer to adapter struct
120 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
121 * @queue: queue to map the corresponding interrupt to
122 * @msix_vector: the vector to map to the corresponding queue
Greg Rose92915f72010-01-09 02:24:10 +0000123 */
124static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
125 u8 queue, u8 msix_vector)
126{
127 u32 ivar, index;
128 struct ixgbe_hw *hw = &adapter->hw;
129 if (direction == -1) {
130 /* other causes */
131 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
132 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
133 ivar &= ~0xFF;
134 ivar |= msix_vector;
135 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
136 } else {
137 /* tx or rx causes */
138 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
139 index = ((16 * (queue & 1)) + (8 * direction));
140 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
141 ivar &= ~(0xFF << index);
142 ivar |= (msix_vector << index);
143 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
144 }
145}
146
Alexander Duyck70a10e22012-05-11 08:33:21 +0000147static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800148 struct ixgbevf_tx_buffer *tx_buffer)
Greg Rose92915f72010-01-09 02:24:10 +0000149{
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800150 if (tx_buffer->skb) {
151 dev_kfree_skb_any(tx_buffer->skb);
152 if (dma_unmap_len(tx_buffer, len))
Alexander Duyck70a10e22012-05-11 08:33:21 +0000153 dma_unmap_single(tx_ring->dev,
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800154 dma_unmap_addr(tx_buffer, dma),
155 dma_unmap_len(tx_buffer, len),
Nick Nunley2a1f8792010-04-27 13:10:50 +0000156 DMA_TO_DEVICE);
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800157 } else if (dma_unmap_len(tx_buffer, len)) {
158 dma_unmap_page(tx_ring->dev,
159 dma_unmap_addr(tx_buffer, dma),
160 dma_unmap_len(tx_buffer, len),
161 DMA_TO_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000162 }
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800163 tx_buffer->next_to_watch = NULL;
164 tx_buffer->skb = NULL;
165 dma_unmap_len_set(tx_buffer, len, 0);
166 /* tx_buffer must be completely set up in the transmit path */
Greg Rose92915f72010-01-09 02:24:10 +0000167}
168
Greg Rose92915f72010-01-09 02:24:10 +0000169#define IXGBE_MAX_TXD_PWR 14
170#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
171
172/* Tx Descriptors needed, worst case */
Alexander Duyck35959902012-05-11 08:32:40 +0000173#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
174#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
Greg Rose92915f72010-01-09 02:24:10 +0000175
176static void ixgbevf_tx_timeout(struct net_device *netdev);
177
178/**
179 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000180 * @q_vector: board private structure
Greg Rose92915f72010-01-09 02:24:10 +0000181 * @tx_ring: tx ring to clean
182 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000183static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
Greg Rose92915f72010-01-09 02:24:10 +0000184 struct ixgbevf_ring *tx_ring)
185{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000186 struct ixgbevf_adapter *adapter = q_vector->adapter;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800187 struct ixgbevf_tx_buffer *tx_buffer;
188 union ixgbe_adv_tx_desc *tx_desc;
Greg Rose92915f72010-01-09 02:24:10 +0000189 unsigned int total_bytes = 0, total_packets = 0;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800190 unsigned int budget = tx_ring->count / 2;
191 unsigned int i = tx_ring->next_to_clean;
Greg Rose92915f72010-01-09 02:24:10 +0000192
Alexander Duyck10cc1bd2012-07-16 23:44:48 +0000193 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
194 return true;
195
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800196 tx_buffer = &tx_ring->tx_buffer_info[i];
197 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
198 i -= tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +0000199
Alexander Duycke757e3e2013-01-31 07:43:22 +0000200 do {
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800201 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000202
203 /* if next_to_watch is not set then there is no work pending */
204 if (!eop_desc)
205 break;
206
207 /* prevent any other reads prior to eop_desc */
208 read_barrier_depends();
209
210 /* if DD is not set pending work has not been completed */
211 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
212 break;
213
214 /* clear next_to_watch to prevent false hangs */
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800215 tx_buffer->next_to_watch = NULL;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000216
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800217 /* update the statistics for this packet */
218 total_bytes += tx_buffer->bytecount;
219 total_packets += tx_buffer->gso_segs;
Greg Rose92915f72010-01-09 02:24:10 +0000220
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800221 /* free the skb */
222 dev_kfree_skb_any(tx_buffer->skb);
223
224 /* unmap skb header data */
225 dma_unmap_single(tx_ring->dev,
226 dma_unmap_addr(tx_buffer, dma),
227 dma_unmap_len(tx_buffer, len),
228 DMA_TO_DEVICE);
229
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800230 /* clear tx_buffer data */
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800231 tx_buffer->skb = NULL;
232 dma_unmap_len_set(tx_buffer, len, 0);
Greg Rose92915f72010-01-09 02:24:10 +0000233
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800234 /* unmap remaining buffers */
235 while (tx_desc != eop_desc) {
Greg Rose92915f72010-01-09 02:24:10 +0000236 tx_desc->wb.status = 0;
237
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800238 tx_buffer++;
239 tx_desc++;
Greg Rose92915f72010-01-09 02:24:10 +0000240 i++;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800241 if (unlikely(!i)) {
242 i -= tx_ring->count;
243 tx_buffer = tx_ring->tx_buffer_info;
244 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
245 }
Alexander Duycke757e3e2013-01-31 07:43:22 +0000246
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800247 /* unmap any remaining paged data */
248 if (dma_unmap_len(tx_buffer, len)) {
249 dma_unmap_page(tx_ring->dev,
250 dma_unmap_addr(tx_buffer, dma),
251 dma_unmap_len(tx_buffer, len),
252 DMA_TO_DEVICE);
253 dma_unmap_len_set(tx_buffer, len, 0);
254 }
Greg Rose92915f72010-01-09 02:24:10 +0000255 }
256
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800257 tx_desc->wb.status = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000258
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800259 /* move us one more past the eop_desc for start of next pkt */
260 tx_buffer++;
261 tx_desc++;
262 i++;
263 if (unlikely(!i)) {
264 i -= tx_ring->count;
265 tx_buffer = tx_ring->tx_buffer_info;
266 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
267 }
268
269 /* issue prefetch for next Tx descriptor */
270 prefetch(tx_desc);
271
272 /* update budget accounting */
273 budget--;
274 } while (likely(budget));
275
276 i += tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +0000277 tx_ring->next_to_clean = i;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000278 u64_stats_update_begin(&tx_ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -0800279 tx_ring->stats.bytes += total_bytes;
280 tx_ring->stats.packets += total_packets;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000281 u64_stats_update_end(&tx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000282 q_vector->tx.total_bytes += total_bytes;
283 q_vector->tx.total_packets += total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000284
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800285#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
286 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
287 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
288 /* Make sure that anybody stopping the queue after this
289 * sees the new next_to_clean.
290 */
291 smp_mb();
292
293 if (__netif_subqueue_stopped(tx_ring->netdev,
294 tx_ring->queue_index) &&
295 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
296 netif_wake_subqueue(tx_ring->netdev,
297 tx_ring->queue_index);
298 ++tx_ring->tx_stats.restart_queue;
299 }
300 }
301
302 return !!budget;
Greg Rose92915f72010-01-09 02:24:10 +0000303}
304
305/**
306 * ixgbevf_receive_skb - Send a completed packet up the stack
307 * @q_vector: structure containing interrupt and ring information
308 * @skb: packet to send up
309 * @status: hardware indication of status of receive
Greg Rose92915f72010-01-09 02:24:10 +0000310 * @rx_desc: rx descriptor
311 **/
312static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
313 struct sk_buff *skb, u8 status,
Greg Rose92915f72010-01-09 02:24:10 +0000314 union ixgbe_adv_rx_desc *rx_desc)
315{
316 struct ixgbevf_adapter *adapter = q_vector->adapter;
317 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
Greg Rosedd1ed3b2011-08-27 02:06:25 +0000318 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Greg Rose92915f72010-01-09 02:24:10 +0000319
Pascal Bouchareine5d9a5332012-06-14 02:18:18 +0000320 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
Patrick McHardy86a9bad2013-04-19 02:04:30 +0000321 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
Jiri Pirkodadcd652011-07-21 03:25:09 +0000322
Greg Rose366c1092012-11-13 04:03:18 +0000323 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
324 napi_gro_receive(&q_vector->napi, skb);
325 else
326 netif_rx(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000327}
328
329/**
Jacob Keller08681612013-09-21 06:24:09 +0000330 * ixgbevf_rx_skb - Helper function to determine proper Rx method
331 * @q_vector: structure containing interrupt and ring information
332 * @skb: packet to send up
333 * @status: hardware indication of status of receive
334 * @rx_desc: rx descriptor
335 **/
336static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
337 struct sk_buff *skb, u8 status,
338 union ixgbe_adv_rx_desc *rx_desc)
339{
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000340#ifdef CONFIG_NET_RX_BUSY_POLL
341 skb_mark_napi_id(skb, &q_vector->napi);
342
343 if (ixgbevf_qv_busy_polling(q_vector)) {
344 netif_receive_skb(skb);
345 /* exit early if we busy polled */
346 return;
347 }
348#endif /* CONFIG_NET_RX_BUSY_POLL */
349
Jacob Keller08681612013-09-21 06:24:09 +0000350 ixgbevf_receive_skb(q_vector, skb, status, rx_desc);
351}
352
353/**
Greg Rose92915f72010-01-09 02:24:10 +0000354 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
Greg Rose55fb2772012-11-06 05:53:32 +0000355 * @ring: pointer to Rx descriptor ring structure
Greg Rose92915f72010-01-09 02:24:10 +0000356 * @status_err: hardware indication of status of receive
357 * @skb: skb currently being received and modified
358 **/
Greg Rose55fb2772012-11-06 05:53:32 +0000359static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
Greg Rose92915f72010-01-09 02:24:10 +0000360 u32 status_err, struct sk_buff *skb)
361{
Eric Dumazetbc8acf22010-09-02 13:07:41 -0700362 skb_checksum_none_assert(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000363
364 /* Rx csum disabled */
Alexander Duyckfb401952012-05-11 08:33:16 +0000365 if (!(ring->netdev->features & NETIF_F_RXCSUM))
Greg Rose92915f72010-01-09 02:24:10 +0000366 return;
367
368 /* if IP and error */
369 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
370 (status_err & IXGBE_RXDADV_ERR_IPE)) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800371 ring->rx_stats.csum_err++;
Greg Rose92915f72010-01-09 02:24:10 +0000372 return;
373 }
374
375 if (!(status_err & IXGBE_RXD_STAT_L4CS))
376 return;
377
378 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800379 ring->rx_stats.csum_err++;
Greg Rose92915f72010-01-09 02:24:10 +0000380 return;
381 }
382
383 /* It must be a TCP or UDP packet with a valid checksum */
384 skb->ip_summed = CHECKSUM_UNNECESSARY;
Greg Rose92915f72010-01-09 02:24:10 +0000385}
386
387/**
388 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
Emil Tantilov095e2612014-01-17 18:30:00 -0800389 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
Greg Rose92915f72010-01-09 02:24:10 +0000390 **/
Emil Tantilov095e2612014-01-17 18:30:00 -0800391static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
Greg Rose92915f72010-01-09 02:24:10 +0000392 int cleaned_count)
393{
Greg Rose92915f72010-01-09 02:24:10 +0000394 union ixgbe_adv_rx_desc *rx_desc;
395 struct ixgbevf_rx_buffer *bi;
Alexander Duyckfb401952012-05-11 08:33:16 +0000396 unsigned int i = rx_ring->next_to_use;
Greg Rose92915f72010-01-09 02:24:10 +0000397
Greg Rose92915f72010-01-09 02:24:10 +0000398 while (cleaned_count--) {
Alexander Duyck908421f2012-05-11 08:33:00 +0000399 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
Emil Tantilov05d063a2014-01-17 18:29:59 -0800400 bi = &rx_ring->rx_buffer_info[i];
Greg Roseb9dd2452012-11-02 05:50:21 +0000401
402 if (!bi->skb) {
403 struct sk_buff *skb;
404
Alexander Duyckfb401952012-05-11 08:33:16 +0000405 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
406 rx_ring->rx_buf_len);
Emil Tantilov05d063a2014-01-17 18:29:59 -0800407 if (!skb)
Greg Rose92915f72010-01-09 02:24:10 +0000408 goto no_buffers;
Emil Tantilov05d063a2014-01-17 18:29:59 -0800409
Greg Rose92915f72010-01-09 02:24:10 +0000410 bi->skb = skb;
Greg Roseb9dd2452012-11-02 05:50:21 +0000411
Emil Tantilov05d063a2014-01-17 18:29:59 -0800412 bi->dma = dma_map_single(rx_ring->dev, skb->data,
Greg Rose92915f72010-01-09 02:24:10 +0000413 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000414 DMA_FROM_DEVICE);
Emil Tantilov05d063a2014-01-17 18:29:59 -0800415 if (dma_mapping_error(rx_ring->dev, bi->dma)) {
Greg Rose6132ee82012-09-21 00:14:14 +0000416 dev_kfree_skb(skb);
417 bi->skb = NULL;
Emil Tantilov05d063a2014-01-17 18:29:59 -0800418 dev_err(rx_ring->dev, "Rx DMA map failed\n");
Greg Rose6132ee82012-09-21 00:14:14 +0000419 break;
420 }
Greg Rose92915f72010-01-09 02:24:10 +0000421 }
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000422 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Greg Rose92915f72010-01-09 02:24:10 +0000423
424 i++;
425 if (i == rx_ring->count)
426 i = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000427 }
428
429no_buffers:
Emil Tantilov095e2612014-01-17 18:30:00 -0800430 rx_ring->rx_stats.alloc_rx_buff_failed++;
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000431 if (rx_ring->next_to_use != i)
432 ixgbevf_release_rx_desc(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000433}
434
435static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000436 u32 qmask)
Greg Rose92915f72010-01-09 02:24:10 +0000437{
Greg Rose92915f72010-01-09 02:24:10 +0000438 struct ixgbe_hw *hw = &adapter->hw;
439
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000440 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
Greg Rose92915f72010-01-09 02:24:10 +0000441}
442
Jacob Keller08e50a22013-09-21 06:24:14 +0000443static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
444 struct ixgbevf_ring *rx_ring,
445 int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000446{
Greg Rose92915f72010-01-09 02:24:10 +0000447 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
448 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
449 struct sk_buff *skb;
450 unsigned int i;
451 u32 len, staterr;
Greg Rose92915f72010-01-09 02:24:10 +0000452 int cleaned_count = 0;
453 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
454
455 i = rx_ring->next_to_clean;
Alexander Duyck908421f2012-05-11 08:33:00 +0000456 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000457 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
458 rx_buffer_info = &rx_ring->rx_buffer_info[i];
459
460 while (staterr & IXGBE_RXD_STAT_DD) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000461 if (!budget)
Greg Rose92915f72010-01-09 02:24:10 +0000462 break;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000463 budget--;
Greg Rose92915f72010-01-09 02:24:10 +0000464
Jeff Kirsher2d0bb1c2010-08-08 16:02:31 +0000465 rmb(); /* read descriptor and rx_buffer_info after status DD */
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000466 len = le16_to_cpu(rx_desc->wb.upper.length);
Greg Rose92915f72010-01-09 02:24:10 +0000467 skb = rx_buffer_info->skb;
468 prefetch(skb->data - NET_IP_ALIGN);
469 rx_buffer_info->skb = NULL;
470
471 if (rx_buffer_info->dma) {
Emil Tantilov05d063a2014-01-17 18:29:59 -0800472 dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
Greg Rose92915f72010-01-09 02:24:10 +0000473 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000474 DMA_FROM_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000475 rx_buffer_info->dma = 0;
476 skb_put(skb, len);
477 }
478
Greg Rose92915f72010-01-09 02:24:10 +0000479 i++;
480 if (i == rx_ring->count)
481 i = 0;
482
Alexander Duyck908421f2012-05-11 08:33:00 +0000483 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000484 prefetch(next_rxd);
485 cleaned_count++;
486
487 next_buffer = &rx_ring->rx_buffer_info[i];
488
489 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000490 skb->next = next_buffer->skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +0000491 IXGBE_CB(skb->next)->prev = skb;
Emil Tantilov095e2612014-01-17 18:30:00 -0800492 rx_ring->rx_stats.non_eop_descs++;
Greg Rose92915f72010-01-09 02:24:10 +0000493 goto next_desc;
494 }
495
Alexander Duyck5c60f812012-09-01 05:12:38 +0000496 /* we should not be chaining buffers, if we did drop the skb */
497 if (IXGBE_CB(skb)->prev) {
498 do {
499 struct sk_buff *this = skb;
500 skb = IXGBE_CB(skb)->prev;
501 dev_kfree_skb(this);
502 } while (skb);
503 goto next_desc;
504 }
505
Greg Rose92915f72010-01-09 02:24:10 +0000506 /* ERR_MASK will only have valid bits if EOP set */
507 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
508 dev_kfree_skb_irq(skb);
509 goto next_desc;
510 }
511
Greg Rose55fb2772012-11-06 05:53:32 +0000512 ixgbevf_rx_checksum(rx_ring, staterr, skb);
Greg Rose92915f72010-01-09 02:24:10 +0000513
514 /* probably a little skewed due to removing CRC */
515 total_rx_bytes += skb->len;
516 total_rx_packets++;
517
Alexander Duyckfb401952012-05-11 08:33:16 +0000518 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
Greg Rose92915f72010-01-09 02:24:10 +0000519
John Fastabend815cccb2012-10-24 08:13:09 +0000520 /* Workaround hardware that can't do proper VEPA multicast
521 * source pruning.
522 */
523 if ((skb->pkt_type & (PACKET_BROADCAST | PACKET_MULTICAST)) &&
Emil Tantilov095e2612014-01-17 18:30:00 -0800524 ether_addr_equal(rx_ring->netdev->dev_addr,
Joe Perches7367d0b2013-09-01 11:51:23 -0700525 eth_hdr(skb)->h_source)) {
John Fastabend815cccb2012-10-24 08:13:09 +0000526 dev_kfree_skb_irq(skb);
527 goto next_desc;
528 }
529
Jacob Keller08681612013-09-21 06:24:09 +0000530 ixgbevf_rx_skb(q_vector, skb, staterr, rx_desc);
Greg Rose92915f72010-01-09 02:24:10 +0000531
532next_desc:
533 rx_desc->wb.upper.status_error = 0;
534
535 /* return some buffers to hardware, one at a time is too slow */
536 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800537 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
Greg Rose92915f72010-01-09 02:24:10 +0000538 cleaned_count = 0;
539 }
540
541 /* use prefetched values */
542 rx_desc = next_rxd;
543 rx_buffer_info = &rx_ring->rx_buffer_info[i];
544
545 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
546 }
547
548 rx_ring->next_to_clean = i;
Don Skidmoref880d072013-10-23 02:17:52 +0000549 cleaned_count = ixgbevf_desc_unused(rx_ring);
Greg Rose92915f72010-01-09 02:24:10 +0000550
551 if (cleaned_count)
Emil Tantilov095e2612014-01-17 18:30:00 -0800552 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
Greg Rose92915f72010-01-09 02:24:10 +0000553
Eric Dumazet4197aa72011-06-22 05:01:35 +0000554 u64_stats_update_begin(&rx_ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -0800555 rx_ring->stats.packets += total_rx_packets;
556 rx_ring->stats.bytes += total_rx_bytes;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000557 u64_stats_update_end(&rx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000558 q_vector->rx.total_packets += total_rx_packets;
559 q_vector->rx.total_bytes += total_rx_bytes;
Greg Rose92915f72010-01-09 02:24:10 +0000560
Jacob Keller08e50a22013-09-21 06:24:14 +0000561 return total_rx_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000562}
563
564/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000565 * ixgbevf_poll - NAPI polling calback
Greg Rose92915f72010-01-09 02:24:10 +0000566 * @napi: napi struct with our devices info in it
567 * @budget: amount of work driver is allowed to do this pass, in packets
568 *
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000569 * This function will clean more than one or more rings associated with a
Greg Rose92915f72010-01-09 02:24:10 +0000570 * q_vector.
571 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000572static int ixgbevf_poll(struct napi_struct *napi, int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000573{
574 struct ixgbevf_q_vector *q_vector =
575 container_of(napi, struct ixgbevf_q_vector, napi);
576 struct ixgbevf_adapter *adapter = q_vector->adapter;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000577 struct ixgbevf_ring *ring;
578 int per_ring_budget;
579 bool clean_complete = true;
580
581 ixgbevf_for_each_ring(ring, q_vector->tx)
582 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
Greg Rose92915f72010-01-09 02:24:10 +0000583
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000584#ifdef CONFIG_NET_RX_BUSY_POLL
585 if (!ixgbevf_qv_lock_napi(q_vector))
586 return budget;
587#endif
588
Greg Rose92915f72010-01-09 02:24:10 +0000589 /* attempt to distribute budget to each queue fairly, but don't allow
590 * the budget to go below 1 because we'll exit polling */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000591 if (q_vector->rx.count > 1)
592 per_ring_budget = max(budget/q_vector->rx.count, 1);
593 else
594 per_ring_budget = budget;
Greg Rose92915f72010-01-09 02:24:10 +0000595
Greg Rose366c1092012-11-13 04:03:18 +0000596 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000597 ixgbevf_for_each_ring(ring, q_vector->rx)
Jacob Keller08e50a22013-09-21 06:24:14 +0000598 clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
599 per_ring_budget)
600 < per_ring_budget);
Greg Rose366c1092012-11-13 04:03:18 +0000601 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Greg Rose92915f72010-01-09 02:24:10 +0000602
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000603#ifdef CONFIG_NET_RX_BUSY_POLL
604 ixgbevf_qv_unlock_napi(q_vector);
605#endif
606
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000607 /* If all work not completed, return budget and keep polling */
608 if (!clean_complete)
609 return budget;
610 /* all work done, exit the polling mode */
611 napi_complete(napi);
612 if (adapter->rx_itr_setting & 1)
613 ixgbevf_set_itr(q_vector);
614 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
615 ixgbevf_irq_enable_queues(adapter,
616 1 << q_vector->v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000617
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000618 return 0;
Greg Rose92915f72010-01-09 02:24:10 +0000619}
620
Greg Rosece422602012-05-22 02:17:49 +0000621/**
622 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
623 * @q_vector: structure containing interrupt and ring information
624 */
Jacob Keller38496232013-10-22 06:19:18 +0000625void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
Greg Rosece422602012-05-22 02:17:49 +0000626{
627 struct ixgbevf_adapter *adapter = q_vector->adapter;
628 struct ixgbe_hw *hw = &adapter->hw;
629 int v_idx = q_vector->v_idx;
630 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
631
632 /*
633 * set the WDIS bit to not clear the timer bits and cause an
634 * immediate assertion of the interrupt
635 */
636 itr_reg |= IXGBE_EITR_CNT_WDIS;
637
638 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
639}
Greg Rose92915f72010-01-09 02:24:10 +0000640
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000641#ifdef CONFIG_NET_RX_BUSY_POLL
642/* must be called with local_bh_disable()d */
643static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
644{
645 struct ixgbevf_q_vector *q_vector =
646 container_of(napi, struct ixgbevf_q_vector, napi);
647 struct ixgbevf_adapter *adapter = q_vector->adapter;
648 struct ixgbevf_ring *ring;
649 int found = 0;
650
651 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
652 return LL_FLUSH_FAILED;
653
654 if (!ixgbevf_qv_lock_poll(q_vector))
655 return LL_FLUSH_BUSY;
656
657 ixgbevf_for_each_ring(ring, q_vector->rx) {
658 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
Jacob Keller3b5dca22013-09-21 06:24:25 +0000659#ifdef BP_EXTENDED_STATS
660 if (found)
Emil Tantilov095e2612014-01-17 18:30:00 -0800661 ring->stats.cleaned += found;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000662 else
Emil Tantilov095e2612014-01-17 18:30:00 -0800663 ring->stats.misses++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000664#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000665 if (found)
666 break;
667 }
668
669 ixgbevf_qv_unlock_poll(q_vector);
670
671 return found;
672}
673#endif /* CONFIG_NET_RX_BUSY_POLL */
674
Greg Rose92915f72010-01-09 02:24:10 +0000675/**
676 * ixgbevf_configure_msix - Configure MSI-X hardware
677 * @adapter: board private structure
678 *
679 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
680 * interrupts.
681 **/
682static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
683{
684 struct ixgbevf_q_vector *q_vector;
Alexander Duyck6b43c442012-05-11 08:32:45 +0000685 int q_vectors, v_idx;
Greg Rose92915f72010-01-09 02:24:10 +0000686
687 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000688 adapter->eims_enable_mask = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000689
690 /*
691 * Populate the IVAR table and set the ITR values to the
692 * corresponding register.
693 */
694 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck6b43c442012-05-11 08:32:45 +0000695 struct ixgbevf_ring *ring;
Greg Rose92915f72010-01-09 02:24:10 +0000696 q_vector = adapter->q_vector[v_idx];
Greg Rose92915f72010-01-09 02:24:10 +0000697
Alexander Duyck6b43c442012-05-11 08:32:45 +0000698 ixgbevf_for_each_ring(ring, q_vector->rx)
699 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000700
Alexander Duyck6b43c442012-05-11 08:32:45 +0000701 ixgbevf_for_each_ring(ring, q_vector->tx)
702 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000703
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000704 if (q_vector->tx.ring && !q_vector->rx.ring) {
705 /* tx only vector */
706 if (adapter->tx_itr_setting == 1)
707 q_vector->itr = IXGBE_10K_ITR;
708 else
709 q_vector->itr = adapter->tx_itr_setting;
710 } else {
711 /* rx or rx/tx vector */
712 if (adapter->rx_itr_setting == 1)
713 q_vector->itr = IXGBE_20K_ITR;
714 else
715 q_vector->itr = adapter->rx_itr_setting;
716 }
Greg Rose92915f72010-01-09 02:24:10 +0000717
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000718 /* add q_vector eims value to global eims_enable_mask */
719 adapter->eims_enable_mask |= 1 << v_idx;
720
721 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000722 }
723
724 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000725 /* setup eims_other and add value to global eims_enable_mask */
726 adapter->eims_other = 1 << v_idx;
727 adapter->eims_enable_mask |= adapter->eims_other;
Greg Rose92915f72010-01-09 02:24:10 +0000728}
729
730enum latency_range {
731 lowest_latency = 0,
732 low_latency = 1,
733 bulk_latency = 2,
734 latency_invalid = 255
735};
736
737/**
738 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000739 * @q_vector: structure containing interrupt and ring information
740 * @ring_container: structure containing ring performance data
Greg Rose92915f72010-01-09 02:24:10 +0000741 *
742 * Stores a new ITR value based on packets and byte
743 * counts during the last interrupt. The advantage of per interrupt
744 * computation is faster updates and more accurate ITR for the current
745 * traffic pattern. Constants in this function were computed
746 * based on theoretical maximum wire speed and thresholds were set based
747 * on testing data as well as attempting to minimize response time
748 * while increasing bulk throughput.
749 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000750static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
751 struct ixgbevf_ring_container *ring_container)
Greg Rose92915f72010-01-09 02:24:10 +0000752{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000753 int bytes = ring_container->total_bytes;
754 int packets = ring_container->total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000755 u32 timepassed_us;
756 u64 bytes_perint;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000757 u8 itr_setting = ring_container->itr;
Greg Rose92915f72010-01-09 02:24:10 +0000758
759 if (packets == 0)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000760 return;
Greg Rose92915f72010-01-09 02:24:10 +0000761
762 /* simple throttlerate management
763 * 0-20MB/s lowest (100000 ints/s)
764 * 20-100MB/s low (20000 ints/s)
765 * 100-1249MB/s bulk (8000 ints/s)
766 */
767 /* what was last interrupt timeslice? */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000768 timepassed_us = q_vector->itr >> 2;
Greg Rose92915f72010-01-09 02:24:10 +0000769 bytes_perint = bytes / timepassed_us; /* bytes/usec */
770
771 switch (itr_setting) {
772 case lowest_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000773 if (bytes_perint > 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000774 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000775 break;
776 case low_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000777 if (bytes_perint > 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000778 itr_setting = bulk_latency;
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000779 else if (bytes_perint <= 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000780 itr_setting = lowest_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000781 break;
782 case bulk_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000783 if (bytes_perint <= 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000784 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000785 break;
786 }
787
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000788 /* clear work counters since we have the values we need */
789 ring_container->total_bytes = 0;
790 ring_container->total_packets = 0;
791
792 /* write updated itr to ring container */
793 ring_container->itr = itr_setting;
Greg Rose92915f72010-01-09 02:24:10 +0000794}
795
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000796static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
Greg Rose92915f72010-01-09 02:24:10 +0000797{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000798 u32 new_itr = q_vector->itr;
799 u8 current_itr;
Greg Rose92915f72010-01-09 02:24:10 +0000800
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000801 ixgbevf_update_itr(q_vector, &q_vector->tx);
802 ixgbevf_update_itr(q_vector, &q_vector->rx);
Greg Rose92915f72010-01-09 02:24:10 +0000803
Alexander Duyck6b43c442012-05-11 08:32:45 +0000804 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
Greg Rose92915f72010-01-09 02:24:10 +0000805
806 switch (current_itr) {
807 /* counts and packets in update_itr are dependent on these numbers */
808 case lowest_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000809 new_itr = IXGBE_100K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000810 break;
811 case low_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000812 new_itr = IXGBE_20K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000813 break;
814 case bulk_latency:
815 default:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000816 new_itr = IXGBE_8K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000817 break;
818 }
819
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000820 if (new_itr != q_vector->itr) {
Greg Rose92915f72010-01-09 02:24:10 +0000821 /* do an exponential smoothing */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000822 new_itr = (10 * new_itr * q_vector->itr) /
823 ((9 * new_itr) + q_vector->itr);
824
825 /* save the algorithm value here */
826 q_vector->itr = new_itr;
827
828 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000829 }
Greg Rose92915f72010-01-09 02:24:10 +0000830}
831
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000832static irqreturn_t ixgbevf_msix_other(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000833{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000834 struct ixgbevf_adapter *adapter = data;
Greg Rose92915f72010-01-09 02:24:10 +0000835 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +0000836
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000837 hw->mac.get_link_status = 1;
Greg Rose375b27c2012-01-18 22:13:31 +0000838
Don Skidmorec7bb4172013-10-01 04:33:49 -0700839 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
840 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose3a2c4032012-02-01 01:28:15 +0000841
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000842 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
843
Greg Rose92915f72010-01-09 02:24:10 +0000844 return IRQ_HANDLED;
845}
846
Greg Rose92915f72010-01-09 02:24:10 +0000847/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000848 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
Greg Rose92915f72010-01-09 02:24:10 +0000849 * @irq: unused
850 * @data: pointer to our q_vector struct for this interrupt vector
851 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000852static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000853{
854 struct ixgbevf_q_vector *q_vector = data;
Greg Rose92915f72010-01-09 02:24:10 +0000855
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000856 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000857 if (q_vector->rx.ring || q_vector->tx.ring)
858 napi_schedule(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +0000859
860 return IRQ_HANDLED;
861}
862
863static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
864 int r_idx)
865{
866 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
867
Don Skidmore87e70ab2014-01-16 02:30:08 -0800868 a->rx_ring[r_idx]->next = q_vector->rx.ring;
869 q_vector->rx.ring = a->rx_ring[r_idx];
Alexander Duyck6b43c442012-05-11 08:32:45 +0000870 q_vector->rx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000871}
872
873static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
874 int t_idx)
875{
876 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
877
Don Skidmore87e70ab2014-01-16 02:30:08 -0800878 a->tx_ring[t_idx]->next = q_vector->tx.ring;
879 q_vector->tx.ring = a->tx_ring[t_idx];
Alexander Duyck6b43c442012-05-11 08:32:45 +0000880 q_vector->tx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000881}
882
883/**
884 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
885 * @adapter: board private structure to initialize
886 *
887 * This function maps descriptor rings to the queue-specific vectors
888 * we were allotted through the MSI-X enabling code. Ideally, we'd have
889 * one vector per ring/queue, but on a constrained vector budget, we
890 * group the rings as "efficiently" as possible. You would add new
891 * mapping configurations in here.
892 **/
893static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
894{
895 int q_vectors;
896 int v_start = 0;
897 int rxr_idx = 0, txr_idx = 0;
898 int rxr_remaining = adapter->num_rx_queues;
899 int txr_remaining = adapter->num_tx_queues;
900 int i, j;
901 int rqpv, tqpv;
902 int err = 0;
903
904 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
905
906 /*
907 * The ideal configuration...
908 * We have enough vectors to map one per queue.
909 */
910 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
911 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
912 map_vector_to_rxq(adapter, v_start, rxr_idx);
913
914 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
915 map_vector_to_txq(adapter, v_start, txr_idx);
916 goto out;
917 }
918
919 /*
920 * If we don't have enough vectors for a 1-to-1
921 * mapping, we'll have to group them so there are
922 * multiple queues per vector.
923 */
924 /* Re-adjusting *qpv takes care of the remainder. */
925 for (i = v_start; i < q_vectors; i++) {
926 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
927 for (j = 0; j < rqpv; j++) {
928 map_vector_to_rxq(adapter, i, rxr_idx);
929 rxr_idx++;
930 rxr_remaining--;
931 }
932 }
933 for (i = v_start; i < q_vectors; i++) {
934 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
935 for (j = 0; j < tqpv; j++) {
936 map_vector_to_txq(adapter, i, txr_idx);
937 txr_idx++;
938 txr_remaining--;
939 }
940 }
941
942out:
943 return err;
944}
945
946/**
947 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
948 * @adapter: board private structure
949 *
950 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
951 * interrupts from the kernel.
952 **/
953static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
954{
955 struct net_device *netdev = adapter->netdev;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000956 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
957 int vector, err;
Greg Rose92915f72010-01-09 02:24:10 +0000958 int ri = 0, ti = 0;
959
Greg Rose92915f72010-01-09 02:24:10 +0000960 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000961 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
962 struct msix_entry *entry = &adapter->msix_entries[vector];
Greg Rose92915f72010-01-09 02:24:10 +0000963
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000964 if (q_vector->tx.ring && q_vector->rx.ring) {
965 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
966 "%s-%s-%d", netdev->name, "TxRx", ri++);
967 ti++;
968 } else if (q_vector->rx.ring) {
969 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
970 "%s-%s-%d", netdev->name, "rx", ri++);
971 } else if (q_vector->tx.ring) {
972 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
973 "%s-%s-%d", netdev->name, "tx", ti++);
Greg Rose92915f72010-01-09 02:24:10 +0000974 } else {
975 /* skip this unused q_vector */
976 continue;
977 }
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000978 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
979 q_vector->name, q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000980 if (err) {
981 hw_dbg(&adapter->hw,
982 "request_irq failed for MSIX interrupt "
983 "Error: %d\n", err);
984 goto free_queue_irqs;
985 }
986 }
987
Greg Rose92915f72010-01-09 02:24:10 +0000988 err = request_irq(adapter->msix_entries[vector].vector,
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000989 &ixgbevf_msix_other, 0, netdev->name, adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000990 if (err) {
991 hw_dbg(&adapter->hw,
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000992 "request_irq for msix_other failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +0000993 goto free_queue_irqs;
994 }
995
996 return 0;
997
998free_queue_irqs:
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000999 while (vector) {
1000 vector--;
1001 free_irq(adapter->msix_entries[vector].vector,
1002 adapter->q_vector[vector]);
1003 }
xunleera1f6c6b2013-03-05 07:44:20 +00001004 /* This failure is non-recoverable - it indicates the system is
1005 * out of MSIX vector resources and the VF driver cannot run
1006 * without them. Set the number of msix vectors to zero
1007 * indicating that not enough can be allocated. The error
1008 * will be returned to the user indicating device open failed.
1009 * Any further attempts to force the driver to open will also
1010 * fail. The only way to recover is to unload the driver and
1011 * reload it again. If the system has recovered some MSIX
1012 * vectors then it may succeed.
1013 */
1014 adapter->num_msix_vectors = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001015 return err;
1016}
1017
1018static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1019{
1020 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1021
1022 for (i = 0; i < q_vectors; i++) {
1023 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +00001024 q_vector->rx.ring = NULL;
1025 q_vector->tx.ring = NULL;
1026 q_vector->rx.count = 0;
1027 q_vector->tx.count = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001028 }
1029}
1030
1031/**
1032 * ixgbevf_request_irq - initialize interrupts
1033 * @adapter: board private structure
1034 *
1035 * Attempts to configure interrupts using the best available
1036 * capabilities of the hardware and kernel.
1037 **/
1038static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1039{
1040 int err = 0;
1041
1042 err = ixgbevf_request_msix_irqs(adapter);
1043
1044 if (err)
1045 hw_dbg(&adapter->hw,
1046 "request_irq failed, Error %d\n", err);
1047
1048 return err;
1049}
1050
1051static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1052{
Greg Rose92915f72010-01-09 02:24:10 +00001053 int i, q_vectors;
1054
1055 q_vectors = adapter->num_msix_vectors;
Greg Rose92915f72010-01-09 02:24:10 +00001056 i = q_vectors - 1;
1057
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001058 free_irq(adapter->msix_entries[i].vector, adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001059 i--;
1060
1061 for (; i >= 0; i--) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001062 /* free only the irqs that were actually requested */
1063 if (!adapter->q_vector[i]->rx.ring &&
1064 !adapter->q_vector[i]->tx.ring)
1065 continue;
1066
Greg Rose92915f72010-01-09 02:24:10 +00001067 free_irq(adapter->msix_entries[i].vector,
1068 adapter->q_vector[i]);
1069 }
1070
1071 ixgbevf_reset_q_vectors(adapter);
1072}
1073
1074/**
1075 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1076 * @adapter: board private structure
1077 **/
1078static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1079{
Greg Rose92915f72010-01-09 02:24:10 +00001080 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001081 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001082
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001083 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001084 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001085 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001086
1087 IXGBE_WRITE_FLUSH(hw);
1088
1089 for (i = 0; i < adapter->num_msix_vectors; i++)
1090 synchronize_irq(adapter->msix_entries[i].vector);
1091}
1092
1093/**
1094 * ixgbevf_irq_enable - Enable default interrupt generation settings
1095 * @adapter: board private structure
1096 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001097static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001098{
1099 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001100
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001101 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1102 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1103 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
Greg Rose92915f72010-01-09 02:24:10 +00001104}
1105
1106/**
Don Skidmorede02dec2014-01-16 02:30:09 -08001107 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1108 * @adapter: board private structure
1109 * @ring: structure containing ring specific data
1110 *
1111 * Configure the Tx descriptor ring after a reset.
1112 **/
1113static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1114 struct ixgbevf_ring *ring)
1115{
1116 struct ixgbe_hw *hw = &adapter->hw;
1117 u64 tdba = ring->dma;
1118 int wait_loop = 10;
1119 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1120 u8 reg_idx = ring->reg_idx;
1121
1122 /* disable queue to avoid issues while updating state */
1123 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1124 IXGBE_WRITE_FLUSH(hw);
1125
1126 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1127 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1128 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1129 ring->count * sizeof(union ixgbe_adv_tx_desc));
1130
1131 /* disable head writeback */
1132 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1133 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1134
1135 /* enable relaxed ordering */
1136 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1137 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1138 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1139
1140 /* reset head and tail pointers */
1141 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1142 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
1143 ring->tail = hw->hw_addr + IXGBE_VFTDT(reg_idx);
1144
1145 /* reset ntu and ntc to place SW in sync with hardwdare */
1146 ring->next_to_clean = 0;
1147 ring->next_to_use = 0;
1148
1149 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1150 * to or less than the number of on chip descriptors, which is
1151 * currently 40.
1152 */
1153 txdctl |= (8 << 16); /* WTHRESH = 8 */
1154
1155 /* Setting PTHRESH to 32 both improves performance */
1156 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1157 32; /* PTHRESH = 32 */
1158
1159 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1160
1161 /* poll to verify queue is enabled */
1162 do {
1163 usleep_range(1000, 2000);
1164 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1165 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1166 if (!wait_loop)
1167 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1168}
1169
1170/**
Greg Rose92915f72010-01-09 02:24:10 +00001171 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1172 * @adapter: board private structure
1173 *
1174 * Configure the Tx unit of the MAC after a reset.
1175 **/
1176static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1177{
Don Skidmorede02dec2014-01-16 02:30:09 -08001178 u32 i;
Greg Rose92915f72010-01-09 02:24:10 +00001179
1180 /* Setup the HW Tx Head and Tail descriptor pointers */
Don Skidmorede02dec2014-01-16 02:30:09 -08001181 for (i = 0; i < adapter->num_tx_queues; i++)
1182 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001183}
1184
1185#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1186
1187static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1188{
1189 struct ixgbevf_ring *rx_ring;
1190 struct ixgbe_hw *hw = &adapter->hw;
1191 u32 srrctl;
1192
Don Skidmore87e70ab2014-01-16 02:30:08 -08001193 rx_ring = adapter->rx_ring[index];
Greg Rose92915f72010-01-09 02:24:10 +00001194
1195 srrctl = IXGBE_SRRCTL_DROP_EN;
1196
Alexander Duyck77d5dfc2012-05-11 08:32:19 +00001197 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Greg Rose92915f72010-01-09 02:24:10 +00001198
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001199 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1200 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1201
Greg Rose92915f72010-01-09 02:24:10 +00001202 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1203}
1204
Don Skidmore1bb9c632013-09-21 01:57:33 +00001205static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1206{
1207 struct ixgbe_hw *hw = &adapter->hw;
1208
1209 /* PSRTYPE must be initialized in 82599 */
1210 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1211 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1212 IXGBE_PSRTYPE_L2HDR;
1213
1214 if (adapter->num_rx_queues > 1)
1215 psrtype |= 1 << 29;
1216
1217 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1218}
1219
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001220static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
1221{
1222 struct ixgbe_hw *hw = &adapter->hw;
1223 struct net_device *netdev = adapter->netdev;
1224 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1225 int i;
1226 u16 rx_buf_len;
1227
1228 /* notify the PF of our intent to use this size of frame */
1229 ixgbevf_rlpml_set_vf(hw, max_frame);
1230
1231 /* PF will allow an extra 4 bytes past for vlan tagged frames */
1232 max_frame += VLAN_HLEN;
1233
1234 /*
Greg Rose85624ca2012-11-13 04:03:19 +00001235 * Allocate buffer sizes that fit well into 32K and
1236 * take into account max frame size of 9.5K
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001237 */
1238 if ((hw->mac.type == ixgbe_mac_X540_vf) &&
1239 (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
1240 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose85624ca2012-11-13 04:03:19 +00001241 else if (max_frame <= IXGBEVF_RXBUFFER_2K)
1242 rx_buf_len = IXGBEVF_RXBUFFER_2K;
1243 else if (max_frame <= IXGBEVF_RXBUFFER_4K)
1244 rx_buf_len = IXGBEVF_RXBUFFER_4K;
1245 else if (max_frame <= IXGBEVF_RXBUFFER_8K)
1246 rx_buf_len = IXGBEVF_RXBUFFER_8K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001247 else
Greg Rose85624ca2012-11-13 04:03:19 +00001248 rx_buf_len = IXGBEVF_RXBUFFER_10K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001249
1250 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08001251 adapter->rx_ring[i]->rx_buf_len = rx_buf_len;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001252}
1253
Don Skidmorede02dec2014-01-16 02:30:09 -08001254#define IXGBEVF_MAX_RX_DESC_POLL 10
1255static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1256 struct ixgbevf_ring *ring)
1257{
1258 struct ixgbe_hw *hw = &adapter->hw;
1259 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1260 u32 rxdctl;
1261 u8 reg_idx = ring->reg_idx;
1262
1263 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1264 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1265
1266 /* write value back with RXDCTL.ENABLE bit cleared */
1267 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1268
1269 /* the hardware may take up to 100us to really disable the rx queue */
1270 do {
1271 udelay(10);
1272 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1273 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1274
1275 if (!wait_loop)
1276 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1277 reg_idx);
1278}
1279
1280static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1281 struct ixgbevf_ring *ring)
1282{
1283 struct ixgbe_hw *hw = &adapter->hw;
1284 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1285 u32 rxdctl;
1286 u8 reg_idx = ring->reg_idx;
1287
1288 do {
1289 usleep_range(1000, 2000);
1290 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1291 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1292
1293 if (!wait_loop)
1294 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1295 reg_idx);
1296}
1297
1298static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1299 struct ixgbevf_ring *ring)
1300{
1301 struct ixgbe_hw *hw = &adapter->hw;
1302 u64 rdba = ring->dma;
1303 u32 rxdctl;
1304 u8 reg_idx = ring->reg_idx;
1305
1306 /* disable queue to avoid issues while updating state */
1307 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1308 ixgbevf_disable_rx_queue(adapter, ring);
1309
1310 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1311 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1312 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1313 ring->count * sizeof(union ixgbe_adv_rx_desc));
1314
1315 /* enable relaxed ordering */
1316 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1317 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1318
1319 /* reset head and tail pointers */
1320 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1321 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
1322 ring->tail = hw->hw_addr + IXGBE_VFRDT(reg_idx);
1323
1324 /* reset ntu and ntc to place SW in sync with hardwdare */
1325 ring->next_to_clean = 0;
1326 ring->next_to_use = 0;
1327
1328 ixgbevf_configure_srrctl(adapter, reg_idx);
1329
1330 /* prevent DMA from exceeding buffer space available */
1331 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1332 rxdctl |= ring->rx_buf_len | IXGBE_RXDCTL_RLPML_EN;
1333 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1334 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1335
1336 ixgbevf_rx_desc_queue_enable(adapter, ring);
Emil Tantilov095e2612014-01-17 18:30:00 -08001337 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
Don Skidmorede02dec2014-01-16 02:30:09 -08001338}
1339
Greg Rose92915f72010-01-09 02:24:10 +00001340/**
1341 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1342 * @adapter: board private structure
1343 *
1344 * Configure the Rx unit of the MAC after a reset.
1345 **/
1346static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1347{
Don Skidmorede02dec2014-01-16 02:30:09 -08001348 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001349
Don Skidmore1bb9c632013-09-21 01:57:33 +00001350 ixgbevf_setup_psrtype(adapter);
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001351
1352 /* set_rx_buffer_len must be called before ring initialization */
1353 ixgbevf_set_rx_buffer_len(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001354
Greg Rose92915f72010-01-09 02:24:10 +00001355 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1356 * the Base and Length of the Rx Descriptor Ring */
Don Skidmorede02dec2014-01-16 02:30:09 -08001357 for (i = 0; i < adapter->num_rx_queues; i++)
1358 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001359}
1360
Patrick McHardy80d5c362013-04-19 02:04:28 +00001361static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1362 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001363{
1364 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1365 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001366 int err;
1367
John Fastabend55fdd45b2012-10-01 14:52:20 +00001368 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001369
Greg Rose92915f72010-01-09 02:24:10 +00001370 /* add VID to filter table */
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001371 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001372
John Fastabend55fdd45b2012-10-01 14:52:20 +00001373 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001374
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001375 /* translate error return types so error makes sense */
1376 if (err == IXGBE_ERR_MBX)
1377 return -EIO;
1378
1379 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1380 return -EACCES;
1381
Jiri Pirkodadcd652011-07-21 03:25:09 +00001382 set_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001383
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001384 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001385}
1386
Patrick McHardy80d5c362013-04-19 02:04:28 +00001387static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1388 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001389{
1390 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1391 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001392 int err = -EOPNOTSUPP;
Greg Rose92915f72010-01-09 02:24:10 +00001393
John Fastabend55fdd45b2012-10-01 14:52:20 +00001394 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001395
Greg Rose92915f72010-01-09 02:24:10 +00001396 /* remove VID from filter table */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001397 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001398
John Fastabend55fdd45b2012-10-01 14:52:20 +00001399 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001400
Jiri Pirkodadcd652011-07-21 03:25:09 +00001401 clear_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001402
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001403 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001404}
1405
1406static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1407{
Jiri Pirkodadcd652011-07-21 03:25:09 +00001408 u16 vid;
Greg Rose92915f72010-01-09 02:24:10 +00001409
Jiri Pirkodadcd652011-07-21 03:25:09 +00001410 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
Patrick McHardy80d5c362013-04-19 02:04:28 +00001411 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1412 htons(ETH_P_8021Q), vid);
Greg Rose92915f72010-01-09 02:24:10 +00001413}
1414
Greg Rose46ec20f2011-05-13 01:33:42 +00001415static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1416{
1417 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1418 struct ixgbe_hw *hw = &adapter->hw;
1419 int count = 0;
1420
1421 if ((netdev_uc_count(netdev)) > 10) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00001422 pr_err("Too many unicast filters - No Space\n");
Greg Rose46ec20f2011-05-13 01:33:42 +00001423 return -ENOSPC;
1424 }
1425
1426 if (!netdev_uc_empty(netdev)) {
1427 struct netdev_hw_addr *ha;
1428 netdev_for_each_uc_addr(ha, netdev) {
1429 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1430 udelay(200);
1431 }
1432 } else {
1433 /*
1434 * If the list is empty then send message to PF driver to
1435 * clear all macvlans on this VF.
1436 */
1437 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1438 }
1439
1440 return count;
1441}
1442
Greg Rose92915f72010-01-09 02:24:10 +00001443/**
Greg Rosedee847f2012-11-02 05:50:57 +00001444 * ixgbevf_set_rx_mode - Multicast and unicast set
Greg Rose92915f72010-01-09 02:24:10 +00001445 * @netdev: network interface device structure
1446 *
1447 * The set_rx_method entry point is called whenever the multicast address
Greg Rosedee847f2012-11-02 05:50:57 +00001448 * list, unicast address list or the network interface flags are updated.
1449 * This routine is responsible for configuring the hardware for proper
1450 * multicast mode and configuring requested unicast filters.
Greg Rose92915f72010-01-09 02:24:10 +00001451 **/
1452static void ixgbevf_set_rx_mode(struct net_device *netdev)
1453{
1454 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1455 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001456
John Fastabend55fdd45b2012-10-01 14:52:20 +00001457 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001458
Greg Rose92915f72010-01-09 02:24:10 +00001459 /* reprogram multicast list */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001460 hw->mac.ops.update_mc_addr_list(hw, netdev);
Greg Rose46ec20f2011-05-13 01:33:42 +00001461
1462 ixgbevf_write_uc_addr_list(netdev);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001463
John Fastabend55fdd45b2012-10-01 14:52:20 +00001464 spin_unlock_bh(&adapter->mbx_lock);
Greg Rose92915f72010-01-09 02:24:10 +00001465}
1466
1467static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1468{
1469 int q_idx;
1470 struct ixgbevf_q_vector *q_vector;
1471 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1472
1473 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Greg Rose92915f72010-01-09 02:24:10 +00001474 q_vector = adapter->q_vector[q_idx];
Jacob Kellerc777cdf2013-09-21 06:24:20 +00001475#ifdef CONFIG_NET_RX_BUSY_POLL
1476 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1477#endif
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001478 napi_enable(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00001479 }
1480}
1481
1482static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1483{
1484 int q_idx;
1485 struct ixgbevf_q_vector *q_vector;
1486 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1487
1488 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1489 q_vector = adapter->q_vector[q_idx];
Greg Rose92915f72010-01-09 02:24:10 +00001490 napi_disable(&q_vector->napi);
Jacob Kellerc777cdf2013-09-21 06:24:20 +00001491#ifdef CONFIG_NET_RX_BUSY_POLL
1492 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1493 pr_info("QV %d locked\n", q_idx);
1494 usleep_range(1000, 20000);
1495 }
1496#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +00001497 }
1498}
1499
Don Skidmore220fe052013-09-21 01:40:49 +00001500static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1501{
1502 struct ixgbe_hw *hw = &adapter->hw;
1503 unsigned int def_q = 0;
1504 unsigned int num_tcs = 0;
1505 unsigned int num_rx_queues = 1;
1506 int err;
1507
1508 spin_lock_bh(&adapter->mbx_lock);
1509
1510 /* fetch queue configuration from the PF */
1511 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1512
1513 spin_unlock_bh(&adapter->mbx_lock);
1514
1515 if (err)
1516 return err;
1517
1518 if (num_tcs > 1) {
1519 /* update default Tx ring register index */
Don Skidmore87e70ab2014-01-16 02:30:08 -08001520 adapter->tx_ring[0]->reg_idx = def_q;
Don Skidmore220fe052013-09-21 01:40:49 +00001521
1522 /* we need as many queues as traffic classes */
1523 num_rx_queues = num_tcs;
1524 }
1525
1526 /* if we have a bad config abort request queue reset */
1527 if (adapter->num_rx_queues != num_rx_queues) {
1528 /* force mailbox timeout to prevent further messages */
1529 hw->mbx.timeout = 0;
1530
1531 /* wait for watchdog to come around and bail us out */
1532 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1533 }
1534
1535 return 0;
1536}
1537
Greg Rose92915f72010-01-09 02:24:10 +00001538static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1539{
Don Skidmore220fe052013-09-21 01:40:49 +00001540 ixgbevf_configure_dcb(adapter);
1541
Don Skidmorede02dec2014-01-16 02:30:09 -08001542 ixgbevf_set_rx_mode(adapter->netdev);
Greg Rose92915f72010-01-09 02:24:10 +00001543
1544 ixgbevf_restore_vlan(adapter);
1545
1546 ixgbevf_configure_tx(adapter);
1547 ixgbevf_configure_rx(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001548}
1549
Greg Rose33bd9f62010-03-19 02:59:52 +00001550static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1551{
1552 /* Only save pre-reset stats if there are some */
1553 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1554 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1555 adapter->stats.base_vfgprc;
1556 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1557 adapter->stats.base_vfgptc;
1558 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1559 adapter->stats.base_vfgorc;
1560 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1561 adapter->stats.base_vfgotc;
1562 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1563 adapter->stats.base_vfmprc;
1564 }
1565}
1566
1567static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1568{
1569 struct ixgbe_hw *hw = &adapter->hw;
1570
1571 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1572 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1573 adapter->stats.last_vfgorc |=
1574 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1575 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1576 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1577 adapter->stats.last_vfgotc |=
1578 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1579 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1580
1581 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1582 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1583 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1584 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1585 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1586}
1587
Alexander Duyck31186782012-07-20 08:09:58 +00001588static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
1589{
1590 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck56e94092012-07-20 08:10:03 +00001591 int api[] = { ixgbe_mbox_api_11,
1592 ixgbe_mbox_api_10,
Alexander Duyck31186782012-07-20 08:09:58 +00001593 ixgbe_mbox_api_unknown };
1594 int err = 0, idx = 0;
1595
John Fastabend55fdd45b2012-10-01 14:52:20 +00001596 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001597
1598 while (api[idx] != ixgbe_mbox_api_unknown) {
1599 err = ixgbevf_negotiate_api_version(hw, api[idx]);
1600 if (!err)
1601 break;
1602 idx++;
1603 }
1604
John Fastabend55fdd45b2012-10-01 14:52:20 +00001605 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001606}
1607
Greg Rose795180d2012-04-17 04:29:34 +00001608static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001609{
1610 struct net_device *netdev = adapter->netdev;
1611 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001612
1613 ixgbevf_configure_msix(adapter);
1614
John Fastabend55fdd45b2012-10-01 14:52:20 +00001615 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001616
Greg Rose92fe0bf2012-11-02 05:50:47 +00001617 if (is_valid_ether_addr(hw->mac.addr))
1618 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1619 else
1620 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001621
John Fastabend55fdd45b2012-10-01 14:52:20 +00001622 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001623
Greg Rose92915f72010-01-09 02:24:10 +00001624 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1625 ixgbevf_napi_enable_all(adapter);
1626
1627 /* enable transmits */
1628 netif_tx_start_all_queues(netdev);
1629
Greg Rose33bd9f62010-03-19 02:59:52 +00001630 ixgbevf_save_reset_stats(adapter);
1631 ixgbevf_init_last_counter_stats(adapter);
1632
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001633 hw->mac.get_link_status = 1;
Greg Rose92915f72010-01-09 02:24:10 +00001634 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose92915f72010-01-09 02:24:10 +00001635}
1636
Greg Rose795180d2012-04-17 04:29:34 +00001637void ixgbevf_up(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001638{
Greg Rose92915f72010-01-09 02:24:10 +00001639 struct ixgbe_hw *hw = &adapter->hw;
1640
1641 ixgbevf_configure(adapter);
1642
Greg Rose795180d2012-04-17 04:29:34 +00001643 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001644
1645 /* clear any pending interrupts, may auto mask */
1646 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1647
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001648 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001649}
1650
1651/**
1652 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
Greg Rose92915f72010-01-09 02:24:10 +00001653 * @rx_ring: ring to free buffers from
1654 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08001655static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00001656{
Greg Rose92915f72010-01-09 02:24:10 +00001657 unsigned long size;
1658 unsigned int i;
1659
Greg Rosec0456c22010-01-22 22:47:18 +00001660 if (!rx_ring->rx_buffer_info)
1661 return;
Greg Rose92915f72010-01-09 02:24:10 +00001662
Greg Rosec0456c22010-01-22 22:47:18 +00001663 /* Free all the Rx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001664 for (i = 0; i < rx_ring->count; i++) {
1665 struct ixgbevf_rx_buffer *rx_buffer_info;
1666
1667 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1668 if (rx_buffer_info->dma) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08001669 dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
Greg Rose92915f72010-01-09 02:24:10 +00001670 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +00001671 DMA_FROM_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +00001672 rx_buffer_info->dma = 0;
1673 }
1674 if (rx_buffer_info->skb) {
1675 struct sk_buff *skb = rx_buffer_info->skb;
1676 rx_buffer_info->skb = NULL;
1677 do {
1678 struct sk_buff *this = skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +00001679 skb = IXGBE_CB(skb)->prev;
Greg Rose92915f72010-01-09 02:24:10 +00001680 dev_kfree_skb(this);
1681 } while (skb);
1682 }
Greg Rose92915f72010-01-09 02:24:10 +00001683 }
1684
1685 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1686 memset(rx_ring->rx_buffer_info, 0, size);
1687
1688 /* Zero out the descriptor ring */
1689 memset(rx_ring->desc, 0, rx_ring->size);
Greg Rose92915f72010-01-09 02:24:10 +00001690}
1691
1692/**
1693 * ixgbevf_clean_tx_ring - Free Tx Buffers
Greg Rose92915f72010-01-09 02:24:10 +00001694 * @tx_ring: ring to be cleaned
1695 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08001696static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00001697{
1698 struct ixgbevf_tx_buffer *tx_buffer_info;
1699 unsigned long size;
1700 unsigned int i;
1701
Greg Rosec0456c22010-01-22 22:47:18 +00001702 if (!tx_ring->tx_buffer_info)
1703 return;
1704
Greg Rose92915f72010-01-09 02:24:10 +00001705 /* Free all the Tx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001706 for (i = 0; i < tx_ring->count; i++) {
1707 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck70a10e22012-05-11 08:33:21 +00001708 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
Greg Rose92915f72010-01-09 02:24:10 +00001709 }
1710
1711 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1712 memset(tx_ring->tx_buffer_info, 0, size);
1713
1714 memset(tx_ring->desc, 0, tx_ring->size);
Greg Rose92915f72010-01-09 02:24:10 +00001715}
1716
1717/**
1718 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1719 * @adapter: board private structure
1720 **/
1721static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1722{
1723 int i;
1724
1725 for (i = 0; i < adapter->num_rx_queues; i++)
Emil Tantilov05d063a2014-01-17 18:29:59 -08001726 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001727}
1728
1729/**
1730 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1731 * @adapter: board private structure
1732 **/
1733static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1734{
1735 int i;
1736
1737 for (i = 0; i < adapter->num_tx_queues; i++)
Emil Tantilov05d063a2014-01-17 18:29:59 -08001738 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001739}
1740
1741void ixgbevf_down(struct ixgbevf_adapter *adapter)
1742{
1743 struct net_device *netdev = adapter->netdev;
1744 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmorede02dec2014-01-16 02:30:09 -08001745 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001746
1747 /* signal that we are down to the interrupt handler */
1748 set_bit(__IXGBEVF_DOWN, &adapter->state);
Don Skidmore858c3dd2013-10-01 04:33:50 -07001749
1750 /* disable all enabled rx queues */
1751 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08001752 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001753
1754 netif_tx_disable(netdev);
1755
1756 msleep(10);
1757
1758 netif_tx_stop_all_queues(netdev);
1759
1760 ixgbevf_irq_disable(adapter);
1761
1762 ixgbevf_napi_disable_all(adapter);
1763
1764 del_timer_sync(&adapter->watchdog_timer);
1765 /* can't call flush scheduled work here because it can deadlock
1766 * if linkwatch_event tries to acquire the rtnl_lock which we are
1767 * holding */
1768 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1769 msleep(1);
1770
1771 /* disable transmits in the hardware now that interrupts are off */
1772 for (i = 0; i < adapter->num_tx_queues; i++) {
Don Skidmorede02dec2014-01-16 02:30:09 -08001773 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
1774
1775 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
1776 IXGBE_TXDCTL_SWFLSH);
Greg Rose92915f72010-01-09 02:24:10 +00001777 }
1778
1779 netif_carrier_off(netdev);
1780
1781 if (!pci_channel_offline(adapter->pdev))
1782 ixgbevf_reset(adapter);
1783
1784 ixgbevf_clean_all_tx_rings(adapter);
1785 ixgbevf_clean_all_rx_rings(adapter);
1786}
1787
1788void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1789{
1790 WARN_ON(in_interrupt());
Greg Rosec0456c22010-01-22 22:47:18 +00001791
Greg Rose92915f72010-01-09 02:24:10 +00001792 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1793 msleep(1);
1794
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001795 ixgbevf_down(adapter);
1796 ixgbevf_up(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001797
1798 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1799}
1800
1801void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1802{
1803 struct ixgbe_hw *hw = &adapter->hw;
1804 struct net_device *netdev = adapter->netdev;
1805
Don Skidmore798e3812013-10-01 04:33:51 -07001806 if (hw->mac.ops.reset_hw(hw)) {
Greg Rose92915f72010-01-09 02:24:10 +00001807 hw_dbg(hw, "PF still resetting\n");
Don Skidmore798e3812013-10-01 04:33:51 -07001808 } else {
Greg Rose92915f72010-01-09 02:24:10 +00001809 hw->mac.ops.init_hw(hw);
Don Skidmore798e3812013-10-01 04:33:51 -07001810 ixgbevf_negotiate_api(adapter);
1811 }
Greg Rose92915f72010-01-09 02:24:10 +00001812
1813 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1814 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1815 netdev->addr_len);
1816 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1817 netdev->addr_len);
1818 }
1819}
1820
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001821static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1822 int vectors)
Greg Rose92915f72010-01-09 02:24:10 +00001823{
Emil Tantilova5f93372012-11-13 04:03:17 +00001824 int err = 0;
1825 int vector_threshold;
Greg Rose92915f72010-01-09 02:24:10 +00001826
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001827 /* We'll want at least 2 (vector_threshold):
1828 * 1) TxQ[0] + RxQ[0] handler
1829 * 2) Other (Link Status Change, etc.)
Greg Rose92915f72010-01-09 02:24:10 +00001830 */
1831 vector_threshold = MIN_MSIX_COUNT;
1832
1833 /* The more we get, the more we will assign to Tx/Rx Cleanup
1834 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1835 * Right now, we simply care about how many we'll get; we'll
1836 * set them up later while requesting irq's.
1837 */
1838 while (vectors >= vector_threshold) {
1839 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1840 vectors);
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001841 if (!err || err < 0) /* Success or a nasty failure. */
Greg Rose92915f72010-01-09 02:24:10 +00001842 break;
Greg Rose92915f72010-01-09 02:24:10 +00001843 else /* err == number of vectors we should try again with */
1844 vectors = err;
1845 }
1846
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001847 if (vectors < vector_threshold)
1848 err = -ENOMEM;
1849
1850 if (err) {
1851 dev_err(&adapter->pdev->dev,
1852 "Unable to allocate MSI-X interrupts\n");
Greg Rose92915f72010-01-09 02:24:10 +00001853 kfree(adapter->msix_entries);
1854 adapter->msix_entries = NULL;
1855 } else {
1856 /*
1857 * Adjust for only the vectors we'll use, which is minimum
1858 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1859 * vectors we were allocated.
1860 */
1861 adapter->num_msix_vectors = vectors;
1862 }
Greg Rosedee847f2012-11-02 05:50:57 +00001863
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001864 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001865}
1866
Ben Hutchings49ce9c22012-07-10 10:56:00 +00001867/**
1868 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
Greg Rose92915f72010-01-09 02:24:10 +00001869 * @adapter: board private structure to initialize
1870 *
1871 * This is the top level queue allocation routine. The order here is very
1872 * important, starting with the "most" number of features turned on at once,
1873 * and ending with the smallest set of features. This way large combinations
1874 * can be allocated if they're turned on, and smaller combinations are the
1875 * fallthrough conditions.
1876 *
1877 **/
1878static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1879{
Don Skidmore220fe052013-09-21 01:40:49 +00001880 struct ixgbe_hw *hw = &adapter->hw;
1881 unsigned int def_q = 0;
1882 unsigned int num_tcs = 0;
1883 int err;
1884
Greg Rose92915f72010-01-09 02:24:10 +00001885 /* Start with base case */
1886 adapter->num_rx_queues = 1;
1887 adapter->num_tx_queues = 1;
Don Skidmore220fe052013-09-21 01:40:49 +00001888
1889 spin_lock_bh(&adapter->mbx_lock);
1890
1891 /* fetch queue configuration from the PF */
1892 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1893
1894 spin_unlock_bh(&adapter->mbx_lock);
1895
1896 if (err)
1897 return;
1898
1899 /* we need as many queues as traffic classes */
1900 if (num_tcs > 1)
1901 adapter->num_rx_queues = num_tcs;
Greg Rose92915f72010-01-09 02:24:10 +00001902}
1903
1904/**
1905 * ixgbevf_alloc_queues - Allocate memory for all rings
1906 * @adapter: board private structure to initialize
1907 *
1908 * We allocate one ring per queue at run-time since we don't know the
1909 * number of queues at compile-time. The polling_netdev array is
1910 * intended for Multiqueue, but should work fine with a single queue.
1911 **/
1912static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1913{
Don Skidmore87e70ab2014-01-16 02:30:08 -08001914 struct ixgbevf_ring *ring;
1915 int rx = 0, tx = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001916
Don Skidmore87e70ab2014-01-16 02:30:08 -08001917 for (; tx < adapter->num_tx_queues; tx++) {
1918 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1919 if (!ring)
1920 goto err_allocation;
Greg Rose92915f72010-01-09 02:24:10 +00001921
Don Skidmore87e70ab2014-01-16 02:30:08 -08001922 ring->dev = &adapter->pdev->dev;
1923 ring->netdev = adapter->netdev;
1924 ring->count = adapter->tx_ring_count;
1925 ring->queue_index = tx;
1926 ring->reg_idx = tx;
Greg Rose92915f72010-01-09 02:24:10 +00001927
Don Skidmore87e70ab2014-01-16 02:30:08 -08001928 adapter->tx_ring[tx] = ring;
Greg Rose92915f72010-01-09 02:24:10 +00001929 }
1930
Don Skidmore87e70ab2014-01-16 02:30:08 -08001931 for (; rx < adapter->num_rx_queues; rx++) {
1932 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1933 if (!ring)
1934 goto err_allocation;
1935
1936 ring->dev = &adapter->pdev->dev;
1937 ring->netdev = adapter->netdev;
1938
1939 ring->count = adapter->rx_ring_count;
1940 ring->queue_index = rx;
1941 ring->reg_idx = rx;
1942
1943 adapter->rx_ring[rx] = ring;
Greg Rose92915f72010-01-09 02:24:10 +00001944 }
1945
1946 return 0;
1947
Don Skidmore87e70ab2014-01-16 02:30:08 -08001948err_allocation:
1949 while (tx) {
1950 kfree(adapter->tx_ring[--tx]);
1951 adapter->tx_ring[tx] = NULL;
1952 }
1953
1954 while (rx) {
1955 kfree(adapter->rx_ring[--rx]);
1956 adapter->rx_ring[rx] = NULL;
1957 }
Greg Rose92915f72010-01-09 02:24:10 +00001958 return -ENOMEM;
1959}
1960
1961/**
1962 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1963 * @adapter: board private structure to initialize
1964 *
1965 * Attempt to configure the interrupts using the best available
1966 * capabilities of the hardware and the kernel.
1967 **/
1968static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1969{
Greg Rose91e2b892012-10-03 00:57:23 +00001970 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00001971 int err = 0;
1972 int vector, v_budget;
1973
1974 /*
1975 * It's easy to be greedy for MSI-X vectors, but it really
1976 * doesn't do us much good if we have a lot more vectors
1977 * than CPU's. So let's be conservative and only ask for
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001978 * (roughly) the same number of vectors as there are CPU's.
1979 * The default is to use pairs of vectors.
Greg Rose92915f72010-01-09 02:24:10 +00001980 */
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001981 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
1982 v_budget = min_t(int, v_budget, num_online_cpus());
1983 v_budget += NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00001984
1985 /* A failure in MSI-X entry allocation isn't fatal, but it does
1986 * mean we disable MSI-X capabilities of the adapter. */
1987 adapter->msix_entries = kcalloc(v_budget,
1988 sizeof(struct msix_entry), GFP_KERNEL);
1989 if (!adapter->msix_entries) {
1990 err = -ENOMEM;
1991 goto out;
1992 }
1993
1994 for (vector = 0; vector < v_budget; vector++)
1995 adapter->msix_entries[vector].entry = vector;
1996
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001997 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
1998 if (err)
1999 goto out;
Greg Rose92915f72010-01-09 02:24:10 +00002000
Greg Rose91e2b892012-10-03 00:57:23 +00002001 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2002 if (err)
2003 goto out;
2004
2005 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
2006
Greg Rose92915f72010-01-09 02:24:10 +00002007out:
2008 return err;
2009}
2010
2011/**
2012 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2013 * @adapter: board private structure to initialize
2014 *
2015 * We allocate one q_vector per queue interrupt. If allocation fails we
2016 * return -ENOMEM.
2017 **/
2018static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2019{
2020 int q_idx, num_q_vectors;
2021 struct ixgbevf_q_vector *q_vector;
Greg Rose92915f72010-01-09 02:24:10 +00002022
2023 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00002024
2025 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2026 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2027 if (!q_vector)
2028 goto err_out;
2029 q_vector->adapter = adapter;
2030 q_vector->v_idx = q_idx;
Alexander Duyckfa71ae22012-05-11 08:32:50 +00002031 netif_napi_add(adapter->netdev, &q_vector->napi,
2032 ixgbevf_poll, 64);
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002033#ifdef CONFIG_NET_RX_BUSY_POLL
2034 napi_hash_add(&q_vector->napi);
2035#endif
Greg Rose92915f72010-01-09 02:24:10 +00002036 adapter->q_vector[q_idx] = q_vector;
2037 }
2038
2039 return 0;
2040
2041err_out:
2042 while (q_idx) {
2043 q_idx--;
2044 q_vector = adapter->q_vector[q_idx];
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002045#ifdef CONFIG_NET_RX_BUSY_POLL
2046 napi_hash_del(&q_vector->napi);
2047#endif
Greg Rose92915f72010-01-09 02:24:10 +00002048 netif_napi_del(&q_vector->napi);
2049 kfree(q_vector);
2050 adapter->q_vector[q_idx] = NULL;
2051 }
2052 return -ENOMEM;
2053}
2054
2055/**
2056 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2057 * @adapter: board private structure to initialize
2058 *
2059 * This function frees the memory allocated to the q_vectors. In addition if
2060 * NAPI is enabled it will delete any references to the NAPI struct prior
2061 * to freeing the q_vector.
2062 **/
2063static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2064{
John Fastabendf4477702012-09-16 08:19:46 +00002065 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00002066
2067 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2068 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2069
2070 adapter->q_vector[q_idx] = NULL;
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002071#ifdef CONFIG_NET_RX_BUSY_POLL
2072 napi_hash_del(&q_vector->napi);
2073#endif
John Fastabendf4477702012-09-16 08:19:46 +00002074 netif_napi_del(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00002075 kfree(q_vector);
2076 }
2077}
2078
2079/**
2080 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2081 * @adapter: board private structure
2082 *
2083 **/
2084static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2085{
2086 pci_disable_msix(adapter->pdev);
2087 kfree(adapter->msix_entries);
2088 adapter->msix_entries = NULL;
Greg Rose92915f72010-01-09 02:24:10 +00002089}
2090
2091/**
2092 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2093 * @adapter: board private structure to initialize
2094 *
2095 **/
2096static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2097{
2098 int err;
2099
2100 /* Number of supported queues */
2101 ixgbevf_set_num_queues(adapter);
2102
2103 err = ixgbevf_set_interrupt_capability(adapter);
2104 if (err) {
2105 hw_dbg(&adapter->hw,
2106 "Unable to setup interrupt capabilities\n");
2107 goto err_set_interrupt;
2108 }
2109
2110 err = ixgbevf_alloc_q_vectors(adapter);
2111 if (err) {
2112 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2113 "vectors\n");
2114 goto err_alloc_q_vectors;
2115 }
2116
2117 err = ixgbevf_alloc_queues(adapter);
2118 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002119 pr_err("Unable to allocate memory for queues\n");
Greg Rose92915f72010-01-09 02:24:10 +00002120 goto err_alloc_queues;
2121 }
2122
2123 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2124 "Tx Queue count = %u\n",
2125 (adapter->num_rx_queues > 1) ? "Enabled" :
2126 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2127
2128 set_bit(__IXGBEVF_DOWN, &adapter->state);
2129
2130 return 0;
2131err_alloc_queues:
2132 ixgbevf_free_q_vectors(adapter);
2133err_alloc_q_vectors:
2134 ixgbevf_reset_interrupt_capability(adapter);
2135err_set_interrupt:
2136 return err;
2137}
2138
2139/**
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00002140 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2141 * @adapter: board private structure to clear interrupt scheme on
2142 *
2143 * We go through and clear interrupt specific resources and reset the structure
2144 * to pre-load conditions
2145 **/
2146static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2147{
Don Skidmore87e70ab2014-01-16 02:30:08 -08002148 int i;
2149
2150 for (i = 0; i < adapter->num_tx_queues; i++) {
2151 kfree(adapter->tx_ring[i]);
2152 adapter->tx_ring[i] = NULL;
2153 }
2154 for (i = 0; i < adapter->num_rx_queues; i++) {
2155 kfree(adapter->rx_ring[i]);
2156 adapter->rx_ring[i] = NULL;
2157 }
2158
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00002159 adapter->num_tx_queues = 0;
2160 adapter->num_rx_queues = 0;
2161
2162 ixgbevf_free_q_vectors(adapter);
2163 ixgbevf_reset_interrupt_capability(adapter);
2164}
2165
2166/**
Greg Rose92915f72010-01-09 02:24:10 +00002167 * ixgbevf_sw_init - Initialize general software structures
2168 * (struct ixgbevf_adapter)
2169 * @adapter: board private structure to initialize
2170 *
2171 * ixgbevf_sw_init initializes the Adapter private data structure.
2172 * Fields are initialized based on PCI device information and
2173 * OS network device settings (MTU size).
2174 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05002175static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00002176{
2177 struct ixgbe_hw *hw = &adapter->hw;
2178 struct pci_dev *pdev = adapter->pdev;
Greg Rosee1941a72013-02-13 03:02:05 +00002179 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00002180 int err;
2181
2182 /* PCI config space info */
2183
2184 hw->vendor_id = pdev->vendor;
2185 hw->device_id = pdev->device;
Sergei Shtylyovff938e42011-02-28 11:57:33 -08002186 hw->revision_id = pdev->revision;
Greg Rose92915f72010-01-09 02:24:10 +00002187 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2188 hw->subsystem_device_id = pdev->subsystem_device;
2189
2190 hw->mbx.ops.init_params(hw);
Alexander Duyck56e94092012-07-20 08:10:03 +00002191
2192 /* assume legacy case in which PF would only give VF 2 queues */
2193 hw->mac.max_tx_queues = 2;
2194 hw->mac.max_rx_queues = 2;
2195
Don Skidmore798e3812013-10-01 04:33:51 -07002196 /* lock to protect mailbox accesses */
2197 spin_lock_init(&adapter->mbx_lock);
2198
Greg Rose92915f72010-01-09 02:24:10 +00002199 err = hw->mac.ops.reset_hw(hw);
2200 if (err) {
2201 dev_info(&pdev->dev,
Greg Rosee1941a72013-02-13 03:02:05 +00002202 "PF still in reset state. Is the PF interface up?\n");
Greg Rose92915f72010-01-09 02:24:10 +00002203 } else {
2204 err = hw->mac.ops.init_hw(hw);
2205 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002206 pr_err("init_shared_code failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +00002207 goto out;
2208 }
Don Skidmore798e3812013-10-01 04:33:51 -07002209 ixgbevf_negotiate_api(adapter);
Greg Rosee1941a72013-02-13 03:02:05 +00002210 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2211 if (err)
2212 dev_info(&pdev->dev, "Error reading MAC address\n");
2213 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2214 dev_info(&pdev->dev,
2215 "MAC address not assigned by administrator.\n");
2216 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2217 }
2218
2219 if (!is_valid_ether_addr(netdev->dev_addr)) {
2220 dev_info(&pdev->dev, "Assigning random MAC address\n");
2221 eth_hw_addr_random(netdev);
2222 memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
Greg Rose92915f72010-01-09 02:24:10 +00002223 }
2224
2225 /* Enable dynamic interrupt throttling rates */
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002226 adapter->rx_itr_setting = 1;
2227 adapter->tx_itr_setting = 1;
Greg Rose92915f72010-01-09 02:24:10 +00002228
Greg Rose92915f72010-01-09 02:24:10 +00002229 /* set default ring sizes */
2230 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2231 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2232
Greg Rose92915f72010-01-09 02:24:10 +00002233 set_bit(__IXGBEVF_DOWN, &adapter->state);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00002234 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002235
2236out:
2237 return err;
2238}
2239
Greg Rose92915f72010-01-09 02:24:10 +00002240#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2241 { \
2242 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2243 if (current_counter < last_counter) \
2244 counter += 0x100000000LL; \
2245 last_counter = current_counter; \
2246 counter &= 0xFFFFFFFF00000000LL; \
2247 counter |= current_counter; \
2248 }
2249
2250#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2251 { \
2252 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2253 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2254 u64 current_counter = (current_counter_msb << 32) | \
2255 current_counter_lsb; \
2256 if (current_counter < last_counter) \
2257 counter += 0x1000000000LL; \
2258 last_counter = current_counter; \
2259 counter &= 0xFFFFFFF000000000LL; \
2260 counter |= current_counter; \
2261 }
2262/**
2263 * ixgbevf_update_stats - Update the board statistics counters.
2264 * @adapter: board private structure
2265 **/
2266void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2267{
2268 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose55fb2772012-11-06 05:53:32 +00002269 int i;
Greg Rose92915f72010-01-09 02:24:10 +00002270
Greg Rose088245a2013-01-04 07:37:31 +00002271 if (!adapter->link_up)
2272 return;
2273
Greg Rose92915f72010-01-09 02:24:10 +00002274 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2275 adapter->stats.vfgprc);
2276 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2277 adapter->stats.vfgptc);
2278 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2279 adapter->stats.last_vfgorc,
2280 adapter->stats.vfgorc);
2281 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2282 adapter->stats.last_vfgotc,
2283 adapter->stats.vfgotc);
2284 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2285 adapter->stats.vfmprc);
Greg Rose55fb2772012-11-06 05:53:32 +00002286
2287 for (i = 0; i < adapter->num_rx_queues; i++) {
2288 adapter->hw_csum_rx_error +=
Don Skidmore87e70ab2014-01-16 02:30:08 -08002289 adapter->rx_ring[i]->hw_csum_rx_error;
Don Skidmore87e70ab2014-01-16 02:30:08 -08002290 adapter->rx_ring[i]->hw_csum_rx_error = 0;
Greg Rose55fb2772012-11-06 05:53:32 +00002291 }
Greg Rose92915f72010-01-09 02:24:10 +00002292}
2293
2294/**
2295 * ixgbevf_watchdog - Timer Call-back
2296 * @data: pointer to adapter cast into an unsigned long
2297 **/
2298static void ixgbevf_watchdog(unsigned long data)
2299{
2300 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2301 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002302 u32 eics = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002303 int i;
2304
2305 /*
2306 * Do the watchdog outside of interrupt context due to the lovely
2307 * delays that some of the newer hardware requires
2308 */
2309
2310 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2311 goto watchdog_short_circuit;
2312
2313 /* get one bit for every active tx/rx interrupt vector */
2314 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2315 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +00002316 if (qv->rx.ring || qv->tx.ring)
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002317 eics |= 1 << i;
Greg Rose92915f72010-01-09 02:24:10 +00002318 }
2319
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002320 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
Greg Rose92915f72010-01-09 02:24:10 +00002321
2322watchdog_short_circuit:
2323 schedule_work(&adapter->watchdog_task);
2324}
2325
2326/**
2327 * ixgbevf_tx_timeout - Respond to a Tx Hang
2328 * @netdev: network interface device structure
2329 **/
2330static void ixgbevf_tx_timeout(struct net_device *netdev)
2331{
2332 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2333
2334 /* Do the reset outside of interrupt context */
2335 schedule_work(&adapter->reset_task);
2336}
2337
2338static void ixgbevf_reset_task(struct work_struct *work)
2339{
2340 struct ixgbevf_adapter *adapter;
2341 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2342
2343 /* If we're already down or resetting, just bail */
2344 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2345 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2346 return;
2347
2348 adapter->tx_timeout_count++;
2349
2350 ixgbevf_reinit_locked(adapter);
2351}
2352
2353/**
2354 * ixgbevf_watchdog_task - worker thread to bring link up
2355 * @work: pointer to work_struct containing our data
2356 **/
2357static void ixgbevf_watchdog_task(struct work_struct *work)
2358{
2359 struct ixgbevf_adapter *adapter = container_of(work,
2360 struct ixgbevf_adapter,
2361 watchdog_task);
2362 struct net_device *netdev = adapter->netdev;
2363 struct ixgbe_hw *hw = &adapter->hw;
2364 u32 link_speed = adapter->link_speed;
2365 bool link_up = adapter->link_up;
Greg Rose92fe0bf2012-11-02 05:50:47 +00002366 s32 need_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002367
Don Skidmore220fe052013-09-21 01:40:49 +00002368 ixgbevf_queue_reset_subtask(adapter);
2369
Greg Rose92915f72010-01-09 02:24:10 +00002370 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2371
2372 /*
2373 * Always check the link on the watchdog because we have
2374 * no LSC interrupt
2375 */
Greg Rose92fe0bf2012-11-02 05:50:47 +00002376 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002377
Greg Rose92fe0bf2012-11-02 05:50:47 +00002378 need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002379
Greg Rose92fe0bf2012-11-02 05:50:47 +00002380 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002381
Greg Rose92fe0bf2012-11-02 05:50:47 +00002382 if (need_reset) {
2383 adapter->link_up = link_up;
2384 adapter->link_speed = link_speed;
2385 netif_carrier_off(netdev);
2386 netif_tx_stop_all_queues(netdev);
2387 schedule_work(&adapter->reset_task);
2388 goto pf_has_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002389 }
2390 adapter->link_up = link_up;
2391 adapter->link_speed = link_speed;
2392
2393 if (link_up) {
2394 if (!netif_carrier_ok(netdev)) {
Greg Roseb876a742013-01-19 06:40:22 +00002395 char *link_speed_string;
2396 switch (link_speed) {
2397 case IXGBE_LINK_SPEED_10GB_FULL:
2398 link_speed_string = "10 Gbps";
2399 break;
2400 case IXGBE_LINK_SPEED_1GB_FULL:
2401 link_speed_string = "1 Gbps";
2402 break;
2403 case IXGBE_LINK_SPEED_100_FULL:
2404 link_speed_string = "100 Mbps";
2405 break;
2406 default:
2407 link_speed_string = "unknown speed";
2408 break;
2409 }
Greg Rose6fe59672013-01-04 07:37:26 +00002410 dev_info(&adapter->pdev->dev,
Greg Roseb876a742013-01-19 06:40:22 +00002411 "NIC Link is Up, %s\n", link_speed_string);
Greg Rose92915f72010-01-09 02:24:10 +00002412 netif_carrier_on(netdev);
2413 netif_tx_wake_all_queues(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00002414 }
2415 } else {
2416 adapter->link_up = false;
2417 adapter->link_speed = 0;
2418 if (netif_carrier_ok(netdev)) {
Greg Rose6fe59672013-01-04 07:37:26 +00002419 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
Greg Rose92915f72010-01-09 02:24:10 +00002420 netif_carrier_off(netdev);
2421 netif_tx_stop_all_queues(netdev);
2422 }
2423 }
2424
Greg Rose92915f72010-01-09 02:24:10 +00002425 ixgbevf_update_stats(adapter);
2426
Greg Rose33bd9f62010-03-19 02:59:52 +00002427pf_has_reset:
Greg Rose92915f72010-01-09 02:24:10 +00002428 /* Reset the timer */
2429 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2430 mod_timer(&adapter->watchdog_timer,
2431 round_jiffies(jiffies + (2 * HZ)));
2432
2433 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2434}
2435
2436/**
2437 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
Greg Rose92915f72010-01-09 02:24:10 +00002438 * @tx_ring: Tx descriptor ring for a specific queue
2439 *
2440 * Free all transmit software resources
2441 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002442void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002443{
Emil Tantilov05d063a2014-01-17 18:29:59 -08002444 ixgbevf_clean_tx_ring(tx_ring);
Greg Rose92915f72010-01-09 02:24:10 +00002445
2446 vfree(tx_ring->tx_buffer_info);
2447 tx_ring->tx_buffer_info = NULL;
2448
Don Skidmorede02dec2014-01-16 02:30:09 -08002449 /* if not set, then don't free */
2450 if (!tx_ring->desc)
2451 return;
2452
Emil Tantilov05d063a2014-01-17 18:29:59 -08002453 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002454 tx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002455
2456 tx_ring->desc = NULL;
2457}
2458
2459/**
2460 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2461 * @adapter: board private structure
2462 *
2463 * Free all transmit software resources
2464 **/
2465static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2466{
2467 int i;
2468
2469 for (i = 0; i < adapter->num_tx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08002470 if (adapter->tx_ring[i]->desc)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002471 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002472}
2473
2474/**
2475 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
Greg Rose92915f72010-01-09 02:24:10 +00002476 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2477 *
2478 * Return 0 on success, negative on failure
2479 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002480int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002481{
Greg Rose92915f72010-01-09 02:24:10 +00002482 int size;
2483
2484 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002485 tx_ring->tx_buffer_info = vzalloc(size);
Greg Rose92915f72010-01-09 02:24:10 +00002486 if (!tx_ring->tx_buffer_info)
2487 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002488
2489 /* round up to nearest 4K */
2490 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2491 tx_ring->size = ALIGN(tx_ring->size, 4096);
2492
Emil Tantilov05d063a2014-01-17 18:29:59 -08002493 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002494 &tx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002495 if (!tx_ring->desc)
2496 goto err;
2497
Greg Rose92915f72010-01-09 02:24:10 +00002498 return 0;
2499
2500err:
2501 vfree(tx_ring->tx_buffer_info);
2502 tx_ring->tx_buffer_info = NULL;
2503 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2504 "descriptor ring\n");
2505 return -ENOMEM;
2506}
2507
2508/**
2509 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2510 * @adapter: board private structure
2511 *
2512 * If this function returns with an error, then it's possible one or
2513 * more of the rings is populated (while the rest are not). It is the
2514 * callers duty to clean those orphaned rings.
2515 *
2516 * Return 0 on success, negative on failure
2517 **/
2518static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2519{
2520 int i, err = 0;
2521
2522 for (i = 0; i < adapter->num_tx_queues; i++) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08002523 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002524 if (!err)
2525 continue;
2526 hw_dbg(&adapter->hw,
2527 "Allocation for Tx Queue %u failed\n", i);
2528 break;
2529 }
2530
2531 return err;
2532}
2533
2534/**
2535 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
Greg Rose92915f72010-01-09 02:24:10 +00002536 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2537 *
2538 * Returns 0 on success, negative on failure
2539 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002540int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002541{
Greg Rose92915f72010-01-09 02:24:10 +00002542 int size;
2543
2544 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002545 rx_ring->rx_buffer_info = vzalloc(size);
Joe Perchese404dec2012-01-29 12:56:23 +00002546 if (!rx_ring->rx_buffer_info)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002547 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002548
2549 /* Round up to nearest 4K */
2550 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2551 rx_ring->size = ALIGN(rx_ring->size, 4096);
2552
Emil Tantilov05d063a2014-01-17 18:29:59 -08002553 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002554 &rx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002555
Emil Tantilov05d063a2014-01-17 18:29:59 -08002556 if (!rx_ring->desc)
2557 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002558
Greg Rose92915f72010-01-09 02:24:10 +00002559 return 0;
Emil Tantilov05d063a2014-01-17 18:29:59 -08002560err:
2561 vfree(rx_ring->rx_buffer_info);
2562 rx_ring->rx_buffer_info = NULL;
2563 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
Greg Rose92915f72010-01-09 02:24:10 +00002564 return -ENOMEM;
2565}
2566
2567/**
2568 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2569 * @adapter: board private structure
2570 *
2571 * If this function returns with an error, then it's possible one or
2572 * more of the rings is populated (while the rest are not). It is the
2573 * callers duty to clean those orphaned rings.
2574 *
2575 * Return 0 on success, negative on failure
2576 **/
2577static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2578{
2579 int i, err = 0;
2580
2581 for (i = 0; i < adapter->num_rx_queues; i++) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08002582 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002583 if (!err)
2584 continue;
2585 hw_dbg(&adapter->hw,
2586 "Allocation for Rx Queue %u failed\n", i);
2587 break;
2588 }
2589 return err;
2590}
2591
2592/**
2593 * ixgbevf_free_rx_resources - Free Rx Resources
Greg Rose92915f72010-01-09 02:24:10 +00002594 * @rx_ring: ring to clean the resources from
2595 *
2596 * Free all receive software resources
2597 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002598void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002599{
Emil Tantilov05d063a2014-01-17 18:29:59 -08002600 ixgbevf_clean_rx_ring(rx_ring);
Greg Rose92915f72010-01-09 02:24:10 +00002601
2602 vfree(rx_ring->rx_buffer_info);
2603 rx_ring->rx_buffer_info = NULL;
2604
Emil Tantilov05d063a2014-01-17 18:29:59 -08002605 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002606 rx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002607
2608 rx_ring->desc = NULL;
2609}
2610
2611/**
2612 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2613 * @adapter: board private structure
2614 *
2615 * Free all receive software resources
2616 **/
2617static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2618{
2619 int i;
2620
2621 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08002622 if (adapter->rx_ring[i]->desc)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002623 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002624}
2625
2626/**
2627 * ixgbevf_open - Called when a network interface is made active
2628 * @netdev: network interface device structure
2629 *
2630 * Returns 0 on success, negative value on failure
2631 *
2632 * The open entry point is called when a network interface is made
2633 * active by the system (IFF_UP). At this point all resources needed
2634 * for transmit and receive operations are allocated, the interrupt
2635 * handler is registered with the OS, the watchdog timer is started,
2636 * and the stack is notified that the interface is ready.
2637 **/
2638static int ixgbevf_open(struct net_device *netdev)
2639{
2640 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2641 struct ixgbe_hw *hw = &adapter->hw;
2642 int err;
2643
xunleera1f6c6b2013-03-05 07:44:20 +00002644 /* A previous failure to open the device because of a lack of
2645 * available MSIX vector resources may have reset the number
2646 * of msix vectors variable to zero. The only way to recover
2647 * is to unload/reload the driver and hope that the system has
2648 * been able to recover some MSIX vector resources.
2649 */
2650 if (!adapter->num_msix_vectors)
2651 return -ENOMEM;
2652
Greg Rose92915f72010-01-09 02:24:10 +00002653 /* disallow open during test */
2654 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2655 return -EBUSY;
2656
2657 if (hw->adapter_stopped) {
2658 ixgbevf_reset(adapter);
2659 /* if adapter is still stopped then PF isn't up and
2660 * the vf can't start. */
2661 if (hw->adapter_stopped) {
2662 err = IXGBE_ERR_MBX;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002663 pr_err("Unable to start - perhaps the PF Driver isn't "
2664 "up yet\n");
Greg Rose92915f72010-01-09 02:24:10 +00002665 goto err_setup_reset;
2666 }
2667 }
2668
2669 /* allocate transmit descriptors */
2670 err = ixgbevf_setup_all_tx_resources(adapter);
2671 if (err)
2672 goto err_setup_tx;
2673
2674 /* allocate receive descriptors */
2675 err = ixgbevf_setup_all_rx_resources(adapter);
2676 if (err)
2677 goto err_setup_rx;
2678
2679 ixgbevf_configure(adapter);
2680
2681 /*
2682 * Map the Tx/Rx rings to the vectors we were allotted.
2683 * if request_irq will be called in this function map_rings
2684 * must be called *before* up_complete
2685 */
2686 ixgbevf_map_rings_to_vectors(adapter);
2687
Greg Rose795180d2012-04-17 04:29:34 +00002688 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002689
2690 /* clear any pending interrupts, may auto mask */
2691 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2692 err = ixgbevf_request_irq(adapter);
2693 if (err)
2694 goto err_req_irq;
2695
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002696 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002697
2698 return 0;
2699
2700err_req_irq:
2701 ixgbevf_down(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002702err_setup_rx:
2703 ixgbevf_free_all_rx_resources(adapter);
2704err_setup_tx:
2705 ixgbevf_free_all_tx_resources(adapter);
2706 ixgbevf_reset(adapter);
2707
2708err_setup_reset:
2709
2710 return err;
2711}
2712
2713/**
2714 * ixgbevf_close - Disables a network interface
2715 * @netdev: network interface device structure
2716 *
2717 * Returns 0, this is not allowed to fail
2718 *
2719 * The close entry point is called when an interface is de-activated
2720 * by the OS. The hardware is still under the drivers control, but
2721 * needs to be disabled. A global MAC reset is issued to stop the
2722 * hardware, and all transmit and receive resources are freed.
2723 **/
2724static int ixgbevf_close(struct net_device *netdev)
2725{
2726 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2727
2728 ixgbevf_down(adapter);
2729 ixgbevf_free_irq(adapter);
2730
2731 ixgbevf_free_all_tx_resources(adapter);
2732 ixgbevf_free_all_rx_resources(adapter);
2733
2734 return 0;
2735}
2736
Don Skidmore220fe052013-09-21 01:40:49 +00002737static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
2738{
2739 struct net_device *dev = adapter->netdev;
2740
2741 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
2742 return;
2743
2744 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
2745
2746 /* if interface is down do nothing */
2747 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2748 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2749 return;
2750
2751 /* Hardware has to reinitialize queues and interrupts to
2752 * match packet buffer alignment. Unfortunately, the
2753 * hardware is not flexible enough to do this dynamically.
2754 */
2755 if (netif_running(dev))
2756 ixgbevf_close(dev);
2757
2758 ixgbevf_clear_interrupt_scheme(adapter);
2759 ixgbevf_init_interrupt_scheme(adapter);
2760
2761 if (netif_running(dev))
2762 ixgbevf_open(dev);
2763}
2764
Alexander Duyck70a10e22012-05-11 08:33:21 +00002765static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
2766 u32 vlan_macip_lens, u32 type_tucmd,
2767 u32 mss_l4len_idx)
2768{
2769 struct ixgbe_adv_tx_context_desc *context_desc;
2770 u16 i = tx_ring->next_to_use;
2771
2772 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
2773
2774 i++;
2775 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2776
2777 /* set bits to identify this as an advanced context descriptor */
2778 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
2779
2780 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2781 context_desc->seqnum_seed = 0;
2782 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
2783 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2784}
2785
2786static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002787 struct ixgbevf_tx_buffer *first,
2788 u8 *hdr_len)
Greg Rose92915f72010-01-09 02:24:10 +00002789{
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002790 struct sk_buff *skb = first->skb;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002791 u32 vlan_macip_lens, type_tucmd;
Greg Rose92915f72010-01-09 02:24:10 +00002792 u32 mss_l4len_idx, l4len;
2793
Alexander Duyck70a10e22012-05-11 08:33:21 +00002794 if (!skb_is_gso(skb))
2795 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002796
Alexander Duyck70a10e22012-05-11 08:33:21 +00002797 if (skb_header_cloned(skb)) {
2798 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2799 if (err)
2800 return err;
Greg Rose92915f72010-01-09 02:24:10 +00002801 }
2802
Alexander Duyck70a10e22012-05-11 08:33:21 +00002803 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2804 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
2805
2806 if (skb->protocol == htons(ETH_P_IP)) {
2807 struct iphdr *iph = ip_hdr(skb);
2808 iph->tot_len = 0;
2809 iph->check = 0;
2810 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2811 iph->daddr, 0,
2812 IPPROTO_TCP,
2813 0);
2814 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002815 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
2816 IXGBE_TX_FLAGS_CSUM |
2817 IXGBE_TX_FLAGS_IPV4;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002818 } else if (skb_is_gso_v6(skb)) {
2819 ipv6_hdr(skb)->payload_len = 0;
2820 tcp_hdr(skb)->check =
2821 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2822 &ipv6_hdr(skb)->daddr,
2823 0, IPPROTO_TCP, 0);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002824 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
2825 IXGBE_TX_FLAGS_CSUM;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002826 }
2827
2828 /* compute header lengths */
2829 l4len = tcp_hdrlen(skb);
2830 *hdr_len += l4len;
2831 *hdr_len = skb_transport_offset(skb) + l4len;
2832
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002833 /* update gso size and bytecount with header size */
2834 first->gso_segs = skb_shinfo(skb)->gso_segs;
2835 first->bytecount += (first->gso_segs - 1) * *hdr_len;
2836
Alexander Duyck70a10e22012-05-11 08:33:21 +00002837 /* mss_l4len_id: use 1 as index for TSO */
2838 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
2839 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
2840 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
2841
2842 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
2843 vlan_macip_lens = skb_network_header_len(skb);
2844 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002845 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002846
2847 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2848 type_tucmd, mss_l4len_idx);
2849
2850 return 1;
Greg Rose92915f72010-01-09 02:24:10 +00002851}
2852
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002853static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
2854 struct ixgbevf_tx_buffer *first)
Greg Rose92915f72010-01-09 02:24:10 +00002855{
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002856 struct sk_buff *skb = first->skb;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002857 u32 vlan_macip_lens = 0;
2858 u32 mss_l4len_idx = 0;
2859 u32 type_tucmd = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002860
Alexander Duyck70a10e22012-05-11 08:33:21 +00002861 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2862 u8 l4_hdr = 0;
2863 switch (skb->protocol) {
2864 case __constant_htons(ETH_P_IP):
2865 vlan_macip_lens |= skb_network_header_len(skb);
2866 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2867 l4_hdr = ip_hdr(skb)->protocol;
2868 break;
2869 case __constant_htons(ETH_P_IPV6):
2870 vlan_macip_lens |= skb_network_header_len(skb);
2871 l4_hdr = ipv6_hdr(skb)->nexthdr;
2872 break;
2873 default:
2874 if (unlikely(net_ratelimit())) {
2875 dev_warn(tx_ring->dev,
2876 "partial checksum but proto=%x!\n",
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002877 first->protocol);
Greg Rose92915f72010-01-09 02:24:10 +00002878 }
Alexander Duyck70a10e22012-05-11 08:33:21 +00002879 break;
Greg Rose92915f72010-01-09 02:24:10 +00002880 }
2881
Alexander Duyck70a10e22012-05-11 08:33:21 +00002882 switch (l4_hdr) {
2883 case IPPROTO_TCP:
2884 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2885 mss_l4len_idx = tcp_hdrlen(skb) <<
2886 IXGBE_ADVTXD_L4LEN_SHIFT;
2887 break;
2888 case IPPROTO_SCTP:
2889 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
2890 mss_l4len_idx = sizeof(struct sctphdr) <<
2891 IXGBE_ADVTXD_L4LEN_SHIFT;
2892 break;
2893 case IPPROTO_UDP:
2894 mss_l4len_idx = sizeof(struct udphdr) <<
2895 IXGBE_ADVTXD_L4LEN_SHIFT;
2896 break;
2897 default:
2898 if (unlikely(net_ratelimit())) {
2899 dev_warn(tx_ring->dev,
2900 "partial checksum but l4 proto=%x!\n",
2901 l4_hdr);
2902 }
2903 break;
2904 }
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002905
2906 /* update TX checksum flag */
2907 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
Greg Rose92915f72010-01-09 02:24:10 +00002908 }
2909
Alexander Duyck70a10e22012-05-11 08:33:21 +00002910 /* vlan_macip_lens: MACLEN, VLAN tag */
2911 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002912 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002913
2914 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2915 type_tucmd, mss_l4len_idx);
Greg Rose92915f72010-01-09 02:24:10 +00002916}
2917
Alexander Duyck70a10e22012-05-11 08:33:21 +00002918static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002919 struct ixgbevf_tx_buffer *first)
Greg Rose92915f72010-01-09 02:24:10 +00002920{
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08002921 dma_addr_t dma;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002922 struct sk_buff *skb = first->skb;
Greg Rose92915f72010-01-09 02:24:10 +00002923 struct ixgbevf_tx_buffer *tx_buffer_info;
2924 unsigned int len;
2925 unsigned int total = skb->len;
Kulikov Vasiliy2540ddb2010-07-15 08:45:57 +00002926 unsigned int offset = 0, size;
2927 int count = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002928 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2929 unsigned int f;
Greg Rose65deeed2010-03-24 09:35:42 +00002930 int i;
Greg Rose92915f72010-01-09 02:24:10 +00002931
2932 i = tx_ring->next_to_use;
2933
2934 len = min(skb_headlen(skb), total);
2935 while (len) {
2936 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2937 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2938
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002939 tx_buffer_info->tx_flags = first->tx_flags;
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08002940 dma = dma_map_single(tx_ring->dev, skb->data + offset,
2941 size, DMA_TO_DEVICE);
2942 if (dma_mapping_error(tx_ring->dev, dma))
Greg Rose92915f72010-01-09 02:24:10 +00002943 goto dma_error;
Greg Rose92915f72010-01-09 02:24:10 +00002944
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08002945 /* record length, and DMA address */
2946 dma_unmap_len_set(tx_buffer_info, len, size);
2947 dma_unmap_addr_set(tx_buffer_info, dma, dma);
2948
Greg Rose92915f72010-01-09 02:24:10 +00002949 len -= size;
2950 total -= size;
2951 offset += size;
2952 count++;
2953 i++;
2954 if (i == tx_ring->count)
2955 i = 0;
2956 }
2957
2958 for (f = 0; f < nr_frags; f++) {
Eric Dumazet9e903e02011-10-18 21:00:24 +00002959 const struct skb_frag_struct *frag;
Greg Rose92915f72010-01-09 02:24:10 +00002960
2961 frag = &skb_shinfo(skb)->frags[f];
Eric Dumazet9e903e02011-10-18 21:00:24 +00002962 len = min((unsigned int)skb_frag_size(frag), total);
Ian Campbell877749b2011-08-29 23:18:26 +00002963 offset = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002964
2965 while (len) {
2966 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2967 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2968
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08002969 dma = skb_frag_dma_map(tx_ring->dev, frag,
2970 offset, size, DMA_TO_DEVICE);
2971 if (dma_mapping_error(tx_ring->dev, dma))
Greg Rose92915f72010-01-09 02:24:10 +00002972 goto dma_error;
Greg Rose92915f72010-01-09 02:24:10 +00002973
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08002974 /* record length, and DMA address */
2975 dma_unmap_len_set(tx_buffer_info, len, size);
2976 dma_unmap_addr_set(tx_buffer_info, dma, dma);
2977
Greg Rose92915f72010-01-09 02:24:10 +00002978 len -= size;
2979 total -= size;
2980 offset += size;
2981 count++;
2982 i++;
2983 if (i == tx_ring->count)
2984 i = 0;
2985 }
2986 if (total == 0)
2987 break;
2988 }
2989
2990 if (i == 0)
2991 i = tx_ring->count - 1;
2992 else
2993 i = i - 1;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002994
2995 first->next_to_watch = IXGBEVF_TX_DESC(tx_ring, i);
2996 first->time_stamp = jiffies;
Greg Rose92915f72010-01-09 02:24:10 +00002997
2998 return count;
2999
3000dma_error:
Alexander Duyck70a10e22012-05-11 08:33:21 +00003001 dev_err(tx_ring->dev, "TX DMA map failed\n");
Greg Rose92915f72010-01-09 02:24:10 +00003002
3003 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3004 tx_buffer_info->dma = 0;
Greg Rose92915f72010-01-09 02:24:10 +00003005 count--;
3006
3007 /* clear timestamp and dma mappings for remaining portion of packet */
3008 while (count >= 0) {
3009 count--;
3010 i--;
3011 if (i < 0)
3012 i += tx_ring->count;
3013 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck70a10e22012-05-11 08:33:21 +00003014 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
Greg Rose92915f72010-01-09 02:24:10 +00003015 }
3016
3017 return count;
3018}
3019
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003020static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring,
3021 struct ixgbevf_tx_buffer *first,
3022 int count, u8 hdr_len)
Greg Rose92915f72010-01-09 02:24:10 +00003023{
3024 union ixgbe_adv_tx_desc *tx_desc = NULL;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003025 struct sk_buff *skb = first->skb;
Greg Rose92915f72010-01-09 02:24:10 +00003026 struct ixgbevf_tx_buffer *tx_buffer_info;
3027 u32 olinfo_status = 0, cmd_type_len = 0;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003028 u32 tx_flags = first->tx_flags;
Greg Rose92915f72010-01-09 02:24:10 +00003029 unsigned int i;
3030
3031 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3032
3033 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3034
3035 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3036
3037 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3038 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3039
Alexander Duyck70a10e22012-05-11 08:33:21 +00003040 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3041 olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
3042
Greg Rose92915f72010-01-09 02:24:10 +00003043 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3044 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3045
Greg Rose92915f72010-01-09 02:24:10 +00003046 /* use index 1 context for tso */
3047 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3048 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
Alexander Duyck70a10e22012-05-11 08:33:21 +00003049 olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
Alexander Duyck70a10e22012-05-11 08:33:21 +00003050 }
3051
3052 /*
3053 * Check Context must be set if Tx switch is enabled, which it
3054 * always is for case where virtual functions are running
3055 */
3056 olinfo_status |= IXGBE_ADVTXD_CC;
Greg Rose92915f72010-01-09 02:24:10 +00003057
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003058 olinfo_status |= ((skb->len - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
Greg Rose92915f72010-01-09 02:24:10 +00003059
3060 i = tx_ring->next_to_use;
3061 while (count--) {
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003062 dma_addr_t dma;
3063 unsigned int len;
3064
Greg Rose92915f72010-01-09 02:24:10 +00003065 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003066 dma = dma_unmap_addr(tx_buffer_info, dma);
3067 len = dma_unmap_len(tx_buffer_info, len);
Alexander Duyck908421f2012-05-11 08:33:00 +00003068 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003069 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3070 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type_len | len);
Greg Rose92915f72010-01-09 02:24:10 +00003071 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3072 i++;
3073 if (i == tx_ring->count)
3074 i = 0;
3075 }
3076
3077 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3078
Greg Rose92915f72010-01-09 02:24:10 +00003079 tx_ring->next_to_use = i;
Greg Rose92915f72010-01-09 02:24:10 +00003080}
3081
Alexander Duyckfb401952012-05-11 08:33:16 +00003082static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003083{
Alexander Duyckfb401952012-05-11 08:33:16 +00003084 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
Greg Rose92915f72010-01-09 02:24:10 +00003085 /* Herbert's original patch had:
3086 * smp_mb__after_netif_stop_queue();
3087 * but since that doesn't exist yet, just open code it. */
3088 smp_mb();
3089
3090 /* We need to check again in a case another CPU has just
3091 * made room available. */
Don Skidmoref880d072013-10-23 02:17:52 +00003092 if (likely(ixgbevf_desc_unused(tx_ring) < size))
Greg Rose92915f72010-01-09 02:24:10 +00003093 return -EBUSY;
3094
3095 /* A reprieve! - use start_queue because it doesn't call schedule */
Alexander Duyckfb401952012-05-11 08:33:16 +00003096 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
Emil Tantilov095e2612014-01-17 18:30:00 -08003097 ++tx_ring->tx_stats.restart_queue;
3098
Greg Rose92915f72010-01-09 02:24:10 +00003099 return 0;
3100}
3101
Alexander Duyckfb401952012-05-11 08:33:16 +00003102static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003103{
Don Skidmoref880d072013-10-23 02:17:52 +00003104 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
Greg Rose92915f72010-01-09 02:24:10 +00003105 return 0;
Alexander Duyckfb401952012-05-11 08:33:16 +00003106 return __ixgbevf_maybe_stop_tx(tx_ring, size);
Greg Rose92915f72010-01-09 02:24:10 +00003107}
3108
3109static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3110{
3111 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003112 struct ixgbevf_tx_buffer *first;
Greg Rose92915f72010-01-09 02:24:10 +00003113 struct ixgbevf_ring *tx_ring;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003114 int tso;
3115 u32 tx_flags = 0;
Alexander Duyck35959902012-05-11 08:32:40 +00003116 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3117#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3118 unsigned short f;
3119#endif
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003120 u8 hdr_len = 0;
Greg Rosef9d08f162012-10-02 00:50:52 +00003121 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003122
Ben Hutchings46acc462012-11-01 09:11:11 +00003123 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
Greg Rosef9d08f162012-10-02 00:50:52 +00003124 dev_kfree_skb(skb);
3125 return NETDEV_TX_OK;
3126 }
Greg Rose92915f72010-01-09 02:24:10 +00003127
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003128 tx_ring = adapter->tx_ring[skb->queue_mapping];
Greg Rose92915f72010-01-09 02:24:10 +00003129
Alexander Duyck35959902012-05-11 08:32:40 +00003130 /*
3131 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3132 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3133 * + 2 desc gap to keep tail from touching head,
3134 * + 1 desc for context descriptor,
3135 * otherwise try next time
3136 */
3137#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3138 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3139 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3140#else
3141 count += skb_shinfo(skb)->nr_frags;
3142#endif
Alexander Duyckfb401952012-05-11 08:33:16 +00003143 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
Emil Tantilov095e2612014-01-17 18:30:00 -08003144 tx_ring->tx_stats.tx_busy++;
Alexander Duyck35959902012-05-11 08:32:40 +00003145 return NETDEV_TX_BUSY;
3146 }
3147
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003148 /* record the location of the first descriptor for this packet */
3149 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3150 first->skb = skb;
3151 first->bytecount = skb->len;
3152 first->gso_segs = 1;
3153
Jesse Grosseab6d182010-10-20 13:56:03 +00003154 if (vlan_tx_tag_present(skb)) {
Greg Rose92915f72010-01-09 02:24:10 +00003155 tx_flags |= vlan_tx_tag_get(skb);
3156 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3157 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3158 }
3159
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003160 /* record initial flags and protocol */
3161 first->tx_flags = tx_flags;
3162 first->protocol = vlan_get_protocol(skb);
Greg Rose92915f72010-01-09 02:24:10 +00003163
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003164 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3165 if (tso < 0)
3166 goto out_drop;
3167 else
3168 ixgbevf_tx_csum(tx_ring, first);
Greg Rose92915f72010-01-09 02:24:10 +00003169
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003170 ixgbevf_tx_queue(tx_ring, first,
3171 ixgbevf_tx_map(tx_ring, first), hdr_len);
Greg Rose92915f72010-01-09 02:24:10 +00003172
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003173 /* Force memory writes to complete before letting h/w
3174 * know there are new descriptors to fetch. (Only
3175 * applicable for weak-ordered memory model archs,
3176 * such as IA-64).
3177 */
3178 wmb();
Alexander Duyck70a10e22012-05-11 08:33:21 +00003179
Don Skidmore5cdab2f2013-10-30 07:45:39 +00003180 writel(tx_ring->next_to_use, tx_ring->tail);
Alexander Duyckfb401952012-05-11 08:33:16 +00003181 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
Greg Rose92915f72010-01-09 02:24:10 +00003182
3183 return NETDEV_TX_OK;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003184
3185out_drop:
3186 dev_kfree_skb_any(first->skb);
3187 first->skb = NULL;
3188
3189 return NETDEV_TX_OK;
Greg Rose92915f72010-01-09 02:24:10 +00003190}
3191
3192/**
Greg Rose92915f72010-01-09 02:24:10 +00003193 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3194 * @netdev: network interface device structure
3195 * @p: pointer to an address structure
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3200{
3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3202 struct ixgbe_hw *hw = &adapter->hw;
3203 struct sockaddr *addr = p;
3204
3205 if (!is_valid_ether_addr(addr->sa_data))
3206 return -EADDRNOTAVAIL;
3207
3208 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3209 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3210
John Fastabend55fdd45b2012-10-01 14:52:20 +00003211 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003212
Greg Rose92fe0bf2012-11-02 05:50:47 +00003213 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00003214
John Fastabend55fdd45b2012-10-01 14:52:20 +00003215 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003216
Greg Rose92915f72010-01-09 02:24:10 +00003217 return 0;
3218}
3219
3220/**
3221 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3222 * @netdev: network interface device structure
3223 * @new_mtu: new value for maximum frame size
3224 *
3225 * Returns 0 on success, negative on failure
3226 **/
3227static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3228{
3229 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3230 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
Greg Rose69bfbec2011-01-26 01:06:12 +00003231 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose69bfbec2011-01-26 01:06:12 +00003232
Alexander Duyck56e94092012-07-20 08:10:03 +00003233 switch (adapter->hw.api_version) {
3234 case ixgbe_mbox_api_11:
Greg Rose69bfbec2011-01-26 01:06:12 +00003235 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
Alexander Duyck56e94092012-07-20 08:10:03 +00003236 break;
3237 default:
3238 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3239 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3240 break;
3241 }
Greg Rose92915f72010-01-09 02:24:10 +00003242
3243 /* MTU < 68 is an error and causes problems on some kernels */
Greg Rose69bfbec2011-01-26 01:06:12 +00003244 if ((new_mtu < 68) || (max_frame > max_possible_frame))
Greg Rose92915f72010-01-09 02:24:10 +00003245 return -EINVAL;
3246
3247 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3248 netdev->mtu, new_mtu);
3249 /* must set new MTU before calling down or up */
3250 netdev->mtu = new_mtu;
3251
3252 if (netif_running(netdev))
3253 ixgbevf_reinit_locked(adapter);
3254
3255 return 0;
3256}
3257
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003258static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
Greg Rose92915f72010-01-09 02:24:10 +00003259{
3260 struct net_device *netdev = pci_get_drvdata(pdev);
3261 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003262#ifdef CONFIG_PM
3263 int retval = 0;
3264#endif
Greg Rose92915f72010-01-09 02:24:10 +00003265
3266 netif_device_detach(netdev);
3267
3268 if (netif_running(netdev)) {
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003269 rtnl_lock();
Greg Rose92915f72010-01-09 02:24:10 +00003270 ixgbevf_down(adapter);
3271 ixgbevf_free_irq(adapter);
3272 ixgbevf_free_all_tx_resources(adapter);
3273 ixgbevf_free_all_rx_resources(adapter);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003274 rtnl_unlock();
Greg Rose92915f72010-01-09 02:24:10 +00003275 }
3276
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003277 ixgbevf_clear_interrupt_scheme(adapter);
3278
3279#ifdef CONFIG_PM
3280 retval = pci_save_state(pdev);
3281 if (retval)
3282 return retval;
3283
3284#endif
3285 pci_disable_device(pdev);
3286
3287 return 0;
3288}
3289
3290#ifdef CONFIG_PM
3291static int ixgbevf_resume(struct pci_dev *pdev)
3292{
Wei Yongjun27ae2962014-01-16 02:30:07 -08003293 struct net_device *netdev = pci_get_drvdata(pdev);
3294 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003295 u32 err;
3296
3297 pci_set_power_state(pdev, PCI_D0);
3298 pci_restore_state(pdev);
3299 /*
3300 * pci_restore_state clears dev->state_saved so call
3301 * pci_save_state to restore it.
3302 */
Greg Rose92915f72010-01-09 02:24:10 +00003303 pci_save_state(pdev);
Greg Rose92915f72010-01-09 02:24:10 +00003304
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003305 err = pci_enable_device_mem(pdev);
3306 if (err) {
3307 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3308 return err;
3309 }
3310 pci_set_master(pdev);
3311
Don Skidmore798e3812013-10-01 04:33:51 -07003312 ixgbevf_reset(adapter);
3313
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003314 rtnl_lock();
3315 err = ixgbevf_init_interrupt_scheme(adapter);
3316 rtnl_unlock();
3317 if (err) {
3318 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3319 return err;
3320 }
3321
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003322 if (netif_running(netdev)) {
3323 err = ixgbevf_open(netdev);
3324 if (err)
3325 return err;
3326 }
3327
3328 netif_device_attach(netdev);
3329
3330 return err;
3331}
3332
3333#endif /* CONFIG_PM */
3334static void ixgbevf_shutdown(struct pci_dev *pdev)
3335{
3336 ixgbevf_suspend(pdev, PMSG_SUSPEND);
Greg Rose92915f72010-01-09 02:24:10 +00003337}
3338
Eric Dumazet4197aa72011-06-22 05:01:35 +00003339static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3340 struct rtnl_link_stats64 *stats)
3341{
3342 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3343 unsigned int start;
3344 u64 bytes, packets;
3345 const struct ixgbevf_ring *ring;
3346 int i;
3347
3348 ixgbevf_update_stats(adapter);
3349
3350 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3351
3352 for (i = 0; i < adapter->num_rx_queues; i++) {
Don Skidmore87e70ab2014-01-16 02:30:08 -08003353 ring = adapter->rx_ring[i];
Eric Dumazet4197aa72011-06-22 05:01:35 +00003354 do {
3355 start = u64_stats_fetch_begin_bh(&ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -08003356 bytes = ring->stats.bytes;
3357 packets = ring->stats.packets;
Eric Dumazet4197aa72011-06-22 05:01:35 +00003358 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3359 stats->rx_bytes += bytes;
3360 stats->rx_packets += packets;
3361 }
3362
3363 for (i = 0; i < adapter->num_tx_queues; i++) {
Don Skidmore87e70ab2014-01-16 02:30:08 -08003364 ring = adapter->tx_ring[i];
Eric Dumazet4197aa72011-06-22 05:01:35 +00003365 do {
3366 start = u64_stats_fetch_begin_bh(&ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -08003367 bytes = ring->stats.bytes;
3368 packets = ring->stats.packets;
Eric Dumazet4197aa72011-06-22 05:01:35 +00003369 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3370 stats->tx_bytes += bytes;
3371 stats->tx_packets += packets;
3372 }
3373
3374 return stats;
3375}
3376
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003377static const struct net_device_ops ixgbevf_netdev_ops = {
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003378 .ndo_open = ixgbevf_open,
3379 .ndo_stop = ixgbevf_close,
3380 .ndo_start_xmit = ixgbevf_xmit_frame,
3381 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
Eric Dumazet4197aa72011-06-22 05:01:35 +00003382 .ndo_get_stats64 = ixgbevf_get_stats,
Greg Rose92915f72010-01-09 02:24:10 +00003383 .ndo_validate_addr = eth_validate_addr,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003384 .ndo_set_mac_address = ixgbevf_set_mac,
3385 .ndo_change_mtu = ixgbevf_change_mtu,
3386 .ndo_tx_timeout = ixgbevf_tx_timeout,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003387 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3388 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
Jacob Kellerc777cdf2013-09-21 06:24:20 +00003389#ifdef CONFIG_NET_RX_BUSY_POLL
3390 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3391#endif
Greg Rose92915f72010-01-09 02:24:10 +00003392};
Greg Rose92915f72010-01-09 02:24:10 +00003393
3394static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3395{
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003396 dev->netdev_ops = &ixgbevf_netdev_ops;
Greg Rose92915f72010-01-09 02:24:10 +00003397 ixgbevf_set_ethtool_ops(dev);
3398 dev->watchdog_timeo = 5 * HZ;
3399}
3400
3401/**
3402 * ixgbevf_probe - Device Initialization Routine
3403 * @pdev: PCI device information struct
3404 * @ent: entry in ixgbevf_pci_tbl
3405 *
3406 * Returns 0 on success, negative on failure
3407 *
3408 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3409 * The OS initialization, configuring of the adapter private structure,
3410 * and a hardware reset occur.
3411 **/
Greg Kroah-Hartman1dd06ae2012-12-06 14:30:56 +00003412static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Greg Rose92915f72010-01-09 02:24:10 +00003413{
3414 struct net_device *netdev;
3415 struct ixgbevf_adapter *adapter = NULL;
3416 struct ixgbe_hw *hw = NULL;
3417 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3418 static int cards_found;
3419 int err, pci_using_dac;
3420
3421 err = pci_enable_device(pdev);
3422 if (err)
3423 return err;
3424
Russell King53567aa2013-06-10 12:49:38 +01003425 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
Greg Rose92915f72010-01-09 02:24:10 +00003426 pci_using_dac = 1;
3427 } else {
Russell King53567aa2013-06-10 12:49:38 +01003428 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
Greg Rose92915f72010-01-09 02:24:10 +00003429 if (err) {
Russell King53567aa2013-06-10 12:49:38 +01003430 dev_err(&pdev->dev, "No usable DMA "
3431 "configuration, aborting\n");
3432 goto err_dma;
Greg Rose92915f72010-01-09 02:24:10 +00003433 }
3434 pci_using_dac = 0;
3435 }
3436
3437 err = pci_request_regions(pdev, ixgbevf_driver_name);
3438 if (err) {
3439 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3440 goto err_pci_reg;
3441 }
3442
3443 pci_set_master(pdev);
3444
Greg Rose92915f72010-01-09 02:24:10 +00003445 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3446 MAX_TX_QUEUES);
Greg Rose92915f72010-01-09 02:24:10 +00003447 if (!netdev) {
3448 err = -ENOMEM;
3449 goto err_alloc_etherdev;
3450 }
3451
3452 SET_NETDEV_DEV(netdev, &pdev->dev);
3453
3454 pci_set_drvdata(pdev, netdev);
3455 adapter = netdev_priv(netdev);
3456
3457 adapter->netdev = netdev;
3458 adapter->pdev = pdev;
3459 hw = &adapter->hw;
3460 hw->back = adapter;
stephen hemmingerb3f4d592012-03-13 06:04:20 +00003461 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
Greg Rose92915f72010-01-09 02:24:10 +00003462
3463 /*
3464 * call save state here in standalone driver because it relies on
3465 * adapter struct to exist, and needs to call netdev_priv
3466 */
3467 pci_save_state(pdev);
3468
3469 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3470 pci_resource_len(pdev, 0));
3471 if (!hw->hw_addr) {
3472 err = -EIO;
3473 goto err_ioremap;
3474 }
3475
3476 ixgbevf_assign_netdev_ops(netdev);
3477
3478 adapter->bd_number = cards_found;
3479
3480 /* Setup hw api */
3481 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3482 hw->mac.type = ii->mac;
3483
3484 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
Greg Rosef416dfc2011-06-08 07:32:38 +00003485 sizeof(struct ixgbe_mbx_operations));
Greg Rose92915f72010-01-09 02:24:10 +00003486
Greg Rose92915f72010-01-09 02:24:10 +00003487 /* setup the private structure */
3488 err = ixgbevf_sw_init(adapter);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003489 if (err)
3490 goto err_sw_init;
3491
3492 /* The HW MAC address was set and/or determined in sw_init */
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003493 if (!is_valid_ether_addr(netdev->dev_addr)) {
3494 pr_err("invalid MAC address\n");
3495 err = -EIO;
3496 goto err_sw_init;
3497 }
Greg Rose92915f72010-01-09 02:24:10 +00003498
Michał Mirosław471a76d2011-06-08 08:53:03 +00003499 netdev->hw_features = NETIF_F_SG |
Greg Rose92915f72010-01-09 02:24:10 +00003500 NETIF_F_IP_CSUM |
Michał Mirosław471a76d2011-06-08 08:53:03 +00003501 NETIF_F_IPV6_CSUM |
3502 NETIF_F_TSO |
3503 NETIF_F_TSO6 |
3504 NETIF_F_RXCSUM;
3505
3506 netdev->features = netdev->hw_features |
Patrick McHardyf6469682013-04-19 02:04:27 +00003507 NETIF_F_HW_VLAN_CTAG_TX |
3508 NETIF_F_HW_VLAN_CTAG_RX |
3509 NETIF_F_HW_VLAN_CTAG_FILTER;
Greg Rose92915f72010-01-09 02:24:10 +00003510
Greg Rose92915f72010-01-09 02:24:10 +00003511 netdev->vlan_features |= NETIF_F_TSO;
3512 netdev->vlan_features |= NETIF_F_TSO6;
3513 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyck3bfacf92010-08-02 14:59:04 +00003514 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Greg Rose92915f72010-01-09 02:24:10 +00003515 netdev->vlan_features |= NETIF_F_SG;
3516
3517 if (pci_using_dac)
3518 netdev->features |= NETIF_F_HIGHDMA;
3519
Jiri Pirko01789342011-08-16 06:29:00 +00003520 netdev->priv_flags |= IFF_UNICAST_FLT;
3521
Greg Rose92915f72010-01-09 02:24:10 +00003522 init_timer(&adapter->watchdog_timer);
Joe Perchesc061b182010-08-23 18:20:03 +00003523 adapter->watchdog_timer.function = ixgbevf_watchdog;
Greg Rose92915f72010-01-09 02:24:10 +00003524 adapter->watchdog_timer.data = (unsigned long)adapter;
3525
3526 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3527 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3528
3529 err = ixgbevf_init_interrupt_scheme(adapter);
3530 if (err)
3531 goto err_sw_init;
3532
Greg Rose92915f72010-01-09 02:24:10 +00003533 strcpy(netdev->name, "eth%d");
3534
3535 err = register_netdev(netdev);
3536 if (err)
3537 goto err_register;
3538
Greg Rose5d426ad2010-11-16 19:27:19 -08003539 netif_carrier_off(netdev);
3540
Greg Rose33bd9f62010-03-19 02:59:52 +00003541 ixgbevf_init_last_counter_stats(adapter);
3542
Greg Rose92915f72010-01-09 02:24:10 +00003543 /* print the MAC address */
Danny Kukawkaf794e7e2012-02-24 03:45:56 +00003544 hw_dbg(hw, "%pM\n", netdev->dev_addr);
Greg Rose92915f72010-01-09 02:24:10 +00003545
3546 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3547
Greg Rose92915f72010-01-09 02:24:10 +00003548 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3549 cards_found++;
3550 return 0;
3551
3552err_register:
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003553 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003554err_sw_init:
3555 ixgbevf_reset_interrupt_capability(adapter);
3556 iounmap(hw->hw_addr);
3557err_ioremap:
3558 free_netdev(netdev);
3559err_alloc_etherdev:
3560 pci_release_regions(pdev);
3561err_pci_reg:
3562err_dma:
3563 pci_disable_device(pdev);
3564 return err;
3565}
3566
3567/**
3568 * ixgbevf_remove - Device Removal Routine
3569 * @pdev: PCI device information struct
3570 *
3571 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3572 * that it should release a PCI device. The could be caused by a
3573 * Hot-Plug event, or because the driver is going to be removed from
3574 * memory.
3575 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003576static void ixgbevf_remove(struct pci_dev *pdev)
Greg Rose92915f72010-01-09 02:24:10 +00003577{
3578 struct net_device *netdev = pci_get_drvdata(pdev);
3579 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3580
3581 set_bit(__IXGBEVF_DOWN, &adapter->state);
3582
3583 del_timer_sync(&adapter->watchdog_timer);
3584
Tejun Heo23f333a2010-12-12 16:45:14 +01003585 cancel_work_sync(&adapter->reset_task);
Greg Rose92915f72010-01-09 02:24:10 +00003586 cancel_work_sync(&adapter->watchdog_task);
3587
Alexander Duyckfd13a9a2012-05-11 08:32:24 +00003588 if (netdev->reg_state == NETREG_REGISTERED)
Greg Rose92915f72010-01-09 02:24:10 +00003589 unregister_netdev(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00003590
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003591 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003592 ixgbevf_reset_interrupt_capability(adapter);
3593
3594 iounmap(adapter->hw.hw_addr);
3595 pci_release_regions(pdev);
3596
3597 hw_dbg(&adapter->hw, "Remove complete\n");
3598
Greg Rose92915f72010-01-09 02:24:10 +00003599 free_netdev(netdev);
3600
3601 pci_disable_device(pdev);
3602}
3603
Alexander Duyck9f19f312012-05-11 08:33:32 +00003604/**
3605 * ixgbevf_io_error_detected - called when PCI error is detected
3606 * @pdev: Pointer to PCI device
3607 * @state: The current pci connection state
3608 *
3609 * This function is called after a PCI bus error affecting
3610 * this device has been detected.
3611 */
3612static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3613 pci_channel_state_t state)
3614{
3615 struct net_device *netdev = pci_get_drvdata(pdev);
3616 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3617
3618 netif_device_detach(netdev);
3619
3620 if (state == pci_channel_io_perm_failure)
3621 return PCI_ERS_RESULT_DISCONNECT;
3622
3623 if (netif_running(netdev))
3624 ixgbevf_down(adapter);
3625
3626 pci_disable_device(pdev);
3627
3628 /* Request a slot slot reset. */
3629 return PCI_ERS_RESULT_NEED_RESET;
3630}
3631
3632/**
3633 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3634 * @pdev: Pointer to PCI device
3635 *
3636 * Restart the card from scratch, as if from a cold-boot. Implementation
3637 * resembles the first-half of the ixgbevf_resume routine.
3638 */
3639static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3640{
3641 struct net_device *netdev = pci_get_drvdata(pdev);
3642 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3643
3644 if (pci_enable_device_mem(pdev)) {
3645 dev_err(&pdev->dev,
3646 "Cannot re-enable PCI device after reset.\n");
3647 return PCI_ERS_RESULT_DISCONNECT;
3648 }
3649
3650 pci_set_master(pdev);
3651
3652 ixgbevf_reset(adapter);
3653
3654 return PCI_ERS_RESULT_RECOVERED;
3655}
3656
3657/**
3658 * ixgbevf_io_resume - called when traffic can start flowing again.
3659 * @pdev: Pointer to PCI device
3660 *
3661 * This callback is called when the error recovery driver tells us that
3662 * its OK to resume normal operation. Implementation resembles the
3663 * second-half of the ixgbevf_resume routine.
3664 */
3665static void ixgbevf_io_resume(struct pci_dev *pdev)
3666{
3667 struct net_device *netdev = pci_get_drvdata(pdev);
3668 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3669
3670 if (netif_running(netdev))
3671 ixgbevf_up(adapter);
3672
3673 netif_device_attach(netdev);
3674}
3675
3676/* PCI Error Recovery (ERS) */
Stephen Hemminger3646f0e2012-09-07 09:33:15 -07003677static const struct pci_error_handlers ixgbevf_err_handler = {
Alexander Duyck9f19f312012-05-11 08:33:32 +00003678 .error_detected = ixgbevf_io_error_detected,
3679 .slot_reset = ixgbevf_io_slot_reset,
3680 .resume = ixgbevf_io_resume,
3681};
3682
Greg Rose92915f72010-01-09 02:24:10 +00003683static struct pci_driver ixgbevf_driver = {
3684 .name = ixgbevf_driver_name,
3685 .id_table = ixgbevf_pci_tbl,
3686 .probe = ixgbevf_probe,
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003687 .remove = ixgbevf_remove,
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003688#ifdef CONFIG_PM
3689 /* Power Management Hooks */
3690 .suspend = ixgbevf_suspend,
3691 .resume = ixgbevf_resume,
3692#endif
Greg Rose92915f72010-01-09 02:24:10 +00003693 .shutdown = ixgbevf_shutdown,
Alexander Duyck9f19f312012-05-11 08:33:32 +00003694 .err_handler = &ixgbevf_err_handler
Greg Rose92915f72010-01-09 02:24:10 +00003695};
3696
3697/**
Greg Rose65d676c2011-02-03 06:54:13 +00003698 * ixgbevf_init_module - Driver Registration Routine
Greg Rose92915f72010-01-09 02:24:10 +00003699 *
Greg Rose65d676c2011-02-03 06:54:13 +00003700 * ixgbevf_init_module is the first routine called when the driver is
Greg Rose92915f72010-01-09 02:24:10 +00003701 * loaded. All it does is register with the PCI subsystem.
3702 **/
3703static int __init ixgbevf_init_module(void)
3704{
3705 int ret;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003706 pr_info("%s - version %s\n", ixgbevf_driver_string,
3707 ixgbevf_driver_version);
Greg Rose92915f72010-01-09 02:24:10 +00003708
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003709 pr_info("%s\n", ixgbevf_copyright);
Greg Rose92915f72010-01-09 02:24:10 +00003710
3711 ret = pci_register_driver(&ixgbevf_driver);
3712 return ret;
3713}
3714
3715module_init(ixgbevf_init_module);
3716
3717/**
Greg Rose65d676c2011-02-03 06:54:13 +00003718 * ixgbevf_exit_module - Driver Exit Cleanup Routine
Greg Rose92915f72010-01-09 02:24:10 +00003719 *
Greg Rose65d676c2011-02-03 06:54:13 +00003720 * ixgbevf_exit_module is called just before the driver is removed
Greg Rose92915f72010-01-09 02:24:10 +00003721 * from memory.
3722 **/
3723static void __exit ixgbevf_exit_module(void)
3724{
3725 pci_unregister_driver(&ixgbevf_driver);
3726}
3727
3728#ifdef DEBUG
3729/**
Greg Rose65d676c2011-02-03 06:54:13 +00003730 * ixgbevf_get_hw_dev_name - return device name string
Greg Rose92915f72010-01-09 02:24:10 +00003731 * used by hardware layer to print debugging information
3732 **/
3733char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3734{
3735 struct ixgbevf_adapter *adapter = hw->back;
3736 return adapter->netdev->name;
3737}
3738
3739#endif
3740module_exit(ixgbevf_exit_module);
3741
3742/* ixgbevf_main.c */