blob: 3f4bf31f45e0acc4846d0d6e02b7397f18cf88f0 [file] [log] [blame]
Yuval Mintz32a47e72016-05-11 16:36:12 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz32a47e72016-05-11 16:36:12 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz32a47e72016-05-11 16:36:12 +030031 */
32
Yuval Mintzdacd88d2016-05-11 16:36:16 +030033#include <linux/etherdevice.h>
Yuval Mintz36558c32016-05-11 16:36:17 +030034#include <linux/crc32.h>
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +020035#include <linux/vmalloc.h>
Yuval Mintz0b55e272016-05-11 16:36:15 +030036#include <linux/qed/qed_iov_if.h>
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030037#include "qed_cxt.h"
38#include "qed_hsi.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030039#include "qed_hw.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030040#include "qed_init_ops.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030041#include "qed_int.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030042#include "qed_mcp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030043#include "qed_reg_addr.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030044#include "qed_sp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030045#include "qed_sriov.h"
46#include "qed_vf.h"
47
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030048/* IOV ramrods */
Yuval Mintz1fe614d2016-06-05 13:11:11 +030049static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030050{
51 struct vf_start_ramrod_data *p_ramrod = NULL;
52 struct qed_spq_entry *p_ent = NULL;
53 struct qed_sp_init_data init_data;
54 int rc = -EINVAL;
Yuval Mintz1fe614d2016-06-05 13:11:11 +030055 u8 fp_minor;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030056
57 /* Get SPQ entry */
58 memset(&init_data, 0, sizeof(init_data));
59 init_data.cid = qed_spq_get_cid(p_hwfn);
Yuval Mintz1fe614d2016-06-05 13:11:11 +030060 init_data.opaque_fid = p_vf->opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030061 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
62
63 rc = qed_sp_init_request(p_hwfn, &p_ent,
64 COMMON_RAMROD_VF_START,
65 PROTOCOLID_COMMON, &init_data);
66 if (rc)
67 return rc;
68
69 p_ramrod = &p_ent->ramrod.vf_start;
70
Yuval Mintz1fe614d2016-06-05 13:11:11 +030071 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
72 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030073
Yuval Mintz1fe614d2016-06-05 13:11:11 +030074 switch (p_hwfn->hw_info.personality) {
75 case QED_PCI_ETH:
76 p_ramrod->personality = PERSONALITY_ETH;
77 break;
78 case QED_PCI_ETH_ROCE:
79 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
80 break;
81 default:
82 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
83 p_hwfn->hw_info.personality);
84 return -EINVAL;
85 }
86
87 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
Yuval Mintza044df82016-08-22 13:25:09 +030088 if (fp_minor > ETH_HSI_VER_MINOR &&
89 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
Yuval Mintz1fe614d2016-06-05 13:11:11 +030090 DP_VERBOSE(p_hwfn,
91 QED_MSG_IOV,
92 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
93 p_vf->abs_vf_id,
94 ETH_HSI_VER_MAJOR,
95 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
96 fp_minor = ETH_HSI_VER_MINOR;
97 }
98
Yuval Mintz351a4ded2016-06-02 10:23:29 +030099 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300100 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
101
102 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
103 "VF[%d] - Starting using HSI %02x.%02x\n",
104 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300105
106 return qed_spq_post(p_hwfn, p_ent, NULL);
107}
108
Yuval Mintz0b55e272016-05-11 16:36:15 +0300109static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
110 u32 concrete_vfid, u16 opaque_vfid)
111{
112 struct vf_stop_ramrod_data *p_ramrod = NULL;
113 struct qed_spq_entry *p_ent = NULL;
114 struct qed_sp_init_data init_data;
115 int rc = -EINVAL;
116
117 /* Get SPQ entry */
118 memset(&init_data, 0, sizeof(init_data));
119 init_data.cid = qed_spq_get_cid(p_hwfn);
120 init_data.opaque_fid = opaque_vfid;
121 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
122
123 rc = qed_sp_init_request(p_hwfn, &p_ent,
124 COMMON_RAMROD_VF_STOP,
125 PROTOCOLID_COMMON, &init_data);
126 if (rc)
127 return rc;
128
129 p_ramrod = &p_ent->ramrod.vf_stop;
130
131 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
132
133 return qed_spq_post(p_hwfn, p_ent, NULL);
134}
135
Baoyou Xieba569472016-09-09 09:21:15 +0800136static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400137 int rel_vf_id,
138 bool b_enabled_only, bool b_non_malicious)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300139{
140 if (!p_hwfn->pf_iov_info) {
141 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
142 return false;
143 }
144
145 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
146 (rel_vf_id < 0))
147 return false;
148
149 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
150 b_enabled_only)
151 return false;
152
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400153 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
154 b_non_malicious)
155 return false;
156
Yuval Mintz32a47e72016-05-11 16:36:12 +0300157 return true;
158}
159
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300160static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
161 u16 relative_vf_id,
162 bool b_enabled_only)
163{
164 struct qed_vf_info *vf = NULL;
165
166 if (!p_hwfn->pf_iov_info) {
167 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
168 return NULL;
169 }
170
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400171 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
172 b_enabled_only, false))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300173 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
174 else
175 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
176 relative_vf_id);
177
178 return vf;
179}
180
Yuval Mintz41086462016-06-05 13:11:13 +0300181static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
182 struct qed_vf_info *p_vf, u16 rx_qid)
183{
184 if (rx_qid >= p_vf->num_rxqs)
185 DP_VERBOSE(p_hwfn,
186 QED_MSG_IOV,
187 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
188 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
189 return rx_qid < p_vf->num_rxqs;
190}
191
192static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
193 struct qed_vf_info *p_vf, u16 tx_qid)
194{
195 if (tx_qid >= p_vf->num_txqs)
196 DP_VERBOSE(p_hwfn,
197 QED_MSG_IOV,
198 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
199 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
200 return tx_qid < p_vf->num_txqs;
201}
202
203static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
204 struct qed_vf_info *p_vf, u16 sb_idx)
205{
206 int i;
207
208 for (i = 0; i < p_vf->num_sbs; i++)
209 if (p_vf->igu_sbs[i] == sb_idx)
210 return true;
211
212 DP_VERBOSE(p_hwfn,
213 QED_MSG_IOV,
214 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
215 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
216
217 return false;
218}
219
Baoyou Xieba569472016-09-09 09:21:15 +0800220static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
221 int vfid, struct qed_ptt *p_ptt)
Yuval Mintz36558c32016-05-11 16:36:17 +0300222{
223 struct qed_bulletin_content *p_bulletin;
224 int crc_size = sizeof(p_bulletin->crc);
225 struct qed_dmae_params params;
226 struct qed_vf_info *p_vf;
227
228 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
229 if (!p_vf)
230 return -EINVAL;
231
232 if (!p_vf->vf_bulletin)
233 return -EINVAL;
234
235 p_bulletin = p_vf->bulletin.p_virt;
236
237 /* Increment bulletin board version and compute crc */
238 p_bulletin->version++;
239 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
240 p_vf->bulletin.size - crc_size);
241
242 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
243 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
244 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
245
246 /* propagate bulletin board via dmae to vm memory */
247 memset(&params, 0, sizeof(params));
248 params.flags = QED_DMAE_FLAG_VF_DST;
249 params.dst_vfid = p_vf->abs_vf_id;
250 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
251 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
252 &params);
253}
254
Yuval Mintz32a47e72016-05-11 16:36:12 +0300255static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
256{
257 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
258 int pos = iov->pos;
259
260 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
261 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
262
263 pci_read_config_word(cdev->pdev,
264 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
265 pci_read_config_word(cdev->pdev,
266 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
267
268 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
269 if (iov->num_vfs) {
270 DP_VERBOSE(cdev,
271 QED_MSG_IOV,
272 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
273 iov->num_vfs = 0;
274 }
275
276 pci_read_config_word(cdev->pdev,
277 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
278
279 pci_read_config_word(cdev->pdev,
280 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
281
282 pci_read_config_word(cdev->pdev,
283 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
284
285 pci_read_config_dword(cdev->pdev,
286 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
287
288 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
289
290 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
291
292 DP_VERBOSE(cdev,
293 QED_MSG_IOV,
294 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
295 iov->nres,
296 iov->cap,
297 iov->ctrl,
298 iov->total_vfs,
299 iov->initial_vfs,
300 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
301
302 /* Some sanity checks */
303 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
304 iov->total_vfs > NUM_OF_VFS(cdev)) {
305 /* This can happen only due to a bug. In this case we set
306 * num_vfs to zero to avoid memory corruption in the code that
307 * assumes max number of vfs
308 */
309 DP_NOTICE(cdev,
310 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
311 iov->num_vfs);
312
313 iov->num_vfs = 0;
314 iov->total_vfs = 0;
315 }
316
317 return 0;
318}
319
320static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
321 struct qed_ptt *p_ptt)
322{
323 struct qed_igu_block *p_sb;
324 u16 sb_id;
325 u32 val;
326
327 if (!p_hwfn->hw_info.p_igu_info) {
328 DP_ERR(p_hwfn,
329 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
330 return;
331 }
332
333 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
334 sb_id++) {
335 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
336 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
337 !(p_sb->status & QED_IGU_STATUS_PF)) {
338 val = qed_rd(p_hwfn, p_ptt,
339 IGU_REG_MAPPING_MEMORY + sb_id * 4);
340 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
341 qed_wr(p_hwfn, p_ptt,
342 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
343 }
344 }
345}
346
347static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
348{
349 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
350 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
351 struct qed_bulletin_content *p_bulletin_virt;
352 dma_addr_t req_p, rply_p, bulletin_p;
353 union pfvf_tlvs *p_reply_virt_addr;
354 union vfpf_tlvs *p_req_virt_addr;
355 u8 idx = 0;
356
357 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
358
359 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
360 req_p = p_iov_info->mbx_msg_phys_addr;
361 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
362 rply_p = p_iov_info->mbx_reply_phys_addr;
363 p_bulletin_virt = p_iov_info->p_bulletins;
364 bulletin_p = p_iov_info->bulletins_phys;
365 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
366 DP_ERR(p_hwfn,
367 "qed_iov_setup_vfdb called without allocating mem first\n");
368 return;
369 }
370
371 for (idx = 0; idx < p_iov->total_vfs; idx++) {
372 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
373 u32 concrete;
374
375 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
376 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
377 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
378 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
379
380 vf->state = VF_STOPPED;
381 vf->b_init = false;
382
383 vf->bulletin.phys = idx *
384 sizeof(struct qed_bulletin_content) +
385 bulletin_p;
386 vf->bulletin.p_virt = p_bulletin_virt + idx;
387 vf->bulletin.size = sizeof(struct qed_bulletin_content);
388
389 vf->relative_vf_id = idx;
390 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
391 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
392 vf->concrete_fid = concrete;
393 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
394 (vf->abs_vf_id << 8);
395 vf->vport_id = idx + 1;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +0300396
397 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
398 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300399 }
400}
401
402static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
403{
404 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
405 void **p_v_addr;
406 u16 num_vfs = 0;
407
408 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
409
410 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
411 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
412
413 /* Allocate PF Mailbox buffer (per-VF) */
414 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
415 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
416 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
417 p_iov_info->mbx_msg_size,
418 &p_iov_info->mbx_msg_phys_addr,
419 GFP_KERNEL);
420 if (!*p_v_addr)
421 return -ENOMEM;
422
423 /* Allocate PF Mailbox Reply buffer (per-VF) */
424 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
425 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
426 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
427 p_iov_info->mbx_reply_size,
428 &p_iov_info->mbx_reply_phys_addr,
429 GFP_KERNEL);
430 if (!*p_v_addr)
431 return -ENOMEM;
432
433 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
434 num_vfs;
435 p_v_addr = &p_iov_info->p_bulletins;
436 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
437 p_iov_info->bulletins_size,
438 &p_iov_info->bulletins_phys,
439 GFP_KERNEL);
440 if (!*p_v_addr)
441 return -ENOMEM;
442
443 DP_VERBOSE(p_hwfn,
444 QED_MSG_IOV,
445 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
446 p_iov_info->mbx_msg_virt_addr,
447 (u64) p_iov_info->mbx_msg_phys_addr,
448 p_iov_info->mbx_reply_virt_addr,
449 (u64) p_iov_info->mbx_reply_phys_addr,
450 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
451
452 return 0;
453}
454
455static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
456{
457 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
458
459 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
460 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
461 p_iov_info->mbx_msg_size,
462 p_iov_info->mbx_msg_virt_addr,
463 p_iov_info->mbx_msg_phys_addr);
464
465 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
466 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
467 p_iov_info->mbx_reply_size,
468 p_iov_info->mbx_reply_virt_addr,
469 p_iov_info->mbx_reply_phys_addr);
470
471 if (p_iov_info->p_bulletins)
472 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
473 p_iov_info->bulletins_size,
474 p_iov_info->p_bulletins,
475 p_iov_info->bulletins_phys);
476}
477
478int qed_iov_alloc(struct qed_hwfn *p_hwfn)
479{
480 struct qed_pf_iov *p_sriov;
481
482 if (!IS_PF_SRIOV(p_hwfn)) {
483 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
484 "No SR-IOV - no need for IOV db\n");
485 return 0;
486 }
487
488 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700489 if (!p_sriov)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300490 return -ENOMEM;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300491
492 p_hwfn->pf_iov_info = p_sriov;
493
494 return qed_iov_allocate_vfdb(p_hwfn);
495}
496
497void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
498{
499 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
500 return;
501
502 qed_iov_setup_vfdb(p_hwfn);
503 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
504}
505
506void qed_iov_free(struct qed_hwfn *p_hwfn)
507{
508 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
509 qed_iov_free_vfdb(p_hwfn);
510 kfree(p_hwfn->pf_iov_info);
511 }
512}
513
514void qed_iov_free_hw_info(struct qed_dev *cdev)
515{
516 kfree(cdev->p_iov_info);
517 cdev->p_iov_info = NULL;
518}
519
520int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
521{
522 struct qed_dev *cdev = p_hwfn->cdev;
523 int pos;
524 int rc;
525
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300526 if (IS_VF(p_hwfn->cdev))
527 return 0;
528
Yuval Mintz32a47e72016-05-11 16:36:12 +0300529 /* Learn the PCI configuration */
530 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
531 PCI_EXT_CAP_ID_SRIOV);
532 if (!pos) {
533 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
534 return 0;
535 }
536
537 /* Allocate a new struct for IOV information */
538 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700539 if (!cdev->p_iov_info)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300540 return -ENOMEM;
Joe Perches2591c282016-09-04 14:24:03 -0700541
Yuval Mintz32a47e72016-05-11 16:36:12 +0300542 cdev->p_iov_info->pos = pos;
543
544 rc = qed_iov_pci_cfg_info(cdev);
545 if (rc)
546 return rc;
547
548 /* We want PF IOV to be synonemous with the existance of p_iov_info;
549 * In case the capability is published but there are no VFs, simply
550 * de-allocate the struct.
551 */
552 if (!cdev->p_iov_info->total_vfs) {
553 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
554 "IOV capabilities, but no VFs are published\n");
555 kfree(cdev->p_iov_info);
556 cdev->p_iov_info = NULL;
557 return 0;
558 }
559
560 /* Calculate the first VF index - this is a bit tricky; Basically,
561 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
562 * after the first engine's VFs.
563 */
564 cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
565 p_hwfn->abs_pf_id - 16;
566 if (QED_PATH_ID(p_hwfn))
567 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
568
569 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
570 "First VF in hwfn 0x%08x\n",
571 cdev->p_iov_info->first_vf_in_pf);
572
573 return 0;
574}
575
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400576bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
577 int vfid, bool b_fail_malicious)
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300578{
579 /* Check PF supports sriov */
Yuval Mintzb0409fa2016-05-15 14:48:05 +0300580 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
581 !IS_PF_SRIOV_ALLOC(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300582 return false;
583
584 /* Check VF validity */
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400585 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300586 return false;
587
588 return true;
589}
590
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400591bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
592{
593 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
594}
595
Yuval Mintz0b55e272016-05-11 16:36:15 +0300596static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
597 u16 rel_vf_id, u8 to_disable)
598{
599 struct qed_vf_info *vf;
600 int i;
601
602 for_each_hwfn(cdev, i) {
603 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
604
605 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
606 if (!vf)
607 continue;
608
609 vf->to_disable = to_disable;
610 }
611}
612
Baoyou Xieba569472016-09-09 09:21:15 +0800613static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
Yuval Mintz0b55e272016-05-11 16:36:15 +0300614{
615 u16 i;
616
617 if (!IS_QED_SRIOV(cdev))
618 return;
619
620 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
621 qed_iov_set_vf_to_disable(cdev, i, to_disable);
622}
623
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300624static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
625 struct qed_ptt *p_ptt, u8 abs_vfid)
626{
627 qed_wr(p_hwfn, p_ptt,
628 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
629 1 << (abs_vfid & 0x1f));
630}
631
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300632static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
633 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
634{
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300635 int i;
636
637 /* Set VF masks and configuration - pretend */
638 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
639
640 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
641
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300642 /* unpretend */
643 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
644
645 /* iterate over all queues, clear sb consumer */
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300646 for (i = 0; i < vf->num_sbs; i++)
647 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
648 vf->igu_sbs[i],
649 vf->opaque_fid, true);
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300650}
651
Yuval Mintz0b55e272016-05-11 16:36:15 +0300652static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
653 struct qed_ptt *p_ptt,
654 struct qed_vf_info *vf, bool enable)
655{
656 u32 igu_vf_conf;
657
658 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
659
660 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
661
662 if (enable)
663 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
664 else
665 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
666
667 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
668
669 /* unpretend */
670 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
671}
672
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300673static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
674 struct qed_ptt *p_ptt,
675 struct qed_vf_info *vf)
676{
677 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
678 int rc;
679
Yuval Mintz0b55e272016-05-11 16:36:15 +0300680 if (vf->to_disable)
681 return 0;
682
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300683 DP_VERBOSE(p_hwfn,
684 QED_MSG_IOV,
685 "Enable internal access for vf %x [abs %x]\n",
686 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
687
688 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
689
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300690 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
691
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400692 /* It's possible VF was previously considered malicious */
693 vf->b_malicious = false;
694
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300695 rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
696 if (rc)
697 return rc;
698
699 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
700
701 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
702 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
703
704 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
705 p_hwfn->hw_info.hw_mode);
706
707 /* unpretend */
708 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
709
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300710 vf->state = VF_FREE;
711
712 return rc;
713}
714
Yuval Mintz0b55e272016-05-11 16:36:15 +0300715/**
716 * @brief qed_iov_config_perm_table - configure the permission
717 * zone table.
718 * In E4, queue zone permission table size is 320x9. There
719 * are 320 VF queues for single engine device (256 for dual
720 * engine device), and each entry has the following format:
721 * {Valid, VF[7:0]}
722 * @param p_hwfn
723 * @param p_ptt
724 * @param vf
725 * @param enable
726 */
727static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
728 struct qed_ptt *p_ptt,
729 struct qed_vf_info *vf, u8 enable)
730{
731 u32 reg_addr, val;
732 u16 qzone_id = 0;
733 int qid;
734
735 for (qid = 0; qid < vf->num_rxqs; qid++) {
736 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
737 &qzone_id);
738
739 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
Yuval Mintz1a635e42016-08-15 10:42:43 +0300740 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300741 qed_wr(p_hwfn, p_ptt, reg_addr, val);
742 }
743}
744
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300745static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
746 struct qed_ptt *p_ptt,
747 struct qed_vf_info *vf)
748{
749 /* Reset vf in IGU - interrupts are still disabled */
750 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
751
752 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
753
754 /* Permission Table */
755 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
756}
757
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300758static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
759 struct qed_ptt *p_ptt,
760 struct qed_vf_info *vf, u16 num_rx_queues)
761{
762 struct qed_igu_block *igu_blocks;
763 int qid = 0, igu_id = 0;
764 u32 val = 0;
765
766 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
767
768 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
769 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
770 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
771
772 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
773 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
774 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
775
776 while ((qid < num_rx_queues) &&
777 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
778 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
779 struct cau_sb_entry sb_entry;
780
781 vf->igu_sbs[qid] = (u16)igu_id;
782 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
783
784 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
785
786 qed_wr(p_hwfn, p_ptt,
787 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
788 val);
789
790 /* Configure igu sb in CAU which were marked valid */
791 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
792 p_hwfn->rel_pf_id,
793 vf->abs_vf_id, 1);
794 qed_dmae_host2grc(p_hwfn, p_ptt,
795 (u64)(uintptr_t)&sb_entry,
796 CAU_REG_SB_VAR_MEMORY +
797 igu_id * sizeof(u64), 2, 0);
798 qid++;
799 }
800 igu_id++;
801 }
802
803 vf->num_sbs = (u8) num_rx_queues;
804
805 return vf->num_sbs;
806}
807
Yuval Mintz0b55e272016-05-11 16:36:15 +0300808static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
809 struct qed_ptt *p_ptt,
810 struct qed_vf_info *vf)
811{
812 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
813 int idx, igu_id;
814 u32 addr, val;
815
816 /* Invalidate igu CAM lines and mark them as free */
817 for (idx = 0; idx < vf->num_sbs; idx++) {
818 igu_id = vf->igu_sbs[idx];
819 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
820
821 val = qed_rd(p_hwfn, p_ptt, addr);
822 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
823 qed_wr(p_hwfn, p_ptt, addr, val);
824
825 p_info->igu_map.igu_blocks[igu_id].status |=
826 QED_IGU_STATUS_FREE;
827
828 p_hwfn->hw_info.p_igu_info->free_blks++;
829 }
830
831 vf->num_sbs = 0;
832}
833
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300834static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
835 struct qed_ptt *p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200836 struct qed_iov_vf_init_params *p_params)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300837{
838 u8 num_of_vf_avaiable_chains = 0;
839 struct qed_vf_info *vf = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200840 u16 qid, num_irqs;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300841 int rc = 0;
842 u32 cids;
843 u8 i;
844
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200845 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300846 if (!vf) {
847 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
848 return -EINVAL;
849 }
850
851 if (vf->b_init) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200852 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
853 p_params->rel_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300854 return -EINVAL;
855 }
856
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200857 /* Perform sanity checking on the requested queue_id */
858 for (i = 0; i < p_params->num_queues; i++) {
859 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
860 u16 max_vf_qzone = min_vf_qzone +
861 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
862
863 qid = p_params->req_rx_queue[i];
864 if (qid < min_vf_qzone || qid > max_vf_qzone) {
865 DP_NOTICE(p_hwfn,
866 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
867 qid,
868 p_params->rel_vf_id,
869 min_vf_qzone, max_vf_qzone);
870 return -EINVAL;
871 }
872
873 qid = p_params->req_tx_queue[i];
874 if (qid > max_vf_qzone) {
875 DP_NOTICE(p_hwfn,
876 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
877 qid, p_params->rel_vf_id, max_vf_qzone);
878 return -EINVAL;
879 }
880
881 /* If client *really* wants, Tx qid can be shared with PF */
882 if (qid < min_vf_qzone)
883 DP_VERBOSE(p_hwfn,
884 QED_MSG_IOV,
885 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
886 p_params->rel_vf_id, qid, i);
887 }
888
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300889 /* Limit number of queues according to number of CIDs */
890 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
891 DP_VERBOSE(p_hwfn,
892 QED_MSG_IOV,
893 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200894 vf->relative_vf_id, p_params->num_queues, (u16)cids);
895 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300896
897 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
898 p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200899 vf, num_irqs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300900 if (!num_of_vf_avaiable_chains) {
901 DP_ERR(p_hwfn, "no available igu sbs\n");
902 return -ENOMEM;
903 }
904
905 /* Choose queue number and index ranges */
906 vf->num_rxqs = num_of_vf_avaiable_chains;
907 vf->num_txqs = num_of_vf_avaiable_chains;
908
909 for (i = 0; i < vf->num_rxqs; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200910 struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300911
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200912 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
913 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300914
915 /* CIDs are per-VF, so no problem having them 0-based. */
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200916 p_queue->fw_cid = i;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300917
918 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200919 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
920 vf->relative_vf_id,
921 i, vf->igu_sbs[i],
922 p_queue->fw_rx_qid,
923 p_queue->fw_tx_qid, p_queue->fw_cid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300924 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200925
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300926 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
927 if (!rc) {
928 vf->b_init = true;
929
930 if (IS_LEAD_HWFN(p_hwfn))
931 p_hwfn->cdev->p_iov_info->num_vfs++;
932 }
933
934 return rc;
935}
936
Manish Chopra079d20a2016-05-15 14:48:07 +0300937static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
938 u16 vfid,
939 struct qed_mcp_link_params *params,
940 struct qed_mcp_link_state *link,
941 struct qed_mcp_link_capabilities *p_caps)
942{
943 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
944 vfid,
945 false);
946 struct qed_bulletin_content *p_bulletin;
947
948 if (!p_vf)
949 return;
950
951 p_bulletin = p_vf->bulletin.p_virt;
952 p_bulletin->req_autoneg = params->speed.autoneg;
953 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
954 p_bulletin->req_forced_speed = params->speed.forced_speed;
955 p_bulletin->req_autoneg_pause = params->pause.autoneg;
956 p_bulletin->req_forced_rx = params->pause.forced_rx;
957 p_bulletin->req_forced_tx = params->pause.forced_tx;
958 p_bulletin->req_loopback = params->loopback_mode;
959
960 p_bulletin->link_up = link->link_up;
961 p_bulletin->speed = link->speed;
962 p_bulletin->full_duplex = link->full_duplex;
963 p_bulletin->autoneg = link->an;
964 p_bulletin->autoneg_complete = link->an_complete;
965 p_bulletin->parallel_detection = link->parallel_detection;
966 p_bulletin->pfc_enabled = link->pfc_enabled;
967 p_bulletin->partner_adv_speed = link->partner_adv_speed;
968 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
969 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
970 p_bulletin->partner_adv_pause = link->partner_adv_pause;
971 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
972
973 p_bulletin->capability_speed = p_caps->speed_capabilities;
974}
975
Yuval Mintz0b55e272016-05-11 16:36:15 +0300976static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
977 struct qed_ptt *p_ptt, u16 rel_vf_id)
978{
Manish Chopra079d20a2016-05-15 14:48:07 +0300979 struct qed_mcp_link_capabilities caps;
980 struct qed_mcp_link_params params;
981 struct qed_mcp_link_state link;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300982 struct qed_vf_info *vf = NULL;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300983
984 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
985 if (!vf) {
986 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
987 return -EINVAL;
988 }
989
Yuval Mintz36558c32016-05-11 16:36:17 +0300990 if (vf->bulletin.p_virt)
991 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
992
993 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
994
Manish Chopra079d20a2016-05-15 14:48:07 +0300995 /* Get the link configuration back in bulletin so
996 * that when VFs are re-enabled they get the actual
997 * link configuration.
998 */
999 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1000 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1001 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1002 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1003
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001004 /* Forget the VF's acquisition message */
1005 memset(&vf->acquire, 0, sizeof(vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001006
1007 /* disablng interrupts and resetting permission table was done during
1008 * vf-close, however, we could get here without going through vf_close
1009 */
1010 /* Disable Interrupts for VF */
1011 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1012
1013 /* Reset Permission table */
1014 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1015
1016 vf->num_rxqs = 0;
1017 vf->num_txqs = 0;
1018 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1019
1020 if (vf->b_init) {
1021 vf->b_init = false;
1022
1023 if (IS_LEAD_HWFN(p_hwfn))
1024 p_hwfn->cdev->p_iov_info->num_vfs--;
1025 }
1026
1027 return 0;
1028}
1029
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001030static bool qed_iov_tlv_supported(u16 tlvtype)
1031{
1032 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1033}
1034
1035/* place a given tlv on the tlv buffer, continuing current tlv list */
1036void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1037{
1038 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1039
1040 tl->type = type;
1041 tl->length = length;
1042
1043 /* Offset should keep pointing to next TLV (the end of the last) */
1044 *offset += length;
1045
1046 /* Return a pointer to the start of the added tlv */
1047 return *offset - length;
1048}
1049
1050/* list the types and lengths of the tlvs on the buffer */
1051void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1052{
1053 u16 i = 1, total_length = 0;
1054 struct channel_tlv *tlv;
1055
1056 do {
1057 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1058
1059 /* output tlv */
1060 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1061 "TLV number %d: type %d, length %d\n",
1062 i, tlv->type, tlv->length);
1063
1064 if (tlv->type == CHANNEL_TLV_LIST_END)
1065 return;
1066
1067 /* Validate entry - protect against malicious VFs */
1068 if (!tlv->length) {
1069 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1070 return;
1071 }
1072
1073 total_length += tlv->length;
1074
1075 if (total_length >= sizeof(struct tlv_buffer_size)) {
1076 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1077 return;
1078 }
1079
1080 i++;
1081 } while (1);
1082}
1083
1084static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1085 struct qed_ptt *p_ptt,
1086 struct qed_vf_info *p_vf,
1087 u16 length, u8 status)
1088{
1089 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1090 struct qed_dmae_params params;
1091 u8 eng_vf_id;
1092
1093 mbx->reply_virt->default_resp.hdr.status = status;
1094
1095 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1096
1097 eng_vf_id = p_vf->abs_vf_id;
1098
1099 memset(&params, 0, sizeof(struct qed_dmae_params));
1100 params.flags = QED_DMAE_FLAG_VF_DST;
1101 params.dst_vfid = eng_vf_id;
1102
1103 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1104 mbx->req_virt->first_tlv.reply_address +
1105 sizeof(u64),
1106 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1107 &params);
1108
1109 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1110 mbx->req_virt->first_tlv.reply_address,
1111 sizeof(u64) / 4, &params);
1112
1113 REG_WR(p_hwfn,
1114 GTT_BAR0_MAP_REG_USDM_RAM +
1115 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1116}
1117
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001118static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1119 enum qed_iov_vport_update_flag flag)
1120{
1121 switch (flag) {
1122 case QED_IOV_VP_UPDATE_ACTIVATE:
1123 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001124 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1125 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1126 case QED_IOV_VP_UPDATE_TX_SWITCH:
1127 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001128 case QED_IOV_VP_UPDATE_MCAST:
1129 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1130 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1131 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1132 case QED_IOV_VP_UPDATE_RSS:
1133 return CHANNEL_TLV_VPORT_UPDATE_RSS;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001134 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1135 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1136 case QED_IOV_VP_UPDATE_SGE_TPA:
1137 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001138 default:
1139 return 0;
1140 }
1141}
1142
1143static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1144 struct qed_vf_info *p_vf,
1145 struct qed_iov_vf_mbx *p_mbx,
1146 u8 status,
1147 u16 tlvs_mask, u16 tlvs_accepted)
1148{
1149 struct pfvf_def_resp_tlv *resp;
1150 u16 size, total_len, i;
1151
1152 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1153 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1154 size = sizeof(struct pfvf_def_resp_tlv);
1155 total_len = size;
1156
1157 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1158
1159 /* Prepare response for all extended tlvs if they are found by PF */
1160 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
Yuval Mintz1a635e42016-08-15 10:42:43 +03001161 if (!(tlvs_mask & BIT(i)))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001162 continue;
1163
1164 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1165 qed_iov_vport_to_tlv(p_hwfn, i), size);
1166
Yuval Mintz1a635e42016-08-15 10:42:43 +03001167 if (tlvs_accepted & BIT(i))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001168 resp->hdr.status = status;
1169 else
1170 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1171
1172 DP_VERBOSE(p_hwfn,
1173 QED_MSG_IOV,
1174 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1175 p_vf->relative_vf_id,
1176 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1177
1178 total_len += size;
1179 }
1180
1181 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1182 sizeof(struct channel_list_end_tlv));
1183
1184 return total_len;
1185}
1186
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001187static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1188 struct qed_ptt *p_ptt,
1189 struct qed_vf_info *vf_info,
1190 u16 type, u16 length, u8 status)
1191{
1192 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1193
1194 mbx->offset = (u8 *)mbx->reply_virt;
1195
1196 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1197 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1198 sizeof(struct channel_list_end_tlv));
1199
1200 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1201}
1202
Baoyou Xieba569472016-09-09 09:21:15 +08001203static struct
1204qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1205 u16 relative_vf_id,
1206 bool b_enabled_only)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001207{
1208 struct qed_vf_info *vf = NULL;
1209
1210 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1211 if (!vf)
1212 return NULL;
1213
1214 return &vf->p_vf_info;
1215}
1216
Baoyou Xieba569472016-09-09 09:21:15 +08001217static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001218{
1219 struct qed_public_vf_info *vf_info;
1220
1221 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1222
1223 if (!vf_info)
1224 return;
1225
1226 /* Clear the VF mac */
Shyam Saini0ee28e32017-01-17 07:35:04 +05301227 eth_zero_addr(vf_info->mac);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02001228
1229 vf_info->rx_accept_mode = 0;
1230 vf_info->tx_accept_mode = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001231}
1232
1233static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1234 struct qed_vf_info *p_vf)
1235{
1236 u32 i;
1237
1238 p_vf->vf_bulletin = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001239 p_vf->vport_instance = 0;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001240 p_vf->configured_features = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001241
1242 /* If VF previously requested less resources, go back to default */
1243 p_vf->num_rxqs = p_vf->num_sbs;
1244 p_vf->num_txqs = p_vf->num_sbs;
1245
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001246 p_vf->num_active_rxqs = 0;
1247
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001248 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1249 struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
1250
1251 if (p_queue->p_rx_cid) {
1252 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1253 p_queue->p_rx_cid = NULL;
1254 }
1255
1256 if (p_queue->p_tx_cid) {
1257 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
1258 p_queue->p_tx_cid = NULL;
1259 }
1260 }
Yuval Mintz0b55e272016-05-11 16:36:15 +03001261
Yuval Mintz08feecd2016-05-11 16:36:20 +03001262 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001263 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001264 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1265}
1266
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001267static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1268 struct qed_ptt *p_ptt,
1269 struct qed_vf_info *p_vf,
1270 struct vf_pf_resc_request *p_req,
1271 struct pf_vf_resc *p_resp)
1272{
1273 int i;
1274
1275 /* Queue related information */
1276 p_resp->num_rxqs = p_vf->num_rxqs;
1277 p_resp->num_txqs = p_vf->num_txqs;
1278 p_resp->num_sbs = p_vf->num_sbs;
1279
1280 for (i = 0; i < p_resp->num_sbs; i++) {
1281 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1282 p_resp->hw_sbs[i].sb_qid = 0;
1283 }
1284
1285 /* These fields are filled for backward compatibility.
1286 * Unused by modern vfs.
1287 */
1288 for (i = 0; i < p_resp->num_rxqs; i++) {
1289 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1290 (u16 *)&p_resp->hw_qid[i]);
1291 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1292 }
1293
1294 /* Filter related information */
1295 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1296 p_req->num_mac_filters);
1297 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1298 p_req->num_vlan_filters);
1299
1300 /* This isn't really needed/enforced, but some legacy VFs might depend
1301 * on the correct filling of this field.
1302 */
1303 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1304
1305 /* Validate sufficient resources for VF */
1306 if (p_resp->num_rxqs < p_req->num_rxqs ||
1307 p_resp->num_txqs < p_req->num_txqs ||
1308 p_resp->num_sbs < p_req->num_sbs ||
1309 p_resp->num_mac_filters < p_req->num_mac_filters ||
1310 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1311 p_resp->num_mc_filters < p_req->num_mc_filters) {
1312 DP_VERBOSE(p_hwfn,
1313 QED_MSG_IOV,
1314 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1315 p_vf->abs_vf_id,
1316 p_req->num_rxqs,
1317 p_resp->num_rxqs,
1318 p_req->num_rxqs,
1319 p_resp->num_txqs,
1320 p_req->num_sbs,
1321 p_resp->num_sbs,
1322 p_req->num_mac_filters,
1323 p_resp->num_mac_filters,
1324 p_req->num_vlan_filters,
1325 p_resp->num_vlan_filters,
1326 p_req->num_mc_filters, p_resp->num_mc_filters);
Yuval Mintza044df82016-08-22 13:25:09 +03001327
1328 /* Some legacy OSes are incapable of correctly handling this
1329 * failure.
1330 */
1331 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1332 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1333 (p_vf->acquire.vfdev_info.os_type ==
1334 VFPF_ACQUIRE_OS_WINDOWS))
1335 return PFVF_STATUS_SUCCESS;
1336
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001337 return PFVF_STATUS_NO_RESOURCE;
1338 }
1339
1340 return PFVF_STATUS_SUCCESS;
1341}
1342
1343static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1344 struct pfvf_stats_info *p_stats)
1345{
1346 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1347 offsetof(struct mstorm_vf_zone,
1348 non_trigger.eth_queue_stat);
1349 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1350 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1351 offsetof(struct ustorm_vf_zone,
1352 non_trigger.eth_queue_stat);
1353 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1354 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1355 offsetof(struct pstorm_vf_zone,
1356 non_trigger.eth_queue_stat);
1357 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1358 p_stats->tstats.address = 0;
1359 p_stats->tstats.len = 0;
1360}
1361
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001362static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1363 struct qed_ptt *p_ptt,
1364 struct qed_vf_info *vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001365{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001366 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1367 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1368 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1369 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001370 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001371 struct pf_vf_resc *resc = &resp->resc;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001372 int rc;
1373
1374 memset(resp, 0, sizeof(*resp));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001375
Yuval Mintz05fafbf2016-08-19 09:33:31 +03001376 /* Write the PF version so that VF would know which version
1377 * is supported - might be later overriden. This guarantees that
1378 * VF could recognize legacy PF based on lack of versions in reply.
1379 */
1380 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1381 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1382
Yuval Mintza044df82016-08-22 13:25:09 +03001383 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1384 DP_VERBOSE(p_hwfn,
1385 QED_MSG_IOV,
1386 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1387 vf->abs_vf_id, vf->state);
1388 goto out;
1389 }
1390
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001391 /* Validate FW compatibility */
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001392 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
Yuval Mintza044df82016-08-22 13:25:09 +03001393 if (req->vfdev_info.capabilities &
1394 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1395 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001396
Yuval Mintza044df82016-08-22 13:25:09 +03001397 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1398 "VF[%d] is pre-fastpath HSI\n",
1399 vf->abs_vf_id);
1400 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1401 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1402 } else {
1403 DP_INFO(p_hwfn,
1404 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1405 vf->abs_vf_id,
1406 req->vfdev_info.eth_fp_hsi_major,
1407 req->vfdev_info.eth_fp_hsi_minor,
1408 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1409
1410 goto out;
1411 }
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001412 }
1413
1414 /* On 100g PFs, prevent old VFs from loading */
1415 if ((p_hwfn->cdev->num_hwfns > 1) &&
1416 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1417 DP_INFO(p_hwfn,
1418 "VF[%d] is running an old driver that doesn't support 100g\n",
1419 vf->abs_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001420 goto out;
1421 }
1422
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001423 /* Store the acquire message */
1424 memcpy(&vf->acquire, req, sizeof(vf->acquire));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001425
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001426 vf->opaque_fid = req->vfdev_info.opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001427
1428 vf->vf_bulletin = req->bulletin_addr;
1429 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1430 vf->bulletin.size : req->bulletin_size;
1431
1432 /* fill in pfdev info */
1433 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1434 pfdev_info->db_size = 0;
1435 pfdev_info->indices_per_sb = PIS_PER_SB;
1436
1437 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1438 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1439 if (p_hwfn->cdev->num_hwfns > 1)
1440 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1441
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001442 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001443
1444 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1445
1446 pfdev_info->fw_major = FW_MAJOR_VERSION;
1447 pfdev_info->fw_minor = FW_MINOR_VERSION;
1448 pfdev_info->fw_rev = FW_REVISION_VERSION;
1449 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
Yuval Mintza044df82016-08-22 13:25:09 +03001450
1451 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1452 * this field.
1453 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03001454 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001455 req->vfdev_info.eth_fp_hsi_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001456 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1457 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1458
1459 pfdev_info->dev_type = p_hwfn->cdev->type;
1460 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1461
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001462 /* Fill resources available to VF; Make sure there are enough to
1463 * satisfy the VF's request.
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001464 */
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001465 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1466 &req->resc_request, resc);
1467 if (vfpf_status != PFVF_STATUS_SUCCESS)
1468 goto out;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001469
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001470 /* Start the VF in FW */
1471 rc = qed_sp_vf_start(p_hwfn, vf);
1472 if (rc) {
1473 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1474 vfpf_status = PFVF_STATUS_FAILURE;
1475 goto out;
1476 }
1477
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001478 /* Fill agreed size of bulletin board in response */
1479 resp->bulletin_size = vf->bulletin.size;
Yuval Mintz36558c32016-05-11 16:36:17 +03001480 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001481
1482 DP_VERBOSE(p_hwfn,
1483 QED_MSG_IOV,
1484 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1485 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1486 vf->abs_vf_id,
1487 resp->pfdev_info.chip_num,
1488 resp->pfdev_info.db_size,
1489 resp->pfdev_info.indices_per_sb,
1490 resp->pfdev_info.capabilities,
1491 resc->num_rxqs,
1492 resc->num_txqs,
1493 resc->num_sbs,
1494 resc->num_mac_filters,
1495 resc->num_vlan_filters);
1496 vf->state = VF_ACQUIRED;
1497
1498 /* Prepare Response */
1499out:
1500 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1501 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001502}
1503
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001504static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1505 struct qed_vf_info *p_vf, bool val)
1506{
1507 struct qed_sp_vport_update_params params;
1508 int rc;
1509
1510 if (val == p_vf->spoof_chk) {
1511 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1512 "Spoofchk value[%d] is already configured\n", val);
1513 return 0;
1514 }
1515
1516 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1517 params.opaque_fid = p_vf->opaque_fid;
1518 params.vport_id = p_vf->vport_id;
1519 params.update_anti_spoofing_en_flg = 1;
1520 params.anti_spoofing_en = val;
1521
1522 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
Yuval Mintzcb1fa082016-07-27 14:45:20 +03001523 if (!rc) {
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001524 p_vf->spoof_chk = val;
1525 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1526 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1527 "Spoofchk val[%d] configured\n", val);
1528 } else {
1529 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1530 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1531 val, p_vf->relative_vf_id);
1532 }
1533
1534 return rc;
1535}
1536
Yuval Mintz08feecd2016-05-11 16:36:20 +03001537static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1538 struct qed_vf_info *p_vf)
1539{
1540 struct qed_filter_ucast filter;
1541 int rc = 0;
1542 int i;
1543
1544 memset(&filter, 0, sizeof(filter));
1545 filter.is_rx_filter = 1;
1546 filter.is_tx_filter = 1;
1547 filter.vport_to_add_to = p_vf->vport_id;
1548 filter.opcode = QED_FILTER_ADD;
1549
1550 /* Reconfigure vlans */
1551 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1552 if (!p_vf->shadow_config.vlans[i].used)
1553 continue;
1554
1555 filter.type = QED_FILTER_VLAN;
1556 filter.vlan = p_vf->shadow_config.vlans[i].vid;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001557 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001558 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1559 filter.vlan, p_vf->relative_vf_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001560 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1561 &filter, QED_SPQ_MODE_CB, NULL);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001562 if (rc) {
1563 DP_NOTICE(p_hwfn,
1564 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1565 filter.vlan, p_vf->relative_vf_id);
1566 break;
1567 }
1568 }
1569
1570 return rc;
1571}
1572
1573static int
1574qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1575 struct qed_vf_info *p_vf, u64 events)
1576{
1577 int rc = 0;
1578
Yuval Mintz1a635e42016-08-15 10:42:43 +03001579 if ((events & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03001580 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1581 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1582
1583 return rc;
1584}
1585
1586static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1587 struct qed_vf_info *p_vf, u64 events)
1588{
1589 int rc = 0;
1590 struct qed_filter_ucast filter;
1591
1592 if (!p_vf->vport_instance)
1593 return -EINVAL;
1594
Yuval Mintz1a635e42016-08-15 10:42:43 +03001595 if (events & BIT(MAC_ADDR_FORCED)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03001596 /* Since there's no way [currently] of removing the MAC,
1597 * we can always assume this means we need to force it.
1598 */
1599 memset(&filter, 0, sizeof(filter));
1600 filter.type = QED_FILTER_MAC;
1601 filter.opcode = QED_FILTER_REPLACE;
1602 filter.is_rx_filter = 1;
1603 filter.is_tx_filter = 1;
1604 filter.vport_to_add_to = p_vf->vport_id;
1605 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1606
1607 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1608 &filter, QED_SPQ_MODE_CB, NULL);
1609 if (rc) {
1610 DP_NOTICE(p_hwfn,
1611 "PF failed to configure MAC for VF\n");
1612 return rc;
1613 }
1614
1615 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1616 }
1617
Yuval Mintz1a635e42016-08-15 10:42:43 +03001618 if (events & BIT(VLAN_ADDR_FORCED)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001619 struct qed_sp_vport_update_params vport_update;
1620 u8 removal;
1621 int i;
1622
1623 memset(&filter, 0, sizeof(filter));
1624 filter.type = QED_FILTER_VLAN;
1625 filter.is_rx_filter = 1;
1626 filter.is_tx_filter = 1;
1627 filter.vport_to_add_to = p_vf->vport_id;
1628 filter.vlan = p_vf->bulletin.p_virt->pvid;
1629 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1630 QED_FILTER_FLUSH;
1631
1632 /* Send the ramrod */
1633 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1634 &filter, QED_SPQ_MODE_CB, NULL);
1635 if (rc) {
1636 DP_NOTICE(p_hwfn,
1637 "PF failed to configure VLAN for VF\n");
1638 return rc;
1639 }
1640
1641 /* Update the default-vlan & silent vlan stripping */
1642 memset(&vport_update, 0, sizeof(vport_update));
1643 vport_update.opaque_fid = p_vf->opaque_fid;
1644 vport_update.vport_id = p_vf->vport_id;
1645 vport_update.update_default_vlan_enable_flg = 1;
1646 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1647 vport_update.update_default_vlan_flg = 1;
1648 vport_update.default_vlan = filter.vlan;
1649
1650 vport_update.update_inner_vlan_removal_flg = 1;
1651 removal = filter.vlan ? 1
1652 : p_vf->shadow_config.inner_vlan_removal;
1653 vport_update.inner_vlan_removal_flg = removal;
1654 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1655 rc = qed_sp_vport_update(p_hwfn,
1656 &vport_update,
1657 QED_SPQ_MODE_EBLOCK, NULL);
1658 if (rc) {
1659 DP_NOTICE(p_hwfn,
1660 "PF failed to configure VF vport for vlan\n");
1661 return rc;
1662 }
1663
1664 /* Update all the Rx queues */
1665 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001666 struct qed_queue_cid *p_cid;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001667
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001668 p_cid = p_vf->vf_queues[i].p_rx_cid;
1669 if (!p_cid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03001670 continue;
1671
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001672 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1673 (void **)&p_cid,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001674 1, 0, 1,
1675 QED_SPQ_MODE_EBLOCK,
1676 NULL);
1677 if (rc) {
1678 DP_NOTICE(p_hwfn,
1679 "Failed to send Rx update fo queue[0x%04x]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001680 p_cid->rel.queue_id);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001681 return rc;
1682 }
1683 }
1684
1685 if (filter.vlan)
1686 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1687 else
Yuval Mintz1a635e42016-08-15 10:42:43 +03001688 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001689 }
1690
1691 /* If forced features are terminated, we need to configure the shadow
1692 * configuration back again.
1693 */
1694 if (events)
1695 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1696
1697 return rc;
1698}
1699
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001700static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1701 struct qed_ptt *p_ptt,
1702 struct qed_vf_info *vf)
1703{
1704 struct qed_sp_vport_start_params params = { 0 };
1705 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1706 struct vfpf_vport_start_tlv *start;
1707 u8 status = PFVF_STATUS_SUCCESS;
1708 struct qed_vf_info *vf_info;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001709 u64 *p_bitmap;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001710 int sb_id;
1711 int rc;
1712
1713 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1714 if (!vf_info) {
1715 DP_NOTICE(p_hwfn->cdev,
1716 "Failed to get VF info, invalid vfid [%d]\n",
1717 vf->relative_vf_id);
1718 return;
1719 }
1720
1721 vf->state = VF_ENABLED;
1722 start = &mbx->req_virt->start_vport;
1723
1724 /* Initialize Status block in CAU */
1725 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1726 if (!start->sb_addr[sb_id]) {
1727 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1728 "VF[%d] did not fill the address of SB %d\n",
1729 vf->relative_vf_id, sb_id);
1730 break;
1731 }
1732
1733 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1734 start->sb_addr[sb_id],
Yuval Mintz1a635e42016-08-15 10:42:43 +03001735 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001736 }
1737 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1738
1739 vf->mtu = start->mtu;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001740 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1741
1742 /* Take into consideration configuration forced by hypervisor;
1743 * If none is configured, use the supplied VF values [for old
1744 * vfs that would still be fine, since they passed '0' as padding].
1745 */
1746 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001747 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001748 u8 vf_req = start->only_untagged;
1749
1750 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1751 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1752 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001753
1754 params.tpa_mode = start->tpa_mode;
1755 params.remove_inner_vlan = start->inner_vlan_removal;
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03001756 params.tx_switching = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001757
Yuval Mintz08feecd2016-05-11 16:36:20 +03001758 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001759 params.drop_ttl0 = false;
1760 params.concrete_fid = vf->concrete_fid;
1761 params.opaque_fid = vf->opaque_fid;
1762 params.vport_id = vf->vport_id;
1763 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1764 params.mtu = vf->mtu;
Yuval Mintz11a85d72016-08-22 13:25:10 +03001765 params.check_mac = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001766
1767 rc = qed_sp_eth_vport_start(p_hwfn, &params);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001768 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001769 DP_ERR(p_hwfn,
1770 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1771 status = PFVF_STATUS_FAILURE;
1772 } else {
1773 vf->vport_instance++;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001774
1775 /* Force configuration if needed on the newly opened vport */
1776 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001777
1778 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001779 }
1780 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1781 sizeof(struct pfvf_def_resp_tlv), status);
1782}
1783
1784static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1785 struct qed_ptt *p_ptt,
1786 struct qed_vf_info *vf)
1787{
1788 u8 status = PFVF_STATUS_SUCCESS;
1789 int rc;
1790
1791 vf->vport_instance--;
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001792 vf->spoof_chk = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001793
1794 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001795 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001796 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1797 rc);
1798 status = PFVF_STATUS_FAILURE;
1799 }
1800
Yuval Mintz08feecd2016-05-11 16:36:20 +03001801 /* Forget the configuration on the vport */
1802 vf->configured_features = 0;
1803 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1804
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001805 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1806 sizeof(struct pfvf_def_resp_tlv), status);
1807}
1808
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001809static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1810 struct qed_ptt *p_ptt,
Yuval Mintza044df82016-08-22 13:25:09 +03001811 struct qed_vf_info *vf,
1812 u8 status, bool b_legacy)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001813{
1814 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1815 struct pfvf_start_queue_resp_tlv *p_tlv;
1816 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001817 u16 length;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001818
1819 mbx->offset = (u8 *)mbx->reply_virt;
1820
Yuval Mintza044df82016-08-22 13:25:09 +03001821 /* Taking a bigger struct instead of adding a TLV to list was a
1822 * mistake, but one which we're now stuck with, as some older
1823 * clients assume the size of the previous response.
1824 */
1825 if (!b_legacy)
1826 length = sizeof(*p_tlv);
1827 else
1828 length = sizeof(struct pfvf_def_resp_tlv);
1829
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001830 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001831 length);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001832 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1833 sizeof(struct channel_list_end_tlv));
1834
1835 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001836 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001837 req = &mbx->req_virt->start_rxq;
Yuval Mintz351a4ded2016-06-02 10:23:29 +03001838 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1839 offsetof(struct mstorm_vf_zone,
1840 non_trigger.eth_rx_queue_producers) +
1841 sizeof(struct eth_rx_prod_data) * req->rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001842 }
1843
Yuval Mintza044df82016-08-22 13:25:09 +03001844 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001845}
1846
1847static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1848 struct qed_ptt *p_ptt,
1849 struct qed_vf_info *vf)
1850{
1851 struct qed_queue_start_common_params params;
1852 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001853 u8 status = PFVF_STATUS_NO_RESOURCE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001854 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001855 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001856 bool b_legacy_vf = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001857 int rc;
1858
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001859 req = &mbx->req_virt->start_rxq;
Yuval Mintz41086462016-06-05 13:11:13 +03001860
1861 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid) ||
1862 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1863 goto out;
1864
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001865 /* Acquire a new queue-cid */
1866 p_queue = &vf->vf_queues[req->rx_qid];
1867
1868 memset(&params, 0, sizeof(params));
1869 params.queue_id = p_queue->fw_rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001870 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001871 params.stats_id = vf->abs_vf_id + 0x10;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001872 params.sb = req->hw_sb;
1873 params.sb_idx = req->sb_index;
1874
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001875 p_queue->p_rx_cid = _qed_eth_queue_to_cid(p_hwfn,
1876 vf->opaque_fid,
1877 p_queue->fw_cid,
1878 req->rx_qid, &params);
1879 if (!p_queue->p_rx_cid)
1880 goto out;
1881
Yuval Mintza044df82016-08-22 13:25:09 +03001882 /* Legacy VFs have their Producers in a different location, which they
1883 * calculate on their own and clean the producer prior to this.
1884 */
1885 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1886 ETH_HSI_VER_NO_PKT_LEN_TUNN) {
1887 b_legacy_vf = true;
1888 } else {
1889 REG_WR(p_hwfn,
1890 GTT_BAR0_MAP_REG_MSDM_RAM +
1891 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
1892 0);
1893 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001894 p_queue->p_rx_cid->b_legacy_vf = b_legacy_vf;
Yuval Mintza044df82016-08-22 13:25:09 +03001895
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001896 rc = qed_eth_rxq_start_ramrod(p_hwfn,
1897 p_queue->p_rx_cid,
1898 req->bd_max_bytes,
1899 req->rxq_addr,
1900 req->cqe_pbl_addr, req->cqe_pbl_size);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001901 if (rc) {
1902 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001903 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1904 p_queue->p_rx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001905 } else {
Yuval Mintz41086462016-06-05 13:11:13 +03001906 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001907 vf->num_active_rxqs++;
1908 }
1909
Yuval Mintz41086462016-06-05 13:11:13 +03001910out:
Yuval Mintza044df82016-08-22 13:25:09 +03001911 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001912}
1913
Yuval Mintz5040acf2016-06-05 13:11:14 +03001914static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
1915 struct qed_ptt *p_ptt,
1916 struct qed_vf_info *p_vf, u8 status)
1917{
1918 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1919 struct pfvf_start_queue_resp_tlv *p_tlv;
Yuval Mintza044df82016-08-22 13:25:09 +03001920 bool b_legacy = false;
1921 u16 length;
Yuval Mintz5040acf2016-06-05 13:11:14 +03001922
1923 mbx->offset = (u8 *)mbx->reply_virt;
1924
Yuval Mintza044df82016-08-22 13:25:09 +03001925 /* Taking a bigger struct instead of adding a TLV to list was a
1926 * mistake, but one which we're now stuck with, as some older
1927 * clients assume the size of the previous response.
1928 */
1929 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1930 ETH_HSI_VER_NO_PKT_LEN_TUNN)
1931 b_legacy = true;
1932
1933 if (!b_legacy)
1934 length = sizeof(*p_tlv);
1935 else
1936 length = sizeof(struct pfvf_def_resp_tlv);
1937
Yuval Mintz5040acf2016-06-05 13:11:14 +03001938 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001939 length);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001940 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1941 sizeof(struct channel_list_end_tlv));
1942
1943 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001944 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintz5040acf2016-06-05 13:11:14 +03001945 u16 qid = mbx->req_virt->start_txq.tx_qid;
1946
Ram Amrani51ff1722016-10-01 21:59:57 +03001947 p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
1948 DQ_DEMS_LEGACY);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001949 }
1950
Yuval Mintza044df82016-08-22 13:25:09 +03001951 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
Yuval Mintz5040acf2016-06-05 13:11:14 +03001952}
1953
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001954static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
1955 struct qed_ptt *p_ptt,
1956 struct qed_vf_info *vf)
1957{
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001958 struct qed_queue_start_common_params params;
1959 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001960 u8 status = PFVF_STATUS_NO_RESOURCE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001961 union qed_qm_pq_params pq_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001962 struct vfpf_start_txq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001963 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001964 int rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001965 u16 pq;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001966
1967 /* Prepare the parameters which would choose the right PQ */
1968 memset(&pq_params, 0, sizeof(pq_params));
1969 pq_params.eth.is_vf = 1;
1970 pq_params.eth.vf_id = vf->relative_vf_id;
1971
1972 memset(&params, 0, sizeof(params));
1973 req = &mbx->req_virt->start_txq;
Yuval Mintz41086462016-06-05 13:11:13 +03001974
1975 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
1976 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1977 goto out;
1978
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001979 /* Acquire a new queue-cid */
1980 p_queue = &vf->vf_queues[req->tx_qid];
1981
1982 params.queue_id = p_queue->fw_tx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001983 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001984 params.stats_id = vf->abs_vf_id + 0x10;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001985 params.sb = req->hw_sb;
1986 params.sb_idx = req->sb_index;
1987
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001988 p_queue->p_tx_cid = _qed_eth_queue_to_cid(p_hwfn,
1989 vf->opaque_fid,
1990 p_queue->fw_cid,
1991 req->tx_qid, &params);
1992 if (!p_queue->p_tx_cid)
1993 goto out;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001994
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001995 pq = qed_get_qm_pq(p_hwfn, PROTOCOLID_ETH, &pq_params);
1996 rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
1997 req->pbl_addr, req->pbl_size, pq);
Yuval Mintz41086462016-06-05 13:11:13 +03001998 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001999 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002000 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
2001 p_queue->p_tx_cid = NULL;
Yuval Mintz41086462016-06-05 13:11:13 +03002002 } else {
2003 status = PFVF_STATUS_SUCCESS;
Yuval Mintz41086462016-06-05 13:11:13 +03002004 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002005
Yuval Mintz41086462016-06-05 13:11:13 +03002006out:
Yuval Mintz5040acf2016-06-05 13:11:14 +03002007 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002008}
2009
2010static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2011 struct qed_vf_info *vf,
2012 u16 rxq_id, u8 num_rxqs, bool cqe_completion)
2013{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002014 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002015 int rc = 0;
2016 int qid;
2017
2018 if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
2019 return -EINVAL;
2020
2021 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002022 p_queue = &vf->vf_queues[qid];
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002023
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002024 if (!p_queue->p_rx_cid)
2025 continue;
2026
2027 rc = qed_eth_rx_queue_stop(p_hwfn,
2028 p_queue->p_rx_cid,
2029 false, cqe_completion);
2030 if (rc)
2031 return rc;
2032
2033 vf->vf_queues[qid].p_rx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002034 vf->num_active_rxqs--;
2035 }
2036
2037 return rc;
2038}
2039
2040static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
2041 struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
2042{
2043 int rc = 0;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002044 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002045 int qid;
2046
2047 if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
2048 return -EINVAL;
2049
2050 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002051 p_queue = &vf->vf_queues[qid];
2052 if (!p_queue->p_tx_cid)
2053 continue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002054
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002055 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
2056 if (rc)
2057 return rc;
2058
2059 p_queue->p_tx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002060 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002061
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002062 return rc;
2063}
2064
2065static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2066 struct qed_ptt *p_ptt,
2067 struct qed_vf_info *vf)
2068{
2069 u16 length = sizeof(struct pfvf_def_resp_tlv);
2070 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2071 u8 status = PFVF_STATUS_SUCCESS;
2072 struct vfpf_stop_rxqs_tlv *req;
2073 int rc;
2074
2075 /* We give the option of starting from qid != 0, in this case we
2076 * need to make sure that qid + num_qs doesn't exceed the actual
2077 * amount of queues that exist.
2078 */
2079 req = &mbx->req_virt->stop_rxqs;
2080 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2081 req->num_rxqs, req->cqe_completion);
2082 if (rc)
2083 status = PFVF_STATUS_FAILURE;
2084
2085 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2086 length, status);
2087}
2088
2089static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2090 struct qed_ptt *p_ptt,
2091 struct qed_vf_info *vf)
2092{
2093 u16 length = sizeof(struct pfvf_def_resp_tlv);
2094 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2095 u8 status = PFVF_STATUS_SUCCESS;
2096 struct vfpf_stop_txqs_tlv *req;
2097 int rc;
2098
2099 /* We give the option of starting from qid != 0, in this case we
2100 * need to make sure that qid + num_qs doesn't exceed the actual
2101 * amount of queues that exist.
2102 */
2103 req = &mbx->req_virt->stop_txqs;
2104 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
2105 if (rc)
2106 status = PFVF_STATUS_FAILURE;
2107
2108 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2109 length, status);
2110}
2111
Yuval Mintz17b235c2016-05-11 16:36:18 +03002112static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2113 struct qed_ptt *p_ptt,
2114 struct qed_vf_info *vf)
2115{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002116 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
Yuval Mintz17b235c2016-05-11 16:36:18 +03002117 u16 length = sizeof(struct pfvf_def_resp_tlv);
2118 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2119 struct vfpf_update_rxq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002120 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002121 u8 complete_event_flg;
2122 u8 complete_cqe_flg;
2123 u16 qid;
2124 int rc;
2125 u8 i;
2126
2127 req = &mbx->req_virt->update_rxq;
2128 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2129 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2130
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002131 /* Validate inputs */
2132 if (req->num_rxqs + req->rx_qid > QED_MAX_VF_CHAINS_PER_PF ||
2133 !qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid)) {
2134 DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2135 vf->relative_vf_id, req->rx_qid, req->num_rxqs);
2136 goto out;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002137 }
2138
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002139 for (i = 0; i < req->num_rxqs; i++) {
2140 qid = req->rx_qid + i;
2141 if (!vf->vf_queues[qid].p_rx_cid) {
2142 DP_INFO(p_hwfn,
2143 "VF[%d] rx_qid = %d isn`t active!\n",
2144 vf->relative_vf_id, qid);
2145 goto out;
2146 }
2147
2148 handlers[i] = vf->vf_queues[qid].p_rx_cid;
2149 }
2150
2151 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2152 req->num_rxqs,
2153 complete_cqe_flg,
2154 complete_event_flg,
2155 QED_SPQ_MODE_EBLOCK, NULL);
2156 if (rc)
2157 goto out;
2158
2159 status = PFVF_STATUS_SUCCESS;
2160out:
Yuval Mintz17b235c2016-05-11 16:36:18 +03002161 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2162 length, status);
2163}
2164
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002165void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2166 void *p_tlvs_list, u16 req_type)
2167{
2168 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2169 int len = 0;
2170
2171 do {
2172 if (!p_tlv->length) {
2173 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2174 return NULL;
2175 }
2176
2177 if (p_tlv->type == req_type) {
2178 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2179 "Extended tlv type %d, length %d found\n",
2180 p_tlv->type, p_tlv->length);
2181 return p_tlv;
2182 }
2183
2184 len += p_tlv->length;
2185 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2186
2187 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2188 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2189 return NULL;
2190 }
2191 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2192
2193 return NULL;
2194}
2195
2196static void
2197qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2198 struct qed_sp_vport_update_params *p_data,
2199 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2200{
2201 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2202 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2203
2204 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2205 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2206 if (!p_act_tlv)
2207 return;
2208
2209 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2210 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2211 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2212 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2213 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2214}
2215
2216static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002217qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2218 struct qed_sp_vport_update_params *p_data,
2219 struct qed_vf_info *p_vf,
2220 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2221{
2222 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2223 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2224
2225 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2226 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2227 if (!p_vlan_tlv)
2228 return;
2229
Yuval Mintz08feecd2016-05-11 16:36:20 +03002230 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2231
2232 /* Ignore the VF request if we're forcing a vlan */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002233 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03002234 p_data->update_inner_vlan_removal_flg = 1;
2235 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2236 }
Yuval Mintz17b235c2016-05-11 16:36:18 +03002237
2238 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2239}
2240
2241static void
2242qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2243 struct qed_sp_vport_update_params *p_data,
2244 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2245{
2246 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2247 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2248
2249 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2250 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2251 tlv);
2252 if (!p_tx_switch_tlv)
2253 return;
2254
2255 p_data->update_tx_switching_flg = 1;
2256 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2257 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2258}
2259
2260static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002261qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2262 struct qed_sp_vport_update_params *p_data,
2263 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2264{
2265 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2266 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2267
2268 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2269 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2270 if (!p_mcast_tlv)
2271 return;
2272
2273 p_data->update_approx_mcast_flg = 1;
2274 memcpy(p_data->bins, p_mcast_tlv->bins,
2275 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2276 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2277}
2278
2279static void
2280qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2281 struct qed_sp_vport_update_params *p_data,
2282 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2283{
2284 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2285 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2286 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2287
2288 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2289 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2290 if (!p_accept_tlv)
2291 return;
2292
2293 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2294 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2295 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2296 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2297 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2298}
2299
2300static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002301qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2302 struct qed_sp_vport_update_params *p_data,
2303 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2304{
2305 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2306 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2307
2308 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2309 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2310 tlv);
2311 if (!p_accept_any_vlan)
2312 return;
2313
2314 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2315 p_data->update_accept_any_vlan_flg =
2316 p_accept_any_vlan->update_accept_any_vlan_flg;
2317 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2318}
2319
2320static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002321qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2322 struct qed_vf_info *vf,
2323 struct qed_sp_vport_update_params *p_data,
2324 struct qed_rss_params *p_rss,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002325 struct qed_iov_vf_mbx *p_mbx,
2326 u16 *tlvs_mask, u16 *tlvs_accepted)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002327{
2328 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2329 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002330 bool b_reject = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002331 u16 table_size;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002332 u16 i, q_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002333
2334 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2335 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2336 if (!p_rss_tlv) {
2337 p_data->rss_params = NULL;
2338 return;
2339 }
2340
2341 memset(p_rss, 0, sizeof(struct qed_rss_params));
2342
2343 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2344 VFPF_UPDATE_RSS_CONFIG_FLAG);
2345 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2346 VFPF_UPDATE_RSS_CAPS_FLAG);
2347 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2348 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2349 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2350 VFPF_UPDATE_RSS_KEY_FLAG);
2351
2352 p_rss->rss_enable = p_rss_tlv->rss_enable;
2353 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2354 p_rss->rss_caps = p_rss_tlv->rss_caps;
2355 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002356 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2357
2358 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2359 (1 << p_rss_tlv->rss_table_size_log));
2360
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002361 for (i = 0; i < table_size; i++) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002362 q_idx = p_rss_tlv->rss_ind_table[i];
2363 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx)) {
2364 DP_VERBOSE(p_hwfn,
2365 QED_MSG_IOV,
2366 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2367 vf->relative_vf_id, q_idx);
2368 b_reject = true;
2369 goto out;
2370 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002371
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002372 if (!vf->vf_queues[q_idx].p_rx_cid) {
2373 DP_VERBOSE(p_hwfn,
2374 QED_MSG_IOV,
2375 "VF[%d]: Omitting RSS due to inactive queue %08x\n",
2376 vf->relative_vf_id, q_idx);
2377 b_reject = true;
2378 goto out;
2379 }
2380
2381 p_rss->rss_ind_table[i] = vf->vf_queues[q_idx].p_rx_cid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002382 }
2383
2384 p_data->rss_params = p_rss;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002385out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002386 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002387 if (!b_reject)
2388 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002389}
2390
Yuval Mintz17b235c2016-05-11 16:36:18 +03002391static void
2392qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2393 struct qed_vf_info *vf,
2394 struct qed_sp_vport_update_params *p_data,
2395 struct qed_sge_tpa_params *p_sge_tpa,
2396 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2397{
2398 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2399 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2400
2401 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2402 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2403
2404 if (!p_sge_tpa_tlv) {
2405 p_data->sge_tpa_params = NULL;
2406 return;
2407 }
2408
2409 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2410
2411 p_sge_tpa->update_tpa_en_flg =
2412 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2413 p_sge_tpa->update_tpa_param_flg =
2414 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2415 VFPF_UPDATE_TPA_PARAM_FLAG);
2416
2417 p_sge_tpa->tpa_ipv4_en_flg =
2418 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2419 p_sge_tpa->tpa_ipv6_en_flg =
2420 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2421 p_sge_tpa->tpa_pkt_split_flg =
2422 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2423 p_sge_tpa->tpa_hdr_data_split_flg =
2424 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2425 p_sge_tpa->tpa_gro_consistent_flg =
2426 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2427
2428 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2429 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2430 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2431 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2432 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2433
2434 p_data->sge_tpa_params = p_sge_tpa;
2435
2436 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2437}
2438
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002439static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2440 u8 vfid,
2441 struct qed_sp_vport_update_params *params,
2442 u16 *tlvs)
2443{
2444 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2445 struct qed_filter_accept_flags *flags = &params->accept_flags;
2446 struct qed_public_vf_info *vf_info;
2447
2448 /* Untrusted VFs can't even be trusted to know that fact.
2449 * Simply indicate everything is configured fine, and trace
2450 * configuration 'behind their back'.
2451 */
2452 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
2453 return 0;
2454
2455 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
2456
2457 if (flags->update_rx_mode_config) {
2458 vf_info->rx_accept_mode = flags->rx_accept_filter;
2459 if (!vf_info->is_trusted_configured)
2460 flags->rx_accept_filter &= ~mask;
2461 }
2462
2463 if (flags->update_tx_mode_config) {
2464 vf_info->tx_accept_mode = flags->tx_accept_filter;
2465 if (!vf_info->is_trusted_configured)
2466 flags->tx_accept_filter &= ~mask;
2467 }
2468
2469 return 0;
2470}
2471
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002472static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2473 struct qed_ptt *p_ptt,
2474 struct qed_vf_info *vf)
2475{
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002476 struct qed_rss_params *p_rss_params = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002477 struct qed_sp_vport_update_params params;
2478 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002479 struct qed_sge_tpa_params sge_tpa_params;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002480 u16 tlvs_mask = 0, tlvs_accepted = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002481 u8 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002482 u16 length;
2483 int rc;
2484
Yuval Mintz41086462016-06-05 13:11:13 +03002485 /* Valiate PF can send such a request */
2486 if (!vf->vport_instance) {
2487 DP_VERBOSE(p_hwfn,
2488 QED_MSG_IOV,
2489 "No VPORT instance available for VF[%d], failing vport update\n",
2490 vf->abs_vf_id);
2491 status = PFVF_STATUS_FAILURE;
2492 goto out;
2493 }
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002494 p_rss_params = vzalloc(sizeof(*p_rss_params));
2495 if (p_rss_params == NULL) {
2496 status = PFVF_STATUS_FAILURE;
2497 goto out;
2498 }
Yuval Mintz41086462016-06-05 13:11:13 +03002499
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002500 memset(&params, 0, sizeof(params));
2501 params.opaque_fid = vf->opaque_fid;
2502 params.vport_id = vf->vport_id;
2503 params.rss_params = NULL;
2504
2505 /* Search for extended tlvs list and update values
2506 * from VF in struct qed_sp_vport_update_params.
2507 */
2508 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002509 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2510 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002511 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2512 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002513 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2514 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2515 &sge_tpa_params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002516
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002517 tlvs_accepted = tlvs_mask;
2518
2519 /* Some of the extended TLVs need to be validated first; In that case,
2520 * they can update the mask without updating the accepted [so that
2521 * PF could communicate to VF it has rejected request].
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002522 */
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002523 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
2524 mbx, &tlvs_mask, &tlvs_accepted);
2525
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002526 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
2527 &params, &tlvs_accepted)) {
2528 tlvs_accepted = 0;
2529 status = PFVF_STATUS_NOT_SUPPORTED;
2530 goto out;
2531 }
2532
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002533 if (!tlvs_accepted) {
2534 if (tlvs_mask)
2535 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2536 "Upper-layer prevents VF vport configuration\n");
2537 else
2538 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2539 "No feature tlvs found for vport update\n");
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002540 status = PFVF_STATUS_NOT_SUPPORTED;
2541 goto out;
2542 }
2543
2544 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2545
2546 if (rc)
2547 status = PFVF_STATUS_FAILURE;
2548
2549out:
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002550 vfree(p_rss_params);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002551 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002552 tlvs_mask, tlvs_accepted);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002553 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2554}
2555
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002556static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
2557 struct qed_vf_info *p_vf,
2558 struct qed_filter_ucast *p_params)
Yuval Mintz08feecd2016-05-11 16:36:20 +03002559{
2560 int i;
2561
Yuval Mintz08feecd2016-05-11 16:36:20 +03002562 /* First remove entries and then add new ones */
2563 if (p_params->opcode == QED_FILTER_REMOVE) {
2564 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2565 if (p_vf->shadow_config.vlans[i].used &&
2566 p_vf->shadow_config.vlans[i].vid ==
2567 p_params->vlan) {
2568 p_vf->shadow_config.vlans[i].used = false;
2569 break;
2570 }
2571 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2572 DP_VERBOSE(p_hwfn,
2573 QED_MSG_IOV,
2574 "VF [%d] - Tries to remove a non-existing vlan\n",
2575 p_vf->relative_vf_id);
2576 return -EINVAL;
2577 }
2578 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2579 p_params->opcode == QED_FILTER_FLUSH) {
2580 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2581 p_vf->shadow_config.vlans[i].used = false;
2582 }
2583
2584 /* In forced mode, we're willing to remove entries - but we don't add
2585 * new ones.
2586 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002587 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
Yuval Mintz08feecd2016-05-11 16:36:20 +03002588 return 0;
2589
2590 if (p_params->opcode == QED_FILTER_ADD ||
2591 p_params->opcode == QED_FILTER_REPLACE) {
2592 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2593 if (p_vf->shadow_config.vlans[i].used)
2594 continue;
2595
2596 p_vf->shadow_config.vlans[i].used = true;
2597 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2598 break;
2599 }
2600
2601 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2602 DP_VERBOSE(p_hwfn,
2603 QED_MSG_IOV,
2604 "VF [%d] - Tries to configure more than %d vlan filters\n",
2605 p_vf->relative_vf_id,
2606 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2607 return -EINVAL;
2608 }
2609 }
2610
2611 return 0;
2612}
2613
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002614static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
2615 struct qed_vf_info *p_vf,
2616 struct qed_filter_ucast *p_params)
2617{
2618 int i;
2619
2620 /* If we're in forced-mode, we don't allow any change */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002621 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002622 return 0;
2623
2624 /* First remove entries and then add new ones */
2625 if (p_params->opcode == QED_FILTER_REMOVE) {
2626 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2627 if (ether_addr_equal(p_vf->shadow_config.macs[i],
2628 p_params->mac)) {
Shyam Saini0ee28e32017-01-17 07:35:04 +05302629 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002630 break;
2631 }
2632 }
2633
2634 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2635 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2636 "MAC isn't configured\n");
2637 return -EINVAL;
2638 }
2639 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2640 p_params->opcode == QED_FILTER_FLUSH) {
2641 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
Shyam Saini0ee28e32017-01-17 07:35:04 +05302642 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002643 }
2644
2645 /* List the new MAC address */
2646 if (p_params->opcode != QED_FILTER_ADD &&
2647 p_params->opcode != QED_FILTER_REPLACE)
2648 return 0;
2649
2650 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2651 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
2652 ether_addr_copy(p_vf->shadow_config.macs[i],
2653 p_params->mac);
2654 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2655 "Added MAC at %d entry in shadow\n", i);
2656 break;
2657 }
2658 }
2659
2660 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2661 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
2662 return -EINVAL;
2663 }
2664
2665 return 0;
2666}
2667
2668static int
2669qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2670 struct qed_vf_info *p_vf,
2671 struct qed_filter_ucast *p_params)
2672{
2673 int rc = 0;
2674
2675 if (p_params->type == QED_FILTER_MAC) {
2676 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
2677 if (rc)
2678 return rc;
2679 }
2680
2681 if (p_params->type == QED_FILTER_VLAN)
2682 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
2683
2684 return rc;
2685}
2686
Baoyou Xieba569472016-09-09 09:21:15 +08002687static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
2688 int vfid, struct qed_filter_ucast *params)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002689{
2690 struct qed_public_vf_info *vf;
2691
2692 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
2693 if (!vf)
2694 return -EINVAL;
2695
2696 /* No real decision to make; Store the configured MAC */
2697 if (params->type == QED_FILTER_MAC ||
2698 params->type == QED_FILTER_MAC_VLAN)
2699 ether_addr_copy(vf->mac, params->mac);
2700
2701 return 0;
2702}
2703
2704static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
2705 struct qed_ptt *p_ptt,
2706 struct qed_vf_info *vf)
2707{
Yuval Mintz08feecd2016-05-11 16:36:20 +03002708 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002709 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2710 struct vfpf_ucast_filter_tlv *req;
2711 u8 status = PFVF_STATUS_SUCCESS;
2712 struct qed_filter_ucast params;
2713 int rc;
2714
2715 /* Prepare the unicast filter params */
2716 memset(&params, 0, sizeof(struct qed_filter_ucast));
2717 req = &mbx->req_virt->ucast_filter;
2718 params.opcode = (enum qed_filter_opcode)req->opcode;
2719 params.type = (enum qed_filter_ucast_type)req->type;
2720
2721 params.is_rx_filter = 1;
2722 params.is_tx_filter = 1;
2723 params.vport_to_remove_from = vf->vport_id;
2724 params.vport_to_add_to = vf->vport_id;
2725 memcpy(params.mac, req->mac, ETH_ALEN);
2726 params.vlan = req->vlan;
2727
2728 DP_VERBOSE(p_hwfn,
2729 QED_MSG_IOV,
2730 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2731 vf->abs_vf_id, params.opcode, params.type,
2732 params.is_rx_filter ? "RX" : "",
2733 params.is_tx_filter ? "TX" : "",
2734 params.vport_to_add_to,
2735 params.mac[0], params.mac[1],
2736 params.mac[2], params.mac[3],
2737 params.mac[4], params.mac[5], params.vlan);
2738
2739 if (!vf->vport_instance) {
2740 DP_VERBOSE(p_hwfn,
2741 QED_MSG_IOV,
2742 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2743 vf->abs_vf_id);
2744 status = PFVF_STATUS_FAILURE;
2745 goto out;
2746 }
2747
Yuval Mintz08feecd2016-05-11 16:36:20 +03002748 /* Update shadow copy of the VF configuration */
2749 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
2750 status = PFVF_STATUS_FAILURE;
2751 goto out;
2752 }
2753
2754 /* Determine if the unicast filtering is acceptible by PF */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002755 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03002756 (params.type == QED_FILTER_VLAN ||
2757 params.type == QED_FILTER_MAC_VLAN)) {
2758 /* Once VLAN is forced or PVID is set, do not allow
2759 * to add/replace any further VLANs.
2760 */
2761 if (params.opcode == QED_FILTER_ADD ||
2762 params.opcode == QED_FILTER_REPLACE)
2763 status = PFVF_STATUS_FORCED;
2764 goto out;
2765 }
2766
Yuval Mintz1a635e42016-08-15 10:42:43 +03002767 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
Yuval Mintzeff16962016-05-11 16:36:21 +03002768 (params.type == QED_FILTER_MAC ||
2769 params.type == QED_FILTER_MAC_VLAN)) {
2770 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
2771 (params.opcode != QED_FILTER_ADD &&
2772 params.opcode != QED_FILTER_REPLACE))
2773 status = PFVF_STATUS_FORCED;
2774 goto out;
2775 }
2776
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002777 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
2778 if (rc) {
2779 status = PFVF_STATUS_FAILURE;
2780 goto out;
2781 }
2782
2783 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2784 QED_SPQ_MODE_CB, NULL);
2785 if (rc)
2786 status = PFVF_STATUS_FAILURE;
2787
2788out:
2789 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2790 sizeof(struct pfvf_def_resp_tlv), status);
2791}
2792
Yuval Mintz0b55e272016-05-11 16:36:15 +03002793static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
2794 struct qed_ptt *p_ptt,
2795 struct qed_vf_info *vf)
2796{
2797 int i;
2798
2799 /* Reset the SBs */
2800 for (i = 0; i < vf->num_sbs; i++)
2801 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2802 vf->igu_sbs[i],
2803 vf->opaque_fid, false);
2804
2805 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2806 sizeof(struct pfvf_def_resp_tlv),
2807 PFVF_STATUS_SUCCESS);
2808}
2809
2810static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
2811 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
2812{
2813 u16 length = sizeof(struct pfvf_def_resp_tlv);
2814 u8 status = PFVF_STATUS_SUCCESS;
2815
2816 /* Disable Interrupts for VF */
2817 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2818
2819 /* Reset Permission table */
2820 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2821
2822 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2823 length, status);
2824}
2825
2826static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
2827 struct qed_ptt *p_ptt,
2828 struct qed_vf_info *p_vf)
2829{
2830 u16 length = sizeof(struct pfvf_def_resp_tlv);
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002831 u8 status = PFVF_STATUS_SUCCESS;
2832 int rc = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03002833
2834 qed_iov_vf_cleanup(p_hwfn, p_vf);
2835
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002836 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
2837 /* Stopping the VF */
2838 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
2839 p_vf->opaque_fid);
2840
2841 if (rc) {
2842 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
2843 rc);
2844 status = PFVF_STATUS_FAILURE;
2845 }
2846
2847 p_vf->state = VF_STOPPED;
2848 }
2849
Yuval Mintz0b55e272016-05-11 16:36:15 +03002850 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03002851 length, status);
Yuval Mintz0b55e272016-05-11 16:36:15 +03002852}
2853
2854static int
2855qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
2856 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2857{
2858 int cnt;
2859 u32 val;
2860
2861 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
2862
2863 for (cnt = 0; cnt < 50; cnt++) {
2864 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2865 if (!val)
2866 break;
2867 msleep(20);
2868 }
2869 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
2870
2871 if (cnt == 50) {
2872 DP_ERR(p_hwfn,
2873 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2874 p_vf->abs_vf_id, val);
2875 return -EBUSY;
2876 }
2877
2878 return 0;
2879}
2880
2881static int
2882qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
2883 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2884{
2885 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2886 int i, cnt;
2887
2888 /* Read initial consumers & producers */
2889 for (i = 0; i < MAX_NUM_VOQS; i++) {
2890 u32 prod;
2891
2892 cons[i] = qed_rd(p_hwfn, p_ptt,
2893 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2894 i * 0x40);
2895 prod = qed_rd(p_hwfn, p_ptt,
2896 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2897 i * 0x40);
2898 distance[i] = prod - cons[i];
2899 }
2900
2901 /* Wait for consumers to pass the producers */
2902 i = 0;
2903 for (cnt = 0; cnt < 50; cnt++) {
2904 for (; i < MAX_NUM_VOQS; i++) {
2905 u32 tmp;
2906
2907 tmp = qed_rd(p_hwfn, p_ptt,
2908 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2909 i * 0x40);
2910 if (distance[i] > tmp - cons[i])
2911 break;
2912 }
2913
2914 if (i == MAX_NUM_VOQS)
2915 break;
2916
2917 msleep(20);
2918 }
2919
2920 if (cnt == 50) {
2921 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2922 p_vf->abs_vf_id, i);
2923 return -EBUSY;
2924 }
2925
2926 return 0;
2927}
2928
2929static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
2930 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2931{
2932 int rc;
2933
2934 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2935 if (rc)
2936 return rc;
2937
2938 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2939 if (rc)
2940 return rc;
2941
2942 return 0;
2943}
2944
2945static int
2946qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
2947 struct qed_ptt *p_ptt,
2948 u16 rel_vf_id, u32 *ack_vfs)
2949{
2950 struct qed_vf_info *p_vf;
2951 int rc = 0;
2952
2953 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2954 if (!p_vf)
2955 return 0;
2956
2957 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2958 (1ULL << (rel_vf_id % 64))) {
2959 u16 vfid = p_vf->abs_vf_id;
2960
2961 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2962 "VF[%d] - Handling FLR\n", vfid);
2963
2964 qed_iov_vf_cleanup(p_hwfn, p_vf);
2965
2966 /* If VF isn't active, no need for anything but SW */
2967 if (!p_vf->b_init)
2968 goto cleanup;
2969
2970 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2971 if (rc)
2972 goto cleanup;
2973
2974 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
2975 if (rc) {
2976 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2977 return rc;
2978 }
2979
Yuval Mintz7eff82b2016-10-14 05:19:22 -04002980 /* Workaround to make VF-PF channel ready, as FW
2981 * doesn't do that as a part of FLR.
2982 */
2983 REG_WR(p_hwfn,
2984 GTT_BAR0_MAP_REG_USDM_RAM +
2985 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
2986
Yuval Mintz0b55e272016-05-11 16:36:15 +03002987 /* VF_STOPPED has to be set only after final cleanup
2988 * but prior to re-enabling the VF.
2989 */
2990 p_vf->state = VF_STOPPED;
2991
2992 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
2993 if (rc) {
2994 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
2995 vfid);
2996 return rc;
2997 }
2998cleanup:
2999 /* Mark VF for ack and clean pending state */
3000 if (p_vf->state == VF_RESET)
3001 p_vf->state = VF_STOPPED;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003002 ack_vfs[vfid / 32] |= BIT((vfid % 32));
Yuval Mintz0b55e272016-05-11 16:36:15 +03003003 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3004 ~(1ULL << (rel_vf_id % 64));
3005 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
3006 ~(1ULL << (rel_vf_id % 64));
3007 }
3008
3009 return rc;
3010}
3011
Baoyou Xieba569472016-09-09 09:21:15 +08003012static int
3013qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003014{
3015 u32 ack_vfs[VF_MAX_STATIC / 32];
3016 int rc = 0;
3017 u16 i;
3018
3019 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3020
3021 /* Since BRB <-> PRS interface can't be tested as part of the flr
3022 * polling due to HW limitations, simply sleep a bit. And since
3023 * there's no need to wait per-vf, do it before looping.
3024 */
3025 msleep(100);
3026
3027 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3028 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3029
3030 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3031 return rc;
3032}
3033
3034int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
3035{
3036 u16 i, found = 0;
3037
3038 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3039 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3040 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3041 "[%08x,...,%08x]: %08x\n",
3042 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3043
3044 if (!p_hwfn->cdev->p_iov_info) {
3045 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
3046 return 0;
3047 }
3048
3049 /* Mark VFs */
3050 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3051 struct qed_vf_info *p_vf;
3052 u8 vfid;
3053
3054 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3055 if (!p_vf)
3056 continue;
3057
3058 vfid = p_vf->abs_vf_id;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003059 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
Yuval Mintz0b55e272016-05-11 16:36:15 +03003060 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3061 u16 rel_vf_id = p_vf->relative_vf_id;
3062
3063 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3064 "VF[%d] [rel %d] got FLR-ed\n",
3065 vfid, rel_vf_id);
3066
3067 p_vf->state = VF_RESET;
3068
3069 /* No need to lock here, since pending_flr should
3070 * only change here and before ACKing MFw. Since
3071 * MFW will not trigger an additional attention for
3072 * VF flr until ACKs, we're safe.
3073 */
3074 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
3075 found = 1;
3076 }
3077 }
3078
3079 return found;
3080}
3081
Yuval Mintz73390ac2016-05-11 16:36:24 +03003082static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3083 u16 vfid,
3084 struct qed_mcp_link_params *p_params,
3085 struct qed_mcp_link_state *p_link,
3086 struct qed_mcp_link_capabilities *p_caps)
3087{
3088 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3089 vfid,
3090 false);
3091 struct qed_bulletin_content *p_bulletin;
3092
3093 if (!p_vf)
3094 return;
3095
3096 p_bulletin = p_vf->bulletin.p_virt;
3097
3098 if (p_params)
3099 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3100 if (p_link)
3101 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3102 if (p_caps)
3103 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3104}
3105
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003106static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3107 struct qed_ptt *p_ptt, int vfid)
3108{
3109 struct qed_iov_vf_mbx *mbx;
3110 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003111
3112 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3113 if (!p_vf)
3114 return;
3115
3116 mbx = &p_vf->vf_mbx;
3117
3118 /* qed_iov_process_mbx_request */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003119 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3120 "VF[%02x]: Processing mailbox message\n", p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003121
3122 mbx->first_tlv = mbx->req_virt->first_tlv;
3123
3124 /* check if tlv type is known */
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003125 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3126 !p_vf->b_malicious) {
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003127 switch (mbx->first_tlv.tl.type) {
3128 case CHANNEL_TLV_ACQUIRE:
3129 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3130 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003131 case CHANNEL_TLV_VPORT_START:
3132 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3133 break;
3134 case CHANNEL_TLV_VPORT_TEARDOWN:
3135 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3136 break;
3137 case CHANNEL_TLV_START_RXQ:
3138 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3139 break;
3140 case CHANNEL_TLV_START_TXQ:
3141 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3142 break;
3143 case CHANNEL_TLV_STOP_RXQS:
3144 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3145 break;
3146 case CHANNEL_TLV_STOP_TXQS:
3147 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3148 break;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003149 case CHANNEL_TLV_UPDATE_RXQ:
3150 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3151 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003152 case CHANNEL_TLV_VPORT_UPDATE:
3153 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3154 break;
3155 case CHANNEL_TLV_UCAST_FILTER:
3156 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3157 break;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003158 case CHANNEL_TLV_CLOSE:
3159 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3160 break;
3161 case CHANNEL_TLV_INT_CLEANUP:
3162 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3163 break;
3164 case CHANNEL_TLV_RELEASE:
3165 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3166 break;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003167 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003168 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3169 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3170 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3171 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3172
3173 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3174 mbx->first_tlv.tl.type,
3175 sizeof(struct pfvf_def_resp_tlv),
3176 PFVF_STATUS_MALICIOUS);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003177 } else {
3178 /* unknown TLV - this may belong to a VF driver from the future
3179 * - a version written after this PF driver was written, which
3180 * supports features unknown as of yet. Too bad since we don't
3181 * support them. Or this may be because someone wrote a crappy
3182 * VF driver and is sending garbage over the channel.
3183 */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003184 DP_NOTICE(p_hwfn,
3185 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3186 p_vf->abs_vf_id,
3187 mbx->first_tlv.tl.type,
3188 mbx->first_tlv.tl.length,
3189 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003190
Yuval Mintz54fdd802016-06-05 13:11:16 +03003191 /* Try replying in case reply address matches the acquisition's
3192 * posted address.
3193 */
3194 if (p_vf->acquire.first_tlv.reply_address &&
3195 (mbx->first_tlv.reply_address ==
3196 p_vf->acquire.first_tlv.reply_address)) {
3197 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3198 mbx->first_tlv.tl.type,
3199 sizeof(struct pfvf_def_resp_tlv),
3200 PFVF_STATUS_NOT_SUPPORTED);
3201 } else {
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003202 DP_VERBOSE(p_hwfn,
3203 QED_MSG_IOV,
Yuval Mintz54fdd802016-06-05 13:11:16 +03003204 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3205 p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003206 }
3207 }
3208}
3209
Baoyou Xieba569472016-09-09 09:21:15 +08003210static void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003211{
3212 u64 add_bit = 1ULL << (vfid % 64);
3213
3214 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
3215}
3216
3217static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
3218 u64 *events)
3219{
3220 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
3221
3222 memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
3223 memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
3224}
3225
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003226static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3227 u16 abs_vfid)
3228{
3229 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
3230
3231 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
3232 DP_VERBOSE(p_hwfn,
3233 QED_MSG_IOV,
3234 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
3235 abs_vfid);
3236 return NULL;
3237 }
3238
3239 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3240}
3241
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003242static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3243 u16 abs_vfid, struct regpair *vf_msg)
3244{
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003245 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003246 abs_vfid);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003247
3248 if (!p_vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003249 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003250
3251 /* List the physical address of the request so that handler
3252 * could later on copy the message from it.
3253 */
3254 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3255
3256 /* Mark the event and schedule the workqueue */
3257 qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
3258 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3259
3260 return 0;
3261}
3262
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003263static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3264 struct malicious_vf_eqe_data *p_data)
3265{
3266 struct qed_vf_info *p_vf;
3267
3268 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3269
3270 if (!p_vf)
3271 return;
3272
3273 DP_INFO(p_hwfn,
3274 "VF [%d] - Malicious behavior [%02x]\n",
3275 p_vf->abs_vf_id, p_data->err_id);
3276
3277 p_vf->b_malicious = true;
3278}
3279
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003280int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
3281 u8 opcode, __le16 echo, union event_ring_data *data)
3282{
3283 switch (opcode) {
3284 case COMMON_EVENT_VF_PF_CHANNEL:
3285 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
3286 &data->vf_pf_channel.msg_addr);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003287 case COMMON_EVENT_MALICIOUS_VF:
3288 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
3289 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003290 default:
3291 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
3292 opcode);
3293 return -EINVAL;
3294 }
3295}
3296
Yuval Mintz32a47e72016-05-11 16:36:12 +03003297u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3298{
3299 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
3300 u16 i;
3301
3302 if (!p_iov)
3303 goto out;
3304
3305 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003306 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
Yuval Mintz32a47e72016-05-11 16:36:12 +03003307 return i;
3308
3309out:
3310 return MAX_NUM_VFS;
3311}
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003312
3313static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
3314 int vfid)
3315{
3316 struct qed_dmae_params params;
3317 struct qed_vf_info *vf_info;
3318
3319 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3320 if (!vf_info)
3321 return -EINVAL;
3322
3323 memset(&params, 0, sizeof(struct qed_dmae_params));
3324 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
3325 params.src_vfid = vf_info->abs_vf_id;
3326
3327 if (qed_dmae_host2host(p_hwfn, ptt,
3328 vf_info->vf_mbx.pending_req,
3329 vf_info->vf_mbx.req_phys,
3330 sizeof(union vfpf_tlvs) / 4, &params)) {
3331 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3332 "Failed to copy message from VF 0x%02x\n", vfid);
3333
3334 return -EIO;
3335 }
3336
3337 return 0;
3338}
3339
Yuval Mintzeff16962016-05-11 16:36:21 +03003340static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
3341 u8 *mac, int vfid)
3342{
3343 struct qed_vf_info *vf_info;
3344 u64 feature;
3345
3346 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3347 if (!vf_info) {
3348 DP_NOTICE(p_hwfn->cdev,
3349 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3350 return;
3351 }
3352
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003353 if (vf_info->b_malicious) {
3354 DP_NOTICE(p_hwfn->cdev,
3355 "Can't set forced MAC to malicious VF [%d]\n", vfid);
3356 return;
3357 }
3358
Yuval Mintzeff16962016-05-11 16:36:21 +03003359 feature = 1 << MAC_ADDR_FORCED;
3360 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3361
3362 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3363 /* Forced MAC will disable MAC_ADDR */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003364 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
Yuval Mintzeff16962016-05-11 16:36:21 +03003365
3366 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3367}
3368
Baoyou Xieba569472016-09-09 09:21:15 +08003369static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
3370 u16 pvid, int vfid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003371{
3372 struct qed_vf_info *vf_info;
3373 u64 feature;
3374
3375 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3376 if (!vf_info) {
3377 DP_NOTICE(p_hwfn->cdev,
3378 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3379 return;
3380 }
3381
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003382 if (vf_info->b_malicious) {
3383 DP_NOTICE(p_hwfn->cdev,
3384 "Can't set forced vlan to malicious VF [%d]\n", vfid);
3385 return;
3386 }
3387
Yuval Mintz08feecd2016-05-11 16:36:20 +03003388 feature = 1 << VLAN_ADDR_FORCED;
3389 vf_info->bulletin.p_virt->pvid = pvid;
3390 if (pvid)
3391 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3392 else
3393 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3394
3395 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3396}
3397
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003398static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
3399{
3400 struct qed_vf_info *p_vf_info;
3401
3402 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3403 if (!p_vf_info)
3404 return false;
3405
3406 return !!p_vf_info->vport_instance;
3407}
3408
Baoyou Xieba569472016-09-09 09:21:15 +08003409static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003410{
3411 struct qed_vf_info *p_vf_info;
3412
3413 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3414 if (!p_vf_info)
3415 return true;
3416
3417 return p_vf_info->state == VF_STOPPED;
3418}
3419
Yuval Mintz73390ac2016-05-11 16:36:24 +03003420static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
3421{
3422 struct qed_vf_info *vf_info;
3423
3424 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3425 if (!vf_info)
3426 return false;
3427
3428 return vf_info->spoof_chk;
3429}
3430
Baoyou Xieba569472016-09-09 09:21:15 +08003431static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003432{
3433 struct qed_vf_info *vf;
3434 int rc = -EINVAL;
3435
3436 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3437 DP_NOTICE(p_hwfn,
3438 "SR-IOV sanity check failed, can't set spoofchk\n");
3439 goto out;
3440 }
3441
3442 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3443 if (!vf)
3444 goto out;
3445
3446 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3447 /* After VF VPORT start PF will configure spoof check */
3448 vf->req_spoofchk_val = val;
3449 rc = 0;
3450 goto out;
3451 }
3452
3453 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
3454
3455out:
3456 return rc;
3457}
3458
Yuval Mintzeff16962016-05-11 16:36:21 +03003459static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
3460 u16 rel_vf_id)
3461{
3462 struct qed_vf_info *p_vf;
3463
3464 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3465 if (!p_vf || !p_vf->bulletin.p_virt)
3466 return NULL;
3467
Yuval Mintz1a635e42016-08-15 10:42:43 +03003468 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
Yuval Mintzeff16962016-05-11 16:36:21 +03003469 return NULL;
3470
3471 return p_vf->bulletin.p_virt->mac;
3472}
3473
Baoyou Xieba569472016-09-09 09:21:15 +08003474static u16
3475qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003476{
3477 struct qed_vf_info *p_vf;
3478
3479 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3480 if (!p_vf || !p_vf->bulletin.p_virt)
3481 return 0;
3482
Yuval Mintz1a635e42016-08-15 10:42:43 +03003483 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
Yuval Mintz08feecd2016-05-11 16:36:20 +03003484 return 0;
3485
3486 return p_vf->bulletin.p_virt->pvid;
3487}
3488
Yuval Mintz733def62016-05-11 16:36:22 +03003489static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3490 struct qed_ptt *p_ptt, int vfid, int val)
3491{
3492 struct qed_vf_info *vf;
3493 u8 abs_vp_id = 0;
3494 int rc;
3495
3496 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3497 if (!vf)
3498 return -EINVAL;
3499
3500 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3501 if (rc)
3502 return rc;
3503
3504 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3505}
3506
Baoyou Xieba569472016-09-09 09:21:15 +08003507static int
3508qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
Yuval Mintz733def62016-05-11 16:36:22 +03003509{
3510 struct qed_vf_info *vf;
3511 u8 vport_id;
3512 int i;
3513
3514 for_each_hwfn(cdev, i) {
3515 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3516
3517 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3518 DP_NOTICE(p_hwfn,
3519 "SR-IOV sanity check failed, can't set min rate\n");
3520 return -EINVAL;
3521 }
3522 }
3523
3524 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3525 vport_id = vf->vport_id;
3526
3527 return qed_configure_vport_wfq(cdev, vport_id, rate);
3528}
3529
Yuval Mintz73390ac2016-05-11 16:36:24 +03003530static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3531{
3532 struct qed_wfq_data *vf_vp_wfq;
3533 struct qed_vf_info *vf_info;
3534
3535 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3536 if (!vf_info)
3537 return 0;
3538
3539 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3540
3541 if (vf_vp_wfq->configured)
3542 return vf_vp_wfq->min_speed;
3543 else
3544 return 0;
3545}
3546
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003547/**
3548 * qed_schedule_iov - schedules IOV task for VF and PF
3549 * @hwfn: hardware function pointer
3550 * @flag: IOV flag for VF/PF
3551 */
3552void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3553{
3554 smp_mb__before_atomic();
3555 set_bit(flag, &hwfn->iov_task_flags);
3556 smp_mb__after_atomic();
3557 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3558 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3559}
3560
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003561void qed_vf_start_iov_wq(struct qed_dev *cdev)
3562{
3563 int i;
3564
3565 for_each_hwfn(cdev, i)
3566 queue_delayed_work(cdev->hwfns[i].iov_wq,
3567 &cdev->hwfns[i].iov_task, 0);
3568}
3569
Yuval Mintz0b55e272016-05-11 16:36:15 +03003570int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3571{
3572 int i, j;
3573
3574 for_each_hwfn(cdev, i)
3575 if (cdev->hwfns[i].iov_wq)
3576 flush_workqueue(cdev->hwfns[i].iov_wq);
3577
3578 /* Mark VFs for disablement */
3579 qed_iov_set_vfs_to_disable(cdev, true);
3580
3581 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3582 pci_disable_sriov(cdev->pdev);
3583
3584 for_each_hwfn(cdev, i) {
3585 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3586 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3587
3588 /* Failure to acquire the ptt in 100g creates an odd error
3589 * where the first engine has already relased IOV.
3590 */
3591 if (!ptt) {
3592 DP_ERR(hwfn, "Failed to acquire ptt\n");
3593 return -EBUSY;
3594 }
3595
Yuval Mintz733def62016-05-11 16:36:22 +03003596 /* Clean WFQ db and configure equal weight for all vports */
3597 qed_clean_wfq_db(hwfn, ptt);
3598
Yuval Mintz0b55e272016-05-11 16:36:15 +03003599 qed_for_each_vf(hwfn, j) {
3600 int k;
3601
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003602 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
Yuval Mintz0b55e272016-05-11 16:36:15 +03003603 continue;
3604
3605 /* Wait until VF is disabled before releasing */
3606 for (k = 0; k < 100; k++) {
3607 if (!qed_iov_is_vf_stopped(hwfn, j))
3608 msleep(20);
3609 else
3610 break;
3611 }
3612
3613 if (k < 100)
3614 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3615 ptt, j);
3616 else
3617 DP_ERR(hwfn,
3618 "Timeout waiting for VF's FLR to end\n");
3619 }
3620
3621 qed_ptt_release(hwfn, ptt);
3622 }
3623
3624 qed_iov_set_vfs_to_disable(cdev, false);
3625
3626 return 0;
3627}
3628
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003629static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
3630 u16 vfid,
3631 struct qed_iov_vf_init_params *params)
3632{
3633 u16 base, i;
3634
3635 /* Since we have an equal resource distribution per-VF, and we assume
3636 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
3637 * sequentially from there.
3638 */
3639 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
3640
3641 params->rel_vf_id = vfid;
3642 for (i = 0; i < params->num_queues; i++) {
3643 params->req_rx_queue[i] = base + i;
3644 params->req_tx_queue[i] = base + i;
3645 }
3646}
3647
Yuval Mintz0b55e272016-05-11 16:36:15 +03003648static int qed_sriov_enable(struct qed_dev *cdev, int num)
3649{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003650 struct qed_iov_vf_init_params params;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003651 int i, j, rc;
3652
3653 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
3654 DP_NOTICE(cdev, "Can start at most %d VFs\n",
3655 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
3656 return -EINVAL;
3657 }
3658
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003659 memset(&params, 0, sizeof(params));
3660
Yuval Mintz0b55e272016-05-11 16:36:15 +03003661 /* Initialize HW for VF access */
3662 for_each_hwfn(cdev, j) {
3663 struct qed_hwfn *hwfn = &cdev->hwfns[j];
3664 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
Mintz, Yuval5a1f9652016-10-31 07:14:26 +02003665
3666 /* Make sure not to use more than 16 queues per VF */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003667 params.num_queues = min_t(int,
3668 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
3669 16);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003670
3671 if (!ptt) {
3672 DP_ERR(hwfn, "Failed to acquire ptt\n");
3673 rc = -EBUSY;
3674 goto err;
3675 }
3676
Yuval Mintz0b55e272016-05-11 16:36:15 +03003677 for (i = 0; i < num; i++) {
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003678 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
Yuval Mintz0b55e272016-05-11 16:36:15 +03003679 continue;
3680
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003681 qed_sriov_enable_qid_config(hwfn, i, &params);
3682 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003683 if (rc) {
3684 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
3685 qed_ptt_release(hwfn, ptt);
3686 goto err;
3687 }
3688 }
3689
3690 qed_ptt_release(hwfn, ptt);
3691 }
3692
3693 /* Enable SRIOV PCIe functions */
3694 rc = pci_enable_sriov(cdev->pdev, num);
3695 if (rc) {
3696 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
3697 goto err;
3698 }
3699
3700 return num;
3701
3702err:
3703 qed_sriov_disable(cdev, false);
3704 return rc;
3705}
3706
3707static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
3708{
3709 if (!IS_QED_SRIOV(cdev)) {
3710 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
3711 return -EOPNOTSUPP;
3712 }
3713
3714 if (num_vfs_param)
3715 return qed_sriov_enable(cdev, num_vfs_param);
3716 else
3717 return qed_sriov_disable(cdev, true);
3718}
3719
Yuval Mintzeff16962016-05-11 16:36:21 +03003720static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
3721{
3722 int i;
3723
3724 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3725 DP_VERBOSE(cdev, QED_MSG_IOV,
3726 "Cannot set a VF MAC; Sriov is not enabled\n");
3727 return -EINVAL;
3728 }
3729
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003730 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03003731 DP_VERBOSE(cdev, QED_MSG_IOV,
3732 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3733 return -EINVAL;
3734 }
3735
3736 for_each_hwfn(cdev, i) {
3737 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3738 struct qed_public_vf_info *vf_info;
3739
3740 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3741 if (!vf_info)
3742 continue;
3743
3744 /* Set the forced MAC, and schedule the IOV task */
3745 ether_addr_copy(vf_info->forced_mac, mac);
3746 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3747 }
3748
3749 return 0;
3750}
3751
Yuval Mintz08feecd2016-05-11 16:36:20 +03003752static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
3753{
3754 int i;
3755
3756 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3757 DP_VERBOSE(cdev, QED_MSG_IOV,
3758 "Cannot set a VF MAC; Sriov is not enabled\n");
3759 return -EINVAL;
3760 }
3761
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003762 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03003763 DP_VERBOSE(cdev, QED_MSG_IOV,
3764 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3765 return -EINVAL;
3766 }
3767
3768 for_each_hwfn(cdev, i) {
3769 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3770 struct qed_public_vf_info *vf_info;
3771
3772 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3773 if (!vf_info)
3774 continue;
3775
3776 /* Set the forced vlan, and schedule the IOV task */
3777 vf_info->forced_vlan = vid;
3778 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3779 }
3780
3781 return 0;
3782}
3783
Yuval Mintz73390ac2016-05-11 16:36:24 +03003784static int qed_get_vf_config(struct qed_dev *cdev,
3785 int vf_id, struct ifla_vf_info *ivi)
3786{
3787 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
3788 struct qed_public_vf_info *vf_info;
3789 struct qed_mcp_link_state link;
3790 u32 tx_rate;
3791
3792 /* Sanitize request */
3793 if (IS_VF(cdev))
3794 return -EINVAL;
3795
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003796 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
Yuval Mintz73390ac2016-05-11 16:36:24 +03003797 DP_VERBOSE(cdev, QED_MSG_IOV,
3798 "VF index [%d] isn't active\n", vf_id);
3799 return -EINVAL;
3800 }
3801
3802 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3803
3804 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
3805
3806 /* Fill information about VF */
3807 ivi->vf = vf_id;
3808
3809 if (is_valid_ether_addr(vf_info->forced_mac))
3810 ether_addr_copy(ivi->mac, vf_info->forced_mac);
3811 else
3812 ether_addr_copy(ivi->mac, vf_info->mac);
3813
3814 ivi->vlan = vf_info->forced_vlan;
3815 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
3816 ivi->linkstate = vf_info->link_state;
3817 tx_rate = vf_info->tx_rate;
3818 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
3819 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
3820
3821 return 0;
3822}
3823
Yuval Mintz36558c32016-05-11 16:36:17 +03003824void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
3825{
3826 struct qed_mcp_link_capabilities caps;
3827 struct qed_mcp_link_params params;
3828 struct qed_mcp_link_state link;
3829 int i;
3830
3831 if (!hwfn->pf_iov_info)
3832 return;
3833
3834 /* Update bulletin of all future possible VFs with link configuration */
3835 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
Yuval Mintz733def62016-05-11 16:36:22 +03003836 struct qed_public_vf_info *vf_info;
3837
3838 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
3839 if (!vf_info)
3840 continue;
3841
Yuval Mintz36558c32016-05-11 16:36:17 +03003842 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
3843 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
3844 memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
3845 sizeof(caps));
3846
Yuval Mintz733def62016-05-11 16:36:22 +03003847 /* Modify link according to the VF's configured link state */
3848 switch (vf_info->link_state) {
3849 case IFLA_VF_LINK_STATE_DISABLE:
3850 link.link_up = false;
3851 break;
3852 case IFLA_VF_LINK_STATE_ENABLE:
3853 link.link_up = true;
3854 /* Set speed according to maximum supported by HW.
3855 * that is 40G for regular devices and 100G for CMT
3856 * mode devices.
3857 */
3858 link.speed = (hwfn->cdev->num_hwfns > 1) ?
3859 100000 : 40000;
3860 default:
3861 /* In auto mode pass PF link image to VF */
3862 break;
3863 }
3864
3865 if (link.link_up && vf_info->tx_rate) {
3866 struct qed_ptt *ptt;
3867 int rate;
3868
3869 rate = min_t(int, vf_info->tx_rate, link.speed);
3870
3871 ptt = qed_ptt_acquire(hwfn);
3872 if (!ptt) {
3873 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
3874 return;
3875 }
3876
3877 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
3878 vf_info->tx_rate = rate;
3879 link.speed = rate;
3880 }
3881
3882 qed_ptt_release(hwfn, ptt);
3883 }
3884
Yuval Mintz36558c32016-05-11 16:36:17 +03003885 qed_iov_set_link(hwfn, i, &params, &link, &caps);
3886 }
3887
3888 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3889}
3890
Yuval Mintz733def62016-05-11 16:36:22 +03003891static int qed_set_vf_link_state(struct qed_dev *cdev,
3892 int vf_id, int link_state)
3893{
3894 int i;
3895
3896 /* Sanitize request */
3897 if (IS_VF(cdev))
3898 return -EINVAL;
3899
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003900 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
Yuval Mintz733def62016-05-11 16:36:22 +03003901 DP_VERBOSE(cdev, QED_MSG_IOV,
3902 "VF index [%d] isn't active\n", vf_id);
3903 return -EINVAL;
3904 }
3905
3906 /* Handle configuration of link state */
3907 for_each_hwfn(cdev, i) {
3908 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3909 struct qed_public_vf_info *vf;
3910
3911 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3912 if (!vf)
3913 continue;
3914
3915 if (vf->link_state == link_state)
3916 continue;
3917
3918 vf->link_state = link_state;
3919 qed_inform_vf_link_state(&cdev->hwfns[i]);
3920 }
3921
3922 return 0;
3923}
3924
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003925static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
3926{
3927 int i, rc = -EINVAL;
3928
3929 for_each_hwfn(cdev, i) {
3930 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3931
3932 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
3933 if (rc)
3934 break;
3935 }
3936
3937 return rc;
3938}
3939
Yuval Mintz733def62016-05-11 16:36:22 +03003940static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
3941{
3942 int i;
3943
3944 for_each_hwfn(cdev, i) {
3945 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3946 struct qed_public_vf_info *vf;
3947
3948 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3949 DP_NOTICE(p_hwfn,
3950 "SR-IOV sanity check failed, can't set tx rate\n");
3951 return -EINVAL;
3952 }
3953
3954 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
3955
3956 vf->tx_rate = rate;
3957
3958 qed_inform_vf_link_state(p_hwfn);
3959 }
3960
3961 return 0;
3962}
3963
3964static int qed_set_vf_rate(struct qed_dev *cdev,
3965 int vfid, u32 min_rate, u32 max_rate)
3966{
3967 int rc_min = 0, rc_max = 0;
3968
3969 if (max_rate)
3970 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
3971
3972 if (min_rate)
3973 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
3974
3975 if (rc_max | rc_min)
3976 return -EINVAL;
3977
3978 return 0;
3979}
3980
Mintz, Yuvalf990c822017-01-01 13:57:08 +02003981static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
3982{
3983 int i;
3984
3985 for_each_hwfn(cdev, i) {
3986 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3987 struct qed_public_vf_info *vf;
3988
3989 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
3990 DP_NOTICE(hwfn,
3991 "SR-IOV sanity check failed, can't set trust\n");
3992 return -EINVAL;
3993 }
3994
3995 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3996
3997 if (vf->is_trusted_request == trust)
3998 return 0;
3999 vf->is_trusted_request = trust;
4000
4001 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4002 }
4003
4004 return 0;
4005}
4006
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004007static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4008{
4009 u64 events[QED_VF_ARRAY_LENGTH];
4010 struct qed_ptt *ptt;
4011 int i;
4012
4013 ptt = qed_ptt_acquire(hwfn);
4014 if (!ptt) {
4015 DP_VERBOSE(hwfn, QED_MSG_IOV,
4016 "Can't acquire PTT; re-scheduling\n");
4017 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4018 return;
4019 }
4020
4021 qed_iov_pf_get_and_clear_pending_events(hwfn, events);
4022
4023 DP_VERBOSE(hwfn, QED_MSG_IOV,
4024 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4025 events[0], events[1], events[2]);
4026
4027 qed_for_each_vf(hwfn, i) {
4028 /* Skip VFs with no pending messages */
4029 if (!(events[i / 64] & (1ULL << (i % 64))))
4030 continue;
4031
4032 DP_VERBOSE(hwfn, QED_MSG_IOV,
4033 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4034 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4035
4036 /* Copy VF's message to PF's request buffer for that VF */
4037 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4038 continue;
4039
4040 qed_iov_process_mbx_req(hwfn, ptt, i);
4041 }
4042
4043 qed_ptt_release(hwfn, ptt);
4044}
4045
Yuval Mintz08feecd2016-05-11 16:36:20 +03004046static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4047{
4048 int i;
4049
4050 qed_for_each_vf(hwfn, i) {
4051 struct qed_public_vf_info *info;
4052 bool update = false;
Yuval Mintzeff16962016-05-11 16:36:21 +03004053 u8 *mac;
Yuval Mintz08feecd2016-05-11 16:36:20 +03004054
4055 info = qed_iov_get_public_vf_info(hwfn, i, true);
4056 if (!info)
4057 continue;
4058
4059 /* Update data on bulletin board */
Yuval Mintzeff16962016-05-11 16:36:21 +03004060 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4061 if (is_valid_ether_addr(info->forced_mac) &&
4062 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4063 DP_VERBOSE(hwfn,
4064 QED_MSG_IOV,
4065 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4066 i,
4067 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4068
4069 /* Update bulletin board with forced MAC */
4070 qed_iov_bulletin_set_forced_mac(hwfn,
4071 info->forced_mac, i);
4072 update = true;
4073 }
Yuval Mintz08feecd2016-05-11 16:36:20 +03004074
4075 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4076 info->forced_vlan) {
4077 DP_VERBOSE(hwfn,
4078 QED_MSG_IOV,
4079 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4080 info->forced_vlan,
4081 i,
4082 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4083 qed_iov_bulletin_set_forced_vlan(hwfn,
4084 info->forced_vlan, i);
4085 update = true;
4086 }
4087
4088 if (update)
4089 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4090 }
4091}
4092
Yuval Mintz36558c32016-05-11 16:36:17 +03004093static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4094{
4095 struct qed_ptt *ptt;
4096 int i;
4097
4098 ptt = qed_ptt_acquire(hwfn);
4099 if (!ptt) {
4100 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4101 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4102 return;
4103 }
4104
4105 qed_for_each_vf(hwfn, i)
4106 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4107
4108 qed_ptt_release(hwfn, ptt);
4109}
4110
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004111static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4112{
4113 struct qed_sp_vport_update_params params;
4114 struct qed_filter_accept_flags *flags;
4115 struct qed_public_vf_info *vf_info;
4116 struct qed_vf_info *vf;
4117 u8 mask;
4118 int i;
4119
4120 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4121 flags = &params.accept_flags;
4122
4123 qed_for_each_vf(hwfn, i) {
4124 /* Need to make sure current requested configuration didn't
4125 * flip so that we'll end up configuring something that's not
4126 * needed.
4127 */
4128 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4129 if (vf_info->is_trusted_configured ==
4130 vf_info->is_trusted_request)
4131 continue;
4132 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4133
4134 /* Validate that the VF has a configured vport */
4135 vf = qed_iov_get_vf_info(hwfn, i, true);
4136 if (!vf->vport_instance)
4137 continue;
4138
4139 memset(&params, 0, sizeof(params));
4140 params.opaque_fid = vf->opaque_fid;
4141 params.vport_id = vf->vport_id;
4142
4143 if (vf_info->rx_accept_mode & mask) {
4144 flags->update_rx_mode_config = 1;
4145 flags->rx_accept_filter = vf_info->rx_accept_mode;
4146 }
4147
4148 if (vf_info->tx_accept_mode & mask) {
4149 flags->update_tx_mode_config = 1;
4150 flags->tx_accept_filter = vf_info->tx_accept_mode;
4151 }
4152
4153 /* Remove if needed; Otherwise this would set the mask */
4154 if (!vf_info->is_trusted_configured) {
4155 flags->rx_accept_filter &= ~mask;
4156 flags->tx_accept_filter &= ~mask;
4157 }
4158
4159 if (flags->update_rx_mode_config ||
4160 flags->update_tx_mode_config)
4161 qed_sp_vport_update(hwfn, &params,
4162 QED_SPQ_MODE_EBLOCK, NULL);
4163 }
4164}
4165
Baoyou Xieba569472016-09-09 09:21:15 +08004166static void qed_iov_pf_task(struct work_struct *work)
4167
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004168{
4169 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4170 iov_task.work);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004171 int rc;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004172
4173 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4174 return;
4175
Yuval Mintz0b55e272016-05-11 16:36:15 +03004176 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4177 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4178
4179 if (!ptt) {
4180 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4181 return;
4182 }
4183
4184 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4185 if (rc)
4186 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4187
4188 qed_ptt_release(hwfn, ptt);
4189 }
4190
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004191 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4192 qed_handle_vf_msg(hwfn);
Yuval Mintz08feecd2016-05-11 16:36:20 +03004193
4194 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4195 &hwfn->iov_task_flags))
4196 qed_handle_pf_set_vf_unicast(hwfn);
4197
Yuval Mintz36558c32016-05-11 16:36:17 +03004198 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4199 &hwfn->iov_task_flags))
4200 qed_handle_bulletin_post(hwfn);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004201
4202 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4203 qed_iov_handle_trust_change(hwfn);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004204}
4205
4206void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4207{
4208 int i;
4209
4210 for_each_hwfn(cdev, i) {
4211 if (!cdev->hwfns[i].iov_wq)
4212 continue;
4213
4214 if (schedule_first) {
4215 qed_schedule_iov(&cdev->hwfns[i],
4216 QED_IOV_WQ_STOP_WQ_FLAG);
4217 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4218 }
4219
4220 flush_workqueue(cdev->hwfns[i].iov_wq);
4221 destroy_workqueue(cdev->hwfns[i].iov_wq);
4222 }
4223}
4224
4225int qed_iov_wq_start(struct qed_dev *cdev)
4226{
4227 char name[NAME_SIZE];
4228 int i;
4229
4230 for_each_hwfn(cdev, i) {
4231 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4232
Yuval Mintz36558c32016-05-11 16:36:17 +03004233 /* PFs needs a dedicated workqueue only if they support IOV.
4234 * VFs always require one.
4235 */
4236 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004237 continue;
4238
4239 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4240 cdev->pdev->bus->number,
4241 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4242
4243 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4244 if (!p_hwfn->iov_wq) {
4245 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
4246 return -ENOMEM;
4247 }
4248
Yuval Mintz36558c32016-05-11 16:36:17 +03004249 if (IS_PF(cdev))
4250 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
4251 else
4252 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004253 }
4254
4255 return 0;
4256}
Yuval Mintz0b55e272016-05-11 16:36:15 +03004257
4258const struct qed_iov_hv_ops qed_iov_ops_pass = {
4259 .configure = &qed_sriov_configure,
Yuval Mintzeff16962016-05-11 16:36:21 +03004260 .set_mac = &qed_sriov_pf_set_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03004261 .set_vlan = &qed_sriov_pf_set_vlan,
Yuval Mintz73390ac2016-05-11 16:36:24 +03004262 .get_config = &qed_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03004263 .set_link_state = &qed_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004264 .set_spoof = &qed_spoof_configure,
Yuval Mintz733def62016-05-11 16:36:22 +03004265 .set_rate = &qed_set_vf_rate,
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004266 .set_trust = &qed_set_vf_trust,
Yuval Mintz0b55e272016-05-11 16:36:15 +03004267};