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Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
Fuyun Liang434776a2018-01-12 16:23:10 +0800161void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100163{
Fuyun Liang434776a2018-01-12 16:23:10 +0800164 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
165
Salil76ad4f02017-08-02 16:59:45 +0100166 /* this defines the configuration for RL (Interrupt Rate Limiter).
167 * Rl defines rate of interrupts i.e. number of interrupts-per-second
168 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800170
171 if (rl_reg > 0 && !tqp_vector->tx_group.gl_adapt_enable &&
172 !tqp_vector->rx_group.gl_adapt_enable)
173 /* According to the hardware, the range of rl_reg is
174 * 0-59 and the unit is 4.
175 */
176 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
177
178 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
179}
180
181void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
182 u32 gl_value)
183{
184 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
185
186 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
187}
188
189void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
190 u32 gl_value)
191{
192 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
193
194 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100195}
196
Fuyun Liang5fd47892018-01-12 16:23:11 +0800197static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
198 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100199{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800200 struct hnae3_handle *h = priv->ae_handle;
201
Salil76ad4f02017-08-02 16:59:45 +0100202 /* initialize the configuration for interrupt coalescing.
203 * 1. GL (Interrupt Gap Limiter)
204 * 2. RL (Interrupt Rate Limiter)
205 */
206
Fuyun Liang5fd47892018-01-12 16:23:11 +0800207 /* Default: enable interrupt coalescing self-adaptive and GL */
208 tqp_vector->tx_group.gl_adapt_enable = 1;
209 tqp_vector->rx_group.gl_adapt_enable = 1;
210
Salil76ad4f02017-08-02 16:59:45 +0100211 tqp_vector->tx_group.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800212 tqp_vector->rx_group.int_gl = HNS3_INT_GL_50K;
213
214 hns3_set_vector_coalesce_tx_gl(tqp_vector,
215 tqp_vector->tx_group.int_gl);
216 hns3_set_vector_coalesce_rx_gl(tqp_vector,
217 tqp_vector->rx_group.int_gl);
218
219 /* Default: disable RL */
220 h->kinfo.int_rl_setting = 0;
221 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
222
Salil76ad4f02017-08-02 16:59:45 +0100223 tqp_vector->rx_group.flow_level = HNS3_FLOW_LOW;
224 tqp_vector->tx_group.flow_level = HNS3_FLOW_LOW;
225}
226
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800227static int hns3_nic_set_real_num_queue(struct net_device *netdev)
228{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800229 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800230 struct hnae3_knic_private_info *kinfo = &h->kinfo;
231 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
232 int ret;
233
234 ret = netif_set_real_num_tx_queues(netdev, queue_size);
235 if (ret) {
236 netdev_err(netdev,
237 "netif_set_real_num_tx_queues fail, ret=%d!\n",
238 ret);
239 return ret;
240 }
241
242 ret = netif_set_real_num_rx_queues(netdev, queue_size);
243 if (ret) {
244 netdev_err(netdev,
245 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
246 return ret;
247 }
248
249 return 0;
250}
251
Salil76ad4f02017-08-02 16:59:45 +0100252static int hns3_nic_net_up(struct net_device *netdev)
253{
254 struct hns3_nic_priv *priv = netdev_priv(netdev);
255 struct hnae3_handle *h = priv->ae_handle;
256 int i, j;
257 int ret;
258
259 /* get irq resource for all vectors */
260 ret = hns3_nic_init_irq(priv);
261 if (ret) {
262 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
263 return ret;
264 }
265
266 /* enable the vectors */
267 for (i = 0; i < priv->vector_num; i++)
268 hns3_vector_enable(&priv->tqp_vector[i]);
269
270 /* start the ae_dev */
271 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
272 if (ret)
273 goto out_start_err;
274
Jian Shenb875cc32018-01-05 18:18:11 +0800275 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
276
Salil76ad4f02017-08-02 16:59:45 +0100277 return 0;
278
279out_start_err:
280 for (j = i - 1; j >= 0; j--)
281 hns3_vector_disable(&priv->tqp_vector[j]);
282
283 hns3_nic_uninit_irq(priv);
284
285 return ret;
286}
287
288static int hns3_nic_net_open(struct net_device *netdev)
289{
Lipengf8fa222c2017-11-02 20:45:20 +0800290 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100291 int ret;
292
293 netif_carrier_off(netdev);
294
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800295 ret = hns3_nic_set_real_num_queue(netdev);
296 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100297 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100298
299 ret = hns3_nic_net_up(netdev);
300 if (ret) {
301 netdev_err(netdev,
302 "hns net up fail, ret=%d!\n", ret);
303 return ret;
304 }
305
Lipengf8fa222c2017-11-02 20:45:20 +0800306 priv->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100307 return 0;
308}
309
310static void hns3_nic_net_down(struct net_device *netdev)
311{
312 struct hns3_nic_priv *priv = netdev_priv(netdev);
313 const struct hnae3_ae_ops *ops;
314 int i;
315
Jian Shenb875cc32018-01-05 18:18:11 +0800316 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
317 return;
318
Salil76ad4f02017-08-02 16:59:45 +0100319 /* stop ae_dev */
320 ops = priv->ae_handle->ae_algo->ops;
321 if (ops->stop)
322 ops->stop(priv->ae_handle);
323
324 /* disable vectors */
325 for (i = 0; i < priv->vector_num; i++)
326 hns3_vector_disable(&priv->tqp_vector[i]);
327
328 /* free irq resources */
329 hns3_nic_uninit_irq(priv);
330}
331
332static int hns3_nic_net_stop(struct net_device *netdev)
333{
334 netif_tx_stop_all_queues(netdev);
335 netif_carrier_off(netdev);
336
337 hns3_nic_net_down(netdev);
338
339 return 0;
340}
341
Salil76ad4f02017-08-02 16:59:45 +0100342static int hns3_nic_uc_sync(struct net_device *netdev,
343 const unsigned char *addr)
344{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800345 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100346
347 if (h->ae_algo->ops->add_uc_addr)
348 return h->ae_algo->ops->add_uc_addr(h, addr);
349
350 return 0;
351}
352
353static int hns3_nic_uc_unsync(struct net_device *netdev,
354 const unsigned char *addr)
355{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800356 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100357
358 if (h->ae_algo->ops->rm_uc_addr)
359 return h->ae_algo->ops->rm_uc_addr(h, addr);
360
361 return 0;
362}
363
364static int hns3_nic_mc_sync(struct net_device *netdev,
365 const unsigned char *addr)
366{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800367 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100368
Dan Carpenter720a8472017-08-10 12:56:14 +0300369 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100370 return h->ae_algo->ops->add_mc_addr(h, addr);
371
372 return 0;
373}
374
375static int hns3_nic_mc_unsync(struct net_device *netdev,
376 const unsigned char *addr)
377{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800378 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100379
Dan Carpenter720a8472017-08-10 12:56:14 +0300380 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100381 return h->ae_algo->ops->rm_mc_addr(h, addr);
382
383 return 0;
384}
385
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800386static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100387{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800388 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100389
390 if (h->ae_algo->ops->set_promisc_mode) {
391 if (netdev->flags & IFF_PROMISC)
392 h->ae_algo->ops->set_promisc_mode(h, 1);
393 else
394 h->ae_algo->ops->set_promisc_mode(h, 0);
395 }
396 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
397 netdev_err(netdev, "sync uc address fail\n");
398 if (netdev->flags & IFF_MULTICAST)
399 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
400 netdev_err(netdev, "sync mc address fail\n");
401}
402
403static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
404 u16 *mss, u32 *type_cs_vlan_tso)
405{
406 u32 l4_offset, hdr_len;
407 union l3_hdr_info l3;
408 union l4_hdr_info l4;
409 u32 l4_paylen;
410 int ret;
411
412 if (!skb_is_gso(skb))
413 return 0;
414
415 ret = skb_cow_head(skb, 0);
416 if (ret)
417 return ret;
418
419 l3.hdr = skb_network_header(skb);
420 l4.hdr = skb_transport_header(skb);
421
422 /* Software should clear the IPv4's checksum field when tso is
423 * needed.
424 */
425 if (l3.v4->version == 4)
426 l3.v4->check = 0;
427
428 /* tunnel packet.*/
429 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
430 SKB_GSO_GRE_CSUM |
431 SKB_GSO_UDP_TUNNEL |
432 SKB_GSO_UDP_TUNNEL_CSUM)) {
433 if ((!(skb_shinfo(skb)->gso_type &
434 SKB_GSO_PARTIAL)) &&
435 (skb_shinfo(skb)->gso_type &
436 SKB_GSO_UDP_TUNNEL_CSUM)) {
437 /* Software should clear the udp's checksum
438 * field when tso is needed.
439 */
440 l4.udp->check = 0;
441 }
442 /* reset l3&l4 pointers from outer to inner headers */
443 l3.hdr = skb_inner_network_header(skb);
444 l4.hdr = skb_inner_transport_header(skb);
445
446 /* Software should clear the IPv4's checksum field when
447 * tso is needed.
448 */
449 if (l3.v4->version == 4)
450 l3.v4->check = 0;
451 }
452
453 /* normal or tunnel packet*/
454 l4_offset = l4.hdr - skb->data;
455 hdr_len = (l4.tcp->doff * 4) + l4_offset;
456
457 /* remove payload length from inner pseudo checksum when tso*/
458 l4_paylen = skb->len - l4_offset;
459 csum_replace_by_diff(&l4.tcp->check,
460 (__force __wsum)htonl(l4_paylen));
461
462 /* find the txbd field values */
463 *paylen = skb->len - hdr_len;
464 hnae_set_bit(*type_cs_vlan_tso,
465 HNS3_TXD_TSO_B, 1);
466
467 /* get MSS for TSO */
468 *mss = skb_shinfo(skb)->gso_size;
469
470 return 0;
471}
472
Salil1898d4e2017-08-18 12:31:39 +0100473static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
474 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100475{
476 union {
477 struct iphdr *v4;
478 struct ipv6hdr *v6;
479 unsigned char *hdr;
480 } l3;
481 unsigned char *l4_hdr;
482 unsigned char *exthdr;
483 u8 l4_proto_tmp;
484 __be16 frag_off;
485
486 /* find outer header point */
487 l3.hdr = skb_network_header(skb);
488 l4_hdr = skb_inner_transport_header(skb);
489
490 if (skb->protocol == htons(ETH_P_IPV6)) {
491 exthdr = l3.hdr + sizeof(*l3.v6);
492 l4_proto_tmp = l3.v6->nexthdr;
493 if (l4_hdr != exthdr)
494 ipv6_skip_exthdr(skb, exthdr - skb->data,
495 &l4_proto_tmp, &frag_off);
496 } else if (skb->protocol == htons(ETH_P_IP)) {
497 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100498 } else {
499 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100500 }
501
502 *ol4_proto = l4_proto_tmp;
503
504 /* tunnel packet */
505 if (!skb->encapsulation) {
506 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100507 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100508 }
509
510 /* find inner header point */
511 l3.hdr = skb_inner_network_header(skb);
512 l4_hdr = skb_inner_transport_header(skb);
513
514 if (l3.v6->version == 6) {
515 exthdr = l3.hdr + sizeof(*l3.v6);
516 l4_proto_tmp = l3.v6->nexthdr;
517 if (l4_hdr != exthdr)
518 ipv6_skip_exthdr(skb, exthdr - skb->data,
519 &l4_proto_tmp, &frag_off);
520 } else if (l3.v4->version == 4) {
521 l4_proto_tmp = l3.v4->protocol;
522 }
523
524 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100525
526 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100527}
528
529static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
530 u8 il4_proto, u32 *type_cs_vlan_tso,
531 u32 *ol_type_vlan_len_msec)
532{
533 union {
534 struct iphdr *v4;
535 struct ipv6hdr *v6;
536 unsigned char *hdr;
537 } l3;
538 union {
539 struct tcphdr *tcp;
540 struct udphdr *udp;
541 struct gre_base_hdr *gre;
542 unsigned char *hdr;
543 } l4;
544 unsigned char *l2_hdr;
545 u8 l4_proto = ol4_proto;
546 u32 ol2_len;
547 u32 ol3_len;
548 u32 ol4_len;
549 u32 l2_len;
550 u32 l3_len;
551
552 l3.hdr = skb_network_header(skb);
553 l4.hdr = skb_transport_header(skb);
554
555 /* compute L2 header size for normal packet, defined in 2 Bytes */
556 l2_len = l3.hdr - skb->data;
557 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
558 HNS3_TXD_L2LEN_S, l2_len >> 1);
559
560 /* tunnel packet*/
561 if (skb->encapsulation) {
562 /* compute OL2 header size, defined in 2 Bytes */
563 ol2_len = l2_len;
564 hnae_set_field(*ol_type_vlan_len_msec,
565 HNS3_TXD_L2LEN_M,
566 HNS3_TXD_L2LEN_S, ol2_len >> 1);
567
568 /* compute OL3 header size, defined in 4 Bytes */
569 ol3_len = l4.hdr - l3.hdr;
570 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
571 HNS3_TXD_L3LEN_S, ol3_len >> 2);
572
573 /* MAC in UDP, MAC in GRE (0x6558)*/
574 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
575 /* switch MAC header ptr from outer to inner header.*/
576 l2_hdr = skb_inner_mac_header(skb);
577
578 /* compute OL4 header size, defined in 4 Bytes. */
579 ol4_len = l2_hdr - l4.hdr;
580 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
581 HNS3_TXD_L4LEN_S, ol4_len >> 2);
582
583 /* switch IP header ptr from outer to inner header */
584 l3.hdr = skb_inner_network_header(skb);
585
586 /* compute inner l2 header size, defined in 2 Bytes. */
587 l2_len = l3.hdr - l2_hdr;
588 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
589 HNS3_TXD_L2LEN_S, l2_len >> 1);
590 } else {
591 /* skb packet types not supported by hardware,
592 * txbd len fild doesn't be filled.
593 */
594 return;
595 }
596
597 /* switch L4 header pointer from outer to inner */
598 l4.hdr = skb_inner_transport_header(skb);
599
600 l4_proto = il4_proto;
601 }
602
603 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
604 l3_len = l4.hdr - l3.hdr;
605 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
606 HNS3_TXD_L3LEN_S, l3_len >> 2);
607
608 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
609 switch (l4_proto) {
610 case IPPROTO_TCP:
611 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
612 HNS3_TXD_L4LEN_S, l4.tcp->doff);
613 break;
614 case IPPROTO_SCTP:
615 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
616 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
617 break;
618 case IPPROTO_UDP:
619 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
620 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
621 break;
622 default:
623 /* skb packet types not supported by hardware,
624 * txbd len fild doesn't be filled.
625 */
626 return;
627 }
628}
629
630static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
631 u8 il4_proto, u32 *type_cs_vlan_tso,
632 u32 *ol_type_vlan_len_msec)
633{
634 union {
635 struct iphdr *v4;
636 struct ipv6hdr *v6;
637 unsigned char *hdr;
638 } l3;
639 u32 l4_proto = ol4_proto;
640
641 l3.hdr = skb_network_header(skb);
642
643 /* define OL3 type and tunnel type(OL4).*/
644 if (skb->encapsulation) {
645 /* define outer network header type.*/
646 if (skb->protocol == htons(ETH_P_IP)) {
647 if (skb_is_gso(skb))
648 hnae_set_field(*ol_type_vlan_len_msec,
649 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
650 HNS3_OL3T_IPV4_CSUM);
651 else
652 hnae_set_field(*ol_type_vlan_len_msec,
653 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
654 HNS3_OL3T_IPV4_NO_CSUM);
655
656 } else if (skb->protocol == htons(ETH_P_IPV6)) {
657 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
658 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
659 }
660
661 /* define tunnel type(OL4).*/
662 switch (l4_proto) {
663 case IPPROTO_UDP:
664 hnae_set_field(*ol_type_vlan_len_msec,
665 HNS3_TXD_TUNTYPE_M,
666 HNS3_TXD_TUNTYPE_S,
667 HNS3_TUN_MAC_IN_UDP);
668 break;
669 case IPPROTO_GRE:
670 hnae_set_field(*ol_type_vlan_len_msec,
671 HNS3_TXD_TUNTYPE_M,
672 HNS3_TXD_TUNTYPE_S,
673 HNS3_TUN_NVGRE);
674 break;
675 default:
676 /* drop the skb tunnel packet if hardware don't support,
677 * because hardware can't calculate csum when TSO.
678 */
679 if (skb_is_gso(skb))
680 return -EDOM;
681
682 /* the stack computes the IP header already,
683 * driver calculate l4 checksum when not TSO.
684 */
685 skb_checksum_help(skb);
686 return 0;
687 }
688
689 l3.hdr = skb_inner_network_header(skb);
690 l4_proto = il4_proto;
691 }
692
693 if (l3.v4->version == 4) {
694 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
695 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
696
697 /* the stack computes the IP header already, the only time we
698 * need the hardware to recompute it is in the case of TSO.
699 */
700 if (skb_is_gso(skb))
701 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
702
703 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
704 } else if (l3.v6->version == 6) {
705 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
706 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
707 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
708 }
709
710 switch (l4_proto) {
711 case IPPROTO_TCP:
712 hnae_set_field(*type_cs_vlan_tso,
713 HNS3_TXD_L4T_M,
714 HNS3_TXD_L4T_S,
715 HNS3_L4T_TCP);
716 break;
717 case IPPROTO_UDP:
718 hnae_set_field(*type_cs_vlan_tso,
719 HNS3_TXD_L4T_M,
720 HNS3_TXD_L4T_S,
721 HNS3_L4T_UDP);
722 break;
723 case IPPROTO_SCTP:
724 hnae_set_field(*type_cs_vlan_tso,
725 HNS3_TXD_L4T_M,
726 HNS3_TXD_L4T_S,
727 HNS3_L4T_SCTP);
728 break;
729 default:
730 /* drop the skb tunnel packet if hardware don't support,
731 * because hardware can't calculate csum when TSO.
732 */
733 if (skb_is_gso(skb))
734 return -EDOM;
735
736 /* the stack computes the IP header already,
737 * driver calculate l4 checksum when not TSO.
738 */
739 skb_checksum_help(skb);
740 return 0;
741 }
742
743 return 0;
744}
745
746static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
747{
748 /* Config bd buffer end */
749 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
750 HNS3_TXD_BDTYPE_M, 0);
751 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
752 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800753 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100754}
755
Peng Li9699cff2017-12-22 12:21:48 +0800756static int hns3_fill_desc_vtags(struct sk_buff *skb,
757 struct hns3_enet_ring *tx_ring,
758 u32 *inner_vlan_flag,
759 u32 *out_vlan_flag,
760 u16 *inner_vtag,
761 u16 *out_vtag)
762{
763#define HNS3_TX_VLAN_PRIO_SHIFT 13
764
765 if (skb->protocol == htons(ETH_P_8021Q) &&
766 !(tx_ring->tqp->handle->kinfo.netdev->features &
767 NETIF_F_HW_VLAN_CTAG_TX)) {
768 /* When HW VLAN acceleration is turned off, and the stack
769 * sets the protocol to 802.1q, the driver just need to
770 * set the protocol to the encapsulated ethertype.
771 */
772 skb->protocol = vlan_get_protocol(skb);
773 return 0;
774 }
775
776 if (skb_vlan_tag_present(skb)) {
777 u16 vlan_tag;
778
779 vlan_tag = skb_vlan_tag_get(skb);
780 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
781
782 /* Based on hw strategy, use out_vtag in two layer tag case,
783 * and use inner_vtag in one tag case.
784 */
785 if (skb->protocol == htons(ETH_P_8021Q)) {
786 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
787 *out_vtag = vlan_tag;
788 } else {
789 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
790 *inner_vtag = vlan_tag;
791 }
792 } else if (skb->protocol == htons(ETH_P_8021Q)) {
793 struct vlan_ethhdr *vhdr;
794 int rc;
795
796 rc = skb_cow_head(skb, 0);
797 if (rc < 0)
798 return rc;
799 vhdr = (struct vlan_ethhdr *)skb->data;
800 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
801 << HNS3_TX_VLAN_PRIO_SHIFT);
802 }
803
804 skb->protocol = vlan_get_protocol(skb);
805 return 0;
806}
807
Salil76ad4f02017-08-02 16:59:45 +0100808static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
809 int size, dma_addr_t dma, int frag_end,
810 enum hns_desc_type type)
811{
812 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
813 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
814 u32 ol_type_vlan_len_msec = 0;
815 u16 bdtp_fe_sc_vld_ra_ri = 0;
816 u32 type_cs_vlan_tso = 0;
817 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800818 u16 inner_vtag = 0;
819 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100820 u32 paylen = 0;
821 u16 mss = 0;
822 __be16 protocol;
823 u8 ol4_proto;
824 u8 il4_proto;
825 int ret;
826
827 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
828 desc_cb->priv = priv;
829 desc_cb->length = size;
830 desc_cb->dma = dma;
831 desc_cb->type = type;
832
833 /* now, fill the descriptor */
834 desc->addr = cpu_to_le64(dma);
835 desc->tx.send_size = cpu_to_le16((u16)size);
836 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
837 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
838
839 if (type == DESC_TYPE_SKB) {
840 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800841 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100842
Peng Li9699cff2017-12-22 12:21:48 +0800843 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
844 &ol_type_vlan_len_msec,
845 &inner_vtag, &out_vtag);
846 if (unlikely(ret))
847 return ret;
848
Salil76ad4f02017-08-02 16:59:45 +0100849 if (skb->ip_summed == CHECKSUM_PARTIAL) {
850 skb_reset_mac_len(skb);
851 protocol = skb->protocol;
852
Salil1898d4e2017-08-18 12:31:39 +0100853 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
854 if (ret)
855 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100856 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
857 &type_cs_vlan_tso,
858 &ol_type_vlan_len_msec);
859 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
860 &type_cs_vlan_tso,
861 &ol_type_vlan_len_msec);
862 if (ret)
863 return ret;
864
865 ret = hns3_set_tso(skb, &paylen, &mss,
866 &type_cs_vlan_tso);
867 if (ret)
868 return ret;
869 }
870
871 /* Set txbd */
872 desc->tx.ol_type_vlan_len_msec =
873 cpu_to_le32(ol_type_vlan_len_msec);
874 desc->tx.type_cs_vlan_tso_len =
875 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800876 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100877 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800878 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
879 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100880 }
881
882 /* move ring pointer to next.*/
883 ring_ptr_move_fw(ring, next_to_use);
884
885 return 0;
886}
887
888static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
889 int size, dma_addr_t dma, int frag_end,
890 enum hns_desc_type type)
891{
892 unsigned int frag_buf_num;
893 unsigned int k;
894 int sizeoflast;
895 int ret;
896
897 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
898 sizeoflast = size % HNS3_MAX_BD_SIZE;
899 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
900
901 /* When the frag size is bigger than hardware, split this frag */
902 for (k = 0; k < frag_buf_num; k++) {
903 ret = hns3_fill_desc(ring, priv,
904 (k == frag_buf_num - 1) ?
905 sizeoflast : HNS3_MAX_BD_SIZE,
906 dma + HNS3_MAX_BD_SIZE * k,
907 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
908 (type == DESC_TYPE_SKB && !k) ?
909 DESC_TYPE_SKB : DESC_TYPE_PAGE);
910 if (ret)
911 return ret;
912 }
913
914 return 0;
915}
916
917static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
918 struct hns3_enet_ring *ring)
919{
920 struct sk_buff *skb = *out_skb;
921 struct skb_frag_struct *frag;
922 int bdnum_for_frag;
923 int frag_num;
924 int buf_num;
925 int size;
926 int i;
927
928 size = skb_headlen(skb);
929 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
930
931 frag_num = skb_shinfo(skb)->nr_frags;
932 for (i = 0; i < frag_num; i++) {
933 frag = &skb_shinfo(skb)->frags[i];
934 size = skb_frag_size(frag);
935 bdnum_for_frag =
936 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
937 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
938 return -ENOMEM;
939
940 buf_num += bdnum_for_frag;
941 }
942
943 if (buf_num > ring_space(ring))
944 return -EBUSY;
945
946 *bnum = buf_num;
947 return 0;
948}
949
950static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
951 struct hns3_enet_ring *ring)
952{
953 struct sk_buff *skb = *out_skb;
954 int buf_num;
955
956 /* No. of segments (plus a header) */
957 buf_num = skb_shinfo(skb)->nr_frags + 1;
958
959 if (buf_num > ring_space(ring))
960 return -EBUSY;
961
962 *bnum = buf_num;
963
964 return 0;
965}
966
967static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
968{
969 struct device *dev = ring_to_dev(ring);
970 unsigned int i;
971
972 for (i = 0; i < ring->desc_num; i++) {
973 /* check if this is where we started */
974 if (ring->next_to_use == next_to_use_orig)
975 break;
976
977 /* unmap the descriptor dma address */
978 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
979 dma_unmap_single(dev,
980 ring->desc_cb[ring->next_to_use].dma,
981 ring->desc_cb[ring->next_to_use].length,
982 DMA_TO_DEVICE);
983 else
984 dma_unmap_page(dev,
985 ring->desc_cb[ring->next_to_use].dma,
986 ring->desc_cb[ring->next_to_use].length,
987 DMA_TO_DEVICE);
988
989 /* rollback one */
990 ring_ptr_move_bw(ring, next_to_use);
991 }
992}
993
Yunsheng Lind43e5ac2017-10-20 10:19:21 +0800994netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100995{
996 struct hns3_nic_priv *priv = netdev_priv(netdev);
997 struct hns3_nic_ring_data *ring_data =
998 &tx_ring_data(priv, skb->queue_mapping);
999 struct hns3_enet_ring *ring = ring_data->ring;
1000 struct device *dev = priv->dev;
1001 struct netdev_queue *dev_queue;
1002 struct skb_frag_struct *frag;
1003 int next_to_use_head;
1004 int next_to_use_frag;
1005 dma_addr_t dma;
1006 int buf_num;
1007 int seg_num;
1008 int size;
1009 int ret;
1010 int i;
1011
1012 /* Prefetch the data used later */
1013 prefetch(skb->data);
1014
1015 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1016 case -EBUSY:
1017 u64_stats_update_begin(&ring->syncp);
1018 ring->stats.tx_busy++;
1019 u64_stats_update_end(&ring->syncp);
1020
1021 goto out_net_tx_busy;
1022 case -ENOMEM:
1023 u64_stats_update_begin(&ring->syncp);
1024 ring->stats.sw_err_cnt++;
1025 u64_stats_update_end(&ring->syncp);
1026 netdev_err(netdev, "no memory to xmit!\n");
1027
1028 goto out_err_tx_ok;
1029 default:
1030 break;
1031 }
1032
1033 /* No. of segments (plus a header) */
1034 seg_num = skb_shinfo(skb)->nr_frags + 1;
1035 /* Fill the first part */
1036 size = skb_headlen(skb);
1037
1038 next_to_use_head = ring->next_to_use;
1039
1040 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1041 if (dma_mapping_error(dev, dma)) {
1042 netdev_err(netdev, "TX head DMA map failed\n");
1043 ring->stats.sw_err_cnt++;
1044 goto out_err_tx_ok;
1045 }
1046
1047 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1048 DESC_TYPE_SKB);
1049 if (ret)
1050 goto head_dma_map_err;
1051
1052 next_to_use_frag = ring->next_to_use;
1053 /* Fill the fragments */
1054 for (i = 1; i < seg_num; i++) {
1055 frag = &skb_shinfo(skb)->frags[i - 1];
1056 size = skb_frag_size(frag);
1057 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1058 if (dma_mapping_error(dev, dma)) {
1059 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1060 ring->stats.sw_err_cnt++;
1061 goto frag_dma_map_err;
1062 }
1063 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1064 seg_num - 1 == i ? 1 : 0,
1065 DESC_TYPE_PAGE);
1066
1067 if (ret)
1068 goto frag_dma_map_err;
1069 }
1070
1071 /* Complete translate all packets */
1072 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1073 netdev_tx_sent_queue(dev_queue, skb->len);
1074
1075 wmb(); /* Commit all data before submit */
1076
1077 hnae_queue_xmit(ring->tqp, buf_num);
1078
1079 return NETDEV_TX_OK;
1080
1081frag_dma_map_err:
1082 hns_nic_dma_unmap(ring, next_to_use_frag);
1083
1084head_dma_map_err:
1085 hns_nic_dma_unmap(ring, next_to_use_head);
1086
1087out_err_tx_ok:
1088 dev_kfree_skb_any(skb);
1089 return NETDEV_TX_OK;
1090
1091out_net_tx_busy:
1092 netif_stop_subqueue(netdev, ring_data->queue_index);
1093 smp_mb(); /* Commit all data before submit */
1094
1095 return NETDEV_TX_BUSY;
1096}
1097
1098static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1099{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001100 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001101 struct sockaddr *mac_addr = p;
1102 int ret;
1103
1104 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1105 return -EADDRNOTAVAIL;
1106
1107 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data);
1108 if (ret) {
1109 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1110 return ret;
1111 }
1112
1113 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1114
1115 return 0;
1116}
1117
1118static int hns3_nic_set_features(struct net_device *netdev,
1119 netdev_features_t features)
1120{
Jian Shen181d4542018-01-12 16:23:16 +08001121 netdev_features_t changed = netdev->features ^ features;
Salil76ad4f02017-08-02 16:59:45 +01001122 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001123 struct hnae3_handle *h = priv->ae_handle;
Peng Li052ece62017-12-22 12:21:47 +08001124 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001125
Jian Shen181d4542018-01-12 16:23:16 +08001126 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1127 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1128 priv->ops.fill_desc = hns3_fill_desc_tso;
1129 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1130 } else {
1131 priv->ops.fill_desc = hns3_fill_desc;
1132 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1133 }
Salil76ad4f02017-08-02 16:59:45 +01001134 }
1135
Jian Shen181d4542018-01-12 16:23:16 +08001136 if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
1137 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1138 h->ae_algo->ops->enable_vlan_filter(h, true);
1139 else
1140 h->ae_algo->ops->enable_vlan_filter(h, false);
1141 }
Jian Shen391b5e92018-01-05 18:18:05 +08001142
Peng Li052ece62017-12-22 12:21:47 +08001143 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
1144 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1145 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1146 else
1147 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1148
1149 if (ret)
1150 return ret;
1151 }
1152
Salil76ad4f02017-08-02 16:59:45 +01001153 netdev->features = features;
1154 return 0;
1155}
1156
Peng Li6c88d9d2018-01-09 14:50:59 +08001157static void hns3_nic_get_stats64(struct net_device *netdev,
1158 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001159{
1160 struct hns3_nic_priv *priv = netdev_priv(netdev);
1161 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001162 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001163 struct hns3_enet_ring *ring;
1164 unsigned int start;
1165 unsigned int idx;
1166 u64 tx_bytes = 0;
1167 u64 rx_bytes = 0;
1168 u64 tx_pkts = 0;
1169 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001170 u64 tx_drop = 0;
1171 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001172
Jian Shenb875cc32018-01-05 18:18:11 +08001173 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1174 return;
1175
Jian Shenc5f65482018-01-05 18:18:10 +08001176 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1177
Salil76ad4f02017-08-02 16:59:45 +01001178 for (idx = 0; idx < queue_num; idx++) {
1179 /* fetch the tx stats */
1180 ring = priv->ring_data[idx].ring;
1181 do {
Salild36d36c2017-08-18 12:31:37 +01001182 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001183 tx_bytes += ring->stats.tx_bytes;
1184 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001185 tx_drop += ring->stats.tx_busy;
1186 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001187 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1188
1189 /* fetch the rx stats */
1190 ring = priv->ring_data[idx + queue_num].ring;
1191 do {
Salild36d36c2017-08-18 12:31:37 +01001192 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001193 rx_bytes += ring->stats.rx_bytes;
1194 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001195 rx_drop += ring->stats.non_vld_descs;
1196 rx_drop += ring->stats.err_pkt_len;
1197 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001198 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1199 }
1200
1201 stats->tx_bytes = tx_bytes;
1202 stats->tx_packets = tx_pkts;
1203 stats->rx_bytes = rx_bytes;
1204 stats->rx_packets = rx_pkts;
1205
1206 stats->rx_errors = netdev->stats.rx_errors;
1207 stats->multicast = netdev->stats.multicast;
1208 stats->rx_length_errors = netdev->stats.rx_length_errors;
1209 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1210 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1211
1212 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001213 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1214 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001215 stats->collisions = netdev->stats.collisions;
1216 stats->rx_over_errors = netdev->stats.rx_over_errors;
1217 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1218 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1219 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1220 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1221 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1222 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1223 stats->tx_window_errors = netdev->stats.tx_window_errors;
1224 stats->rx_compressed = netdev->stats.rx_compressed;
1225 stats->tx_compressed = netdev->stats.tx_compressed;
1226}
1227
1228static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1229 enum hns3_udp_tnl_type type)
1230{
1231 struct hns3_nic_priv *priv = netdev_priv(netdev);
1232 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1233 struct hnae3_handle *h = priv->ae_handle;
1234
1235 if (udp_tnl->used && udp_tnl->dst_port == port) {
1236 udp_tnl->used++;
1237 return;
1238 }
1239
1240 if (udp_tnl->used) {
1241 netdev_warn(netdev,
1242 "UDP tunnel [%d], port [%d] offload\n", type, port);
1243 return;
1244 }
1245
1246 udp_tnl->dst_port = port;
1247 udp_tnl->used = 1;
1248 /* TBD send command to hardware to add port */
1249 if (h->ae_algo->ops->add_tunnel_udp)
1250 h->ae_algo->ops->add_tunnel_udp(h, port);
1251}
1252
1253static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1254 enum hns3_udp_tnl_type type)
1255{
1256 struct hns3_nic_priv *priv = netdev_priv(netdev);
1257 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1258 struct hnae3_handle *h = priv->ae_handle;
1259
1260 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1261 netdev_warn(netdev,
1262 "Invalid UDP tunnel port %d\n", port);
1263 return;
1264 }
1265
1266 udp_tnl->used--;
1267 if (udp_tnl->used)
1268 return;
1269
1270 udp_tnl->dst_port = 0;
1271 /* TBD send command to hardware to del port */
1272 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001273 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001274}
1275
1276/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1277 * @netdev: This physical ports's netdev
1278 * @ti: Tunnel information
1279 */
1280static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1281 struct udp_tunnel_info *ti)
1282{
1283 u16 port_n = ntohs(ti->port);
1284
1285 switch (ti->type) {
1286 case UDP_TUNNEL_TYPE_VXLAN:
1287 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1288 break;
1289 case UDP_TUNNEL_TYPE_GENEVE:
1290 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1291 break;
1292 default:
1293 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1294 break;
1295 }
1296}
1297
1298static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1299 struct udp_tunnel_info *ti)
1300{
1301 u16 port_n = ntohs(ti->port);
1302
1303 switch (ti->type) {
1304 case UDP_TUNNEL_TYPE_VXLAN:
1305 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1306 break;
1307 case UDP_TUNNEL_TYPE_GENEVE:
1308 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1309 break;
1310 default:
1311 break;
1312 }
1313}
1314
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001315static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001316{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001317 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001318 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001319 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001320 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1321 u8 tc = mqprio_qopt->qopt.num_tc;
1322 u16 mode = mqprio_qopt->mode;
1323 u8 hw = mqprio_qopt->qopt.hw;
1324 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001325 unsigned int i;
1326 int ret;
1327
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001328 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1329 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1330 return -EOPNOTSUPP;
1331
Salil76ad4f02017-08-02 16:59:45 +01001332 if (tc > HNAE3_MAX_TC)
1333 return -EINVAL;
1334
Salil76ad4f02017-08-02 16:59:45 +01001335 if (!netdev)
1336 return -EINVAL;
1337
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001338 if_running = netif_running(netdev);
1339 if (if_running) {
1340 hns3_nic_net_stop(netdev);
1341 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001342 }
1343
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001344 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1345 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001346 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001347 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001348
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001349 if (tc <= 1) {
1350 netdev_reset_tc(netdev);
1351 } else {
1352 ret = netdev_set_num_tc(netdev, tc);
1353 if (ret)
1354 goto out;
1355
1356 for (i = 0; i < HNAE3_MAX_TC; i++) {
1357 if (!kinfo->tc_info[i].enable)
1358 continue;
1359
Salil76ad4f02017-08-02 16:59:45 +01001360 netdev_set_tc_queue(netdev,
1361 kinfo->tc_info[i].tc,
1362 kinfo->tc_info[i].tqp_count,
1363 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001364 }
Salil76ad4f02017-08-02 16:59:45 +01001365 }
1366
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001367 ret = hns3_nic_set_real_num_queue(netdev);
1368
1369out:
1370 if (if_running)
1371 hns3_nic_net_open(netdev);
1372
1373 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001374}
1375
Jiri Pirko2572ac52017-08-07 10:15:17 +02001376static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001377 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001378{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001379 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001380 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001381
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001382 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001383}
1384
1385static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1386 __be16 proto, u16 vid)
1387{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001388 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001389 int ret = -EIO;
1390
1391 if (h->ae_algo->ops->set_vlan_filter)
1392 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1393
1394 return ret;
1395}
1396
1397static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1398 __be16 proto, u16 vid)
1399{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001400 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001401 int ret = -EIO;
1402
1403 if (h->ae_algo->ops->set_vlan_filter)
1404 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1405
1406 return ret;
1407}
1408
1409static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1410 u8 qos, __be16 vlan_proto)
1411{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001412 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001413 int ret = -EIO;
1414
1415 if (h->ae_algo->ops->set_vf_vlan_filter)
1416 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1417 qos, vlan_proto);
1418
1419 return ret;
1420}
1421
Salila8e8b7f2017-08-21 17:05:24 +01001422static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1423{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001424 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001425 bool if_running = netif_running(netdev);
1426 int ret;
1427
1428 if (!h->ae_algo->ops->set_mtu)
1429 return -EOPNOTSUPP;
1430
1431 /* if this was called with netdev up then bring netdevice down */
1432 if (if_running) {
1433 (void)hns3_nic_net_stop(netdev);
1434 msleep(100);
1435 }
1436
1437 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1438 if (ret) {
1439 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1440 ret);
1441 return ret;
1442 }
1443
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001444 netdev->mtu = new_mtu;
1445
Salila8e8b7f2017-08-21 17:05:24 +01001446 /* if the netdev was running earlier, bring it up again */
1447 if (if_running && hns3_nic_net_open(netdev))
1448 ret = -EINVAL;
1449
1450 return ret;
1451}
1452
Lipengf8fa222c2017-11-02 20:45:20 +08001453static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1454{
1455 struct hns3_nic_priv *priv = netdev_priv(ndev);
1456 struct hns3_enet_ring *tx_ring = NULL;
1457 int timeout_queue = 0;
1458 int hw_head, hw_tail;
1459 int i;
1460
1461 /* Find the stopped queue the same way the stack does */
1462 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1463 struct netdev_queue *q;
1464 unsigned long trans_start;
1465
1466 q = netdev_get_tx_queue(ndev, i);
1467 trans_start = q->trans_start;
1468 if (netif_xmit_stopped(q) &&
1469 time_after(jiffies,
1470 (trans_start + ndev->watchdog_timeo))) {
1471 timeout_queue = i;
1472 break;
1473 }
1474 }
1475
1476 if (i == ndev->num_tx_queues) {
1477 netdev_info(ndev,
1478 "no netdev TX timeout queue found, timeout count: %llu\n",
1479 priv->tx_timeout_count);
1480 return false;
1481 }
1482
1483 tx_ring = priv->ring_data[timeout_queue].ring;
1484
1485 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1486 HNS3_RING_TX_RING_HEAD_REG);
1487 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1488 HNS3_RING_TX_RING_TAIL_REG);
1489 netdev_info(ndev,
1490 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1491 priv->tx_timeout_count,
1492 timeout_queue,
1493 tx_ring->next_to_use,
1494 tx_ring->next_to_clean,
1495 hw_head,
1496 hw_tail,
1497 readl(tx_ring->tqp_vector->mask_addr));
1498
1499 return true;
1500}
1501
1502static void hns3_nic_net_timeout(struct net_device *ndev)
1503{
1504 struct hns3_nic_priv *priv = netdev_priv(ndev);
1505 unsigned long last_reset_time = priv->last_reset_time;
1506 struct hnae3_handle *h = priv->ae_handle;
1507
1508 if (!hns3_get_tx_timeo_queue_info(ndev))
1509 return;
1510
1511 priv->tx_timeout_count++;
1512
1513 /* This timeout is far away enough from last timeout,
1514 * if timeout again,set the reset type to PF reset
1515 */
1516 if (time_after(jiffies, (last_reset_time + 20 * HZ)))
1517 priv->reset_level = HNAE3_FUNC_RESET;
1518
1519 /* Don't do any new action before the next timeout */
1520 else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo)))
1521 return;
1522
1523 priv->last_reset_time = jiffies;
1524
1525 if (h->ae_algo->ops->reset_event)
1526 h->ae_algo->ops->reset_event(h, priv->reset_level);
1527
1528 priv->reset_level++;
1529 if (priv->reset_level > HNAE3_GLOBAL_RESET)
1530 priv->reset_level = HNAE3_GLOBAL_RESET;
1531}
1532
Salil76ad4f02017-08-02 16:59:45 +01001533static const struct net_device_ops hns3_nic_netdev_ops = {
1534 .ndo_open = hns3_nic_net_open,
1535 .ndo_stop = hns3_nic_net_stop,
1536 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001537 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001538 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001539 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001540 .ndo_set_features = hns3_nic_set_features,
1541 .ndo_get_stats64 = hns3_nic_get_stats64,
1542 .ndo_setup_tc = hns3_nic_setup_tc,
1543 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1544 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1545 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1546 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1547 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1548 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1549};
1550
1551/* hns3_probe - Device initialization routine
1552 * @pdev: PCI device information struct
1553 * @ent: entry in hns3_pci_tbl
1554 *
1555 * hns3_probe initializes a PF identified by a pci_dev structure.
1556 * The OS initialization, configuring of the PF private structure,
1557 * and a hardware reset occur.
1558 *
1559 * Returns 0 on success, negative on failure
1560 */
1561static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1562{
1563 struct hnae3_ae_dev *ae_dev;
1564 int ret;
1565
1566 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1567 GFP_KERNEL);
1568 if (!ae_dev) {
1569 ret = -ENOMEM;
1570 return ret;
1571 }
1572
1573 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001574 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001575 ae_dev->dev_type = HNAE3_DEV_KNIC;
1576 pci_set_drvdata(pdev, ae_dev);
1577
1578 return hnae3_register_ae_dev(ae_dev);
1579}
1580
1581/* hns3_remove - Device removal routine
1582 * @pdev: PCI device information struct
1583 */
1584static void hns3_remove(struct pci_dev *pdev)
1585{
1586 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1587
1588 hnae3_unregister_ae_dev(ae_dev);
1589
1590 devm_kfree(&pdev->dev, ae_dev);
1591
1592 pci_set_drvdata(pdev, NULL);
1593}
1594
1595static struct pci_driver hns3_driver = {
1596 .name = hns3_driver_name,
1597 .id_table = hns3_pci_tbl,
1598 .probe = hns3_probe,
1599 .remove = hns3_remove,
1600};
1601
1602/* set default feature to hns3 */
1603static void hns3_set_default_feature(struct net_device *netdev)
1604{
Jian Shen391b5e92018-01-05 18:18:05 +08001605 struct hnae3_handle *h = hns3_get_handle(netdev);
1606
Salil76ad4f02017-08-02 16:59:45 +01001607 netdev->priv_flags |= IFF_UNICAST_FLT;
1608
1609 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1610 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1611 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1612 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1613 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1614
1615 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1616
1617 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1618
1619 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1620 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001621 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001622 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1623 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1624 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1625 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1626
1627 netdev->vlan_features |=
1628 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1629 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1630 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1631 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1632 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1633
1634 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Jian Shen30ba2ab2018-01-05 18:18:06 +08001635 NETIF_F_HW_VLAN_CTAG_TX |
Salil76ad4f02017-08-02 16:59:45 +01001636 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1637 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1638 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1639 NETIF_F_GSO_UDP_TUNNEL_CSUM;
Jian Shen391b5e92018-01-05 18:18:05 +08001640
1641 if (!(h->flags & HNAE3_SUPPORT_VF))
Jian Shen30ba2ab2018-01-05 18:18:06 +08001642 netdev->hw_features |=
1643 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Salil76ad4f02017-08-02 16:59:45 +01001644}
1645
1646static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1647 struct hns3_desc_cb *cb)
1648{
1649 unsigned int order = hnae_page_order(ring);
1650 struct page *p;
1651
1652 p = dev_alloc_pages(order);
1653 if (!p)
1654 return -ENOMEM;
1655
1656 cb->priv = p;
1657 cb->page_offset = 0;
1658 cb->reuse_flag = 0;
1659 cb->buf = page_address(p);
1660 cb->length = hnae_page_size(ring);
1661 cb->type = DESC_TYPE_PAGE;
1662
Salil76ad4f02017-08-02 16:59:45 +01001663 return 0;
1664}
1665
1666static void hns3_free_buffer(struct hns3_enet_ring *ring,
1667 struct hns3_desc_cb *cb)
1668{
1669 if (cb->type == DESC_TYPE_SKB)
1670 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1671 else if (!HNAE3_IS_TX_RING(ring))
1672 put_page((struct page *)cb->priv);
1673 memset(cb, 0, sizeof(*cb));
1674}
1675
1676static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1677{
1678 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1679 cb->length, ring_to_dma_dir(ring));
1680
1681 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1682 return -EIO;
1683
1684 return 0;
1685}
1686
1687static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1688 struct hns3_desc_cb *cb)
1689{
1690 if (cb->type == DESC_TYPE_SKB)
1691 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1692 ring_to_dma_dir(ring));
1693 else
1694 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1695 ring_to_dma_dir(ring));
1696}
1697
1698static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1699{
1700 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1701 ring->desc[i].addr = 0;
1702}
1703
1704static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1705{
1706 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1707
1708 if (!ring->desc_cb[i].dma)
1709 return;
1710
1711 hns3_buffer_detach(ring, i);
1712 hns3_free_buffer(ring, cb);
1713}
1714
1715static void hns3_free_buffers(struct hns3_enet_ring *ring)
1716{
1717 int i;
1718
1719 for (i = 0; i < ring->desc_num; i++)
1720 hns3_free_buffer_detach(ring, i);
1721}
1722
1723/* free desc along with its attached buffer */
1724static void hns3_free_desc(struct hns3_enet_ring *ring)
1725{
1726 hns3_free_buffers(ring);
1727
1728 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1729 ring->desc_num * sizeof(ring->desc[0]),
1730 DMA_BIDIRECTIONAL);
1731 ring->desc_dma_addr = 0;
1732 kfree(ring->desc);
1733 ring->desc = NULL;
1734}
1735
1736static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1737{
1738 int size = ring->desc_num * sizeof(ring->desc[0]);
1739
1740 ring->desc = kzalloc(size, GFP_KERNEL);
1741 if (!ring->desc)
1742 return -ENOMEM;
1743
1744 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1745 size, DMA_BIDIRECTIONAL);
1746 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1747 ring->desc_dma_addr = 0;
1748 kfree(ring->desc);
1749 ring->desc = NULL;
1750 return -ENOMEM;
1751 }
1752
1753 return 0;
1754}
1755
1756static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1757 struct hns3_desc_cb *cb)
1758{
1759 int ret;
1760
1761 ret = hns3_alloc_buffer(ring, cb);
1762 if (ret)
1763 goto out;
1764
1765 ret = hns3_map_buffer(ring, cb);
1766 if (ret)
1767 goto out_with_buf;
1768
1769 return 0;
1770
1771out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001772 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001773out:
1774 return ret;
1775}
1776
1777static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1778{
1779 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1780
1781 if (ret)
1782 return ret;
1783
1784 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1785
1786 return 0;
1787}
1788
1789/* Allocate memory for raw pkg, and map with dma */
1790static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1791{
1792 int i, j, ret;
1793
1794 for (i = 0; i < ring->desc_num; i++) {
1795 ret = hns3_alloc_buffer_attach(ring, i);
1796 if (ret)
1797 goto out_buffer_fail;
1798 }
1799
1800 return 0;
1801
1802out_buffer_fail:
1803 for (j = i - 1; j >= 0; j--)
1804 hns3_free_buffer_detach(ring, j);
1805 return ret;
1806}
1807
1808/* detach a in-used buffer and replace with a reserved one */
1809static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1810 struct hns3_desc_cb *res_cb)
1811{
Lipengb9077422017-10-23 19:51:01 +08001812 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001813 ring->desc_cb[i] = *res_cb;
1814 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1815}
1816
1817static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1818{
1819 ring->desc_cb[i].reuse_flag = 0;
1820 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1821 + ring->desc_cb[i].page_offset);
1822}
1823
1824static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1825 int *pkts)
1826{
1827 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1828
1829 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1830 (*bytes) += desc_cb->length;
1831 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1832 hns3_free_buffer_detach(ring, ring->next_to_clean);
1833
1834 ring_ptr_move_fw(ring, next_to_clean);
1835}
1836
1837static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1838{
1839 int u = ring->next_to_use;
1840 int c = ring->next_to_clean;
1841
1842 if (unlikely(h > ring->desc_num))
1843 return 0;
1844
1845 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1846}
1847
Lipeng24e750c2017-10-23 19:51:07 +08001848bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001849{
1850 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1851 struct netdev_queue *dev_queue;
1852 int bytes, pkts;
1853 int head;
1854
1855 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1856 rmb(); /* Make sure head is ready before touch any data */
1857
1858 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001859 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001860
1861 if (!is_valid_clean_head(ring, head)) {
1862 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1863 ring->next_to_use, ring->next_to_clean);
1864
1865 u64_stats_update_begin(&ring->syncp);
1866 ring->stats.io_err_cnt++;
1867 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001868 return true;
Salil76ad4f02017-08-02 16:59:45 +01001869 }
1870
1871 bytes = 0;
1872 pkts = 0;
1873 while (head != ring->next_to_clean && budget) {
1874 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1875 /* Issue prefetch for next Tx descriptor */
1876 prefetch(&ring->desc_cb[ring->next_to_clean]);
1877 budget--;
1878 }
1879
1880 ring->tqp_vector->tx_group.total_bytes += bytes;
1881 ring->tqp_vector->tx_group.total_packets += pkts;
1882
1883 u64_stats_update_begin(&ring->syncp);
1884 ring->stats.tx_bytes += bytes;
1885 ring->stats.tx_pkts += pkts;
1886 u64_stats_update_end(&ring->syncp);
1887
1888 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1889 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1890
1891 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1892 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1893 /* Make sure that anybody stopping the queue after this
1894 * sees the new next_to_clean.
1895 */
1896 smp_mb();
1897 if (netif_tx_queue_stopped(dev_queue)) {
1898 netif_tx_wake_queue(dev_queue);
1899 ring->stats.restart_queue++;
1900 }
1901 }
1902
1903 return !!budget;
1904}
1905
1906static int hns3_desc_unused(struct hns3_enet_ring *ring)
1907{
1908 int ntc = ring->next_to_clean;
1909 int ntu = ring->next_to_use;
1910
1911 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1912}
1913
1914static void
1915hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1916{
1917 struct hns3_desc_cb *desc_cb;
1918 struct hns3_desc_cb res_cbs;
1919 int i, ret;
1920
1921 for (i = 0; i < cleand_count; i++) {
1922 desc_cb = &ring->desc_cb[ring->next_to_use];
1923 if (desc_cb->reuse_flag) {
1924 u64_stats_update_begin(&ring->syncp);
1925 ring->stats.reuse_pg_cnt++;
1926 u64_stats_update_end(&ring->syncp);
1927
1928 hns3_reuse_buffer(ring, ring->next_to_use);
1929 } else {
1930 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1931 if (ret) {
1932 u64_stats_update_begin(&ring->syncp);
1933 ring->stats.sw_err_cnt++;
1934 u64_stats_update_end(&ring->syncp);
1935
1936 netdev_err(ring->tqp->handle->kinfo.netdev,
1937 "hnae reserve buffer map failed.\n");
1938 break;
1939 }
1940 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1941 }
1942
1943 ring_ptr_move_fw(ring, next_to_use);
1944 }
1945
1946 wmb(); /* Make all data has been write before submit */
1947 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1948}
1949
1950/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1951 * @data: pointer to the start of the headers
1952 * @max: total length of section to find headers in
1953 *
1954 * This function is meant to determine the length of headers that will
1955 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1956 * motivation of doing this is to only perform one pull for IPv4 TCP
1957 * packets so that we can do basic things like calculating the gso_size
1958 * based on the average data per packet.
1959 */
1960static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
1961 unsigned int max_size)
1962{
1963 unsigned char *network;
1964 u8 hlen;
1965
1966 /* This should never happen, but better safe than sorry */
1967 if (max_size < ETH_HLEN)
1968 return max_size;
1969
1970 /* Initialize network frame pointer */
1971 network = data;
1972
1973 /* Set first protocol and move network header forward */
1974 network += ETH_HLEN;
1975
1976 /* Handle any vlan tag if present */
1977 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
1978 == HNS3_RX_FLAG_VLAN_PRESENT) {
1979 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
1980 return max_size;
1981
1982 network += VLAN_HLEN;
1983 }
1984
1985 /* Handle L3 protocols */
1986 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
1987 == HNS3_RX_FLAG_L3ID_IPV4) {
1988 if ((typeof(max_size))(network - data) >
1989 (max_size - sizeof(struct iphdr)))
1990 return max_size;
1991
1992 /* Access ihl as a u8 to avoid unaligned access on ia64 */
1993 hlen = (network[0] & 0x0F) << 2;
1994
1995 /* Verify hlen meets minimum size requirements */
1996 if (hlen < sizeof(struct iphdr))
1997 return network - data;
1998
1999 /* Record next protocol if header is present */
2000 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2001 == HNS3_RX_FLAG_L3ID_IPV6) {
2002 if ((typeof(max_size))(network - data) >
2003 (max_size - sizeof(struct ipv6hdr)))
2004 return max_size;
2005
2006 /* Record next protocol */
2007 hlen = sizeof(struct ipv6hdr);
2008 } else {
2009 return network - data;
2010 }
2011
2012 /* Relocate pointer to start of L4 header */
2013 network += hlen;
2014
2015 /* Finally sort out TCP/UDP */
2016 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2017 == HNS3_RX_FLAG_L4ID_TCP) {
2018 if ((typeof(max_size))(network - data) >
2019 (max_size - sizeof(struct tcphdr)))
2020 return max_size;
2021
2022 /* Access doff as a u8 to avoid unaligned access on ia64 */
2023 hlen = (network[12] & 0xF0) >> 2;
2024
2025 /* Verify hlen meets minimum size requirements */
2026 if (hlen < sizeof(struct tcphdr))
2027 return network - data;
2028
2029 network += hlen;
2030 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2031 == HNS3_RX_FLAG_L4ID_UDP) {
2032 if ((typeof(max_size))(network - data) >
2033 (max_size - sizeof(struct udphdr)))
2034 return max_size;
2035
2036 network += sizeof(struct udphdr);
2037 }
2038
2039 /* If everything has gone correctly network should be the
2040 * data section of the packet and will be the end of the header.
2041 * If not then it probably represents the end of the last recognized
2042 * header.
2043 */
2044 if ((typeof(max_size))(network - data) < max_size)
2045 return network - data;
2046 else
2047 return max_size;
2048}
2049
2050static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2051 struct hns3_enet_ring *ring, int pull_len,
2052 struct hns3_desc_cb *desc_cb)
2053{
2054 struct hns3_desc *desc;
2055 int truesize, size;
2056 int last_offset;
2057 bool twobufs;
2058
2059 twobufs = ((PAGE_SIZE < 8192) &&
2060 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2061
2062 desc = &ring->desc[ring->next_to_clean];
2063 size = le16_to_cpu(desc->rx.size);
2064
2065 if (twobufs) {
2066 truesize = hnae_buf_size(ring);
2067 } else {
2068 truesize = ALIGN(size, L1_CACHE_BYTES);
2069 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
2070 }
2071
2072 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2073 size - pull_len, truesize - pull_len);
2074
2075 /* Avoid re-using remote pages,flag default unreuse */
2076 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2077 return;
2078
2079 if (twobufs) {
2080 /* If we are only owner of page we can reuse it */
2081 if (likely(page_count(desc_cb->priv) == 1)) {
2082 /* Flip page offset to other buffer */
2083 desc_cb->page_offset ^= truesize;
2084
2085 desc_cb->reuse_flag = 1;
2086 /* bump ref count on page before it is given*/
2087 get_page(desc_cb->priv);
2088 }
2089 return;
2090 }
2091
2092 /* Move offset up to the next cache line */
2093 desc_cb->page_offset += truesize;
2094
2095 if (desc_cb->page_offset <= last_offset) {
2096 desc_cb->reuse_flag = 1;
2097 /* Bump ref count on page before it is given*/
2098 get_page(desc_cb->priv);
2099 }
2100}
2101
2102static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2103 struct hns3_desc *desc)
2104{
2105 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2106 int l3_type, l4_type;
2107 u32 bd_base_info;
2108 int ol4_type;
2109 u32 l234info;
2110
2111 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2112 l234info = le32_to_cpu(desc->rx.l234_info);
2113
2114 skb->ip_summed = CHECKSUM_NONE;
2115
2116 skb_checksum_none_assert(skb);
2117
2118 if (!(netdev->features & NETIF_F_RXCSUM))
2119 return;
2120
2121 /* check if hardware has done checksum */
2122 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2123 return;
2124
2125 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2126 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2127 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2128 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2129 netdev_err(netdev, "L3/L4 error pkt\n");
2130 u64_stats_update_begin(&ring->syncp);
2131 ring->stats.l3l4_csum_err++;
2132 u64_stats_update_end(&ring->syncp);
2133
2134 return;
2135 }
2136
2137 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2138 HNS3_RXD_L3ID_S);
2139 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2140 HNS3_RXD_L4ID_S);
2141
2142 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2143 switch (ol4_type) {
2144 case HNS3_OL4_TYPE_MAC_IN_UDP:
2145 case HNS3_OL4_TYPE_NVGRE:
2146 skb->csum_level = 1;
2147 case HNS3_OL4_TYPE_NO_TUN:
2148 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2149 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2150 (l3_type == HNS3_L3_TYPE_IPV6 &&
2151 (l4_type == HNS3_L4_TYPE_UDP ||
2152 l4_type == HNS3_L4_TYPE_TCP ||
2153 l4_type == HNS3_L4_TYPE_SCTP)))
2154 skb->ip_summed = CHECKSUM_UNNECESSARY;
2155 break;
2156 }
2157}
2158
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002159static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2160{
2161 napi_gro_receive(&ring->tqp_vector->napi, skb);
2162}
2163
Salil76ad4f02017-08-02 16:59:45 +01002164static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2165 struct sk_buff **out_skb, int *out_bnum)
2166{
2167 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2168 struct hns3_desc_cb *desc_cb;
2169 struct hns3_desc *desc;
2170 struct sk_buff *skb;
2171 unsigned char *va;
2172 u32 bd_base_info;
2173 int pull_len;
2174 u32 l234info;
2175 int length;
2176 int bnum;
2177
2178 desc = &ring->desc[ring->next_to_clean];
2179 desc_cb = &ring->desc_cb[ring->next_to_clean];
2180
2181 prefetch(desc);
2182
2183 length = le16_to_cpu(desc->rx.pkt_len);
2184 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2185 l234info = le32_to_cpu(desc->rx.l234_info);
2186
2187 /* Check valid BD */
2188 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2189 return -EFAULT;
2190
2191 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2192
2193 /* Prefetch first cache line of first page
2194 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2195 * line size is 64B so need to prefetch twice to make it 128B. But in
2196 * actual we can have greater size of caches with 128B Level 1 cache
2197 * lines. In such a case, single fetch would suffice to cache in the
2198 * relevant part of the header.
2199 */
2200 prefetch(va);
2201#if L1_CACHE_BYTES < 128
2202 prefetch(va + L1_CACHE_BYTES);
2203#endif
2204
2205 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2206 HNS3_RX_HEAD_SIZE);
2207 if (unlikely(!skb)) {
2208 netdev_err(netdev, "alloc rx skb fail\n");
2209
2210 u64_stats_update_begin(&ring->syncp);
2211 ring->stats.sw_err_cnt++;
2212 u64_stats_update_end(&ring->syncp);
2213
2214 return -ENOMEM;
2215 }
2216
2217 prefetchw(skb->data);
2218
Peng Li9699cff2017-12-22 12:21:48 +08002219 /* Based on hw strategy, the tag offloaded will be stored at
2220 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2221 * in one layer tag case.
2222 */
2223 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2224 u16 vlan_tag;
2225
2226 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2227 if (!(vlan_tag & VLAN_VID_MASK))
2228 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2229 if (vlan_tag & VLAN_VID_MASK)
2230 __vlan_hwaccel_put_tag(skb,
2231 htons(ETH_P_8021Q),
2232 vlan_tag);
2233 }
2234
Salil76ad4f02017-08-02 16:59:45 +01002235 bnum = 1;
2236 if (length <= HNS3_RX_HEAD_SIZE) {
2237 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2238
2239 /* We can reuse buffer as-is, just make sure it is local */
2240 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2241 desc_cb->reuse_flag = 1;
2242 else /* This page cannot be reused so discard it */
2243 put_page(desc_cb->priv);
2244
2245 ring_ptr_move_fw(ring, next_to_clean);
2246 } else {
2247 u64_stats_update_begin(&ring->syncp);
2248 ring->stats.seg_pkt_cnt++;
2249 u64_stats_update_end(&ring->syncp);
2250
2251 pull_len = hns3_nic_get_headlen(va, l234info,
2252 HNS3_RX_HEAD_SIZE);
2253 memcpy(__skb_put(skb, pull_len), va,
2254 ALIGN(pull_len, sizeof(long)));
2255
2256 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2257 ring_ptr_move_fw(ring, next_to_clean);
2258
2259 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2260 desc = &ring->desc[ring->next_to_clean];
2261 desc_cb = &ring->desc_cb[ring->next_to_clean];
2262 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2263 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2264 ring_ptr_move_fw(ring, next_to_clean);
2265 bnum++;
2266 }
2267 }
2268
2269 *out_bnum = bnum;
2270
2271 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2272 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2273 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2274 u64_stats_update_begin(&ring->syncp);
2275 ring->stats.non_vld_descs++;
2276 u64_stats_update_end(&ring->syncp);
2277
2278 dev_kfree_skb_any(skb);
2279 return -EINVAL;
2280 }
2281
2282 if (unlikely((!desc->rx.pkt_len) ||
2283 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2284 netdev_err(netdev, "truncated pkt\n");
2285 u64_stats_update_begin(&ring->syncp);
2286 ring->stats.err_pkt_len++;
2287 u64_stats_update_end(&ring->syncp);
2288
2289 dev_kfree_skb_any(skb);
2290 return -EFAULT;
2291 }
2292
2293 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2294 netdev_err(netdev, "L2 error pkt\n");
2295 u64_stats_update_begin(&ring->syncp);
2296 ring->stats.l2_err++;
2297 u64_stats_update_end(&ring->syncp);
2298
2299 dev_kfree_skb_any(skb);
2300 return -EFAULT;
2301 }
2302
2303 u64_stats_update_begin(&ring->syncp);
2304 ring->stats.rx_pkts++;
2305 ring->stats.rx_bytes += skb->len;
2306 u64_stats_update_end(&ring->syncp);
2307
2308 ring->tqp_vector->rx_group.total_bytes += skb->len;
2309
2310 hns3_rx_checksum(ring, skb, desc);
2311 return 0;
2312}
2313
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002314int hns3_clean_rx_ring(
2315 struct hns3_enet_ring *ring, int budget,
2316 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002317{
2318#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2319 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2320 int recv_pkts, recv_bds, clean_count, err;
2321 int unused_count = hns3_desc_unused(ring);
2322 struct sk_buff *skb = NULL;
2323 int num, bnum = 0;
2324
2325 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2326 rmb(); /* Make sure num taken effect before the other data is touched */
2327
2328 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2329 num -= unused_count;
2330
2331 while (recv_pkts < budget && recv_bds < num) {
2332 /* Reuse or realloc buffers */
2333 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2334 hns3_nic_alloc_rx_buffers(ring,
2335 clean_count + unused_count);
2336 clean_count = 0;
2337 unused_count = hns3_desc_unused(ring);
2338 }
2339
2340 /* Poll one pkt */
2341 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2342 if (unlikely(!skb)) /* This fault cannot be repaired */
2343 goto out;
2344
2345 recv_bds += bnum;
2346 clean_count += bnum;
2347 if (unlikely(err)) { /* Do jump the err */
2348 recv_pkts++;
2349 continue;
2350 }
2351
2352 /* Do update ip stack process */
2353 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002354 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002355
2356 recv_pkts++;
2357 }
2358
2359out:
2360 /* Make all data has been write before submit */
2361 if (clean_count + unused_count > 0)
2362 hns3_nic_alloc_rx_buffers(ring,
2363 clean_count + unused_count);
2364
2365 return recv_pkts;
2366}
2367
2368static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2369{
2370#define HNS3_RX_ULTRA_PACKET_RATE 40000
2371 enum hns3_flow_level_range new_flow_level;
2372 struct hns3_enet_tqp_vector *tqp_vector;
2373 int packets_per_secs;
2374 int bytes_per_usecs;
2375 u16 new_int_gl;
2376 int usecs;
2377
2378 if (!ring_group->int_gl)
2379 return false;
2380
2381 if (ring_group->total_packets == 0) {
2382 ring_group->int_gl = HNS3_INT_GL_50K;
2383 ring_group->flow_level = HNS3_FLOW_LOW;
2384 return true;
2385 }
2386
2387 /* Simple throttlerate management
2388 * 0-10MB/s lower (50000 ints/s)
2389 * 10-20MB/s middle (20000 ints/s)
2390 * 20-1249MB/s high (18000 ints/s)
2391 * > 40000pps ultra (8000 ints/s)
2392 */
2393 new_flow_level = ring_group->flow_level;
2394 new_int_gl = ring_group->int_gl;
2395 tqp_vector = ring_group->ring->tqp_vector;
2396 usecs = (ring_group->int_gl << 1);
2397 bytes_per_usecs = ring_group->total_bytes / usecs;
2398 /* 1000000 microseconds */
2399 packets_per_secs = ring_group->total_packets * 1000000 / usecs;
2400
2401 switch (new_flow_level) {
2402 case HNS3_FLOW_LOW:
2403 if (bytes_per_usecs > 10)
2404 new_flow_level = HNS3_FLOW_MID;
2405 break;
2406 case HNS3_FLOW_MID:
2407 if (bytes_per_usecs > 20)
2408 new_flow_level = HNS3_FLOW_HIGH;
2409 else if (bytes_per_usecs <= 10)
2410 new_flow_level = HNS3_FLOW_LOW;
2411 break;
2412 case HNS3_FLOW_HIGH:
2413 case HNS3_FLOW_ULTRA:
2414 default:
2415 if (bytes_per_usecs <= 20)
2416 new_flow_level = HNS3_FLOW_MID;
2417 break;
2418 }
2419
2420 if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&
2421 (&tqp_vector->rx_group == ring_group))
2422 new_flow_level = HNS3_FLOW_ULTRA;
2423
2424 switch (new_flow_level) {
2425 case HNS3_FLOW_LOW:
2426 new_int_gl = HNS3_INT_GL_50K;
2427 break;
2428 case HNS3_FLOW_MID:
2429 new_int_gl = HNS3_INT_GL_20K;
2430 break;
2431 case HNS3_FLOW_HIGH:
2432 new_int_gl = HNS3_INT_GL_18K;
2433 break;
2434 case HNS3_FLOW_ULTRA:
2435 new_int_gl = HNS3_INT_GL_8K;
2436 break;
2437 default:
2438 break;
2439 }
2440
2441 ring_group->total_bytes = 0;
2442 ring_group->total_packets = 0;
2443 ring_group->flow_level = new_flow_level;
2444 if (new_int_gl != ring_group->int_gl) {
2445 ring_group->int_gl = new_int_gl;
2446 return true;
2447 }
2448 return false;
2449}
2450
2451static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2452{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002453 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2454 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2455 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002456
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002457 if (rx_group->gl_adapt_enable) {
2458 rx_update = hns3_get_new_int_gl(rx_group);
2459 if (rx_update)
2460 hns3_set_vector_coalesce_rx_gl(tqp_vector,
2461 rx_group->int_gl);
2462 }
2463
2464 if (tx_group->gl_adapt_enable) {
2465 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2466 if (tx_update)
2467 hns3_set_vector_coalesce_tx_gl(tqp_vector,
2468 tx_group->int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002469 }
2470}
2471
2472static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2473{
2474 struct hns3_enet_ring *ring;
2475 int rx_pkt_total = 0;
2476
2477 struct hns3_enet_tqp_vector *tqp_vector =
2478 container_of(napi, struct hns3_enet_tqp_vector, napi);
2479 bool clean_complete = true;
2480 int rx_budget;
2481
2482 /* Since the actual Tx work is minimal, we can give the Tx a larger
2483 * budget and be more aggressive about cleaning up the Tx descriptors.
2484 */
2485 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2486 if (!hns3_clean_tx_ring(ring, budget))
2487 clean_complete = false;
2488 }
2489
2490 /* make sure rx ring budget not smaller than 1 */
2491 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2492
2493 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002494 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2495 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002496
2497 if (rx_cleaned >= rx_budget)
2498 clean_complete = false;
2499
2500 rx_pkt_total += rx_cleaned;
2501 }
2502
2503 tqp_vector->rx_group.total_packets += rx_pkt_total;
2504
2505 if (!clean_complete)
2506 return budget;
2507
2508 napi_complete(napi);
2509 hns3_update_new_int_gl(tqp_vector);
2510 hns3_mask_vector_irq(tqp_vector, 1);
2511
2512 return rx_pkt_total;
2513}
2514
2515static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2516 struct hnae3_ring_chain_node *head)
2517{
2518 struct pci_dev *pdev = tqp_vector->handle->pdev;
2519 struct hnae3_ring_chain_node *cur_chain = head;
2520 struct hnae3_ring_chain_node *chain;
2521 struct hns3_enet_ring *tx_ring;
2522 struct hns3_enet_ring *rx_ring;
2523
2524 tx_ring = tqp_vector->tx_group.ring;
2525 if (tx_ring) {
2526 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2527 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2528 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002529 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2530 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002531
2532 cur_chain->next = NULL;
2533
2534 while (tx_ring->next) {
2535 tx_ring = tx_ring->next;
2536
2537 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2538 GFP_KERNEL);
2539 if (!chain)
2540 return -ENOMEM;
2541
2542 cur_chain->next = chain;
2543 chain->tqp_index = tx_ring->tqp->tqp_index;
2544 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2545 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002546 hnae_set_field(chain->int_gl_idx,
2547 HNAE3_RING_GL_IDX_M,
2548 HNAE3_RING_GL_IDX_S,
2549 HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002550
2551 cur_chain = chain;
2552 }
2553 }
2554
2555 rx_ring = tqp_vector->rx_group.ring;
2556 if (!tx_ring && rx_ring) {
2557 cur_chain->next = NULL;
2558 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2559 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2560 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002561 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2562 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
Salil76ad4f02017-08-02 16:59:45 +01002563
2564 rx_ring = rx_ring->next;
2565 }
2566
2567 while (rx_ring) {
2568 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2569 if (!chain)
2570 return -ENOMEM;
2571
2572 cur_chain->next = chain;
2573 chain->tqp_index = rx_ring->tqp->tqp_index;
2574 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2575 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002576 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2577 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2578
Salil76ad4f02017-08-02 16:59:45 +01002579 cur_chain = chain;
2580
2581 rx_ring = rx_ring->next;
2582 }
2583
2584 return 0;
2585}
2586
2587static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2588 struct hnae3_ring_chain_node *head)
2589{
2590 struct pci_dev *pdev = tqp_vector->handle->pdev;
2591 struct hnae3_ring_chain_node *chain_tmp, *chain;
2592
2593 chain = head->next;
2594
2595 while (chain) {
2596 chain_tmp = chain->next;
2597 devm_kfree(&pdev->dev, chain);
2598 chain = chain_tmp;
2599 }
2600}
2601
2602static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2603 struct hns3_enet_ring *ring)
2604{
2605 ring->next = group->ring;
2606 group->ring = ring;
2607
2608 group->count++;
2609}
2610
2611static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2612{
2613 struct hnae3_ring_chain_node vector_ring_chain;
2614 struct hnae3_handle *h = priv->ae_handle;
2615 struct hns3_enet_tqp_vector *tqp_vector;
2616 struct hnae3_vector_info *vector;
2617 struct pci_dev *pdev = h->pdev;
2618 u16 tqp_num = h->kinfo.num_tqps;
2619 u16 vector_num;
2620 int ret = 0;
2621 u16 i;
2622
2623 /* RSS size, cpu online and vector_num should be the same */
2624 /* Should consider 2p/4p later */
2625 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2626 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2627 GFP_KERNEL);
2628 if (!vector)
2629 return -ENOMEM;
2630
2631 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2632
2633 priv->vector_num = vector_num;
2634 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2635 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2636 GFP_KERNEL);
2637 if (!priv->tqp_vector)
2638 return -ENOMEM;
2639
2640 for (i = 0; i < tqp_num; i++) {
2641 u16 vector_i = i % vector_num;
2642
2643 tqp_vector = &priv->tqp_vector[vector_i];
2644
2645 hns3_add_ring_to_group(&tqp_vector->tx_group,
2646 priv->ring_data[i].ring);
2647
2648 hns3_add_ring_to_group(&tqp_vector->rx_group,
2649 priv->ring_data[i + tqp_num].ring);
2650
2651 tqp_vector->idx = vector_i;
2652 tqp_vector->mask_addr = vector[vector_i].io_addr;
2653 tqp_vector->vector_irq = vector[vector_i].vector;
2654 tqp_vector->num_tqps++;
2655
2656 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2657 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2658 }
2659
2660 for (i = 0; i < vector_num; i++) {
2661 tqp_vector = &priv->tqp_vector[i];
2662
2663 tqp_vector->rx_group.total_bytes = 0;
2664 tqp_vector->rx_group.total_packets = 0;
2665 tqp_vector->tx_group.total_bytes = 0;
2666 tqp_vector->tx_group.total_packets = 0;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002667 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002668 tqp_vector->handle = h;
2669
2670 ret = hns3_get_vector_ring_chain(tqp_vector,
2671 &vector_ring_chain);
2672 if (ret)
2673 goto out;
2674
2675 ret = h->ae_algo->ops->map_ring_to_vector(h,
2676 tqp_vector->vector_irq, &vector_ring_chain);
2677 if (ret)
2678 goto out;
2679
2680 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2681
2682 netif_napi_add(priv->netdev, &tqp_vector->napi,
2683 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2684 }
2685
2686out:
2687 devm_kfree(&pdev->dev, vector);
2688 return ret;
2689}
2690
2691static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2692{
2693 struct hnae3_ring_chain_node vector_ring_chain;
2694 struct hnae3_handle *h = priv->ae_handle;
2695 struct hns3_enet_tqp_vector *tqp_vector;
2696 struct pci_dev *pdev = h->pdev;
2697 int i, ret;
2698
2699 for (i = 0; i < priv->vector_num; i++) {
2700 tqp_vector = &priv->tqp_vector[i];
2701
2702 ret = hns3_get_vector_ring_chain(tqp_vector,
2703 &vector_ring_chain);
2704 if (ret)
2705 return ret;
2706
2707 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2708 tqp_vector->vector_irq, &vector_ring_chain);
2709 if (ret)
2710 return ret;
2711
2712 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2713
2714 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2715 (void)irq_set_affinity_hint(
2716 priv->tqp_vector[i].vector_irq,
2717 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002718 free_irq(priv->tqp_vector[i].vector_irq,
2719 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002720 }
2721
2722 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
2723
2724 netif_napi_del(&priv->tqp_vector[i].napi);
2725 }
2726
2727 devm_kfree(&pdev->dev, priv->tqp_vector);
2728
2729 return 0;
2730}
2731
2732static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2733 int ring_type)
2734{
2735 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2736 int queue_num = priv->ae_handle->kinfo.num_tqps;
2737 struct pci_dev *pdev = priv->ae_handle->pdev;
2738 struct hns3_enet_ring *ring;
2739
2740 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2741 if (!ring)
2742 return -ENOMEM;
2743
2744 if (ring_type == HNAE3_RING_TYPE_TX) {
2745 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002746 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002747 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2748 } else {
2749 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002750 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002751 ring->io_base = q->io_base;
2752 }
2753
2754 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2755
Salil76ad4f02017-08-02 16:59:45 +01002756 ring->tqp = q;
2757 ring->desc = NULL;
2758 ring->desc_cb = NULL;
2759 ring->dev = priv->dev;
2760 ring->desc_dma_addr = 0;
2761 ring->buf_size = q->buf_size;
2762 ring->desc_num = q->desc_num;
2763 ring->next_to_use = 0;
2764 ring->next_to_clean = 0;
2765
2766 return 0;
2767}
2768
2769static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2770 struct hns3_nic_priv *priv)
2771{
2772 int ret;
2773
2774 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2775 if (ret)
2776 return ret;
2777
2778 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2779 if (ret)
2780 return ret;
2781
2782 return 0;
2783}
2784
2785static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2786{
2787 struct hnae3_handle *h = priv->ae_handle;
2788 struct pci_dev *pdev = h->pdev;
2789 int i, ret;
2790
2791 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2792 sizeof(*priv->ring_data) * 2,
2793 GFP_KERNEL);
2794 if (!priv->ring_data)
2795 return -ENOMEM;
2796
2797 for (i = 0; i < h->kinfo.num_tqps; i++) {
2798 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2799 if (ret)
2800 goto err;
2801 }
2802
2803 return 0;
2804err:
2805 devm_kfree(&pdev->dev, priv->ring_data);
2806 return ret;
2807}
2808
Peng Li09f2af62017-12-22 12:21:41 +08002809static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2810{
2811 struct hnae3_handle *h = priv->ae_handle;
2812 int i;
2813
2814 for (i = 0; i < h->kinfo.num_tqps; i++) {
2815 devm_kfree(priv->dev, priv->ring_data[i].ring);
2816 devm_kfree(priv->dev,
2817 priv->ring_data[i + h->kinfo.num_tqps].ring);
2818 }
2819 devm_kfree(priv->dev, priv->ring_data);
2820}
2821
Salil76ad4f02017-08-02 16:59:45 +01002822static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2823{
2824 int ret;
2825
2826 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2827 return -EINVAL;
2828
2829 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2830 GFP_KERNEL);
2831 if (!ring->desc_cb) {
2832 ret = -ENOMEM;
2833 goto out;
2834 }
2835
2836 ret = hns3_alloc_desc(ring);
2837 if (ret)
2838 goto out_with_desc_cb;
2839
2840 if (!HNAE3_IS_TX_RING(ring)) {
2841 ret = hns3_alloc_ring_buffers(ring);
2842 if (ret)
2843 goto out_with_desc;
2844 }
2845
2846 return 0;
2847
2848out_with_desc:
2849 hns3_free_desc(ring);
2850out_with_desc_cb:
2851 kfree(ring->desc_cb);
2852 ring->desc_cb = NULL;
2853out:
2854 return ret;
2855}
2856
2857static void hns3_fini_ring(struct hns3_enet_ring *ring)
2858{
2859 hns3_free_desc(ring);
2860 kfree(ring->desc_cb);
2861 ring->desc_cb = NULL;
2862 ring->next_to_clean = 0;
2863 ring->next_to_use = 0;
2864}
2865
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002866static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002867{
2868 int bd_size_type;
2869
2870 switch (buf_size) {
2871 case 512:
2872 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2873 break;
2874 case 1024:
2875 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2876 break;
2877 case 2048:
2878 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2879 break;
2880 case 4096:
2881 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2882 break;
2883 default:
2884 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2885 }
2886
2887 return bd_size_type;
2888}
2889
2890static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2891{
2892 dma_addr_t dma = ring->desc_dma_addr;
2893 struct hnae3_queue *q = ring->tqp;
2894
2895 if (!HNAE3_IS_TX_RING(ring)) {
2896 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2897 (u32)dma);
2898 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2899 (u32)((dma >> 31) >> 1));
2900
2901 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2902 hns3_buf_size2type(ring->buf_size));
2903 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2904 ring->desc_num / 8 - 1);
2905
2906 } else {
2907 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2908 (u32)dma);
2909 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2910 (u32)((dma >> 31) >> 1));
2911
2912 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
2913 hns3_buf_size2type(ring->buf_size));
2914 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
2915 ring->desc_num / 8 - 1);
2916 }
2917}
2918
Lipeng5668abd2017-10-10 16:42:04 +08002919int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002920{
2921 struct hnae3_handle *h = priv->ae_handle;
2922 int ring_num = h->kinfo.num_tqps * 2;
2923 int i, j;
2924 int ret;
2925
2926 for (i = 0; i < ring_num; i++) {
2927 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
2928 if (ret) {
2929 dev_err(priv->dev,
2930 "Alloc ring memory fail! ret=%d\n", ret);
2931 goto out_when_alloc_ring_memory;
2932 }
2933
2934 hns3_init_ring_hw(priv->ring_data[i].ring);
2935
2936 u64_stats_init(&priv->ring_data[i].ring->syncp);
2937 }
2938
2939 return 0;
2940
2941out_when_alloc_ring_memory:
2942 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08002943 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01002944
2945 return -ENOMEM;
2946}
2947
Lipeng5668abd2017-10-10 16:42:04 +08002948int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002949{
2950 struct hnae3_handle *h = priv->ae_handle;
2951 int i;
2952
2953 for (i = 0; i < h->kinfo.num_tqps; i++) {
2954 if (h->ae_algo->ops->reset_queue)
2955 h->ae_algo->ops->reset_queue(h, i);
2956
2957 hns3_fini_ring(priv->ring_data[i].ring);
Peng Li99fdf6b2017-12-22 12:21:43 +08002958 devm_kfree(priv->dev, priv->ring_data[i].ring);
Salil76ad4f02017-08-02 16:59:45 +01002959 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
Peng Li99fdf6b2017-12-22 12:21:43 +08002960 devm_kfree(priv->dev,
2961 priv->ring_data[i + h->kinfo.num_tqps].ring);
Salil76ad4f02017-08-02 16:59:45 +01002962 }
Peng Li99fdf6b2017-12-22 12:21:43 +08002963 devm_kfree(priv->dev, priv->ring_data);
Salil76ad4f02017-08-02 16:59:45 +01002964
2965 return 0;
2966}
2967
2968/* Set mac addr if it is configured. or leave it to the AE driver */
2969static void hns3_init_mac_addr(struct net_device *netdev)
2970{
2971 struct hns3_nic_priv *priv = netdev_priv(netdev);
2972 struct hnae3_handle *h = priv->ae_handle;
2973 u8 mac_addr_temp[ETH_ALEN];
2974
2975 if (h->ae_algo->ops->get_mac_addr) {
2976 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
2977 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
2978 }
2979
2980 /* Check if the MAC address is valid, if not get a random one */
2981 if (!is_valid_ether_addr(netdev->dev_addr)) {
2982 eth_hw_addr_random(netdev);
2983 dev_warn(priv->dev, "using random MAC address %pM\n",
2984 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01002985 }
Lipeng139e8792017-09-19 17:17:13 +01002986
2987 if (h->ae_algo->ops->set_mac_addr)
2988 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr);
2989
Salil76ad4f02017-08-02 16:59:45 +01002990}
2991
2992static void hns3_nic_set_priv_ops(struct net_device *netdev)
2993{
2994 struct hns3_nic_priv *priv = netdev_priv(netdev);
2995
2996 if ((netdev->features & NETIF_F_TSO) ||
2997 (netdev->features & NETIF_F_TSO6)) {
2998 priv->ops.fill_desc = hns3_fill_desc_tso;
2999 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3000 } else {
3001 priv->ops.fill_desc = hns3_fill_desc;
3002 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3003 }
3004}
3005
3006static int hns3_client_init(struct hnae3_handle *handle)
3007{
3008 struct pci_dev *pdev = handle->pdev;
3009 struct hns3_nic_priv *priv;
3010 struct net_device *netdev;
3011 int ret;
3012
3013 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
3014 handle->kinfo.num_tqps);
3015 if (!netdev)
3016 return -ENOMEM;
3017
3018 priv = netdev_priv(netdev);
3019 priv->dev = &pdev->dev;
3020 priv->netdev = netdev;
3021 priv->ae_handle = handle;
Lipengf8fa222c2017-11-02 20:45:20 +08003022 priv->last_reset_time = jiffies;
3023 priv->reset_level = HNAE3_FUNC_RESET;
3024 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003025
3026 handle->kinfo.netdev = netdev;
3027 handle->priv = (void *)priv;
3028
3029 hns3_init_mac_addr(netdev);
3030
3031 hns3_set_default_feature(netdev);
3032
3033 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3034 netdev->priv_flags |= IFF_UNICAST_FLT;
3035 netdev->netdev_ops = &hns3_nic_netdev_ops;
3036 SET_NETDEV_DEV(netdev, &pdev->dev);
3037 hns3_ethtool_set_ops(netdev);
3038 hns3_nic_set_priv_ops(netdev);
3039
3040 /* Carrier off reporting is important to ethtool even BEFORE open */
3041 netif_carrier_off(netdev);
3042
3043 ret = hns3_get_ring_config(priv);
3044 if (ret) {
3045 ret = -ENOMEM;
3046 goto out_get_ring_cfg;
3047 }
3048
3049 ret = hns3_nic_init_vector_data(priv);
3050 if (ret) {
3051 ret = -ENOMEM;
3052 goto out_init_vector_data;
3053 }
3054
3055 ret = hns3_init_all_ring(priv);
3056 if (ret) {
3057 ret = -ENOMEM;
3058 goto out_init_ring_data;
3059 }
3060
3061 ret = register_netdev(netdev);
3062 if (ret) {
3063 dev_err(priv->dev, "probe register netdev fail!\n");
3064 goto out_reg_netdev_fail;
3065 }
3066
Yunsheng Lin986743d2017-09-27 09:45:30 +08003067 hns3_dcbnl_setup(handle);
3068
Salila8e8b7f2017-08-21 17:05:24 +01003069 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3070 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3071
Salil76ad4f02017-08-02 16:59:45 +01003072 return ret;
3073
3074out_reg_netdev_fail:
3075out_init_ring_data:
3076 (void)hns3_nic_uninit_vector_data(priv);
3077 priv->ring_data = NULL;
3078out_init_vector_data:
3079out_get_ring_cfg:
3080 priv->ae_handle = NULL;
3081 free_netdev(netdev);
3082 return ret;
3083}
3084
3085static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3086{
3087 struct net_device *netdev = handle->kinfo.netdev;
3088 struct hns3_nic_priv *priv = netdev_priv(netdev);
3089 int ret;
3090
3091 if (netdev->reg_state != NETREG_UNINITIALIZED)
3092 unregister_netdev(netdev);
3093
3094 ret = hns3_nic_uninit_vector_data(priv);
3095 if (ret)
3096 netdev_err(netdev, "uninit vector error\n");
3097
3098 ret = hns3_uninit_all_ring(priv);
3099 if (ret)
3100 netdev_err(netdev, "uninit ring error\n");
3101
3102 priv->ring_data = NULL;
3103
3104 free_netdev(netdev);
3105}
3106
3107static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3108{
3109 struct net_device *netdev = handle->kinfo.netdev;
3110
3111 if (!netdev)
3112 return;
3113
3114 if (linkup) {
3115 netif_carrier_on(netdev);
3116 netif_tx_wake_all_queues(netdev);
3117 netdev_info(netdev, "link up\n");
3118 } else {
3119 netif_carrier_off(netdev);
3120 netif_tx_stop_all_queues(netdev);
3121 netdev_info(netdev, "link down\n");
3122 }
3123}
3124
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003125static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3126{
3127 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3128 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003129 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003130 int ret;
3131 u8 i;
3132
3133 if (tc > HNAE3_MAX_TC)
3134 return -EINVAL;
3135
3136 if (!ndev)
3137 return -ENODEV;
3138
Colin Ian King075cfdd2017-09-29 20:51:23 +01003139 if_running = netif_running(ndev);
3140
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003141 ret = netdev_set_num_tc(ndev, tc);
3142 if (ret)
3143 return ret;
3144
3145 if (if_running) {
3146 (void)hns3_nic_net_stop(ndev);
3147 msleep(100);
3148 }
3149
3150 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3151 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3152 if (ret)
3153 goto err_out;
3154
3155 if (tc <= 1) {
3156 netdev_reset_tc(ndev);
3157 goto out;
3158 }
3159
3160 for (i = 0; i < HNAE3_MAX_TC; i++) {
3161 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3162
3163 if (tc_info->enable)
3164 netdev_set_tc_queue(ndev,
3165 tc_info->tc,
3166 tc_info->tqp_count,
3167 tc_info->tqp_offset);
3168 }
3169
3170 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3171 netdev_set_prio_tc_map(ndev, i,
3172 kinfo->prio_tc[i]);
3173 }
3174
3175out:
3176 ret = hns3_nic_set_real_num_queue(ndev);
3177
3178err_out:
3179 if (if_running)
3180 (void)hns3_nic_net_open(ndev);
3181
3182 return ret;
3183}
3184
Lipengbb6b94a2017-11-02 20:45:21 +08003185static void hns3_recover_hw_addr(struct net_device *ndev)
3186{
3187 struct netdev_hw_addr_list *list;
3188 struct netdev_hw_addr *ha, *tmp;
3189
3190 /* go through and sync uc_addr entries to the device */
3191 list = &ndev->uc;
3192 list_for_each_entry_safe(ha, tmp, &list->list, list)
3193 hns3_nic_uc_sync(ndev, ha->addr);
3194
3195 /* go through and sync mc_addr entries to the device */
3196 list = &ndev->mc;
3197 list_for_each_entry_safe(ha, tmp, &list->list, list)
3198 hns3_nic_mc_sync(ndev, ha->addr);
3199}
3200
3201static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3202{
3203 dev_kfree_skb_any(skb);
3204}
3205
3206static void hns3_clear_all_ring(struct hnae3_handle *h)
3207{
3208 struct net_device *ndev = h->kinfo.netdev;
3209 struct hns3_nic_priv *priv = netdev_priv(ndev);
3210 u32 i;
3211
3212 for (i = 0; i < h->kinfo.num_tqps; i++) {
3213 struct netdev_queue *dev_queue;
3214 struct hns3_enet_ring *ring;
3215
3216 ring = priv->ring_data[i].ring;
3217 hns3_clean_tx_ring(ring, ring->desc_num);
3218 dev_queue = netdev_get_tx_queue(ndev,
3219 priv->ring_data[i].queue_index);
3220 netdev_tx_reset_queue(dev_queue);
3221
3222 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3223 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3224 }
3225}
3226
3227static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3228{
3229 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3230 struct net_device *ndev = kinfo->netdev;
3231
3232 if (!netif_running(ndev))
3233 return -EIO;
3234
3235 return hns3_nic_net_stop(ndev);
3236}
3237
3238static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3239{
3240 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3241 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
3242 int ret = 0;
3243
3244 if (netif_running(kinfo->netdev)) {
3245 ret = hns3_nic_net_up(kinfo->netdev);
3246 if (ret) {
3247 netdev_err(kinfo->netdev,
3248 "hns net up fail, ret=%d!\n", ret);
3249 return ret;
3250 }
3251
3252 priv->last_reset_time = jiffies;
3253 }
3254
3255 return ret;
3256}
3257
3258static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3259{
3260 struct net_device *netdev = handle->kinfo.netdev;
3261 struct hns3_nic_priv *priv = netdev_priv(netdev);
3262 int ret;
3263
3264 priv->reset_level = 1;
3265 hns3_init_mac_addr(netdev);
3266 hns3_nic_set_rx_mode(netdev);
3267 hns3_recover_hw_addr(netdev);
3268
3269 /* Carrier off reporting is important to ethtool even BEFORE open */
3270 netif_carrier_off(netdev);
3271
3272 ret = hns3_get_ring_config(priv);
3273 if (ret)
3274 return ret;
3275
3276 ret = hns3_nic_init_vector_data(priv);
3277 if (ret)
3278 return ret;
3279
3280 ret = hns3_init_all_ring(priv);
3281 if (ret) {
3282 hns3_nic_uninit_vector_data(priv);
3283 priv->ring_data = NULL;
3284 }
3285
3286 return ret;
3287}
3288
3289static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3290{
3291 struct net_device *netdev = handle->kinfo.netdev;
3292 struct hns3_nic_priv *priv = netdev_priv(netdev);
3293 int ret;
3294
3295 hns3_clear_all_ring(handle);
3296
3297 ret = hns3_nic_uninit_vector_data(priv);
3298 if (ret) {
3299 netdev_err(netdev, "uninit vector error\n");
3300 return ret;
3301 }
3302
3303 ret = hns3_uninit_all_ring(priv);
3304 if (ret)
3305 netdev_err(netdev, "uninit ring error\n");
3306
3307 priv->ring_data = NULL;
3308
3309 return ret;
3310}
3311
3312static int hns3_reset_notify(struct hnae3_handle *handle,
3313 enum hnae3_reset_notify_type type)
3314{
3315 int ret = 0;
3316
3317 switch (type) {
3318 case HNAE3_UP_CLIENT:
3319 ret = hns3_reset_notify_up_enet(handle);
3320 break;
3321 case HNAE3_DOWN_CLIENT:
3322 ret = hns3_reset_notify_down_enet(handle);
3323 break;
3324 case HNAE3_INIT_CLIENT:
3325 ret = hns3_reset_notify_init_enet(handle);
3326 break;
3327 case HNAE3_UNINIT_CLIENT:
3328 ret = hns3_reset_notify_uninit_enet(handle);
3329 break;
3330 default:
3331 break;
3332 }
3333
3334 return ret;
3335}
3336
Peng Li09f2af62017-12-22 12:21:41 +08003337static u16 hns3_get_max_available_channels(struct net_device *netdev)
3338{
3339 struct hnae3_handle *h = hns3_get_handle(netdev);
3340 u16 free_tqps, max_rss_size, max_tqps;
3341
3342 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
3343 max_tqps = h->kinfo.num_tc * max_rss_size;
3344
3345 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
3346}
3347
3348static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num)
3349{
3350 struct hns3_nic_priv *priv = netdev_priv(netdev);
3351 struct hnae3_handle *h = hns3_get_handle(netdev);
3352 int ret;
3353
3354 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3355 if (ret)
3356 return ret;
3357
3358 ret = hns3_get_ring_config(priv);
3359 if (ret)
3360 return ret;
3361
3362 ret = hns3_nic_init_vector_data(priv);
3363 if (ret)
3364 goto err_uninit_vector;
3365
3366 ret = hns3_init_all_ring(priv);
3367 if (ret)
3368 goto err_put_ring;
3369
3370 return 0;
3371
3372err_put_ring:
3373 hns3_put_ring_config(priv);
3374err_uninit_vector:
3375 hns3_nic_uninit_vector_data(priv);
3376 return ret;
3377}
3378
3379static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3380{
3381 return (new_tqp_num / num_tc) * num_tc;
3382}
3383
3384int hns3_set_channels(struct net_device *netdev,
3385 struct ethtool_channels *ch)
3386{
3387 struct hns3_nic_priv *priv = netdev_priv(netdev);
3388 struct hnae3_handle *h = hns3_get_handle(netdev);
3389 struct hnae3_knic_private_info *kinfo = &h->kinfo;
3390 bool if_running = netif_running(netdev);
3391 u32 new_tqp_num = ch->combined_count;
3392 u16 org_tqp_num;
3393 int ret;
3394
3395 if (ch->rx_count || ch->tx_count)
3396 return -EINVAL;
3397
3398 if (new_tqp_num > hns3_get_max_available_channels(netdev) ||
3399 new_tqp_num < kinfo->num_tc) {
3400 dev_err(&netdev->dev,
3401 "Change tqps fail, the tqp range is from %d to %d",
3402 kinfo->num_tc,
3403 hns3_get_max_available_channels(netdev));
3404 return -EINVAL;
3405 }
3406
3407 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3408 if (kinfo->num_tqps == new_tqp_num)
3409 return 0;
3410
3411 if (if_running)
3412 dev_close(netdev);
3413
3414 hns3_clear_all_ring(h);
3415
3416 ret = hns3_nic_uninit_vector_data(priv);
3417 if (ret) {
3418 dev_err(&netdev->dev,
3419 "Unbind vector with tqp fail, nothing is changed");
3420 goto open_netdev;
3421 }
3422
3423 hns3_uninit_all_ring(priv);
3424
3425 org_tqp_num = h->kinfo.num_tqps;
3426 ret = hns3_modify_tqp_num(netdev, new_tqp_num);
3427 if (ret) {
3428 ret = hns3_modify_tqp_num(netdev, org_tqp_num);
3429 if (ret) {
3430 /* If revert to old tqp failed, fatal error occurred */
3431 dev_err(&netdev->dev,
3432 "Revert to old tqp num fail, ret=%d", ret);
3433 return ret;
3434 }
3435 dev_info(&netdev->dev,
3436 "Change tqp num fail, Revert to old tqp num");
3437 }
3438
3439open_netdev:
3440 if (if_running)
3441 dev_open(netdev);
3442
3443 return ret;
3444}
3445
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003446static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003447 .init_instance = hns3_client_init,
3448 .uninit_instance = hns3_client_uninit,
3449 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003450 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003451 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003452};
3453
3454/* hns3_init_module - Driver registration routine
3455 * hns3_init_module is the first routine called when the driver is
3456 * loaded. All it does is register with the PCI subsystem.
3457 */
3458static int __init hns3_init_module(void)
3459{
3460 int ret;
3461
3462 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3463 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3464
3465 client.type = HNAE3_CLIENT_KNIC;
3466 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3467 hns3_driver_name);
3468
3469 client.ops = &client_ops;
3470
3471 ret = hnae3_register_client(&client);
3472 if (ret)
3473 return ret;
3474
3475 ret = pci_register_driver(&hns3_driver);
3476 if (ret)
3477 hnae3_unregister_client(&client);
3478
3479 return ret;
3480}
3481module_init(hns3_init_module);
3482
3483/* hns3_exit_module - Driver exit cleanup routine
3484 * hns3_exit_module is called just before the driver is removed
3485 * from memory.
3486 */
3487static void __exit hns3_exit_module(void)
3488{
3489 pci_unregister_driver(&hns3_driver);
3490 hnae3_unregister_client(&client);
3491}
3492module_exit(hns3_exit_module);
3493
3494MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3495MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3496MODULE_LICENSE("GPL");
3497MODULE_ALIAS("pci:hns-nic");