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Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/dmtimer.c
3 *
4 * OMAP Dual-Mode Timers
5 *
Tarun Kanti DebBarma97933d62011-09-20 17:00:17 +05306 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * dmtimer adaptation to platform_driver.
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * Copyright (C) 2005 Nokia Corporation
Timo Teras77900a22006-06-26 16:16:12 -070013 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
Tony Lindgren92105bb2005-09-07 17:20:26 +010015 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070016 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
18 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010019 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
Axel Lin869dec12011-11-02 09:49:46 +080038#include <linux/module.h>
Russell Kingfced80c2008-09-06 12:10:45 +010039#include <linux/io.h>
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +053040#include <linux/device.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053041#include <linux/err.h>
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +053042#include <linux/pm_runtime.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053043
Tony Lindgrence491cf2009-10-20 09:40:47 -070044#include <plat/dmtimer.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010045
Tony Lindgren2c799ce2012-02-24 10:34:35 -080046#include <mach/hardware.h>
47
Tony Lindgren1d5aef42012-10-03 16:36:40 -070048#include "../mach-omap2/omap-pm.h"
49
Jon Hunterb7b4ff72012-06-05 12:34:51 -050050static u32 omap_reserved_systimers;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053051static LIST_HEAD(omap_timer_list);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053052static DEFINE_SPINLOCK(dm_timer_lock);
Tony Lindgren92105bb2005-09-07 17:20:26 +010053
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053054/**
55 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
56 * @timer: timer pointer over which read operation to perform
57 * @reg: lowest byte holds the register offset
58 *
59 * The posted mode bit is encoded in reg. Note that in posted mode write
60 * pending bit must be checked. Otherwise a read of a non completed write
61 * will produce an error.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030062 */
63static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
Tony Lindgren92105bb2005-09-07 17:20:26 +010064{
Tony Lindgrenee17f112011-09-16 15:44:20 -070065 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
66 return __omap_dm_timer_read(timer, reg, timer->posted);
Timo Teras77900a22006-06-26 16:16:12 -070067}
68
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053069/**
70 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
71 * @timer: timer pointer over which write operation is to perform
72 * @reg: lowest byte holds the register offset
73 * @value: data to write into the register
74 *
75 * The posted mode bit is encoded in reg. Note that in posted mode the write
76 * pending bit must be checked. Otherwise a write on a register which has a
77 * pending write will be lost.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030078 */
79static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
80 u32 value)
Timo Teras77900a22006-06-26 16:16:12 -070081{
Tony Lindgrenee17f112011-09-16 15:44:20 -070082 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
83 __omap_dm_timer_write(timer, reg, value, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +010084}
85
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053086static void omap_timer_restore_context(struct omap_dm_timer *timer)
87{
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -080088 if (timer->revision == 1)
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053089 __raw_writel(timer->context.tistat, timer->sys_stat);
90
91 __raw_writel(timer->context.tisr, timer->irq_stat);
92 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
93 timer->context.twer);
94 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
95 timer->context.tcrr);
96 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
97 timer->context.tldr);
98 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
99 timer->context.tmar);
100 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
101 timer->context.tsicr);
102 __raw_writel(timer->context.tier, timer->irq_ena);
103 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
104 timer->context.tclr);
105}
106
Timo Teras77900a22006-06-26 16:16:12 -0700107static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100108{
Timo Teras77900a22006-06-26 16:16:12 -0700109 int c;
110
Tony Lindgrenee17f112011-09-16 15:44:20 -0700111 if (!timer->sys_stat)
112 return;
113
Timo Teras77900a22006-06-26 16:16:12 -0700114 c = 0;
Tony Lindgrenee17f112011-09-16 15:44:20 -0700115 while (!(__raw_readl(timer->sys_stat) & 1)) {
Timo Teras77900a22006-06-26 16:16:12 -0700116 c++;
117 if (c > 100000) {
118 printk(KERN_ERR "Timer failed to reset\n");
119 return;
120 }
121 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100122}
123
Timo Teras77900a22006-06-26 16:16:12 -0700124static void omap_dm_timer_reset(struct omap_dm_timer *timer)
125{
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530126 omap_dm_timer_enable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530127 if (timer->pdev->id != 1) {
Timo Terase32f7ec2006-06-26 16:16:13 -0700128 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
129 omap_dm_timer_wait_for_reset(timer);
130 }
Timo Teras77900a22006-06-26 16:16:12 -0700131
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530132 __omap_dm_timer_reset(timer, 0, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530133 omap_dm_timer_disable(timer);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300134 timer->posted = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700135}
136
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530137int omap_dm_timer_prepare(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700138{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530139 int ret;
140
Jon Hunterbca45802012-06-05 12:34:58 -0500141 /*
142 * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
143 * do not call clk_get() for these devices.
144 */
145 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
146 timer->fclk = clk_get(&timer->pdev->dev, "fck");
147 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
148 timer->fclk = NULL;
149 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
150 return -EINVAL;
151 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530152 }
153
Jon Hunter66159752012-06-05 12:34:57 -0500154 if (timer->capability & OMAP_TIMER_NEEDS_RESET)
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530155 omap_dm_timer_reset(timer);
156
157 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
158
159 timer->posted = 1;
160 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700161}
162
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500163static inline u32 omap_dm_timer_reserved_systimer(int id)
164{
165 return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
166}
167
168int omap_dm_timer_reserve_systimer(int id)
169{
170 if (omap_dm_timer_reserved_systimer(id))
171 return -ENODEV;
172
173 omap_reserved_systimers |= (1 << (id - 1));
174
175 return 0;
176}
177
Timo Teras77900a22006-06-26 16:16:12 -0700178struct omap_dm_timer *omap_dm_timer_request(void)
179{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530180 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700181 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530182 int ret = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700183
184 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530185 list_for_each_entry(t, &omap_timer_list, node) {
186 if (t->reserved)
Timo Teras77900a22006-06-26 16:16:12 -0700187 continue;
188
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530189 timer = t;
Timo Teras83379c82006-06-26 16:16:23 -0700190 timer->reserved = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700191 break;
192 }
Timo Kokkonenc5491d12012-08-12 13:45:34 +0300193 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530194
195 if (timer) {
196 ret = omap_dm_timer_prepare(timer);
197 if (ret) {
198 timer->reserved = 0;
199 timer = NULL;
200 }
201 }
Timo Teras77900a22006-06-26 16:16:12 -0700202
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530203 if (!timer)
204 pr_debug("%s: timer request failed!\n", __func__);
Timo Teras83379c82006-06-26 16:16:23 -0700205
Timo Teras77900a22006-06-26 16:16:12 -0700206 return timer;
207}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700208EXPORT_SYMBOL_GPL(omap_dm_timer_request);
Timo Teras77900a22006-06-26 16:16:12 -0700209
210struct omap_dm_timer *omap_dm_timer_request_specific(int id)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100211{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530212 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700213 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530214 int ret = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100215
Timo Teras77900a22006-06-26 16:16:12 -0700216 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530217 list_for_each_entry(t, &omap_timer_list, node) {
218 if (t->pdev->id == id && !t->reserved) {
219 timer = t;
220 timer->reserved = 1;
221 break;
222 }
Timo Teras77900a22006-06-26 16:16:12 -0700223 }
Timo Kokkonenc5491d12012-08-12 13:45:34 +0300224 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100225
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530226 if (timer) {
227 ret = omap_dm_timer_prepare(timer);
228 if (ret) {
229 timer->reserved = 0;
230 timer = NULL;
231 }
232 }
Timo Teras77900a22006-06-26 16:16:12 -0700233
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530234 if (!timer)
235 pr_debug("%s: timer%d request failed!\n", __func__, id);
Timo Teras83379c82006-06-26 16:16:23 -0700236
Timo Teras77900a22006-06-26 16:16:12 -0700237 return timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100238}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700239EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100240
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530241int omap_dm_timer_free(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700242{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530243 if (unlikely(!timer))
244 return -EINVAL;
245
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530246 clk_put(timer->fclk);
Timo Terasfa4bb622006-09-25 12:41:35 +0300247
Timo Teras77900a22006-06-26 16:16:12 -0700248 WARN_ON(!timer->reserved);
249 timer->reserved = 0;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530250 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700251}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700252EXPORT_SYMBOL_GPL(omap_dm_timer_free);
Timo Teras77900a22006-06-26 16:16:12 -0700253
Timo Teras12583a72006-09-25 12:41:42 +0300254void omap_dm_timer_enable(struct omap_dm_timer *timer)
255{
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530256 pm_runtime_get_sync(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300257}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700258EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
Timo Teras12583a72006-09-25 12:41:42 +0300259
260void omap_dm_timer_disable(struct omap_dm_timer *timer)
261{
Jon Hunter54f32a32012-07-13 15:12:03 -0500262 pm_runtime_put_sync(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300263}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700264EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
Timo Teras12583a72006-09-25 12:41:42 +0300265
Timo Teras77900a22006-06-26 16:16:12 -0700266int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
267{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530268 if (timer)
269 return timer->irq;
270 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700271}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700272EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
Timo Teras77900a22006-06-26 16:16:12 -0700273
274#if defined(CONFIG_ARCH_OMAP1)
275
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100276/**
277 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
278 * @inputmask: current value of idlect mask
279 */
280__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
281{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530282 int i = 0;
283 struct omap_dm_timer *timer = NULL;
284 unsigned long flags;
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100285
286 /* If ARMXOR cannot be idled this function call is unnecessary */
287 if (!(inputmask & (1 << 1)))
288 return inputmask;
289
290 /* If any active timer is using ARMXOR return modified mask */
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530291 spin_lock_irqsave(&dm_timer_lock, flags);
292 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras77900a22006-06-26 16:16:12 -0700293 u32 l;
294
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530295 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras77900a22006-06-26 16:16:12 -0700296 if (l & OMAP_TIMER_CTRL_ST) {
297 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100298 inputmask &= ~(1 << 1);
299 else
300 inputmask &= ~(1 << 2);
301 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530302 i++;
Timo Teras77900a22006-06-26 16:16:12 -0700303 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530304 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100305
306 return inputmask;
307}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700308EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100309
Tony Lindgren140455f2010-02-12 12:26:48 -0800310#else
Timo Teras77900a22006-06-26 16:16:12 -0700311
312struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
313{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530314 if (timer)
315 return timer->fclk;
316 return NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700317}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700318EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
Timo Teras77900a22006-06-26 16:16:12 -0700319
320__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
321{
322 BUG();
Dirk Behme21218802006-12-06 17:14:00 -0800323
324 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700325}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700326EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Timo Teras77900a22006-06-26 16:16:12 -0700327
328#endif
329
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530330int omap_dm_timer_trigger(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700331{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530332 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
333 pr_err("%s: timer not available or enabled.\n", __func__);
334 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530335 }
336
Timo Teras77900a22006-06-26 16:16:12 -0700337 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530338 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700339}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700340EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
Timo Teras77900a22006-06-26 16:16:12 -0700341
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530342int omap_dm_timer_start(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700343{
344 u32 l;
345
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530346 if (unlikely(!timer))
347 return -EINVAL;
348
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530349 omap_dm_timer_enable(timer);
350
Jon Hunter1c2d0762012-06-05 12:34:55 -0500351 if (!(timer->capability & OMAP_TIMER_ALWON)) {
Jon Hunter0b30ec12012-06-05 12:34:56 -0500352 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
353 timer->ctx_loss_count)
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530354 omap_timer_restore_context(timer);
355 }
356
Timo Teras77900a22006-06-26 16:16:12 -0700357 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
358 if (!(l & OMAP_TIMER_CTRL_ST)) {
359 l |= OMAP_TIMER_CTRL_ST;
360 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
361 }
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530362
363 /* Save the context */
364 timer->context.tclr = l;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530365 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700366}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700367EXPORT_SYMBOL_GPL(omap_dm_timer_start);
Timo Teras77900a22006-06-26 16:16:12 -0700368
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530369int omap_dm_timer_stop(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700370{
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700371 unsigned long rate = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700372
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530373 if (unlikely(!timer))
374 return -EINVAL;
375
Jon Hunter66159752012-06-05 12:34:57 -0500376 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530377 rate = clk_get_rate(timer->fclk);
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700378
Tony Lindgrenee17f112011-09-16 15:44:20 -0700379 __omap_dm_timer_stop(timer, timer->posted, rate);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530380
Jon Hunter0b30ec12012-06-05 12:34:56 -0500381 if (!(timer->capability & OMAP_TIMER_ALWON))
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800382 timer->ctx_loss_count =
Jon Hunter0b30ec12012-06-05 12:34:56 -0500383 omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800384
385 /*
386 * Since the register values are computed and written within
387 * __omap_dm_timer_stop, we need to use read to retrieve the
388 * context.
389 */
390 timer->context.tclr =
391 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
392 timer->context.tisr = __raw_readl(timer->irq_stat);
393 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530394 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700395}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700396EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
Timo Teras77900a22006-06-26 16:16:12 -0700397
Paul Walmsleyf2480762009-04-23 21:11:10 -0600398int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100399{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530400 int ret;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500401 char *parent_name = NULL;
402 struct clk *fclk, *parent;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530403 struct dmtimer_platform_data *pdata;
404
405 if (unlikely(!timer))
406 return -EINVAL;
407
408 pdata = timer->pdev->dev.platform_data;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530409
Timo Teras77900a22006-06-26 16:16:12 -0700410 if (source < 0 || source >= 3)
Paul Walmsleyf2480762009-04-23 21:11:10 -0600411 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700412
Jon Hunter2b2d3522012-06-05 12:34:59 -0500413 /*
414 * FIXME: Used for OMAP1 devices only because they do not currently
415 * use the clock framework to set the parent clock. To be removed
416 * once OMAP1 migrated to using clock framework for dmtimers
417 */
418 if (pdata->set_timer_src)
419 return pdata->set_timer_src(timer->pdev, source);
420
421 fclk = clk_get(&timer->pdev->dev, "fck");
422 if (IS_ERR_OR_NULL(fclk)) {
423 pr_err("%s: fck not found\n", __func__);
424 return -EINVAL;
425 }
426
427 switch (source) {
428 case OMAP_TIMER_SRC_SYS_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500429 parent_name = "timer_sys_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500430 break;
431
432 case OMAP_TIMER_SRC_32_KHZ:
Jon Hunterc59b5372012-06-05 12:35:00 -0500433 parent_name = "timer_32k_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500434 break;
435
436 case OMAP_TIMER_SRC_EXT_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500437 parent_name = "timer_ext_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500438 break;
439 }
440
441 parent = clk_get(&timer->pdev->dev, parent_name);
442 if (IS_ERR_OR_NULL(parent)) {
443 pr_err("%s: %s not found\n", __func__, parent_name);
444 ret = -EINVAL;
445 goto out;
446 }
447
448 ret = clk_set_parent(fclk, parent);
449 if (IS_ERR_VALUE(ret))
450 pr_err("%s: failed to set %s as parent\n", __func__,
451 parent_name);
452
453 clk_put(parent);
454out:
455 clk_put(fclk);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530456
457 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700458}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700459EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
Timo Teras77900a22006-06-26 16:16:12 -0700460
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530461int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
Timo Teras77900a22006-06-26 16:16:12 -0700462 unsigned int load)
463{
464 u32 l;
465
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530466 if (unlikely(!timer))
467 return -EINVAL;
468
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530469 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700470 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
471 if (autoreload)
472 l |= OMAP_TIMER_CTRL_AR;
473 else
474 l &= ~OMAP_TIMER_CTRL_AR;
475 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
476 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300477
Timo Teras77900a22006-06-26 16:16:12 -0700478 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530479 /* Save the context */
480 timer->context.tclr = l;
481 timer->context.tldr = load;
482 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530483 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700484}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700485EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
Timo Teras77900a22006-06-26 16:16:12 -0700486
Richard Woodruff3fddd092008-07-03 12:24:30 +0300487/* Optimized set_load which removes costly spin wait in timer_start */
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530488int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
Richard Woodruff3fddd092008-07-03 12:24:30 +0300489 unsigned int load)
490{
491 u32 l;
492
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530493 if (unlikely(!timer))
494 return -EINVAL;
495
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530496 omap_dm_timer_enable(timer);
497
Jon Hunter1c2d0762012-06-05 12:34:55 -0500498 if (!(timer->capability & OMAP_TIMER_ALWON)) {
Jon Hunter0b30ec12012-06-05 12:34:56 -0500499 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
500 timer->ctx_loss_count)
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530501 omap_timer_restore_context(timer);
502 }
503
Richard Woodruff3fddd092008-07-03 12:24:30 +0300504 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Paul Walmsley64ce2902008-12-10 17:36:34 -0800505 if (autoreload) {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300506 l |= OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800507 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
508 } else {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300509 l &= ~OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800510 }
Richard Woodruff3fddd092008-07-03 12:24:30 +0300511 l |= OMAP_TIMER_CTRL_ST;
512
Tony Lindgrenee17f112011-09-16 15:44:20 -0700513 __omap_dm_timer_load_start(timer, l, load, timer->posted);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530514
515 /* Save the context */
516 timer->context.tclr = l;
517 timer->context.tldr = load;
518 timer->context.tcrr = load;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530519 return 0;
Richard Woodruff3fddd092008-07-03 12:24:30 +0300520}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700521EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
Richard Woodruff3fddd092008-07-03 12:24:30 +0300522
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530523int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
Timo Teras77900a22006-06-26 16:16:12 -0700524 unsigned int match)
525{
526 u32 l;
527
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530528 if (unlikely(!timer))
529 return -EINVAL;
530
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530531 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700532 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras83379c82006-06-26 16:16:23 -0700533 if (enable)
Timo Teras77900a22006-06-26 16:16:12 -0700534 l |= OMAP_TIMER_CTRL_CE;
535 else
536 l &= ~OMAP_TIMER_CTRL_CE;
537 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
538 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530539
540 /* Save the context */
541 timer->context.tclr = l;
542 timer->context.tmar = match;
543 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530544 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100545}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700546EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100547
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530548int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
Timo Teras77900a22006-06-26 16:16:12 -0700549 int toggle, int trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100550{
Timo Teras77900a22006-06-26 16:16:12 -0700551 u32 l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100552
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530553 if (unlikely(!timer))
554 return -EINVAL;
555
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530556 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700557 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
558 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
559 OMAP_TIMER_CTRL_PT | (0x03 << 10));
560 if (def_on)
561 l |= OMAP_TIMER_CTRL_SCPWM;
562 if (toggle)
563 l |= OMAP_TIMER_CTRL_PT;
564 l |= trigger << 10;
565 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530566
567 /* Save the context */
568 timer->context.tclr = l;
569 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530570 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700571}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700572EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
Timo Teras77900a22006-06-26 16:16:12 -0700573
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530574int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
Timo Teras77900a22006-06-26 16:16:12 -0700575{
576 u32 l;
577
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530578 if (unlikely(!timer))
579 return -EINVAL;
580
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530581 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700582 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
583 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
584 if (prescaler >= 0x00 && prescaler <= 0x07) {
585 l |= OMAP_TIMER_CTRL_PRE;
586 l |= prescaler << 2;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100587 }
Timo Teras77900a22006-06-26 16:16:12 -0700588 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530589
590 /* Save the context */
591 timer->context.tclr = l;
592 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530593 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100594}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700595EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100596
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530597int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
Timo Teras77900a22006-06-26 16:16:12 -0700598 unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100599{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530600 if (unlikely(!timer))
601 return -EINVAL;
602
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530603 omap_dm_timer_enable(timer);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700604 __omap_dm_timer_int_enable(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530605
606 /* Save the context */
607 timer->context.tier = value;
608 timer->context.twer = value;
609 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530610 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100611}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700612EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100613
614unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
615{
Timo Terasfa4bb622006-09-25 12:41:35 +0300616 unsigned int l;
617
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530618 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
619 pr_err("%s: timer not available or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530620 return 0;
621 }
622
Tony Lindgrenee17f112011-09-16 15:44:20 -0700623 l = __raw_readl(timer->irq_stat);
Timo Terasfa4bb622006-09-25 12:41:35 +0300624
625 return l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100626}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700627EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100628
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530629int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100630{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530631 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
632 return -EINVAL;
633
Tony Lindgrenee17f112011-09-16 15:44:20 -0700634 __omap_dm_timer_write_status(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530635 /* Save the context */
636 timer->context.tisr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530637 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100638}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700639EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100640
Tony Lindgren92105bb2005-09-07 17:20:26 +0100641unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
642{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530643 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
644 pr_err("%s: timer not iavailable or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530645 return 0;
646 }
647
Tony Lindgrenee17f112011-09-16 15:44:20 -0700648 return __omap_dm_timer_read_counter(timer, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100649}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700650EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100651
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530652int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
Timo Teras83379c82006-06-26 16:16:23 -0700653{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530654 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
655 pr_err("%s: timer not available or enabled.\n", __func__);
656 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530657 }
658
Timo Terasfa4bb622006-09-25 12:41:35 +0300659 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530660
661 /* Save the context */
662 timer->context.tcrr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530663 return 0;
Timo Teras83379c82006-06-26 16:16:23 -0700664}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700665EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
Timo Teras83379c82006-06-26 16:16:23 -0700666
Timo Teras77900a22006-06-26 16:16:12 -0700667int omap_dm_timers_active(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100668{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530669 struct omap_dm_timer *timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100670
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530671 list_for_each_entry(timer, &omap_timer_list, node) {
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530672 if (!timer->reserved)
Timo Teras12583a72006-09-25 12:41:42 +0300673 continue;
674
Timo Teras77900a22006-06-26 16:16:12 -0700675 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
Timo Terasfa4bb622006-09-25 12:41:35 +0300676 OMAP_TIMER_CTRL_ST) {
Timo Teras77900a22006-06-26 16:16:12 -0700677 return 1;
Timo Terasfa4bb622006-09-25 12:41:35 +0300678 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100679 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100680 return 0;
681}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700682EXPORT_SYMBOL_GPL(omap_dm_timers_active);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100683
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530684/**
685 * omap_dm_timer_probe - probe function called for every registered device
686 * @pdev: pointer to current timer platform device
687 *
688 * Called by driver framework at the end of device registration for all
689 * timer devices.
690 */
691static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
692{
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530693 unsigned long flags;
694 struct omap_dm_timer *timer;
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530695 struct resource *mem, *irq;
696 struct device *dev = &pdev->dev;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530697 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
698
699 if (!pdata) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530700 dev_err(dev, "%s: no platform data.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530701 return -ENODEV;
702 }
703
704 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
705 if (unlikely(!irq)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530706 dev_err(dev, "%s: no IRQ resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530707 return -ENODEV;
708 }
709
710 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
711 if (unlikely(!mem)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530712 dev_err(dev, "%s: no memory resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530713 return -ENODEV;
714 }
715
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530716 timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530717 if (!timer) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530718 dev_err(dev, "%s: memory alloc failed!\n", __func__);
719 return -ENOMEM;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530720 }
721
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530722 timer->io_base = devm_request_and_ioremap(dev, mem);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530723 if (!timer->io_base) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530724 dev_err(dev, "%s: region already claimed.\n", __func__);
725 return -ENOMEM;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530726 }
727
728 timer->id = pdev->id;
729 timer->irq = irq->start;
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500730 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530731 timer->pdev = pdev;
Jon Hunterd1c16912012-06-05 12:34:52 -0500732 timer->capability = pdata->timer_capability;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530733
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530734 /* Skip pm_runtime_enable for OMAP1 */
Jon Hunter66159752012-06-05 12:34:57 -0500735 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530736 pm_runtime_enable(dev);
737 pm_runtime_irq_safe(dev);
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530738 }
739
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700740 if (!timer->reserved) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530741 pm_runtime_get_sync(dev);
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700742 __omap_dm_timer_init_regs(timer);
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530743 pm_runtime_put(dev);
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700744 }
745
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530746 /* add the timer element to the list */
747 spin_lock_irqsave(&dm_timer_lock, flags);
748 list_add_tail(&timer->node, &omap_timer_list);
749 spin_unlock_irqrestore(&dm_timer_lock, flags);
750
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530751 dev_dbg(dev, "Device Probed.\n");
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530752
753 return 0;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530754}
755
756/**
757 * omap_dm_timer_remove - cleanup a registered timer device
758 * @pdev: pointer to current timer platform device
759 *
760 * Called by driver framework whenever a timer device is unregistered.
761 * In addition to freeing platform resources it also deletes the timer
762 * entry from the local list.
763 */
764static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
765{
766 struct omap_dm_timer *timer;
767 unsigned long flags;
768 int ret = -EINVAL;
769
770 spin_lock_irqsave(&dm_timer_lock, flags);
771 list_for_each_entry(timer, &omap_timer_list, node)
772 if (timer->pdev->id == pdev->id) {
773 list_del(&timer->node);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530774 ret = 0;
775 break;
776 }
777 spin_unlock_irqrestore(&dm_timer_lock, flags);
778
779 return ret;
780}
781
782static struct platform_driver omap_dm_timer_driver = {
783 .probe = omap_dm_timer_probe,
Arnd Bergmann4c23c8d2011-10-01 18:42:47 +0200784 .remove = __devexit_p(omap_dm_timer_remove),
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530785 .driver = {
786 .name = "omap_timer",
787 },
788};
789
790static int __init omap_dm_timer_driver_init(void)
791{
792 return platform_driver_register(&omap_dm_timer_driver);
793}
794
795static void __exit omap_dm_timer_driver_exit(void)
796{
797 platform_driver_unregister(&omap_dm_timer_driver);
798}
799
800early_platform_init("earlytimer", &omap_dm_timer_driver);
801module_init(omap_dm_timer_driver_init);
802module_exit(omap_dm_timer_driver_exit);
803
804MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
805MODULE_LICENSE("GPL");
806MODULE_ALIAS("platform:" DRIVER_NAME);
807MODULE_AUTHOR("Texas Instruments Inc");