Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/plat-omap/dmtimer.c |
| 3 | * |
| 4 | * OMAP Dual-Mode Timers |
| 5 | * |
Tarun Kanti DebBarma | 97933d6 | 2011-09-20 17:00:17 +0530 | [diff] [blame] | 6 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ |
| 7 | * Tarun Kanti DebBarma <tarun.kanti@ti.com> |
| 8 | * Thara Gopinath <thara@ti.com> |
| 9 | * |
| 10 | * dmtimer adaptation to platform_driver. |
| 11 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 12 | * Copyright (C) 2005 Nokia Corporation |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 13 | * OMAP2 support by Juha Yrjola |
| 14 | * API improvements and OMAP2 clock framework support by Timo Teras |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 15 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 16 | * Copyright (C) 2009 Texas Instruments |
| 17 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 18 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | * This program is free software; you can redistribute it and/or modify it |
| 20 | * under the terms of the GNU General Public License as published by the |
| 21 | * Free Software Foundation; either version 2 of the License, or (at your |
| 22 | * option) any later version. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 25 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 26 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 27 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | * |
| 33 | * You should have received a copy of the GNU General Public License along |
| 34 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 35 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 36 | */ |
| 37 | |
Axel Lin | 869dec1 | 2011-11-02 09:49:46 +0800 | [diff] [blame] | 38 | #include <linux/module.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 39 | #include <linux/io.h> |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 40 | #include <linux/device.h> |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 41 | #include <linux/err.h> |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 42 | #include <linux/pm_runtime.h> |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 43 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 44 | #include <plat/dmtimer.h> |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 45 | |
Tony Lindgren | 2c799ce | 2012-02-24 10:34:35 -0800 | [diff] [blame] | 46 | #include <mach/hardware.h> |
| 47 | |
Tony Lindgren | 1d5aef4 | 2012-10-03 16:36:40 -0700 | [diff] [blame^] | 48 | #include "../mach-omap2/omap-pm.h" |
| 49 | |
Jon Hunter | b7b4ff7 | 2012-06-05 12:34:51 -0500 | [diff] [blame] | 50 | static u32 omap_reserved_systimers; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 51 | static LIST_HEAD(omap_timer_list); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 52 | static DEFINE_SPINLOCK(dm_timer_lock); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 53 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 54 | /** |
| 55 | * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode |
| 56 | * @timer: timer pointer over which read operation to perform |
| 57 | * @reg: lowest byte holds the register offset |
| 58 | * |
| 59 | * The posted mode bit is encoded in reg. Note that in posted mode write |
| 60 | * pending bit must be checked. Otherwise a read of a non completed write |
| 61 | * will produce an error. |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 62 | */ |
| 63 | static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 64 | { |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 65 | WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); |
| 66 | return __omap_dm_timer_read(timer, reg, timer->posted); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 67 | } |
| 68 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 69 | /** |
| 70 | * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode |
| 71 | * @timer: timer pointer over which write operation is to perform |
| 72 | * @reg: lowest byte holds the register offset |
| 73 | * @value: data to write into the register |
| 74 | * |
| 75 | * The posted mode bit is encoded in reg. Note that in posted mode the write |
| 76 | * pending bit must be checked. Otherwise a write on a register which has a |
| 77 | * pending write will be lost. |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 78 | */ |
| 79 | static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, |
| 80 | u32 value) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 81 | { |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 82 | WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); |
| 83 | __omap_dm_timer_write(timer, reg, value, timer->posted); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 84 | } |
| 85 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 86 | static void omap_timer_restore_context(struct omap_dm_timer *timer) |
| 87 | { |
Tarun Kanti DebBarma | dffc9da | 2012-03-05 16:11:00 -0800 | [diff] [blame] | 88 | if (timer->revision == 1) |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 89 | __raw_writel(timer->context.tistat, timer->sys_stat); |
| 90 | |
| 91 | __raw_writel(timer->context.tisr, timer->irq_stat); |
| 92 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, |
| 93 | timer->context.twer); |
| 94 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, |
| 95 | timer->context.tcrr); |
| 96 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, |
| 97 | timer->context.tldr); |
| 98 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, |
| 99 | timer->context.tmar); |
| 100 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, |
| 101 | timer->context.tsicr); |
| 102 | __raw_writel(timer->context.tier, timer->irq_ena); |
| 103 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, |
| 104 | timer->context.tclr); |
| 105 | } |
| 106 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 107 | static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 108 | { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 109 | int c; |
| 110 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 111 | if (!timer->sys_stat) |
| 112 | return; |
| 113 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 114 | c = 0; |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 115 | while (!(__raw_readl(timer->sys_stat) & 1)) { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 116 | c++; |
| 117 | if (c > 100000) { |
| 118 | printk(KERN_ERR "Timer failed to reset\n"); |
| 119 | return; |
| 120 | } |
| 121 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 122 | } |
| 123 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 124 | static void omap_dm_timer_reset(struct omap_dm_timer *timer) |
| 125 | { |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 126 | omap_dm_timer_enable(timer); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 127 | if (timer->pdev->id != 1) { |
Timo Teras | e32f7ec | 2006-06-26 16:16:13 -0700 | [diff] [blame] | 128 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); |
| 129 | omap_dm_timer_wait_for_reset(timer); |
| 130 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 131 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 132 | __omap_dm_timer_reset(timer, 0, 0); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 133 | omap_dm_timer_disable(timer); |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 134 | timer->posted = 1; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 135 | } |
| 136 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 137 | int omap_dm_timer_prepare(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 138 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 139 | int ret; |
| 140 | |
Jon Hunter | bca4580 | 2012-06-05 12:34:58 -0500 | [diff] [blame] | 141 | /* |
| 142 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so |
| 143 | * do not call clk_get() for these devices. |
| 144 | */ |
| 145 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
| 146 | timer->fclk = clk_get(&timer->pdev->dev, "fck"); |
| 147 | if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { |
| 148 | timer->fclk = NULL; |
| 149 | dev_err(&timer->pdev->dev, ": No fclk handle.\n"); |
| 150 | return -EINVAL; |
| 151 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 152 | } |
| 153 | |
Jon Hunter | 6615975 | 2012-06-05 12:34:57 -0500 | [diff] [blame] | 154 | if (timer->capability & OMAP_TIMER_NEEDS_RESET) |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 155 | omap_dm_timer_reset(timer); |
| 156 | |
| 157 | ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); |
| 158 | |
| 159 | timer->posted = 1; |
| 160 | return ret; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 161 | } |
| 162 | |
Jon Hunter | b7b4ff7 | 2012-06-05 12:34:51 -0500 | [diff] [blame] | 163 | static inline u32 omap_dm_timer_reserved_systimer(int id) |
| 164 | { |
| 165 | return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0; |
| 166 | } |
| 167 | |
| 168 | int omap_dm_timer_reserve_systimer(int id) |
| 169 | { |
| 170 | if (omap_dm_timer_reserved_systimer(id)) |
| 171 | return -ENODEV; |
| 172 | |
| 173 | omap_reserved_systimers |= (1 << (id - 1)); |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 178 | struct omap_dm_timer *omap_dm_timer_request(void) |
| 179 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 180 | struct omap_dm_timer *timer = NULL, *t; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 181 | unsigned long flags; |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 182 | int ret = 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 183 | |
| 184 | spin_lock_irqsave(&dm_timer_lock, flags); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 185 | list_for_each_entry(t, &omap_timer_list, node) { |
| 186 | if (t->reserved) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 187 | continue; |
| 188 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 189 | timer = t; |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 190 | timer->reserved = 1; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 191 | break; |
| 192 | } |
Timo Kokkonen | c5491d1 | 2012-08-12 13:45:34 +0300 | [diff] [blame] | 193 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 194 | |
| 195 | if (timer) { |
| 196 | ret = omap_dm_timer_prepare(timer); |
| 197 | if (ret) { |
| 198 | timer->reserved = 0; |
| 199 | timer = NULL; |
| 200 | } |
| 201 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 202 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 203 | if (!timer) |
| 204 | pr_debug("%s: timer request failed!\n", __func__); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 205 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 206 | return timer; |
| 207 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 208 | EXPORT_SYMBOL_GPL(omap_dm_timer_request); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 209 | |
| 210 | struct omap_dm_timer *omap_dm_timer_request_specific(int id) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 211 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 212 | struct omap_dm_timer *timer = NULL, *t; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 213 | unsigned long flags; |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 214 | int ret = 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 215 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 216 | spin_lock_irqsave(&dm_timer_lock, flags); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 217 | list_for_each_entry(t, &omap_timer_list, node) { |
| 218 | if (t->pdev->id == id && !t->reserved) { |
| 219 | timer = t; |
| 220 | timer->reserved = 1; |
| 221 | break; |
| 222 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 223 | } |
Timo Kokkonen | c5491d1 | 2012-08-12 13:45:34 +0300 | [diff] [blame] | 224 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 225 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 226 | if (timer) { |
| 227 | ret = omap_dm_timer_prepare(timer); |
| 228 | if (ret) { |
| 229 | timer->reserved = 0; |
| 230 | timer = NULL; |
| 231 | } |
| 232 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 233 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 234 | if (!timer) |
| 235 | pr_debug("%s: timer%d request failed!\n", __func__, id); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 236 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 237 | return timer; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 238 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 239 | EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 240 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 241 | int omap_dm_timer_free(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 242 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 243 | if (unlikely(!timer)) |
| 244 | return -EINVAL; |
| 245 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 246 | clk_put(timer->fclk); |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 247 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 248 | WARN_ON(!timer->reserved); |
| 249 | timer->reserved = 0; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 250 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 251 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 252 | EXPORT_SYMBOL_GPL(omap_dm_timer_free); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 253 | |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 254 | void omap_dm_timer_enable(struct omap_dm_timer *timer) |
| 255 | { |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 256 | pm_runtime_get_sync(&timer->pdev->dev); |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 257 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 258 | EXPORT_SYMBOL_GPL(omap_dm_timer_enable); |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 259 | |
| 260 | void omap_dm_timer_disable(struct omap_dm_timer *timer) |
| 261 | { |
Jon Hunter | 54f32a3 | 2012-07-13 15:12:03 -0500 | [diff] [blame] | 262 | pm_runtime_put_sync(&timer->pdev->dev); |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 263 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 264 | EXPORT_SYMBOL_GPL(omap_dm_timer_disable); |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 265 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 266 | int omap_dm_timer_get_irq(struct omap_dm_timer *timer) |
| 267 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 268 | if (timer) |
| 269 | return timer->irq; |
| 270 | return -EINVAL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 271 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 272 | EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 273 | |
| 274 | #if defined(CONFIG_ARCH_OMAP1) |
| 275 | |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 276 | /** |
| 277 | * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR |
| 278 | * @inputmask: current value of idlect mask |
| 279 | */ |
| 280 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) |
| 281 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 282 | int i = 0; |
| 283 | struct omap_dm_timer *timer = NULL; |
| 284 | unsigned long flags; |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 285 | |
| 286 | /* If ARMXOR cannot be idled this function call is unnecessary */ |
| 287 | if (!(inputmask & (1 << 1))) |
| 288 | return inputmask; |
| 289 | |
| 290 | /* If any active timer is using ARMXOR return modified mask */ |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 291 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 292 | list_for_each_entry(timer, &omap_timer_list, node) { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 293 | u32 l; |
| 294 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 295 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 296 | if (l & OMAP_TIMER_CTRL_ST) { |
| 297 | if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0) |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 298 | inputmask &= ~(1 << 1); |
| 299 | else |
| 300 | inputmask &= ~(1 << 2); |
| 301 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 302 | i++; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 303 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 304 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 305 | |
| 306 | return inputmask; |
| 307 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 308 | EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 309 | |
Tony Lindgren | 140455f | 2010-02-12 12:26:48 -0800 | [diff] [blame] | 310 | #else |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 311 | |
| 312 | struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) |
| 313 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 314 | if (timer) |
| 315 | return timer->fclk; |
| 316 | return NULL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 317 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 318 | EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 319 | |
| 320 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) |
| 321 | { |
| 322 | BUG(); |
Dirk Behme | 2121880 | 2006-12-06 17:14:00 -0800 | [diff] [blame] | 323 | |
| 324 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 325 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 326 | EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 327 | |
| 328 | #endif |
| 329 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 330 | int omap_dm_timer_trigger(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 331 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 332 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 333 | pr_err("%s: timer not available or enabled.\n", __func__); |
| 334 | return -EINVAL; |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 335 | } |
| 336 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 337 | omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 338 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 339 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 340 | EXPORT_SYMBOL_GPL(omap_dm_timer_trigger); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 341 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 342 | int omap_dm_timer_start(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 343 | { |
| 344 | u32 l; |
| 345 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 346 | if (unlikely(!timer)) |
| 347 | return -EINVAL; |
| 348 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 349 | omap_dm_timer_enable(timer); |
| 350 | |
Jon Hunter | 1c2d076 | 2012-06-05 12:34:55 -0500 | [diff] [blame] | 351 | if (!(timer->capability & OMAP_TIMER_ALWON)) { |
Jon Hunter | 0b30ec1 | 2012-06-05 12:34:56 -0500 | [diff] [blame] | 352 | if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != |
| 353 | timer->ctx_loss_count) |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 354 | omap_timer_restore_context(timer); |
| 355 | } |
| 356 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 357 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 358 | if (!(l & OMAP_TIMER_CTRL_ST)) { |
| 359 | l |= OMAP_TIMER_CTRL_ST; |
| 360 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 361 | } |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 362 | |
| 363 | /* Save the context */ |
| 364 | timer->context.tclr = l; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 365 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 366 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 367 | EXPORT_SYMBOL_GPL(omap_dm_timer_start); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 368 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 369 | int omap_dm_timer_stop(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 370 | { |
Tony Lindgren | caf64f2 | 2011-03-29 15:54:48 -0700 | [diff] [blame] | 371 | unsigned long rate = 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 372 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 373 | if (unlikely(!timer)) |
| 374 | return -EINVAL; |
| 375 | |
Jon Hunter | 6615975 | 2012-06-05 12:34:57 -0500 | [diff] [blame] | 376 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 377 | rate = clk_get_rate(timer->fclk); |
Tony Lindgren | caf64f2 | 2011-03-29 15:54:48 -0700 | [diff] [blame] | 378 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 379 | __omap_dm_timer_stop(timer, timer->posted, rate); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 380 | |
Jon Hunter | 0b30ec1 | 2012-06-05 12:34:56 -0500 | [diff] [blame] | 381 | if (!(timer->capability & OMAP_TIMER_ALWON)) |
Tarun Kanti DebBarma | dffc9da | 2012-03-05 16:11:00 -0800 | [diff] [blame] | 382 | timer->ctx_loss_count = |
Jon Hunter | 0b30ec1 | 2012-06-05 12:34:56 -0500 | [diff] [blame] | 383 | omap_pm_get_dev_context_loss_count(&timer->pdev->dev); |
Tarun Kanti DebBarma | dffc9da | 2012-03-05 16:11:00 -0800 | [diff] [blame] | 384 | |
| 385 | /* |
| 386 | * Since the register values are computed and written within |
| 387 | * __omap_dm_timer_stop, we need to use read to retrieve the |
| 388 | * context. |
| 389 | */ |
| 390 | timer->context.tclr = |
| 391 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 392 | timer->context.tisr = __raw_readl(timer->irq_stat); |
| 393 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 394 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 395 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 396 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 397 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 398 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 399 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 400 | int ret; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 401 | char *parent_name = NULL; |
| 402 | struct clk *fclk, *parent; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 403 | struct dmtimer_platform_data *pdata; |
| 404 | |
| 405 | if (unlikely(!timer)) |
| 406 | return -EINVAL; |
| 407 | |
| 408 | pdata = timer->pdev->dev.platform_data; |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 409 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 410 | if (source < 0 || source >= 3) |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 411 | return -EINVAL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 412 | |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 413 | /* |
| 414 | * FIXME: Used for OMAP1 devices only because they do not currently |
| 415 | * use the clock framework to set the parent clock. To be removed |
| 416 | * once OMAP1 migrated to using clock framework for dmtimers |
| 417 | */ |
| 418 | if (pdata->set_timer_src) |
| 419 | return pdata->set_timer_src(timer->pdev, source); |
| 420 | |
| 421 | fclk = clk_get(&timer->pdev->dev, "fck"); |
| 422 | if (IS_ERR_OR_NULL(fclk)) { |
| 423 | pr_err("%s: fck not found\n", __func__); |
| 424 | return -EINVAL; |
| 425 | } |
| 426 | |
| 427 | switch (source) { |
| 428 | case OMAP_TIMER_SRC_SYS_CLK: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 429 | parent_name = "timer_sys_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 430 | break; |
| 431 | |
| 432 | case OMAP_TIMER_SRC_32_KHZ: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 433 | parent_name = "timer_32k_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 434 | break; |
| 435 | |
| 436 | case OMAP_TIMER_SRC_EXT_CLK: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 437 | parent_name = "timer_ext_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 438 | break; |
| 439 | } |
| 440 | |
| 441 | parent = clk_get(&timer->pdev->dev, parent_name); |
| 442 | if (IS_ERR_OR_NULL(parent)) { |
| 443 | pr_err("%s: %s not found\n", __func__, parent_name); |
| 444 | ret = -EINVAL; |
| 445 | goto out; |
| 446 | } |
| 447 | |
| 448 | ret = clk_set_parent(fclk, parent); |
| 449 | if (IS_ERR_VALUE(ret)) |
| 450 | pr_err("%s: failed to set %s as parent\n", __func__, |
| 451 | parent_name); |
| 452 | |
| 453 | clk_put(parent); |
| 454 | out: |
| 455 | clk_put(fclk); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 456 | |
| 457 | return ret; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 458 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 459 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 460 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 461 | int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 462 | unsigned int load) |
| 463 | { |
| 464 | u32 l; |
| 465 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 466 | if (unlikely(!timer)) |
| 467 | return -EINVAL; |
| 468 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 469 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 470 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 471 | if (autoreload) |
| 472 | l |= OMAP_TIMER_CTRL_AR; |
| 473 | else |
| 474 | l &= ~OMAP_TIMER_CTRL_AR; |
| 475 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 476 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 477 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 478 | omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 479 | /* Save the context */ |
| 480 | timer->context.tclr = l; |
| 481 | timer->context.tldr = load; |
| 482 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 483 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 484 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 485 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_load); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 486 | |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 487 | /* Optimized set_load which removes costly spin wait in timer_start */ |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 488 | int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 489 | unsigned int load) |
| 490 | { |
| 491 | u32 l; |
| 492 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 493 | if (unlikely(!timer)) |
| 494 | return -EINVAL; |
| 495 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 496 | omap_dm_timer_enable(timer); |
| 497 | |
Jon Hunter | 1c2d076 | 2012-06-05 12:34:55 -0500 | [diff] [blame] | 498 | if (!(timer->capability & OMAP_TIMER_ALWON)) { |
Jon Hunter | 0b30ec1 | 2012-06-05 12:34:56 -0500 | [diff] [blame] | 499 | if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != |
| 500 | timer->ctx_loss_count) |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 501 | omap_timer_restore_context(timer); |
| 502 | } |
| 503 | |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 504 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 505 | if (autoreload) { |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 506 | l |= OMAP_TIMER_CTRL_AR; |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 507 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); |
| 508 | } else { |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 509 | l &= ~OMAP_TIMER_CTRL_AR; |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 510 | } |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 511 | l |= OMAP_TIMER_CTRL_ST; |
| 512 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 513 | __omap_dm_timer_load_start(timer, l, load, timer->posted); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 514 | |
| 515 | /* Save the context */ |
| 516 | timer->context.tclr = l; |
| 517 | timer->context.tldr = load; |
| 518 | timer->context.tcrr = load; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 519 | return 0; |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 520 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 521 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 522 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 523 | int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 524 | unsigned int match) |
| 525 | { |
| 526 | u32 l; |
| 527 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 528 | if (unlikely(!timer)) |
| 529 | return -EINVAL; |
| 530 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 531 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 532 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 533 | if (enable) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 534 | l |= OMAP_TIMER_CTRL_CE; |
| 535 | else |
| 536 | l &= ~OMAP_TIMER_CTRL_CE; |
| 537 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 538 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 539 | |
| 540 | /* Save the context */ |
| 541 | timer->context.tclr = l; |
| 542 | timer->context.tmar = match; |
| 543 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 544 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 545 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 546 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_match); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 547 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 548 | int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 549 | int toggle, int trigger) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 550 | { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 551 | u32 l; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 552 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 553 | if (unlikely(!timer)) |
| 554 | return -EINVAL; |
| 555 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 556 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 557 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 558 | l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | |
| 559 | OMAP_TIMER_CTRL_PT | (0x03 << 10)); |
| 560 | if (def_on) |
| 561 | l |= OMAP_TIMER_CTRL_SCPWM; |
| 562 | if (toggle) |
| 563 | l |= OMAP_TIMER_CTRL_PT; |
| 564 | l |= trigger << 10; |
| 565 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 566 | |
| 567 | /* Save the context */ |
| 568 | timer->context.tclr = l; |
| 569 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 570 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 571 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 572 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 573 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 574 | int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 575 | { |
| 576 | u32 l; |
| 577 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 578 | if (unlikely(!timer)) |
| 579 | return -EINVAL; |
| 580 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 581 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 582 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 583 | l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2)); |
| 584 | if (prescaler >= 0x00 && prescaler <= 0x07) { |
| 585 | l |= OMAP_TIMER_CTRL_PRE; |
| 586 | l |= prescaler << 2; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 587 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 588 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 589 | |
| 590 | /* Save the context */ |
| 591 | timer->context.tclr = l; |
| 592 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 593 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 594 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 595 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 596 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 597 | int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 598 | unsigned int value) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 599 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 600 | if (unlikely(!timer)) |
| 601 | return -EINVAL; |
| 602 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 603 | omap_dm_timer_enable(timer); |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 604 | __omap_dm_timer_int_enable(timer, value); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 605 | |
| 606 | /* Save the context */ |
| 607 | timer->context.tier = value; |
| 608 | timer->context.twer = value; |
| 609 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 610 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 611 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 612 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 613 | |
| 614 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) |
| 615 | { |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 616 | unsigned int l; |
| 617 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 618 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 619 | pr_err("%s: timer not available or enabled.\n", __func__); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 620 | return 0; |
| 621 | } |
| 622 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 623 | l = __raw_readl(timer->irq_stat); |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 624 | |
| 625 | return l; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 626 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 627 | EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 628 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 629 | int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 630 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 631 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) |
| 632 | return -EINVAL; |
| 633 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 634 | __omap_dm_timer_write_status(timer, value); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 635 | /* Save the context */ |
| 636 | timer->context.tisr = value; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 637 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 638 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 639 | EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 640 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 641 | unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) |
| 642 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 643 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 644 | pr_err("%s: timer not iavailable or enabled.\n", __func__); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 645 | return 0; |
| 646 | } |
| 647 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 648 | return __omap_dm_timer_read_counter(timer, timer->posted); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 649 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 650 | EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 651 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 652 | int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 653 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 654 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 655 | pr_err("%s: timer not available or enabled.\n", __func__); |
| 656 | return -EINVAL; |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 657 | } |
| 658 | |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 659 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 660 | |
| 661 | /* Save the context */ |
| 662 | timer->context.tcrr = value; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 663 | return 0; |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 664 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 665 | EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 666 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 667 | int omap_dm_timers_active(void) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 668 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 669 | struct omap_dm_timer *timer; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 670 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 671 | list_for_each_entry(timer, &omap_timer_list, node) { |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 672 | if (!timer->reserved) |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 673 | continue; |
| 674 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 675 | if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 676 | OMAP_TIMER_CTRL_ST) { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 677 | return 1; |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 678 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 679 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 680 | return 0; |
| 681 | } |
Timo Kokkonen | 6c366e3 | 2009-03-23 18:07:46 -0700 | [diff] [blame] | 682 | EXPORT_SYMBOL_GPL(omap_dm_timers_active); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 683 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 684 | /** |
| 685 | * omap_dm_timer_probe - probe function called for every registered device |
| 686 | * @pdev: pointer to current timer platform device |
| 687 | * |
| 688 | * Called by driver framework at the end of device registration for all |
| 689 | * timer devices. |
| 690 | */ |
| 691 | static int __devinit omap_dm_timer_probe(struct platform_device *pdev) |
| 692 | { |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 693 | unsigned long flags; |
| 694 | struct omap_dm_timer *timer; |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 695 | struct resource *mem, *irq; |
| 696 | struct device *dev = &pdev->dev; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 697 | struct dmtimer_platform_data *pdata = pdev->dev.platform_data; |
| 698 | |
| 699 | if (!pdata) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 700 | dev_err(dev, "%s: no platform data.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 701 | return -ENODEV; |
| 702 | } |
| 703 | |
| 704 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 705 | if (unlikely(!irq)) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 706 | dev_err(dev, "%s: no IRQ resource.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 707 | return -ENODEV; |
| 708 | } |
| 709 | |
| 710 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 711 | if (unlikely(!mem)) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 712 | dev_err(dev, "%s: no memory resource.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 713 | return -ENODEV; |
| 714 | } |
| 715 | |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 716 | timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 717 | if (!timer) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 718 | dev_err(dev, "%s: memory alloc failed!\n", __func__); |
| 719 | return -ENOMEM; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 720 | } |
| 721 | |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 722 | timer->io_base = devm_request_and_ioremap(dev, mem); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 723 | if (!timer->io_base) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 724 | dev_err(dev, "%s: region already claimed.\n", __func__); |
| 725 | return -ENOMEM; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 726 | } |
| 727 | |
| 728 | timer->id = pdev->id; |
| 729 | timer->irq = irq->start; |
Jon Hunter | b7b4ff7 | 2012-06-05 12:34:51 -0500 | [diff] [blame] | 730 | timer->reserved = omap_dm_timer_reserved_systimer(timer->id); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 731 | timer->pdev = pdev; |
Jon Hunter | d1c1691 | 2012-06-05 12:34:52 -0500 | [diff] [blame] | 732 | timer->capability = pdata->timer_capability; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 733 | |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 734 | /* Skip pm_runtime_enable for OMAP1 */ |
Jon Hunter | 6615975 | 2012-06-05 12:34:57 -0500 | [diff] [blame] | 735 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 736 | pm_runtime_enable(dev); |
| 737 | pm_runtime_irq_safe(dev); |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 738 | } |
| 739 | |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 740 | if (!timer->reserved) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 741 | pm_runtime_get_sync(dev); |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 742 | __omap_dm_timer_init_regs(timer); |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 743 | pm_runtime_put(dev); |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 744 | } |
| 745 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 746 | /* add the timer element to the list */ |
| 747 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 748 | list_add_tail(&timer->node, &omap_timer_list); |
| 749 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
| 750 | |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 751 | dev_dbg(dev, "Device Probed.\n"); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 752 | |
| 753 | return 0; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 754 | } |
| 755 | |
| 756 | /** |
| 757 | * omap_dm_timer_remove - cleanup a registered timer device |
| 758 | * @pdev: pointer to current timer platform device |
| 759 | * |
| 760 | * Called by driver framework whenever a timer device is unregistered. |
| 761 | * In addition to freeing platform resources it also deletes the timer |
| 762 | * entry from the local list. |
| 763 | */ |
| 764 | static int __devexit omap_dm_timer_remove(struct platform_device *pdev) |
| 765 | { |
| 766 | struct omap_dm_timer *timer; |
| 767 | unsigned long flags; |
| 768 | int ret = -EINVAL; |
| 769 | |
| 770 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 771 | list_for_each_entry(timer, &omap_timer_list, node) |
| 772 | if (timer->pdev->id == pdev->id) { |
| 773 | list_del(&timer->node); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 774 | ret = 0; |
| 775 | break; |
| 776 | } |
| 777 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
| 778 | |
| 779 | return ret; |
| 780 | } |
| 781 | |
| 782 | static struct platform_driver omap_dm_timer_driver = { |
| 783 | .probe = omap_dm_timer_probe, |
Arnd Bergmann | 4c23c8d | 2011-10-01 18:42:47 +0200 | [diff] [blame] | 784 | .remove = __devexit_p(omap_dm_timer_remove), |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 785 | .driver = { |
| 786 | .name = "omap_timer", |
| 787 | }, |
| 788 | }; |
| 789 | |
| 790 | static int __init omap_dm_timer_driver_init(void) |
| 791 | { |
| 792 | return platform_driver_register(&omap_dm_timer_driver); |
| 793 | } |
| 794 | |
| 795 | static void __exit omap_dm_timer_driver_exit(void) |
| 796 | { |
| 797 | platform_driver_unregister(&omap_dm_timer_driver); |
| 798 | } |
| 799 | |
| 800 | early_platform_init("earlytimer", &omap_dm_timer_driver); |
| 801 | module_init(omap_dm_timer_driver_init); |
| 802 | module_exit(omap_dm_timer_driver_exit); |
| 803 | |
| 804 | MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver"); |
| 805 | MODULE_LICENSE("GPL"); |
| 806 | MODULE_ALIAS("platform:" DRIVER_NAME); |
| 807 | MODULE_AUTHOR("Texas Instruments Inc"); |