blob: d608838f6729f31ff91dc23a47dfe1f82a23b607 [file] [log] [blame]
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001/****************************************************************************
Ben Hutchingsf7a6d2c2013-08-29 23:32:48 +01002 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
Ben Hutchings251111d2013-08-27 23:04:29 +010011#include <asm/cmpxchg.h>
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000012#include "net_driver.h"
13#include "nic.h"
14#include "io.h"
Ben Hutchings8b8a95a2012-09-18 01:57:07 +010015#include "farch_regs.h"
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000016#include "mcdi_pcol.h"
17#include "phy.h"
18
19/**************************************************************************
20 *
21 * Management-Controller-to-Driver Interface
22 *
23 **************************************************************************
24 */
25
Ben Hutchingsebf98e72012-12-01 02:21:17 +000026#define MCDI_RPC_TIMEOUT (10 * HZ)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000027
Ben Hutchings3f713bf2011-12-20 23:39:31 +000028/* A reboot/assertion causes the MCDI status word to be set after the
29 * command word is set or a REBOOT event is sent. If we notice a reboot
Daniel Pieczkob2d32f02013-09-20 16:45:10 +010030 * via these mechanisms then wait 250ms for the status word to be set.
Daniel Pieczkod36a08b2013-06-20 11:40:07 +010031 */
Ben Hutchings3f713bf2011-12-20 23:39:31 +000032#define MCDI_STATUS_DELAY_US 100
Daniel Pieczkob2d32f02013-09-20 16:45:10 +010033#define MCDI_STATUS_DELAY_COUNT 2500
Ben Hutchings3f713bf2011-12-20 23:39:31 +000034#define MCDI_STATUS_SLEEP_MS \
35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000036
37#define SEQ_MASK \
38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
39
Ben Hutchingscade7152013-08-27 23:12:31 +010040struct efx_mcdi_async_param {
41 struct list_head list;
42 unsigned int cmd;
43 size_t inlen;
44 size_t outlen;
Edward Cree1e0b8122013-05-31 18:36:12 +010045 bool quiet;
Ben Hutchingscade7152013-08-27 23:12:31 +010046 efx_mcdi_async_completer *complete;
47 unsigned long cookie;
48 /* followed by request/response buffer */
49};
50
51static void efx_mcdi_timeout_async(unsigned long context);
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010052static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
53 bool *was_attached_out);
Robert Stonehouse5731d7b2013-10-09 11:52:43 +010054static bool efx_mcdi_poll_once(struct efx_nic *efx);
Ben Hutchingscade7152013-08-27 23:12:31 +010055
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000056static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
57{
Ben Hutchingsf3ad5002012-09-18 02:33:56 +010058 EFX_BUG_ON_PARANOID(!efx->mcdi);
59 return &efx->mcdi->iface;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000060}
61
Ben Hutchingsf073dde2012-09-18 02:33:55 +010062int efx_mcdi_init(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000063{
64 struct efx_mcdi_iface *mcdi;
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010065 bool already_attached;
66 int rc;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000067
Ben Hutchingsf3ad5002012-09-18 02:33:56 +010068 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
69 if (!efx->mcdi)
70 return -ENOMEM;
71
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000072 mcdi = efx_mcdi(efx);
Ben Hutchingscade7152013-08-27 23:12:31 +010073 mcdi->efx = efx;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000074 init_waitqueue_head(&mcdi->wq);
75 spin_lock_init(&mcdi->iface_lock);
Ben Hutchings251111d2013-08-27 23:04:29 +010076 mcdi->state = MCDI_STATE_QUIESCENT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000077 mcdi->mode = MCDI_MODE_POLL;
Ben Hutchingscade7152013-08-27 23:12:31 +010078 spin_lock_init(&mcdi->async_lock);
79 INIT_LIST_HEAD(&mcdi->async_list);
80 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
81 (unsigned long)mcdi);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000082
83 (void) efx_mcdi_poll_reboot(efx);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +010084 mcdi->new_epoch = true;
Ben Hutchingsf073dde2012-09-18 02:33:55 +010085
86 /* Recover from a failed assertion before probing */
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010087 rc = efx_mcdi_handle_assertion(efx);
88 if (rc)
89 return rc;
90
91 /* Let the MC (and BMC, if this is a LOM) know that the driver
92 * is loaded. We should do this before we reset the NIC.
93 */
94 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
95 if (rc) {
96 netif_err(efx, probe, efx->net_dev,
97 "Unable to register driver with MCPU\n");
98 return rc;
99 }
100 if (already_attached)
101 /* Not a fatal error */
102 netif_err(efx, probe, efx->net_dev,
103 "Host already registered with MCPU\n");
104
105 return 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000106}
107
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100108void efx_mcdi_fini(struct efx_nic *efx)
109{
Ben Hutchings4c75b43a2013-08-29 19:04:03 +0100110 if (!efx->mcdi)
111 return;
112
113 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
114
115 /* Relinquish the device (back to the BMC, if this is a LOM) */
116 efx_mcdi_drv_attach(efx, false, NULL);
117
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100118 kfree(efx->mcdi);
119}
120
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100121static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
122 const efx_dword_t *inbuf, size_t inlen)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000123{
124 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100125 efx_dword_t hdr[2];
126 size_t hdr_len;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000127 u32 xflags, seqno;
128
Ben Hutchings251111d2013-08-27 23:04:29 +0100129 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000130
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100131 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
132 spin_lock_bh(&mcdi->iface_lock);
133 ++mcdi->seqno;
134 spin_unlock_bh(&mcdi->iface_lock);
135
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000136 seqno = mcdi->seqno & SEQ_MASK;
137 xflags = 0;
138 if (mcdi->mode == MCDI_MODE_EVENTS)
139 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
140
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100141 if (efx->type->mcdi_max_ver == 1) {
142 /* MCDI v1 */
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100143 EFX_POPULATE_DWORD_7(hdr[0],
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100144 MCDI_HEADER_RESPONSE, 0,
145 MCDI_HEADER_RESYNC, 1,
146 MCDI_HEADER_CODE, cmd,
147 MCDI_HEADER_DATALEN, inlen,
148 MCDI_HEADER_SEQ, seqno,
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100149 MCDI_HEADER_XFLAGS, xflags,
150 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100151 hdr_len = 4;
152 } else {
153 /* MCDI v2 */
154 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100155 EFX_POPULATE_DWORD_7(hdr[0],
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100156 MCDI_HEADER_RESPONSE, 0,
157 MCDI_HEADER_RESYNC, 1,
158 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
159 MCDI_HEADER_DATALEN, 0,
160 MCDI_HEADER_SEQ, seqno,
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100161 MCDI_HEADER_XFLAGS, xflags,
162 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100163 EFX_POPULATE_DWORD_2(hdr[1],
164 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
165 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
166 hdr_len = 8;
167 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000168
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100169 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100170
171 mcdi->new_epoch = false;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000172}
173
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100174static int efx_mcdi_errno(unsigned int mcdi_err)
175{
176 switch (mcdi_err) {
177 case 0:
178 return 0;
179#define TRANSLATE_ERROR(name) \
180 case MC_CMD_ERR_ ## name: \
181 return -name;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100182 TRANSLATE_ERROR(EPERM);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100183 TRANSLATE_ERROR(ENOENT);
184 TRANSLATE_ERROR(EINTR);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100185 TRANSLATE_ERROR(EAGAIN);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100186 TRANSLATE_ERROR(EACCES);
187 TRANSLATE_ERROR(EBUSY);
188 TRANSLATE_ERROR(EINVAL);
189 TRANSLATE_ERROR(EDEADLK);
190 TRANSLATE_ERROR(ENOSYS);
191 TRANSLATE_ERROR(ETIME);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100192 TRANSLATE_ERROR(EALREADY);
193 TRANSLATE_ERROR(ENOSPC);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100194#undef TRANSLATE_ERROR
Ben Hutchingsea136ae2013-10-08 16:36:58 +0100195 case MC_CMD_ERR_ENOTSUP:
196 return -EOPNOTSUPP;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100197 case MC_CMD_ERR_ALLOC_FAIL:
198 return -ENOBUFS;
199 case MC_CMD_ERR_MAC_EXIST:
200 return -EADDRINUSE;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100201 default:
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100202 return -EPROTO;
203 }
204}
205
206static void efx_mcdi_read_response_header(struct efx_nic *efx)
207{
208 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
209 unsigned int respseq, respcmd, error;
210 efx_dword_t hdr;
211
212 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
213 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
214 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
215 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
216
217 if (respcmd != MC_CMD_V2_EXTN) {
218 mcdi->resp_hdr_len = 4;
219 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
220 } else {
221 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
222 mcdi->resp_hdr_len = 8;
223 mcdi->resp_data_len =
224 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
225 }
226
227 if (error && mcdi->resp_data_len == 0) {
228 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
229 mcdi->resprc = -EIO;
230 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
231 netif_err(efx, hw, efx->net_dev,
232 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
233 respseq, mcdi->seqno);
234 mcdi->resprc = -EIO;
235 } else if (error) {
236 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
237 mcdi->resprc =
238 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
239 } else {
240 mcdi->resprc = 0;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100241 }
242}
243
Robert Stonehouse5731d7b2013-10-09 11:52:43 +0100244static bool efx_mcdi_poll_once(struct efx_nic *efx)
245{
246 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
247
248 rmb();
249 if (!efx->type->mcdi_poll_response(efx))
250 return false;
251
252 spin_lock_bh(&mcdi->iface_lock);
253 efx_mcdi_read_response_header(efx);
254 spin_unlock_bh(&mcdi->iface_lock);
255
256 return true;
257}
258
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000259static int efx_mcdi_poll(struct efx_nic *efx)
260{
261 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000262 unsigned long time, finish;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100263 unsigned int spins;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100264 int rc;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000265
266 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100267 rc = efx_mcdi_poll_reboot(efx);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100268 if (rc) {
Ben Hutchings369327f2012-10-26 17:53:12 +0100269 spin_lock_bh(&mcdi->iface_lock);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100270 mcdi->resprc = rc;
271 mcdi->resp_hdr_len = 0;
272 mcdi->resp_data_len = 0;
Ben Hutchings369327f2012-10-26 17:53:12 +0100273 spin_unlock_bh(&mcdi->iface_lock);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100274 return 0;
275 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000276
277 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
278 * because generally mcdi responses are fast. After that, back off
279 * and poll once a jiffy (approximately)
280 */
281 spins = TICK_USEC;
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000282 finish = jiffies + MCDI_RPC_TIMEOUT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000283
284 while (1) {
285 if (spins != 0) {
286 --spins;
287 udelay(1);
Ben Hutchings55029c12010-01-13 04:34:25 +0000288 } else {
289 schedule_timeout_uninterruptible(1);
290 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000291
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000292 time = jiffies;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000293
Robert Stonehouse5731d7b2013-10-09 11:52:43 +0100294 if (efx_mcdi_poll_once(efx))
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000295 break;
296
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000297 if (time_after(time, finish))
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000298 return -ETIMEDOUT;
299 }
300
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000301 /* Return rc=0 like wait_event_timeout() */
302 return 0;
303}
304
Ben Hutchings876be082012-10-01 20:58:35 +0100305/* Test and clear MC-rebooted flag for this port/function; reset
306 * software state as necessary.
307 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000308int efx_mcdi_poll_reboot(struct efx_nic *efx)
309{
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100310 if (!efx->mcdi)
311 return 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000312
Ben Hutchingscd0ecc92012-12-14 21:52:56 +0000313 return efx->type->mcdi_poll_reboot(efx);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000314}
315
Ben Hutchingscade7152013-08-27 23:12:31 +0100316static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
317{
318 return cmpxchg(&mcdi->state,
319 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
320 MCDI_STATE_QUIESCENT;
321}
322
323static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000324{
325 /* Wait until the interface becomes QUIESCENT and we win the race
Ben Hutchingscade7152013-08-27 23:12:31 +0100326 * to mark it RUNNING_SYNC.
327 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000328 wait_event(mcdi->wq,
Ben Hutchings251111d2013-08-27 23:04:29 +0100329 cmpxchg(&mcdi->state,
Ben Hutchingscade7152013-08-27 23:12:31 +0100330 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
Ben Hutchings251111d2013-08-27 23:04:29 +0100331 MCDI_STATE_QUIESCENT);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000332}
333
334static int efx_mcdi_await_completion(struct efx_nic *efx)
335{
336 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
337
Ben Hutchings251111d2013-08-27 23:04:29 +0100338 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
339 MCDI_RPC_TIMEOUT) == 0)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000340 return -ETIMEDOUT;
341
342 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
343 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
344 * completed the request first, then we'll just end up completing the
345 * request again, which is safe.
346 *
347 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
348 * wait_event_timeout() implicitly provides.
349 */
350 if (mcdi->mode == MCDI_MODE_POLL)
351 return efx_mcdi_poll(efx);
352
353 return 0;
354}
355
Ben Hutchingscade7152013-08-27 23:12:31 +0100356/* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
357 * requester. Return whether this was done. Does not take any locks.
358 */
359static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000360{
Ben Hutchingscade7152013-08-27 23:12:31 +0100361 if (cmpxchg(&mcdi->state,
362 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
363 MCDI_STATE_RUNNING_SYNC) {
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000364 wake_up(&mcdi->wq);
365 return true;
366 }
367
368 return false;
369}
370
371static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
372{
Ben Hutchingscade7152013-08-27 23:12:31 +0100373 if (mcdi->mode == MCDI_MODE_EVENTS) {
374 struct efx_mcdi_async_param *async;
375 struct efx_nic *efx = mcdi->efx;
376
377 /* Process the asynchronous request queue */
378 spin_lock_bh(&mcdi->async_lock);
379 async = list_first_entry_or_null(
380 &mcdi->async_list, struct efx_mcdi_async_param, list);
381 if (async) {
382 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
383 efx_mcdi_send_request(efx, async->cmd,
384 (const efx_dword_t *)(async + 1),
385 async->inlen);
386 mod_timer(&mcdi->async_timer,
387 jiffies + MCDI_RPC_TIMEOUT);
388 }
389 spin_unlock_bh(&mcdi->async_lock);
390
391 if (async)
392 return;
393 }
394
Ben Hutchings251111d2013-08-27 23:04:29 +0100395 mcdi->state = MCDI_STATE_QUIESCENT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000396 wake_up(&mcdi->wq);
397}
398
Ben Hutchingscade7152013-08-27 23:12:31 +0100399/* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
400 * asynchronous completion function, and release the interface.
401 * Return whether this was done. Must be called in bh-disabled
402 * context. Will take iface_lock and async_lock.
403 */
404static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
405{
406 struct efx_nic *efx = mcdi->efx;
407 struct efx_mcdi_async_param *async;
Edward Cree1e0b8122013-05-31 18:36:12 +0100408 size_t hdr_len, data_len, err_len;
Ben Hutchingscade7152013-08-27 23:12:31 +0100409 efx_dword_t *outbuf;
Edward Cree1e0b8122013-05-31 18:36:12 +0100410 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
Ben Hutchingscade7152013-08-27 23:12:31 +0100411 int rc;
412
413 if (cmpxchg(&mcdi->state,
414 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
415 MCDI_STATE_RUNNING_ASYNC)
416 return false;
417
418 spin_lock(&mcdi->iface_lock);
419 if (timeout) {
420 /* Ensure that if the completion event arrives later,
421 * the seqno check in efx_mcdi_ev_cpl() will fail
422 */
423 ++mcdi->seqno;
424 ++mcdi->credits;
425 rc = -ETIMEDOUT;
426 hdr_len = 0;
427 data_len = 0;
428 } else {
429 rc = mcdi->resprc;
430 hdr_len = mcdi->resp_hdr_len;
431 data_len = mcdi->resp_data_len;
432 }
433 spin_unlock(&mcdi->iface_lock);
434
435 /* Stop the timer. In case the timer function is running, we
436 * must wait for it to return so that there is no possibility
437 * of it aborting the next request.
438 */
439 if (!timeout)
440 del_timer_sync(&mcdi->async_timer);
441
442 spin_lock(&mcdi->async_lock);
443 async = list_first_entry(&mcdi->async_list,
444 struct efx_mcdi_async_param, list);
445 list_del(&async->list);
446 spin_unlock(&mcdi->async_lock);
447
448 outbuf = (efx_dword_t *)(async + 1);
449 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
450 min(async->outlen, data_len));
Edward Cree1e0b8122013-05-31 18:36:12 +0100451 if (!timeout && rc && !async->quiet) {
452 err_len = min(sizeof(errbuf), data_len);
453 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
454 sizeof(errbuf));
455 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
456 err_len, rc);
457 }
Ben Hutchingscade7152013-08-27 23:12:31 +0100458 async->complete(efx, async->cookie, rc, outbuf, data_len);
459 kfree(async);
460
461 efx_mcdi_release(mcdi);
462
463 return true;
464}
465
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000466static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100467 unsigned int datalen, unsigned int mcdi_err)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000468{
469 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
470 bool wake = false;
471
472 spin_lock(&mcdi->iface_lock);
473
474 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
475 if (mcdi->credits)
476 /* The request has been cancelled */
477 --mcdi->credits;
478 else
Ben Hutchings62776d02010-06-23 11:30:07 +0000479 netif_err(efx, hw, efx->net_dev,
480 "MC response mismatch tx seq 0x%x rx "
481 "seq 0x%x\n", seqno, mcdi->seqno);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000482 } else {
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100483 if (efx->type->mcdi_max_ver >= 2) {
484 /* MCDI v2 responses don't fit in an event */
485 efx_mcdi_read_response_header(efx);
486 } else {
487 mcdi->resprc = efx_mcdi_errno(mcdi_err);
488 mcdi->resp_hdr_len = 4;
489 mcdi->resp_data_len = datalen;
490 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000491
492 wake = true;
493 }
494
495 spin_unlock(&mcdi->iface_lock);
496
Ben Hutchingscade7152013-08-27 23:12:31 +0100497 if (wake) {
498 if (!efx_mcdi_complete_async(mcdi, false))
499 (void) efx_mcdi_complete_sync(mcdi);
500
501 /* If the interface isn't RUNNING_ASYNC or
502 * RUNNING_SYNC then we've received a duplicate
503 * completion after we've already transitioned back to
504 * QUIESCENT. [A subsequent invocation would increment
505 * seqno, so would have failed the seqno check].
506 */
507 }
508}
509
510static void efx_mcdi_timeout_async(unsigned long context)
511{
512 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
513
514 efx_mcdi_complete_async(mcdi, true);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000515}
516
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100517static int
518efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
519{
520 if (efx->type->mcdi_max_ver < 0 ||
521 (efx->type->mcdi_max_ver < 2 &&
522 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
523 return -EINVAL;
524
525 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
526 (efx->type->mcdi_max_ver < 2 &&
527 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
528 return -EMSGSIZE;
529
530 return 0;
531}
532
Edward Cree1e0b8122013-05-31 18:36:12 +0100533static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
534 efx_dword_t *outbuf, size_t outlen,
535 size_t *outlen_actual, bool quiet)
Stuart Hodgsonc3cba722012-07-16 17:40:47 +0100536{
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000537 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Edward Cree1e0b8122013-05-31 18:36:12 +0100538 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
Stuart Hodgsonc3cba722012-07-16 17:40:47 +0100539 int rc;
540
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000541 if (mcdi->mode == MCDI_MODE_POLL)
542 rc = efx_mcdi_poll(efx);
543 else
544 rc = efx_mcdi_await_completion(efx);
545
546 if (rc != 0) {
Robert Stonehouse6b294b82013-10-09 11:52:48 +0100547 netif_err(efx, hw, efx->net_dev,
548 "MC command 0x%x inlen %d mode %d timed out\n",
549 cmd, (int)inlen, mcdi->mode);
550
551 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
552 netif_err(efx, hw, efx->net_dev,
553 "MCDI request was completed without an event\n");
554 rc = 0;
555 }
556
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000557 /* Close the race with efx_mcdi_ev_cpl() executing just too late
558 * and completing a request we've just cancelled, by ensuring
559 * that the seqno check therein fails.
560 */
561 spin_lock_bh(&mcdi->iface_lock);
562 ++mcdi->seqno;
563 ++mcdi->credits;
564 spin_unlock_bh(&mcdi->iface_lock);
Robert Stonehouse6b294b82013-10-09 11:52:48 +0100565 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000566
Edward Cree1e0b8122013-05-31 18:36:12 +0100567 if (rc != 0) {
568 if (outlen_actual)
569 *outlen_actual = 0;
570 } else {
571 size_t hdr_len, data_len, err_len;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000572
573 /* At the very least we need a memory barrier here to ensure
574 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
575 * a spurious efx_mcdi_ev_cpl() running concurrently by
576 * acquiring the iface_lock. */
577 spin_lock_bh(&mcdi->iface_lock);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100578 rc = mcdi->resprc;
Ben Hutchings369327f2012-10-26 17:53:12 +0100579 hdr_len = mcdi->resp_hdr_len;
580 data_len = mcdi->resp_data_len;
Edward Cree1e0b8122013-05-31 18:36:12 +0100581 err_len = min(sizeof(errbuf), data_len);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000582 spin_unlock_bh(&mcdi->iface_lock);
583
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100584 BUG_ON(rc > 0);
585
Edward Cree1e0b8122013-05-31 18:36:12 +0100586 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
587 min(outlen, data_len));
588 if (outlen_actual)
589 *outlen_actual = data_len;
590
591 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
592
593 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
594 /* Don't reset if MC_CMD_REBOOT returns EIO */
595 } else if (rc == -EIO || rc == -EINTR) {
Ben Hutchings62776d02010-06-23 11:30:07 +0000596 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
597 -rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000598 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
Edward Cree1e0b8122013-05-31 18:36:12 +0100599 } else if (rc && !quiet) {
600 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
601 rc);
602 }
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000603
604 if (rc == -EIO || rc == -EINTR) {
605 msleep(MCDI_STATUS_SLEEP_MS);
606 efx_mcdi_poll_reboot(efx);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100607 mcdi->new_epoch = true;
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000608 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000609 }
610
611 efx_mcdi_release(mcdi);
612 return rc;
613}
614
Edward Cree1e0b8122013-05-31 18:36:12 +0100615static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
616 const efx_dword_t *inbuf, size_t inlen,
617 efx_dword_t *outbuf, size_t outlen,
618 size_t *outlen_actual, bool quiet)
619{
620 int rc;
621
622 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
623 if (rc) {
624 if (outlen_actual)
625 *outlen_actual = 0;
626 return rc;
627 }
628 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
629 outlen_actual, quiet);
630}
631
632int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
633 const efx_dword_t *inbuf, size_t inlen,
634 efx_dword_t *outbuf, size_t outlen,
635 size_t *outlen_actual)
636{
637 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
638 outlen_actual, false);
639}
640
641/* Normally, on receiving an error code in the MCDI response,
642 * efx_mcdi_rpc will log an error message containing (among other
643 * things) the raw error code, by means of efx_mcdi_display_error.
644 * This _quiet version suppresses that; if the caller wishes to log
645 * the error conditionally on the return code, it should call this
646 * function and is then responsible for calling efx_mcdi_display_error
647 * as needed.
648 */
649int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
650 const efx_dword_t *inbuf, size_t inlen,
651 efx_dword_t *outbuf, size_t outlen,
652 size_t *outlen_actual)
653{
654 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
655 outlen_actual, true);
656}
657
658int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
659 const efx_dword_t *inbuf, size_t inlen)
660{
661 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
662 int rc;
663
664 rc = efx_mcdi_check_supported(efx, cmd, inlen);
665 if (rc)
666 return rc;
667
668 if (efx->mc_bist_for_other_fn)
669 return -ENETDOWN;
670
671 efx_mcdi_acquire_sync(mcdi);
672 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
673 return 0;
674}
675
676static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
677 const efx_dword_t *inbuf, size_t inlen,
678 size_t outlen,
679 efx_mcdi_async_completer *complete,
680 unsigned long cookie, bool quiet)
681{
682 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
683 struct efx_mcdi_async_param *async;
684 int rc;
685
686 rc = efx_mcdi_check_supported(efx, cmd, inlen);
687 if (rc)
688 return rc;
689
690 if (efx->mc_bist_for_other_fn)
691 return -ENETDOWN;
692
693 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
694 GFP_ATOMIC);
695 if (!async)
696 return -ENOMEM;
697
698 async->cmd = cmd;
699 async->inlen = inlen;
700 async->outlen = outlen;
701 async->quiet = quiet;
702 async->complete = complete;
703 async->cookie = cookie;
704 memcpy(async + 1, inbuf, inlen);
705
706 spin_lock_bh(&mcdi->async_lock);
707
708 if (mcdi->mode == MCDI_MODE_EVENTS) {
709 list_add_tail(&async->list, &mcdi->async_list);
710
711 /* If this is at the front of the queue, try to start it
712 * immediately
713 */
714 if (mcdi->async_list.next == &async->list &&
715 efx_mcdi_acquire_async(mcdi)) {
716 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
717 mod_timer(&mcdi->async_timer,
718 jiffies + MCDI_RPC_TIMEOUT);
719 }
720 } else {
721 kfree(async);
722 rc = -ENETDOWN;
723 }
724
725 spin_unlock_bh(&mcdi->async_lock);
726
727 return rc;
728}
729
730/**
731 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
732 * @efx: NIC through which to issue the command
733 * @cmd: Command type number
734 * @inbuf: Command parameters
735 * @inlen: Length of command parameters, in bytes
736 * @outlen: Length to allocate for response buffer, in bytes
737 * @complete: Function to be called on completion or cancellation.
738 * @cookie: Arbitrary value to be passed to @complete.
739 *
740 * This function does not sleep and therefore may be called in atomic
741 * context. It will fail if event queues are disabled or if MCDI
742 * event completions have been disabled due to an error.
743 *
744 * If it succeeds, the @complete function will be called exactly once
745 * in atomic context, when one of the following occurs:
746 * (a) the completion event is received (in NAPI context)
747 * (b) event queues are disabled (in the process that disables them)
748 * (c) the request times-out (in timer context)
749 */
750int
751efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
752 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
753 efx_mcdi_async_completer *complete, unsigned long cookie)
754{
755 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
756 cookie, false);
757}
758
759int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
760 const efx_dword_t *inbuf, size_t inlen,
761 size_t outlen, efx_mcdi_async_completer *complete,
762 unsigned long cookie)
763{
764 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
765 cookie, true);
766}
767
768int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
769 efx_dword_t *outbuf, size_t outlen,
770 size_t *outlen_actual)
771{
772 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
773 outlen_actual, false);
774}
775
776int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
777 efx_dword_t *outbuf, size_t outlen,
778 size_t *outlen_actual)
779{
780 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
781 outlen_actual, true);
782}
783
784void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
785 size_t inlen, efx_dword_t *outbuf,
786 size_t outlen, int rc)
787{
788 int code = 0, err_arg = 0;
789
790 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
791 code = MCDI_DWORD(outbuf, ERR_CODE);
792 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
793 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
794 netif_err(efx, hw, efx->net_dev,
795 "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
796 cmd, (int)inlen, rc, code, err_arg);
797}
798
Ben Hutchingscade7152013-08-27 23:12:31 +0100799/* Switch to polled MCDI completions. This can be called in various
800 * error conditions with various locks held, so it must be lockless.
801 * Caller is responsible for flushing asynchronous requests later.
802 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000803void efx_mcdi_mode_poll(struct efx_nic *efx)
804{
805 struct efx_mcdi_iface *mcdi;
806
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100807 if (!efx->mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000808 return;
809
810 mcdi = efx_mcdi(efx);
811 if (mcdi->mode == MCDI_MODE_POLL)
812 return;
813
814 /* We can switch from event completion to polled completion, because
815 * mcdi requests are always completed in shared memory. We do this by
816 * switching the mode to POLL'd then completing the request.
817 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
818 *
819 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
Ben Hutchingscade7152013-08-27 23:12:31 +0100820 * which efx_mcdi_complete_sync() provides for us.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000821 */
822 mcdi->mode = MCDI_MODE_POLL;
823
Ben Hutchingscade7152013-08-27 23:12:31 +0100824 efx_mcdi_complete_sync(mcdi);
825}
826
827/* Flush any running or queued asynchronous requests, after event processing
828 * is stopped
829 */
830void efx_mcdi_flush_async(struct efx_nic *efx)
831{
832 struct efx_mcdi_async_param *async, *next;
833 struct efx_mcdi_iface *mcdi;
834
835 if (!efx->mcdi)
836 return;
837
838 mcdi = efx_mcdi(efx);
839
840 /* We must be in polling mode so no more requests can be queued */
841 BUG_ON(mcdi->mode != MCDI_MODE_POLL);
842
843 del_timer_sync(&mcdi->async_timer);
844
845 /* If a request is still running, make sure we give the MC
846 * time to complete it so that the response won't overwrite our
847 * next request.
848 */
849 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
850 efx_mcdi_poll(efx);
851 mcdi->state = MCDI_STATE_QUIESCENT;
852 }
853
854 /* Nothing else will access the async list now, so it is safe
855 * to walk it without holding async_lock. If we hold it while
856 * calling a completer then lockdep may warn that we have
857 * acquired locks in the wrong order.
858 */
859 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
860 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
861 list_del(&async->list);
862 kfree(async);
863 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000864}
865
866void efx_mcdi_mode_event(struct efx_nic *efx)
867{
868 struct efx_mcdi_iface *mcdi;
869
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100870 if (!efx->mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000871 return;
872
873 mcdi = efx_mcdi(efx);
874
875 if (mcdi->mode == MCDI_MODE_EVENTS)
876 return;
877
878 /* We can't switch from polled to event completion in the middle of a
879 * request, because the completion method is specified in the request.
880 * So acquire the interface to serialise the requestors. We don't need
881 * to acquire the iface_lock to change the mode here, but we do need a
882 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
883 * efx_mcdi_acquire() provides.
884 */
Ben Hutchingscade7152013-08-27 23:12:31 +0100885 efx_mcdi_acquire_sync(mcdi);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000886 mcdi->mode = MCDI_MODE_EVENTS;
887 efx_mcdi_release(mcdi);
888}
889
890static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
891{
892 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
893
894 /* If there is an outstanding MCDI request, it has been terminated
895 * either by a BADASSERT or REBOOT event. If the mcdi interface is
896 * in polled mode, then do nothing because the MC reboot handler will
897 * set the header correctly. However, if the mcdi interface is waiting
898 * for a CMDDONE event it won't receive it [and since all MCDI events
899 * are sent to the same queue, we can't be racing with
900 * efx_mcdi_ev_cpl()]
901 *
Ben Hutchingscade7152013-08-27 23:12:31 +0100902 * If there is an outstanding asynchronous request, we can't
903 * complete it now (efx_mcdi_complete() would deadlock). The
904 * reset process will take care of this.
905 *
906 * There's a race here with efx_mcdi_send_request(), because
907 * we might receive a REBOOT event *before* the request has
908 * been copied out. In polled mode (during startup) this is
909 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
910 * event mode, this condition is just an edge-case of
911 * receiving a REBOOT event after posting the MCDI
912 * request. Did the mc reboot before or after the copyout? The
913 * best we can do always is just return failure.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000914 */
915 spin_lock(&mcdi->iface_lock);
Ben Hutchingscade7152013-08-27 23:12:31 +0100916 if (efx_mcdi_complete_sync(mcdi)) {
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000917 if (mcdi->mode == MCDI_MODE_EVENTS) {
918 mcdi->resprc = rc;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100919 mcdi->resp_hdr_len = 0;
920 mcdi->resp_data_len = 0;
Steve Hodgson18e3ee22010-12-02 13:46:55 +0000921 ++mcdi->credits;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000922 }
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000923 } else {
924 int count;
925
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000926 /* Consume the status word since efx_mcdi_rpc_finish() won't */
927 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
928 if (efx_mcdi_poll_reboot(efx))
929 break;
930 udelay(MCDI_STATUS_DELAY_US);
931 }
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100932 mcdi->new_epoch = true;
Daniel Pieczkodfdaa952013-09-18 10:16:24 +0100933
934 /* Nobody was waiting for an MCDI request, so trigger a reset */
935 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000936 }
937
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000938 spin_unlock(&mcdi->iface_lock);
939}
940
Jon Cooper74cd60a2013-09-16 14:18:51 +0100941/* The MC is going down in to BIST mode. set the BIST flag to block
942 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
943 * (which doesn't actually execute a reset, it waits for the controlling
944 * function to reset it).
945 */
946static void efx_mcdi_ev_bist(struct efx_nic *efx)
947{
948 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
949
950 spin_lock(&mcdi->iface_lock);
951 efx->mc_bist_for_other_fn = true;
952 if (efx_mcdi_complete_sync(mcdi)) {
953 if (mcdi->mode == MCDI_MODE_EVENTS) {
954 mcdi->resprc = -EIO;
955 mcdi->resp_hdr_len = 0;
956 mcdi->resp_data_len = 0;
957 ++mcdi->credits;
958 }
959 }
960 mcdi->new_epoch = true;
961 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
962 spin_unlock(&mcdi->iface_lock);
963}
964
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000965/* Called from falcon_process_eventq for MCDI events */
966void efx_mcdi_process_event(struct efx_channel *channel,
967 efx_qword_t *event)
968{
969 struct efx_nic *efx = channel->efx;
970 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
971 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
972
973 switch (code) {
974 case MCDI_EVENT_CODE_BADSSERT:
Ben Hutchings62776d02010-06-23 11:30:07 +0000975 netif_err(efx, hw, efx->net_dev,
976 "MC watchdog or assertion failure at 0x%x\n", data);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100977 efx_mcdi_ev_death(efx, -EINTR);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000978 break;
979
980 case MCDI_EVENT_CODE_PMNOTICE:
Ben Hutchings62776d02010-06-23 11:30:07 +0000981 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000982 break;
983
984 case MCDI_EVENT_CODE_CMDDONE:
985 efx_mcdi_ev_cpl(efx,
986 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
987 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
988 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
989 break;
990
991 case MCDI_EVENT_CODE_LINKCHANGE:
992 efx_mcdi_process_link_change(efx, event);
993 break;
994 case MCDI_EVENT_CODE_SENSOREVT:
995 efx_mcdi_sensor_event(efx, event);
996 break;
997 case MCDI_EVENT_CODE_SCHEDERR:
Robert Stonehouse2d9955b2013-10-07 18:44:17 +0100998 netif_dbg(efx, hw, efx->net_dev,
999 "MC Scheduler alert (0x%x)\n", data);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001000 break;
1001 case MCDI_EVENT_CODE_REBOOT:
Ben Hutchings8127d662013-08-29 19:19:29 +01001002 case MCDI_EVENT_CODE_MC_REBOOT:
Ben Hutchings62776d02010-06-23 11:30:07 +00001003 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
Ben Hutchings5bc283e2012-10-08 21:43:00 +01001004 efx_mcdi_ev_death(efx, -EIO);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001005 break;
Jon Cooper74cd60a2013-09-16 14:18:51 +01001006 case MCDI_EVENT_CODE_MC_BIST:
1007 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1008 efx_mcdi_ev_bist(efx);
1009 break;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001010 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1011 /* MAC stats are gather lazily. We can ignore this. */
1012 break;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001013 case MCDI_EVENT_CODE_FLR:
1014 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
1015 break;
Stuart Hodgson7c236c42012-09-03 11:09:36 +01001016 case MCDI_EVENT_CODE_PTP_RX:
1017 case MCDI_EVENT_CODE_PTP_FAULT:
1018 case MCDI_EVENT_CODE_PTP_PPS:
1019 efx_ptp_event(efx, event);
1020 break;
Ben Hutchings8127d662013-08-29 19:19:29 +01001021 case MCDI_EVENT_CODE_TX_FLUSH:
1022 case MCDI_EVENT_CODE_RX_FLUSH:
1023 /* Two flush events will be sent: one to the same event
1024 * queue as completions, and one to event queue 0.
1025 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1026 * flag will be set, and we should ignore the event
1027 * because we want to wait for all completions.
1028 */
1029 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1030 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1031 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1032 efx_ef10_handle_drain_event(efx);
1033 break;
Alexandre Rames3de82b92013-06-13 11:36:15 +01001034 case MCDI_EVENT_CODE_TX_ERR:
1035 case MCDI_EVENT_CODE_RX_ERR:
1036 netif_err(efx, hw, efx->net_dev,
1037 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1038 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1039 EFX_QWORD_VAL(*event));
1040 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1041 break;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001042 default:
Ben Hutchings62776d02010-06-23 11:30:07 +00001043 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1044 code);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001045 }
1046}
1047
1048/**************************************************************************
1049 *
1050 * Specific request functions
1051 *
1052 **************************************************************************
1053 */
1054
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001055void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001056{
Ben Hutchings8127d662013-08-29 19:19:29 +01001057 MCDI_DECLARE_BUF(outbuf,
1058 max(MC_CMD_GET_VERSION_OUT_LEN,
1059 MC_CMD_GET_CAPABILITIES_OUT_LEN));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001060 size_t outlength;
1061 const __le16 *ver_words;
Ben Hutchings8127d662013-08-29 19:19:29 +01001062 size_t offset;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001063 int rc;
1064
1065 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001066 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1067 outbuf, sizeof(outbuf), &outlength);
1068 if (rc)
1069 goto fail;
Ben Hutchings05a93202011-12-20 00:44:06 +00001070 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001071 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001072 goto fail;
1073 }
1074
1075 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
Ben Hutchings8127d662013-08-29 19:19:29 +01001076 offset = snprintf(buf, len, "%u.%u.%u.%u",
1077 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1078 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1079
1080 /* EF10 may have multiple datapath firmware variants within a
1081 * single version. Report which variants are running.
1082 */
1083 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1084 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
1085 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
1086 outbuf, sizeof(outbuf), &outlength);
1087 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
1088 offset += snprintf(
1089 buf + offset, len - offset, " rx? tx?");
1090 else
1091 offset += snprintf(
1092 buf + offset, len - offset, " rx%x tx%x",
1093 MCDI_WORD(outbuf,
1094 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
1095 MCDI_WORD(outbuf,
1096 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
1097
1098 /* It's theoretically possible for the string to exceed 31
1099 * characters, though in practice the first three version
1100 * components are short enough that this doesn't happen.
1101 */
1102 if (WARN_ON(offset >= len))
1103 buf[0] = 0;
1104 }
1105
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001106 return;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001107
1108fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001109 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001110 buf[0] = 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001111}
1112
Ben Hutchings4c75b43a2013-08-29 19:04:03 +01001113static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1114 bool *was_attached)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001115{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001116 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
Ben Hutchingsecb1c9c2013-10-07 20:10:11 +01001117 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001118 size_t outlen;
1119 int rc;
1120
1121 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1122 driver_operating ? 1 : 0);
1123 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
Ben Hutchingsf2b0bef2013-08-20 20:35:50 +01001124 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001125
1126 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1127 outbuf, sizeof(outbuf), &outlen);
1128 if (rc)
1129 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001130 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1131 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001132 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001133 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001134
Ben Hutchings8349f7f2013-10-16 18:32:34 +01001135 if (driver_operating) {
1136 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1137 efx->mcdi->fn_flags =
1138 MCDI_DWORD(outbuf,
1139 DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1140 } else {
1141 /* Synthesise flags for Siena */
1142 efx->mcdi->fn_flags =
1143 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1144 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1145 (efx_port_num(efx) == 0) <<
1146 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1147 }
1148 }
1149
Ben Hutchingsecb1c9c2013-10-07 20:10:11 +01001150 /* We currently assume we have control of the external link
1151 * and are completely trusted by firmware. Abort probing
1152 * if that's not true for this function.
1153 */
1154 if (driver_operating &&
Ben Hutchings8349f7f2013-10-16 18:32:34 +01001155 (efx->mcdi->fn_flags &
Ben Hutchingsecb1c9c2013-10-07 20:10:11 +01001156 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1157 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1158 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1159 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1160 netif_err(efx, probe, efx->net_dev,
1161 "This driver version only supports one function per port\n");
1162 return -ENODEV;
1163 }
1164
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001165 if (was_attached != NULL)
1166 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1167 return 0;
1168
1169fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001170 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001171 return rc;
1172}
1173
1174int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
Matthew Slattery6aa9c7f2010-07-14 15:36:19 +01001175 u16 *fw_subtype_list, u32 *capabilities)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001176{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001177 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001178 size_t outlen, i;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001179 int port_num = efx_port_num(efx);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001180 int rc;
1181
1182 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1183
1184 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1185 outbuf, sizeof(outbuf), &outlen);
1186 if (rc)
1187 goto fail;
1188
Ben Hutchings05a93202011-12-20 00:44:06 +00001189 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001190 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001191 goto fail;
1192 }
1193
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001194 if (mac_address)
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001195 memcpy(mac_address,
1196 port_num ?
1197 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1198 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
1199 ETH_ALEN);
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001200 if (fw_subtype_list) {
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001201 for (i = 0;
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001202 i < MCDI_VAR_ARRAY_LEN(outlen,
1203 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1204 i++)
1205 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1206 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1207 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1208 fw_subtype_list[i] = 0;
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001209 }
Matthew Slattery6aa9c7f2010-07-14 15:36:19 +01001210 if (capabilities) {
1211 if (port_num)
1212 *capabilities = MCDI_DWORD(outbuf,
1213 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1214 else
1215 *capabilities = MCDI_DWORD(outbuf,
1216 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1217 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001218
1219 return 0;
1220
1221fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001222 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1223 __func__, rc, (int)outlen);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001224
1225 return rc;
1226}
1227
1228int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1229{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001230 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001231 u32 dest = 0;
1232 int rc;
1233
1234 if (uart)
1235 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1236 if (evq)
1237 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1238
1239 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1240 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1241
1242 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1243
1244 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1245 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001246 return rc;
1247}
1248
1249int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1250{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001251 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001252 size_t outlen;
1253 int rc;
1254
1255 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1256
1257 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1258 outbuf, sizeof(outbuf), &outlen);
1259 if (rc)
1260 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001261 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1262 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001263 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001264 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001265
1266 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1267 return 0;
1268
1269fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001270 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1271 __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001272 return rc;
1273}
1274
1275int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1276 size_t *size_out, size_t *erase_size_out,
1277 bool *protected_out)
1278{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001279 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1280 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001281 size_t outlen;
1282 int rc;
1283
1284 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1285
1286 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1287 outbuf, sizeof(outbuf), &outlen);
1288 if (rc)
1289 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001290 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1291 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001292 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001293 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001294
1295 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1296 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1297 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
Ben Hutchings05a93202011-12-20 00:44:06 +00001298 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001299 return 0;
1300
1301fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001302 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001303 return rc;
1304}
1305
Ben Hutchings2e803402010-02-03 09:31:01 +00001306static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1307{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001308 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1309 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
Ben Hutchings2e803402010-02-03 09:31:01 +00001310 int rc;
1311
1312 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1313
1314 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1315 outbuf, sizeof(outbuf), NULL);
1316 if (rc)
1317 return rc;
1318
1319 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1320 case MC_CMD_NVRAM_TEST_PASS:
1321 case MC_CMD_NVRAM_TEST_NOTSUPP:
1322 return 0;
1323 default:
1324 return -EIO;
1325 }
1326}
1327
1328int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1329{
1330 u32 nvram_types;
1331 unsigned int type;
1332 int rc;
1333
1334 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1335 if (rc)
Ben Hutchingsb548a982010-04-28 09:28:36 +00001336 goto fail1;
Ben Hutchings2e803402010-02-03 09:31:01 +00001337
1338 type = 0;
1339 while (nvram_types != 0) {
1340 if (nvram_types & 1) {
1341 rc = efx_mcdi_nvram_test(efx, type);
1342 if (rc)
Ben Hutchingsb548a982010-04-28 09:28:36 +00001343 goto fail2;
Ben Hutchings2e803402010-02-03 09:31:01 +00001344 }
1345 type++;
1346 nvram_types >>= 1;
1347 }
1348
1349 return 0;
Ben Hutchingsb548a982010-04-28 09:28:36 +00001350
1351fail2:
Ben Hutchings62776d02010-06-23 11:30:07 +00001352 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1353 __func__, type);
Ben Hutchingsb548a982010-04-28 09:28:36 +00001354fail1:
Ben Hutchings62776d02010-06-23 11:30:07 +00001355 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsb548a982010-04-28 09:28:36 +00001356 return rc;
Ben Hutchings2e803402010-02-03 09:31:01 +00001357}
1358
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001359static int efx_mcdi_read_assertion(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001360{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001361 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
Edward Cree1e0b8122013-05-31 18:36:12 +01001362 MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001363 unsigned int flags, index;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001364 const char *reason;
1365 size_t outlen;
1366 int retry;
1367 int rc;
1368
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001369 /* Attempt to read any stored assertion state before we reboot
1370 * the mcfw out of the assertion handler. Retry twice, once
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001371 * because a boot-time assertion might cause this command to fail
1372 * with EINTR. And once again because GET_ASSERTS can race with
1373 * MC_CMD_REBOOT running on the other port. */
1374 retry = 2;
1375 do {
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001376 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
Edward Cree1e0b8122013-05-31 18:36:12 +01001377 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1378 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1379 outbuf, sizeof(outbuf), &outlen);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001380 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1381
Edward Cree1e0b8122013-05-31 18:36:12 +01001382 if (rc) {
1383 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1384 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1385 outlen, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001386 return rc;
Edward Cree1e0b8122013-05-31 18:36:12 +01001387 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001388 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001389 return -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001390
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001391 /* Print out any recorded assertion state */
1392 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001393 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1394 return 0;
1395
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001396 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1397 ? "system-level assertion"
1398 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1399 ? "thread-level assertion"
1400 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1401 ? "watchdog reset"
1402 : "unknown assertion";
Ben Hutchings62776d02010-06-23 11:30:07 +00001403 netif_err(efx, hw, efx->net_dev,
1404 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1405 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1406 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001407
1408 /* Print out the registers */
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001409 for (index = 0;
1410 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1411 index++)
1412 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1413 1 + index,
1414 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1415 index));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001416
1417 return 0;
1418}
1419
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001420static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1421{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001422 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001423
Ben Hutchings0f1e54a2012-07-02 23:37:40 +01001424 /* If the MC is running debug firmware, it might now be
1425 * waiting for a debugger to attach, but we just want it to
1426 * reboot. We set a flag that makes the command a no-op if it
1427 * has already done so. We don't know what return code to
1428 * expect (0 or -EIO), so ignore it.
1429 */
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001430 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1431 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1432 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
Ben Hutchings0f1e54a2012-07-02 23:37:40 +01001433 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1434 NULL, 0, NULL);
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001435}
1436
1437int efx_mcdi_handle_assertion(struct efx_nic *efx)
1438{
1439 int rc;
1440
1441 rc = efx_mcdi_read_assertion(efx);
1442 if (rc)
1443 return rc;
1444
1445 efx_mcdi_exit_assertion(efx);
1446
1447 return 0;
1448}
1449
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001450void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1451{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001452 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001453 int rc;
1454
1455 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1456 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1457 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1458
1459 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1460
1461 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1462
1463 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1464 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001465}
1466
Ben Hutchings6bff8612012-09-18 02:33:52 +01001467static int efx_mcdi_reset_port(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001468{
Edward Cree1e0b8122013-05-31 18:36:12 +01001469 return efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001470}
1471
Ben Hutchings6bff8612012-09-18 02:33:52 +01001472static int efx_mcdi_reset_mc(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001473{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001474 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001475 int rc;
1476
1477 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1478 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1479 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1480 NULL, 0, NULL);
1481 /* White is black, and up is down */
1482 if (rc == -EIO)
1483 return 0;
1484 if (rc == 0)
1485 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001486 return rc;
1487}
1488
Ben Hutchings6bff8612012-09-18 02:33:52 +01001489enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1490{
1491 return RESET_TYPE_RECOVER_OR_ALL;
1492}
1493
1494int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1495{
1496 int rc;
1497
1498 /* Recover from a failed assertion pre-reset */
1499 rc = efx_mcdi_handle_assertion(efx);
1500 if (rc)
1501 return rc;
1502
1503 if (method == RESET_TYPE_WORLD)
1504 return efx_mcdi_reset_mc(efx);
1505 else
1506 return efx_mcdi_reset_port(efx);
1507}
1508
stephen hemmingerd2156972010-10-18 05:27:31 +00001509static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1510 const u8 *mac, int *id_out)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001511{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001512 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1513 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001514 size_t outlen;
1515 int rc;
1516
1517 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1518 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1519 MC_CMD_FILTER_MODE_SIMPLE);
1520 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1521
1522 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1523 outbuf, sizeof(outbuf), &outlen);
1524 if (rc)
1525 goto fail;
1526
1527 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001528 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001529 goto fail;
1530 }
1531
1532 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1533
1534 return 0;
1535
1536fail:
1537 *id_out = -1;
Ben Hutchings62776d02010-06-23 11:30:07 +00001538 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001539 return rc;
1540
1541}
1542
1543
1544int
1545efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1546{
1547 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1548}
1549
1550
1551int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1552{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001553 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001554 size_t outlen;
1555 int rc;
1556
1557 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1558 outbuf, sizeof(outbuf), &outlen);
1559 if (rc)
1560 goto fail;
1561
1562 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001563 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001564 goto fail;
1565 }
1566
1567 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1568
1569 return 0;
1570
1571fail:
1572 *id_out = -1;
Ben Hutchings62776d02010-06-23 11:30:07 +00001573 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001574 return rc;
1575}
1576
1577
1578int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1579{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001580 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001581 int rc;
1582
1583 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1584
1585 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1586 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001587 return rc;
1588}
1589
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001590int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1591{
1592 struct efx_channel *channel;
1593 struct efx_rx_queue *rx_queue;
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001594 MCDI_DECLARE_BUF(inbuf,
1595 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001596 int rc, count;
1597
Ben Hutchings45078372012-09-19 02:53:34 +01001598 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1599 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1600
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001601 count = 0;
1602 efx_for_each_channel(channel, efx) {
1603 efx_for_each_channel_rx_queue(rx_queue, channel) {
1604 if (rx_queue->flush_pending) {
1605 rx_queue->flush_pending = false;
1606 atomic_dec(&efx->rxq_flush_pending);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001607 MCDI_SET_ARRAY_DWORD(
1608 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1609 count, efx_rx_queue_index(rx_queue));
1610 count++;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001611 }
1612 }
1613 }
1614
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001615 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1616 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
Ben Hutchingsbbec9692012-09-11 18:25:13 +01001617 WARN_ON(rc < 0);
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001618
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001619 return rc;
1620}
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001621
1622int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1623{
1624 int rc;
1625
1626 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001627 return rc;
1628}
1629
Ben Hutchings8127d662013-08-29 19:19:29 +01001630int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1631{
1632 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1633
1634 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1635 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1636 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1637 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1638 NULL, 0, NULL);
1639}
1640
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001641#ifdef CONFIG_SFC_MTD
1642
1643#define EFX_MCDI_NVRAM_LEN_MAX 128
1644
1645static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1646{
1647 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1648 int rc;
1649
1650 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1651
1652 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1653
1654 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1655 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001656 return rc;
1657}
1658
1659static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1660 loff_t offset, u8 *buffer, size_t length)
1661{
1662 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1663 MCDI_DECLARE_BUF(outbuf,
1664 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1665 size_t outlen;
1666 int rc;
1667
1668 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1669 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1670 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1671
1672 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1673 outbuf, sizeof(outbuf), &outlen);
1674 if (rc)
Edward Cree1e0b8122013-05-31 18:36:12 +01001675 return rc;
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001676
1677 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1678 return 0;
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001679}
1680
1681static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1682 loff_t offset, const u8 *buffer, size_t length)
1683{
1684 MCDI_DECLARE_BUF(inbuf,
1685 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1686 int rc;
1687
1688 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1689 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1690 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1691 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1692
1693 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1694
1695 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1696 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1697 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001698 return rc;
1699}
1700
1701static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1702 loff_t offset, size_t length)
1703{
1704 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1705 int rc;
1706
1707 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1708 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1709 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1710
1711 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1712
1713 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1714 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001715 return rc;
1716}
1717
1718static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1719{
1720 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1721 int rc;
1722
1723 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1724
1725 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1726
1727 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1728 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001729 return rc;
1730}
1731
1732int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1733 size_t len, size_t *retlen, u8 *buffer)
1734{
1735 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1736 struct efx_nic *efx = mtd->priv;
1737 loff_t offset = start;
1738 loff_t end = min_t(loff_t, start + len, mtd->size);
1739 size_t chunk;
1740 int rc = 0;
1741
1742 while (offset < end) {
1743 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1744 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1745 buffer, chunk);
1746 if (rc)
1747 goto out;
1748 offset += chunk;
1749 buffer += chunk;
1750 }
1751out:
1752 *retlen = offset - start;
1753 return rc;
1754}
1755
1756int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1757{
1758 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1759 struct efx_nic *efx = mtd->priv;
1760 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1761 loff_t end = min_t(loff_t, start + len, mtd->size);
1762 size_t chunk = part->common.mtd.erasesize;
1763 int rc = 0;
1764
1765 if (!part->updating) {
1766 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1767 if (rc)
1768 goto out;
1769 part->updating = true;
1770 }
1771
1772 /* The MCDI interface can in fact do multiple erase blocks at once;
1773 * but erasing may be slow, so we make multiple calls here to avoid
1774 * tripping the MCDI RPC timeout. */
1775 while (offset < end) {
1776 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1777 chunk);
1778 if (rc)
1779 goto out;
1780 offset += chunk;
1781 }
1782out:
1783 return rc;
1784}
1785
1786int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1787 size_t len, size_t *retlen, const u8 *buffer)
1788{
1789 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1790 struct efx_nic *efx = mtd->priv;
1791 loff_t offset = start;
1792 loff_t end = min_t(loff_t, start + len, mtd->size);
1793 size_t chunk;
1794 int rc = 0;
1795
1796 if (!part->updating) {
1797 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1798 if (rc)
1799 goto out;
1800 part->updating = true;
1801 }
1802
1803 while (offset < end) {
1804 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1805 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1806 buffer, chunk);
1807 if (rc)
1808 goto out;
1809 offset += chunk;
1810 buffer += chunk;
1811 }
1812out:
1813 *retlen = offset - start;
1814 return rc;
1815}
1816
1817int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1818{
1819 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1820 struct efx_nic *efx = mtd->priv;
1821 int rc = 0;
1822
1823 if (part->updating) {
1824 part->updating = false;
1825 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1826 }
1827
1828 return rc;
1829}
1830
1831void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1832{
1833 struct efx_mcdi_mtd_partition *mcdi_part =
1834 container_of(part, struct efx_mcdi_mtd_partition, common);
1835 struct efx_nic *efx = part->mtd.priv;
1836
1837 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1838 efx->name, part->type_name, mcdi_part->fw_subtype);
1839}
1840
1841#endif /* CONFIG_SFC_MTD */