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Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001/*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/amba/bus.h>
17#include <linux/io.h>
18#include <linux/gpio.h>
19#include <linux/spinlock.h>
20#include <linux/interrupt.h>
21#include <linux/irq.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010023
24#include <mach/hardware.h>
25#include <mach/gpio.h>
26
27/*
28 * The GPIO module in the Nomadik family of Systems-on-Chip is an
29 * AMBA device, managing 32 pins and alternate functions. The logic block
30 * is currently only used in the Nomadik.
31 *
32 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
33 */
34
35#define NMK_GPIO_PER_CHIP 32
36struct nmk_gpio_chip {
37 struct gpio_chip chip;
38 void __iomem *addr;
39 unsigned int parent_irq;
40 spinlock_t *lock;
41 /* Keep track of configured edges */
42 u32 edge_rising;
43 u32 edge_falling;
44};
45
46/* Mode functions */
47int nmk_gpio_set_mode(int gpio, int gpio_mode)
48{
49 struct nmk_gpio_chip *nmk_chip;
50 unsigned long flags;
51 u32 afunc, bfunc, bit;
52
53 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
54 if (!nmk_chip)
55 return -EINVAL;
56
57 bit = 1 << (gpio - nmk_chip->chip.base);
58
59 spin_lock_irqsave(&nmk_chip->lock, flags);
60 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
61 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
62 if (gpio_mode & NMK_GPIO_ALT_A)
63 afunc |= bit;
64 if (gpio_mode & NMK_GPIO_ALT_B)
65 bfunc |= bit;
66 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
67 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
68 spin_unlock_irqrestore(&nmk_chip->lock, flags);
69
70 return 0;
71}
72EXPORT_SYMBOL(nmk_gpio_set_mode);
73
74int nmk_gpio_get_mode(int gpio)
75{
76 struct nmk_gpio_chip *nmk_chip;
77 u32 afunc, bfunc, bit;
78
79 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
80 if (!nmk_chip)
81 return -EINVAL;
82
83 bit = 1 << (gpio - nmk_chip->chip.base);
84
85 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
86 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
87
88 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
89}
90EXPORT_SYMBOL(nmk_gpio_get_mode);
91
92
93/* IRQ functions */
94static inline int nmk_gpio_get_bitmask(int gpio)
95{
96 return 1 << (gpio % 32);
97}
98
99static void nmk_gpio_irq_ack(unsigned int irq)
100{
101 int gpio;
102 struct nmk_gpio_chip *nmk_chip;
103
104 gpio = NOMADIK_IRQ_TO_GPIO(irq);
105 nmk_chip = get_irq_chip_data(irq);
106 if (!nmk_chip)
107 return;
108 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
109}
110
111static void nmk_gpio_irq_mask(unsigned int irq)
112{
113 int gpio;
114 struct nmk_gpio_chip *nmk_chip;
115 unsigned long flags;
116 u32 bitmask, reg;
117
118 gpio = NOMADIK_IRQ_TO_GPIO(irq);
119 nmk_chip = get_irq_chip_data(irq);
120 bitmask = nmk_gpio_get_bitmask(gpio);
121 if (!nmk_chip)
122 return;
123
124 /* we must individually clear the two edges */
125 spin_lock_irqsave(&nmk_chip->lock, flags);
126 if (nmk_chip->edge_rising & bitmask) {
127 reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
128 reg &= ~bitmask;
129 writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC);
130 }
131 if (nmk_chip->edge_falling & bitmask) {
132 reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
133 reg &= ~bitmask;
134 writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC);
135 }
136 spin_unlock_irqrestore(&nmk_chip->lock, flags);
137};
138
139static void nmk_gpio_irq_unmask(unsigned int irq)
140{
141 int gpio;
142 struct nmk_gpio_chip *nmk_chip;
143 unsigned long flags;
144 u32 bitmask, reg;
145
146 gpio = NOMADIK_IRQ_TO_GPIO(irq);
147 nmk_chip = get_irq_chip_data(irq);
148 bitmask = nmk_gpio_get_bitmask(gpio);
149 if (!nmk_chip)
150 return;
151
152 /* we must individually set the two edges */
153 spin_lock_irqsave(&nmk_chip->lock, flags);
154 if (nmk_chip->edge_rising & bitmask) {
155 reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
156 reg |= bitmask;
157 writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC);
158 }
159 if (nmk_chip->edge_falling & bitmask) {
160 reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
161 reg |= bitmask;
162 writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC);
163 }
164 spin_unlock_irqrestore(&nmk_chip->lock, flags);
165}
166
167static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
168{
169 int gpio;
170 struct nmk_gpio_chip *nmk_chip;
171 unsigned long flags;
172 u32 bitmask;
173
174 gpio = NOMADIK_IRQ_TO_GPIO(irq);
175 nmk_chip = get_irq_chip_data(irq);
176 bitmask = nmk_gpio_get_bitmask(gpio);
177 if (!nmk_chip)
178 return -EINVAL;
179
180 if (type & IRQ_TYPE_LEVEL_HIGH)
181 return -EINVAL;
182 if (type & IRQ_TYPE_LEVEL_LOW)
183 return -EINVAL;
184
185 spin_lock_irqsave(&nmk_chip->lock, flags);
186
187 nmk_chip->edge_rising &= ~bitmask;
188 if (type & IRQ_TYPE_EDGE_RISING)
189 nmk_chip->edge_rising |= bitmask;
190 writel(nmk_chip->edge_rising, nmk_chip->addr + NMK_GPIO_RIMSC);
191
192 nmk_chip->edge_falling &= ~bitmask;
193 if (type & IRQ_TYPE_EDGE_FALLING)
194 nmk_chip->edge_falling |= bitmask;
195 writel(nmk_chip->edge_falling, nmk_chip->addr + NMK_GPIO_FIMSC);
196
197 spin_unlock_irqrestore(&nmk_chip->lock, flags);
198
199 nmk_gpio_irq_unmask(irq);
200
201 return 0;
202}
203
204static struct irq_chip nmk_gpio_irq_chip = {
205 .name = "Nomadik-GPIO",
206 .ack = nmk_gpio_irq_ack,
207 .mask = nmk_gpio_irq_mask,
208 .unmask = nmk_gpio_irq_unmask,
209 .set_type = nmk_gpio_irq_set_type,
210};
211
212static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
213{
214 struct nmk_gpio_chip *nmk_chip;
215 struct irq_chip *host_chip;
216 unsigned int gpio_irq;
217 u32 pending;
218 unsigned int first_irq;
219
220 nmk_chip = get_irq_data(irq);
221 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
222 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
223 gpio_irq = first_irq + __ffs(pending);
224 generic_handle_irq(gpio_irq);
225 }
226 if (0) {/* don't ack parent irq, as ack == disable */
227 host_chip = get_irq_chip(irq);
228 host_chip->ack(irq);
229 }
230}
231
232static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
233{
234 unsigned int first_irq;
235 int i;
236
237 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
238 for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
239 set_irq_chip(i, &nmk_gpio_irq_chip);
240 set_irq_handler(i, handle_edge_irq);
241 set_irq_flags(i, IRQF_VALID);
242 set_irq_chip_data(i, nmk_chip);
243 }
244 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
245 set_irq_data(nmk_chip->parent_irq, nmk_chip);
246 return 0;
247}
248
249/* I/O Functions */
250static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
251{
252 struct nmk_gpio_chip *nmk_chip =
253 container_of(chip, struct nmk_gpio_chip, chip);
254
255 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
256 return 0;
257}
258
259static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
260 int val)
261{
262 struct nmk_gpio_chip *nmk_chip =
263 container_of(chip, struct nmk_gpio_chip, chip);
264
265 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
266 return 0;
267}
268
269static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
270{
271 struct nmk_gpio_chip *nmk_chip =
272 container_of(chip, struct nmk_gpio_chip, chip);
273 u32 bit = 1 << offset;
274
275 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
276}
277
278static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
279 int val)
280{
281 struct nmk_gpio_chip *nmk_chip =
282 container_of(chip, struct nmk_gpio_chip, chip);
283 u32 bit = 1 << offset;
284
285 if (val)
286 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
287 else
288 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
289}
290
291/* This structure is replicated for each GPIO block allocated at probe time */
292static struct gpio_chip nmk_gpio_template = {
293 .direction_input = nmk_gpio_make_input,
294 .get = nmk_gpio_get_input,
295 .direction_output = nmk_gpio_make_output,
296 .set = nmk_gpio_set_output,
297 .ngpio = NMK_GPIO_PER_CHIP,
298 .can_sleep = 0,
299};
300
301static int __init nmk_gpio_probe(struct amba_device *dev, struct amba_id *id)
302{
303 struct nmk_gpio_platform_data *pdata;
304 struct nmk_gpio_chip *nmk_chip;
305 struct gpio_chip *chip;
306 int ret;
307
308 pdata = dev->dev.platform_data;
309 ret = amba_request_regions(dev, pdata->name);
310 if (ret)
311 return ret;
312
313 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
314 if (!nmk_chip) {
315 ret = -ENOMEM;
316 goto out_amba;
317 }
318 /*
319 * The virt address in nmk_chip->addr is in the nomadik register space,
320 * so we can simply convert the resource address, without remapping
321 */
322 nmk_chip->addr = io_p2v(dev->res.start);
323 nmk_chip->chip = nmk_gpio_template;
324 nmk_chip->parent_irq = pdata->parent_irq;
325
326 chip = &nmk_chip->chip;
327 chip->base = pdata->first_gpio;
328 chip->label = pdata->name;
329 chip->dev = &dev->dev;
330 chip->owner = THIS_MODULE;
331
332 ret = gpiochip_add(&nmk_chip->chip);
333 if (ret)
334 goto out_free;
335
336 amba_set_drvdata(dev, nmk_chip);
337
338 nmk_gpio_init_irq(nmk_chip);
339
340 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
341 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
342 return 0;
343
344 out_free:
345 kfree(nmk_chip);
346 out_amba:
347 amba_release_regions(dev);
348 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
349 pdata->first_gpio, pdata->first_gpio+31);
350 return ret;
351}
352
353static int nmk_gpio_remove(struct amba_device *dev)
354{
355 struct nmk_gpio_chip *nmk_chip;
356
357 nmk_chip = amba_get_drvdata(dev);
358 gpiochip_remove(&nmk_chip->chip);
359 kfree(nmk_chip);
360 amba_release_regions(dev);
361 return 0;
362}
363
364
365/* We have 0x1f080060 and 0x1f180060, accept both using the mask */
366static struct amba_id nmk_gpio_ids[] = {
367 {
368 .id = 0x1f080060,
369 .mask = 0xffefffff,
370 },
371 {0, 0},
372};
373
374static struct amba_driver nmk_gpio_driver = {
375 .drv = {
376 .owner = THIS_MODULE,
377 .name = "gpio",
378 },
379 .probe = nmk_gpio_probe,
380 .remove = nmk_gpio_remove,
381 .suspend = NULL, /* to be done */
382 .resume = NULL,
383 .id_table = nmk_gpio_ids,
384};
385
386static int __init nmk_gpio_init(void)
387{
388 return amba_driver_register(&nmk_gpio_driver);
389}
390
391arch_initcall(nmk_gpio_init);
392
393MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
394MODULE_DESCRIPTION("Nomadik GPIO Driver");
395MODULE_LICENSE("GPL");
396
397