blob: 9a798245b1bc54ccd0a812c45944f7480079d7ec [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +010021#include "reg.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070022
23#define ATH_PCI_VERSION "0.1"
24
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025static char *dev_info = "ath9k";
26
27MODULE_AUTHOR("Atheros Communications");
28MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30MODULE_LICENSE("Dual BSD/GPL");
31
32static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
38 { 0 }
39};
40
Sujith9757d552008-11-04 18:25:27 +053041static void ath_detach(struct ath_softc *sc);
42
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070043static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
45{
46 int i;
47
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
50 return i;
51 }
52
53 return -1;
54}
55
56static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
58{
59 u32 chanmode = 0;
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
62
63 switch (chan->band) {
64 case IEEE80211_BAND_2GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020065 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020068 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070069 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020071 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070072 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
74 break;
75 case IEEE80211_BAND_5GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020076 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070077 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020079 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070080 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020082 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070083 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
85 break;
86 default:
87 break;
88 }
89
90 return chanmode;
91}
92
93
94static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
97 const u8 *addr)
98{
99 u8 *key_rxmic = NULL;
100 u8 *key_txmic = NULL;
101
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
104
105 if (addr == NULL) {
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
109 }
110 if (!sc->sc_splitmic) {
111 /*
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
114 */
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
118 }
119 /*
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
122 */
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
128 return 0;
129 }
130
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
134}
135
136static int ath_key_config(struct ath_softc *sc,
137 const u8 *addr,
138 struct ieee80211_key_conf *key)
139{
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
143 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200144 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700145
146 memset(&hk, 0, sizeof(hk));
147
148 switch (key->alg) {
149 case ALG_WEP:
150 hk.kv_type = ATH9K_CIPHER_WEP;
151 break;
152 case ALG_TKIP:
153 hk.kv_type = ATH9K_CIPHER_TKIP;
154 break;
155 case ALG_CCMP:
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
157 break;
158 default:
159 return -EINVAL;
160 }
161
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
164
165 if (!sc->sc_vaps[0])
166 return -EIO;
167
Sujith5640b082008-10-29 10:16:06 +0530168 vif = sc->sc_vaps[0];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700169 opmode = vif->type;
170
171 /*
172 * Strategy:
173 * For _M_STA mc tx, we will not setup a key at all since we never
174 * tx mc.
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
180 */
181 if (is_broadcast_ether_addr(addr)) {
182 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200183 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700184 /* default key: could be group WPA key
185 * or could be static WEP key */
186 mac = NULL;
187 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200188 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700189 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200190 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700191 break;
192 default:
193 ASSERT(0);
194 break;
195 }
196 } else {
197 mac = addr;
198 }
199
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 else
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
204
205 if (!ret)
206 return -EIO;
207
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700208 return 0;
209}
210
211static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
212{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700213 int freeslot;
214
Sujithff9b6622008-08-14 13:27:16 +0530215 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700217}
218
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200219static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700220{
Sujith60653672008-08-14 13:28:02 +0530221#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700223
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700229
Sujith60653672008-08-14 13:28:02 +0530230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700237}
238
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530239static void ath9k_ht_conf(struct ath_softc *sc,
240 struct ieee80211_bss_conf *bss_conf)
241{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530242 struct ath_ht_info *ht_info = &sc->sc_ht_info;
243
Johannes Bergae5eb022008-10-14 16:58:37 +0200244 if (sc->hw->conf.ht.enabled) {
245 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530246
Johannes Bergae5eb022008-10-14 16:58:37 +0200247 if (bss_conf->ht.width_40_ok)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530248 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
249 else
250 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
251
252 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530253 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530254}
255
256static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530257 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530258 struct ieee80211_bss_conf *bss_conf)
259{
260 struct ieee80211_hw *hw = sc->hw;
261 struct ieee80211_channel *curchan = hw->conf.channel;
Sujith5640b082008-10-29 10:16:06 +0530262 struct ath_vap *avp = (void *)vif->drv_priv;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530263 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530264
265 if (bss_conf->assoc) {
266 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
267 __func__,
268 bss_conf->aid);
269
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530270 /* New association, store aid */
271 if (avp->av_opmode == ATH9K_M_STA) {
272 sc->sc_curaid = bss_conf->aid;
273 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
274 sc->sc_curaid);
275 }
276
277 /* Configure the beacon */
278 ath_beacon_config(sc, 0);
279 sc->sc_flags |= SC_OP_BEACONS;
280
281 /* Reset rssi stats */
282 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
283 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
284 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
285 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
286
287 /* Update chainmask */
Johannes Bergae5eb022008-10-14 16:58:37 +0200288 ath_update_chainmask(sc, hw->conf.ht.enabled);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530289
290 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700291 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530292 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700293 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530294
295 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
296 __func__,
297 curchan->center_freq);
298
299 pos = ath_get_channel(sc, curchan);
300 if (pos == -1) {
301 DPRINTF(sc, ATH_DBG_FATAL,
302 "%s: Invalid channel\n", __func__);
303 return;
304 }
305
Johannes Bergae5eb022008-10-14 16:58:37 +0200306 if (hw->conf.ht.enabled)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530307 sc->sc_ah->ah_channels[pos].chanmode =
308 ath_get_extchanmode(sc, curchan);
309 else
310 sc->sc_ah->ah_channels[pos].chanmode =
311 (curchan->band == IEEE80211_BAND_2GHZ) ?
312 CHANNEL_G : CHANNEL_A;
313
314 /* set h/w channel */
315 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
316 DPRINTF(sc, ATH_DBG_FATAL,
317 "%s: Unable to set channel\n",
318 __func__);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700319 /* Start ANI */
320 mod_timer(&sc->sc_ani.timer,
321 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
322
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530323 } else {
324 DPRINTF(sc, ATH_DBG_CONFIG,
325 "%s: Bss Info DISSOC\n", __func__);
326 sc->sc_curaid = 0;
327 }
328}
329
330void ath_get_beaconconfig(struct ath_softc *sc,
331 int if_id,
332 struct ath_beacon_config *conf)
333{
334 struct ieee80211_hw *hw = sc->hw;
335
336 /* fill in beacon config data */
337
338 conf->beacon_interval = hw->conf.beacon_int;
339 conf->listen_interval = 100;
340 conf->dtim_count = 1;
341 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
342}
343
344void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Sujith528f0c62008-10-29 10:14:26 +0530345 struct ath_xmit_status *tx_status)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530346{
347 struct ieee80211_hw *hw = sc->hw;
348 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
Sujith46d14a52008-11-18 09:08:13 +0530349 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530350
351 DPRINTF(sc, ATH_DBG_XMIT,
352 "%s: TX complete: skb: %p\n", __func__, skb);
353
354 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
Sujith46d14a52008-11-18 09:08:13 +0530355 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
356 kfree(tx_info_priv);
357 tx_info->rate_driver_data[0] = NULL;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530358 }
359
360 if (tx_status->flags & ATH_TX_BAR) {
361 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
362 tx_status->flags &= ~ATH_TX_BAR;
363 }
364
Johannes Berge6a98542008-10-21 12:40:02 +0200365 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530366 /* Frame was ACKed */
367 tx_info->flags |= IEEE80211_TX_STAT_ACK;
368 }
369
Johannes Berge6a98542008-10-21 12:40:02 +0200370 tx_info->status.rates[0].count = tx_status->retries + 1;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530371
372 ieee80211_tx_status(hw, skb);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530373}
374
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530375/********************************/
376/* LED functions */
377/********************************/
378
379static void ath_led_brightness(struct led_classdev *led_cdev,
380 enum led_brightness brightness)
381{
382 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
383 struct ath_softc *sc = led->sc;
384
385 switch (brightness) {
386 case LED_OFF:
387 if (led->led_type == ATH_LED_ASSOC ||
388 led->led_type == ATH_LED_RADIO)
389 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
390 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
391 (led->led_type == ATH_LED_RADIO) ? 1 :
392 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
393 break;
394 case LED_FULL:
395 if (led->led_type == ATH_LED_ASSOC)
396 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
397 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
398 break;
399 default:
400 break;
401 }
402}
403
404static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
405 char *trigger)
406{
407 int ret;
408
409 led->sc = sc;
410 led->led_cdev.name = led->name;
411 led->led_cdev.default_trigger = trigger;
412 led->led_cdev.brightness_set = ath_led_brightness;
413
414 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
415 if (ret)
416 DPRINTF(sc, ATH_DBG_FATAL,
417 "Failed to register led:%s", led->name);
418 else
419 led->registered = 1;
420 return ret;
421}
422
423static void ath_unregister_led(struct ath_led *led)
424{
425 if (led->registered) {
426 led_classdev_unregister(&led->led_cdev);
427 led->registered = 0;
428 }
429}
430
431static void ath_deinit_leds(struct ath_softc *sc)
432{
433 ath_unregister_led(&sc->assoc_led);
434 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
435 ath_unregister_led(&sc->tx_led);
436 ath_unregister_led(&sc->rx_led);
437 ath_unregister_led(&sc->radio_led);
438 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
439}
440
441static void ath_init_leds(struct ath_softc *sc)
442{
443 char *trigger;
444 int ret;
445
446 /* Configure gpio 1 for output */
447 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
448 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
449 /* LED off, active low */
450 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
451
452 trigger = ieee80211_get_radio_led_name(sc->hw);
453 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
454 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
455 ret = ath_register_led(sc, &sc->radio_led, trigger);
456 sc->radio_led.led_type = ATH_LED_RADIO;
457 if (ret)
458 goto fail;
459
460 trigger = ieee80211_get_assoc_led_name(sc->hw);
461 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
462 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
463 ret = ath_register_led(sc, &sc->assoc_led, trigger);
464 sc->assoc_led.led_type = ATH_LED_ASSOC;
465 if (ret)
466 goto fail;
467
468 trigger = ieee80211_get_tx_led_name(sc->hw);
469 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
470 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
471 ret = ath_register_led(sc, &sc->tx_led, trigger);
472 sc->tx_led.led_type = ATH_LED_TX;
473 if (ret)
474 goto fail;
475
476 trigger = ieee80211_get_rx_led_name(sc->hw);
477 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
478 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
479 ret = ath_register_led(sc, &sc->rx_led, trigger);
480 sc->rx_led.led_type = ATH_LED_RX;
481 if (ret)
482 goto fail;
483
484 return;
485
486fail:
487 ath_deinit_leds(sc);
488}
489
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530490#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530491
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530492/*******************/
493/* Rfkill */
494/*******************/
495
496static void ath_radio_enable(struct ath_softc *sc)
497{
498 struct ath_hal *ah = sc->sc_ah;
499 int status;
500
501 spin_lock_bh(&sc->sc_resetlock);
502 if (!ath9k_hw_reset(ah, ah->ah_curchan,
503 sc->sc_ht_info.tx_chan_width,
504 sc->sc_tx_chainmask,
505 sc->sc_rx_chainmask,
506 sc->sc_ht_extprotspacing,
507 false, &status)) {
508 DPRINTF(sc, ATH_DBG_FATAL,
509 "%s: unable to reset channel %u (%uMhz) "
510 "flags 0x%x hal status %u\n", __func__,
511 ath9k_hw_mhz2ieee(ah,
512 ah->ah_curchan->channel,
513 ah->ah_curchan->channelFlags),
514 ah->ah_curchan->channel,
515 ah->ah_curchan->channelFlags, status);
516 }
517 spin_unlock_bh(&sc->sc_resetlock);
518
519 ath_update_txpow(sc);
520 if (ath_startrecv(sc) != 0) {
521 DPRINTF(sc, ATH_DBG_FATAL,
522 "%s: unable to restart recv logic\n", __func__);
523 return;
524 }
525
526 if (sc->sc_flags & SC_OP_BEACONS)
527 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
528
529 /* Re-Enable interrupts */
530 ath9k_hw_set_interrupts(ah, sc->sc_imask);
531
532 /* Enable LED */
533 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
534 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
535 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
536
537 ieee80211_wake_queues(sc->hw);
538}
539
540static void ath_radio_disable(struct ath_softc *sc)
541{
542 struct ath_hal *ah = sc->sc_ah;
543 int status;
544
545
546 ieee80211_stop_queues(sc->hw);
547
548 /* Disable LED */
549 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
550 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
551
552 /* Disable interrupts */
553 ath9k_hw_set_interrupts(ah, 0);
554
555 ath_draintxq(sc, false); /* clear pending tx frames */
556 ath_stoprecv(sc); /* turn off frame recv */
557 ath_flushrecv(sc); /* flush recv queue */
558
559 spin_lock_bh(&sc->sc_resetlock);
560 if (!ath9k_hw_reset(ah, ah->ah_curchan,
561 sc->sc_ht_info.tx_chan_width,
562 sc->sc_tx_chainmask,
563 sc->sc_rx_chainmask,
564 sc->sc_ht_extprotspacing,
565 false, &status)) {
566 DPRINTF(sc, ATH_DBG_FATAL,
567 "%s: unable to reset channel %u (%uMhz) "
568 "flags 0x%x hal status %u\n", __func__,
569 ath9k_hw_mhz2ieee(ah,
570 ah->ah_curchan->channel,
571 ah->ah_curchan->channelFlags),
572 ah->ah_curchan->channel,
573 ah->ah_curchan->channelFlags, status);
574 }
575 spin_unlock_bh(&sc->sc_resetlock);
576
577 ath9k_hw_phy_disable(ah);
578 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
579}
580
581static bool ath_is_rfkill_set(struct ath_softc *sc)
582{
583 struct ath_hal *ah = sc->sc_ah;
584
585 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
586 ah->ah_rfkill_polarity;
587}
588
589/* h/w rfkill poll function */
590static void ath_rfkill_poll(struct work_struct *work)
591{
592 struct ath_softc *sc = container_of(work, struct ath_softc,
593 rf_kill.rfkill_poll.work);
594 bool radio_on;
595
596 if (sc->sc_flags & SC_OP_INVALID)
597 return;
598
599 radio_on = !ath_is_rfkill_set(sc);
600
601 /*
602 * enable/disable radio only when there is a
603 * state change in RF switch
604 */
605 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
606 enum rfkill_state state;
607
608 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
609 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
610 : RFKILL_STATE_HARD_BLOCKED;
611 } else if (radio_on) {
612 ath_radio_enable(sc);
613 state = RFKILL_STATE_UNBLOCKED;
614 } else {
615 ath_radio_disable(sc);
616 state = RFKILL_STATE_HARD_BLOCKED;
617 }
618
619 if (state == RFKILL_STATE_HARD_BLOCKED)
620 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
621 else
622 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
623
624 rfkill_force_state(sc->rf_kill.rfkill, state);
625 }
626
627 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
628 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
629}
630
631/* s/w rfkill handler */
632static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
633{
634 struct ath_softc *sc = data;
635
636 switch (state) {
637 case RFKILL_STATE_SOFT_BLOCKED:
638 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
639 SC_OP_RFKILL_SW_BLOCKED)))
640 ath_radio_disable(sc);
641 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
642 return 0;
643 case RFKILL_STATE_UNBLOCKED:
644 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
645 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
646 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
647 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
648 "radio as it is disabled by h/w \n");
649 return -EPERM;
650 }
651 ath_radio_enable(sc);
652 }
653 return 0;
654 default:
655 return -EINVAL;
656 }
657}
658
659/* Init s/w rfkill */
660static int ath_init_sw_rfkill(struct ath_softc *sc)
661{
662 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
663 RFKILL_TYPE_WLAN);
664 if (!sc->rf_kill.rfkill) {
665 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
666 return -ENOMEM;
667 }
668
669 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
670 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
671 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
672 sc->rf_kill.rfkill->data = sc;
673 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
674 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
675 sc->rf_kill.rfkill->user_claim_unsupported = 1;
676
677 return 0;
678}
679
680/* Deinitialize rfkill */
681static void ath_deinit_rfkill(struct ath_softc *sc)
682{
683 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
684 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
685
686 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
687 rfkill_unregister(sc->rf_kill.rfkill);
688 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
689 sc->rf_kill.rfkill = NULL;
690 }
691}
Sujith9c84b792008-10-29 10:17:13 +0530692
693static int ath_start_rfkill_poll(struct ath_softc *sc)
694{
695 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
696 queue_delayed_work(sc->hw->workqueue,
697 &sc->rf_kill.rfkill_poll, 0);
698
699 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
700 if (rfkill_register(sc->rf_kill.rfkill)) {
701 DPRINTF(sc, ATH_DBG_FATAL,
702 "Unable to register rfkill\n");
703 rfkill_free(sc->rf_kill.rfkill);
704
705 /* Deinitialize the device */
Senthil Balasubramanian306efdd2008-11-13 18:00:37 +0530706 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +0530707 if (sc->pdev->irq)
708 free_irq(sc->pdev->irq, sc);
Sujith9c84b792008-10-29 10:17:13 +0530709 pci_iounmap(sc->pdev, sc->mem);
710 pci_release_region(sc->pdev, 0);
711 pci_disable_device(sc->pdev);
Sujith9757d552008-11-04 18:25:27 +0530712 ieee80211_free_hw(sc->hw);
Sujith9c84b792008-10-29 10:17:13 +0530713 return -EIO;
714 } else {
715 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
716 }
717 }
718
719 return 0;
720}
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530721#endif /* CONFIG_RFKILL */
722
Sujith9c84b792008-10-29 10:17:13 +0530723static void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530724{
725 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +0530726 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530727
728 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
729
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530730#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530731 ath_deinit_rfkill(sc);
732#endif
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +0530733 ath_deinit_leds(sc);
734
735 ieee80211_unregister_hw(hw);
736
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530737 ath_rate_control_unregister();
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530738
739 ath_rx_cleanup(sc);
740 ath_tx_cleanup(sc);
741
Sujith9c84b792008-10-29 10:17:13 +0530742 tasklet_kill(&sc->intr_tq);
743 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530744
Sujith9c84b792008-10-29 10:17:13 +0530745 if (!(sc->sc_flags & SC_OP_INVALID))
746 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530747
Sujith9c84b792008-10-29 10:17:13 +0530748 /* cleanup tx queues */
749 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
750 if (ATH_TXQ_SETUP(sc, i))
751 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
752
753 ath9k_hw_detach(sc->sc_ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530754}
755
Sujith9c84b792008-10-29 10:17:13 +0530756static int ath_attach(u16 devid, struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530757{
758 struct ieee80211_hw *hw = sc->hw;
759 int error = 0;
760
761 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
762
763 error = ath_init(devid, sc);
764 if (error != 0)
765 return error;
766
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530767 /* get mac address from hardware and set in mac80211 */
768
769 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
770
Sujith9c84b792008-10-29 10:17:13 +0530771 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
772 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
773 IEEE80211_HW_SIGNAL_DBM |
774 IEEE80211_HW_AMPDU_AGGREGATION;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530775
Sujith9c84b792008-10-29 10:17:13 +0530776 hw->wiphy->interface_modes =
777 BIT(NL80211_IFTYPE_AP) |
778 BIT(NL80211_IFTYPE_STATION) |
779 BIT(NL80211_IFTYPE_ADHOC);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530780
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530781 hw->queues = 4;
Sujithe63835b2008-11-18 09:07:53 +0530782 hw->max_rates = 4;
783 hw->max_rate_tries = ATH_11N_TXMAXTRY;
Sujith528f0c62008-10-29 10:14:26 +0530784 hw->sta_data_size = sizeof(struct ath_node);
Sujith5640b082008-10-29 10:16:06 +0530785 hw->vif_data_size = sizeof(struct ath_vap);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530786
787 /* Register rate control */
788 hw->rate_control_algorithm = "ath9k_rate_control";
789 error = ath_rate_control_register();
790 if (error != 0) {
791 DPRINTF(sc, ATH_DBG_FATAL,
792 "%s: Unable to register rate control "
793 "algorithm:%d\n", __func__, error);
794 ath_rate_control_unregister();
795 goto bad;
796 }
797
Sujith9c84b792008-10-29 10:17:13 +0530798 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
799 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
800 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
801 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
802 }
803
804 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
805 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
806 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
807 &sc->sbands[IEEE80211_BAND_5GHZ];
808
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530809 /* initialize tx/rx engine */
810 error = ath_tx_init(sc, ATH_TXBUF);
811 if (error != 0)
812 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530813
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530814 error = ath_rx_init(sc, ATH_RXBUF);
815 if (error != 0)
816 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530817
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530818#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530819 /* Initialze h/w Rfkill */
820 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
821 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
822
823 /* Initialize s/w rfkill */
824 if (ath_init_sw_rfkill(sc))
825 goto detach;
826#endif
827
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530828 error = ieee80211_register_hw(hw);
829 if (error != 0) {
830 ath_rate_control_unregister();
831 goto bad;
832 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530833
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530834 /* Initialize LED control */
835 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530836
837 return 0;
838detach:
839 ath_detach(sc);
840bad:
841 return error;
842}
843
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700844static int ath9k_start(struct ieee80211_hw *hw)
845{
846 struct ath_softc *sc = hw->priv;
847 struct ieee80211_channel *curchan = hw->conf.channel;
848 int error = 0, pos;
849
850 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
851 "initial channel: %d MHz\n", __func__, curchan->center_freq);
852
Sujith7f959032008-10-29 10:18:39 +0530853 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
854
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700855 /* setup initial channel */
856
857 pos = ath_get_channel(sc, curchan);
858 if (pos == -1) {
859 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530860 error = -EINVAL;
861 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700862 }
863
864 sc->sc_ah->ah_channels[pos].chanmode =
865 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
866
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700867 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
868 if (error) {
869 DPRINTF(sc, ATH_DBG_FATAL,
870 "%s: Unable to complete ath_open\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530871 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700872 }
873
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530874#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530875 error = ath_start_rfkill_poll(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530876#endif
877
Sujith9c84b792008-10-29 10:17:13 +0530878exit:
879 return error;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700880}
881
882static int ath9k_tx(struct ieee80211_hw *hw,
883 struct sk_buff *skb)
884{
Jouni Malinen147583c2008-08-11 14:01:50 +0300885 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Sujith528f0c62008-10-29 10:14:26 +0530886 struct ath_softc *sc = hw->priv;
887 struct ath_tx_control txctl;
888 int hdrlen, padsize;
889
890 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +0300891
892 /*
893 * As a temporary workaround, assign seq# here; this will likely need
894 * to be cleaned up to work better with Beacon transmission and virtual
895 * BSSes.
896 */
897 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
898 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
899 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
900 sc->seq_no += 0x10;
901 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
902 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
903 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700904
905 /* Add the padding after the header if this is not already done */
906 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
907 if (hdrlen & 3) {
908 padsize = hdrlen % 4;
909 if (skb_headroom(skb) < padsize)
910 return -1;
911 skb_push(skb, padsize);
912 memmove(skb->data, skb->data + padsize, hdrlen);
913 }
914
Sujith528f0c62008-10-29 10:14:26 +0530915 /* Check if a tx queue is available */
916
917 txctl.txq = ath_test_get_txq(sc, skb);
918 if (!txctl.txq)
919 goto exit;
920
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700921 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
922 __func__,
923 skb);
924
Sujith528f0c62008-10-29 10:14:26 +0530925 if (ath_tx_start(sc, skb, &txctl) != 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700926 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
Sujith528f0c62008-10-29 10:14:26 +0530927 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700928 }
929
930 return 0;
Sujith528f0c62008-10-29 10:14:26 +0530931exit:
932 dev_kfree_skb_any(skb);
933 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700934}
935
936static void ath9k_stop(struct ieee80211_hw *hw)
937{
938 struct ath_softc *sc = hw->priv;
Sujith9c84b792008-10-29 10:17:13 +0530939
940 if (sc->sc_flags & SC_OP_INVALID) {
941 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
942 return;
943 }
944
945 ath_stop(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700946
947 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700948}
949
950static int ath9k_add_interface(struct ieee80211_hw *hw,
951 struct ieee80211_if_init_conf *conf)
952{
953 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +0530954 struct ath_vap *avp = (void *)conf->vif->drv_priv;
955 int ic_opmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700956
957 /* Support only vap for now */
958
959 if (sc->sc_nvaps)
960 return -ENOBUFS;
961
962 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200963 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700964 ic_opmode = ATH9K_M_STA;
965 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200966 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700967 ic_opmode = ATH9K_M_IBSS;
968 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200969 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300970 ic_opmode = ATH9K_M_HOSTAP;
971 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700972 default:
973 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300974 "%s: Interface type %d not yet supported\n",
975 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700976 return -EOPNOTSUPP;
977 }
978
979 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
980 __func__,
981 ic_opmode);
982
Sujith5640b082008-10-29 10:16:06 +0530983 /* Set the VAP opmode */
984 avp->av_opmode = ic_opmode;
985 avp->av_bslot = -1;
986
987 if (ic_opmode == ATH9K_M_HOSTAP)
988 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
989
990 sc->sc_vaps[0] = conf->vif;
991 sc->sc_nvaps++;
992
993 /* Set the device opmode */
994 sc->sc_ah->ah_opmode = ic_opmode;
995
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700996 if (conf->type == NL80211_IFTYPE_AP) {
997 /* TODO: is this a suitable place to start ANI for AP mode? */
998 /* Start ANI */
999 mod_timer(&sc->sc_ani.timer,
1000 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1001 }
1002
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001003 return 0;
1004}
1005
1006static void ath9k_remove_interface(struct ieee80211_hw *hw,
1007 struct ieee80211_if_init_conf *conf)
1008{
1009 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301010 struct ath_vap *avp = (void *)conf->vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001011
1012 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1013
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001014#ifdef CONFIG_SLOW_ANT_DIV
1015 ath_slow_ant_div_stop(&sc->sc_antdiv);
1016#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001017 /* Stop ANI */
1018 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001019
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001020 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301021 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1022 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001023 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1024 ath_beacon_return(sc, avp);
1025 }
1026
Sujith672840a2008-08-11 14:05:08 +05301027 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001028
Sujith5640b082008-10-29 10:16:06 +05301029 sc->sc_vaps[0] = NULL;
1030 sc->sc_nvaps--;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001031}
1032
Johannes Berge8975582008-10-09 12:18:51 +02001033static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001034{
1035 struct ath_softc *sc = hw->priv;
1036 struct ieee80211_channel *curchan = hw->conf.channel;
Johannes Berge8975582008-10-09 12:18:51 +02001037 struct ieee80211_conf *conf = &hw->conf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001038 int pos;
1039
1040 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1041 __func__,
1042 curchan->center_freq);
1043
Johannes Bergae5eb022008-10-14 16:58:37 +02001044 /* Update chainmask */
1045 ath_update_chainmask(sc, conf->ht.enabled);
1046
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001047 pos = ath_get_channel(sc, curchan);
1048 if (pos == -1) {
1049 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1050 return -EINVAL;
1051 }
1052
1053 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301054 (curchan->band == IEEE80211_BAND_2GHZ) ?
1055 CHANNEL_G : CHANNEL_A;
1056
Johannes Bergae5eb022008-10-14 16:58:37 +02001057 if (sc->sc_curaid && hw->conf.ht.enabled)
Sujith86b89ee2008-08-07 10:54:57 +05301058 sc->sc_ah->ah_channels[pos].chanmode =
1059 ath_get_extchanmode(sc, curchan);
1060
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07001061 if (changed & IEEE80211_CONF_CHANGE_POWER)
1062 sc->sc_config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001063
1064 /* set h/w channel */
1065 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1066 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1067 __func__);
1068
1069 return 0;
1070}
1071
1072static int ath9k_config_interface(struct ieee80211_hw *hw,
1073 struct ieee80211_vif *vif,
1074 struct ieee80211_if_conf *conf)
1075{
1076 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001077 struct ath_hal *ah = sc->sc_ah;
Sujith5640b082008-10-29 10:16:06 +05301078 struct ath_vap *avp = (void *)vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001079 u32 rfilt = 0;
1080 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001081
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001082 /* TODO: Need to decide which hw opmode to use for multi-interface
1083 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001084 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001085 ah->ah_opmode != ATH9K_M_HOSTAP) {
1086 ah->ah_opmode = ATH9K_M_HOSTAP;
1087 ath9k_hw_setopmode(ah);
1088 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1089 /* Request full reset to get hw opmode changed properly */
1090 sc->sc_flags |= SC_OP_FULL_RESET;
1091 }
1092
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001093 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1094 !is_zero_ether_addr(conf->bssid)) {
1095 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001096 case NL80211_IFTYPE_STATION:
1097 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001098 /* Set BSSID */
1099 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1100 sc->sc_curaid = 0;
1101 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1102 sc->sc_curaid);
1103
1104 /* Set aggregation protection mode parameters */
1105 sc->sc_config.ath_aggr_prot = 0;
1106
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001107 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001108 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001109 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001110 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001111
1112 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301113 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001114
1115 break;
1116 default:
1117 break;
1118 }
1119 }
1120
1121 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001122 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1123 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001124 /*
1125 * Allocate and setup the beacon frame.
1126 *
1127 * Stop any previous beacon DMA. This may be
1128 * necessary, for example, when an ibss merge
1129 * causes reconfiguration; we may be called
1130 * with beacon transmission active.
1131 */
1132 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1133
1134 error = ath_beacon_alloc(sc, 0);
1135 if (error != 0)
1136 return error;
1137
1138 ath_beacon_sync(sc, 0);
1139 }
1140
1141 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Sujith5640b082008-10-29 10:16:06 +05301142 if ((avp->av_opmode != ATH9K_M_STA)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001143 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1144 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1145 ath9k_hw_keysetmac(sc->sc_ah,
1146 (u16)i,
1147 sc->sc_curbssid);
1148 }
1149
1150 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001151 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001152 ath_update_chainmask(sc, 0);
1153
1154 return 0;
1155}
1156
1157#define SUPPORTED_FILTERS \
1158 (FIF_PROMISC_IN_BSS | \
1159 FIF_ALLMULTI | \
1160 FIF_CONTROL | \
1161 FIF_OTHER_BSS | \
1162 FIF_BCN_PRBRESP_PROMISC | \
1163 FIF_FCSFAIL)
1164
Sujith7dcfdcd2008-08-11 14:03:13 +05301165/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001166static void ath9k_configure_filter(struct ieee80211_hw *hw,
1167 unsigned int changed_flags,
1168 unsigned int *total_flags,
1169 int mc_count,
1170 struct dev_mc_list *mclist)
1171{
1172 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301173 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001174
1175 changed_flags &= SUPPORTED_FILTERS;
1176 *total_flags &= SUPPORTED_FILTERS;
1177
Sujith7dcfdcd2008-08-11 14:03:13 +05301178 sc->rx_filter = *total_flags;
1179 rfilt = ath_calcrxfilter(sc);
1180 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1181
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001182 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1183 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301184 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001185 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301186
1187 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1188 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001189}
1190
1191static void ath9k_sta_notify(struct ieee80211_hw *hw,
1192 struct ieee80211_vif *vif,
1193 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001194 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001195{
1196 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001197
1198 switch (cmd) {
1199 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05301200 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001201 break;
1202 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05301203 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001204 break;
1205 default:
1206 break;
1207 }
1208}
1209
1210static int ath9k_conf_tx(struct ieee80211_hw *hw,
1211 u16 queue,
1212 const struct ieee80211_tx_queue_params *params)
1213{
1214 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301215 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001216 int ret = 0, qnum;
1217
1218 if (queue >= WME_NUM_AC)
1219 return 0;
1220
1221 qi.tqi_aifs = params->aifs;
1222 qi.tqi_cwmin = params->cw_min;
1223 qi.tqi_cwmax = params->cw_max;
1224 qi.tqi_burstTime = params->txop;
1225 qnum = ath_get_hal_qnum(queue, sc);
1226
1227 DPRINTF(sc, ATH_DBG_CONFIG,
1228 "%s: Configure tx [queue/halq] [%d/%d], "
1229 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1230 __func__,
1231 queue,
1232 qnum,
1233 params->aifs,
1234 params->cw_min,
1235 params->cw_max,
1236 params->txop);
1237
1238 ret = ath_txq_update(sc, qnum, &qi);
1239 if (ret)
1240 DPRINTF(sc, ATH_DBG_FATAL,
1241 "%s: TXQ Update failed\n", __func__);
1242
1243 return ret;
1244}
1245
1246static int ath9k_set_key(struct ieee80211_hw *hw,
1247 enum set_key_cmd cmd,
1248 const u8 *local_addr,
1249 const u8 *addr,
1250 struct ieee80211_key_conf *key)
1251{
1252 struct ath_softc *sc = hw->priv;
1253 int ret = 0;
1254
1255 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1256
1257 switch (cmd) {
1258 case SET_KEY:
1259 ret = ath_key_config(sc, addr, key);
1260 if (!ret) {
1261 set_bit(key->keyidx, sc->sc_keymap);
1262 key->hw_key_idx = key->keyidx;
1263 /* push IV and Michael MIC generation to stack */
1264 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301265 if (key->alg == ALG_TKIP)
1266 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001267 }
1268 break;
1269 case DISABLE_KEY:
1270 ath_key_delete(sc, key);
1271 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001272 break;
1273 default:
1274 ret = -EINVAL;
1275 }
1276
1277 return ret;
1278}
1279
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001280static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1281 struct ieee80211_vif *vif,
1282 struct ieee80211_bss_conf *bss_conf,
1283 u32 changed)
1284{
1285 struct ath_softc *sc = hw->priv;
1286
1287 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1288 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1289 __func__,
1290 bss_conf->use_short_preamble);
1291 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301292 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001293 else
Sujith672840a2008-08-11 14:05:08 +05301294 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001295 }
1296
1297 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1298 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1299 __func__,
1300 bss_conf->use_cts_prot);
1301 if (bss_conf->use_cts_prot &&
1302 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301303 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001304 else
Sujith672840a2008-08-11 14:05:08 +05301305 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001306 }
1307
1308 if (changed & BSS_CHANGED_HT) {
Johannes Bergae5eb022008-10-14 16:58:37 +02001309 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1310 __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001311 ath9k_ht_conf(sc, bss_conf);
1312 }
1313
1314 if (changed & BSS_CHANGED_ASSOC) {
1315 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1316 __func__,
1317 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05301318 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001319 }
1320}
1321
1322static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1323{
1324 u64 tsf;
1325 struct ath_softc *sc = hw->priv;
1326 struct ath_hal *ah = sc->sc_ah;
1327
1328 tsf = ath9k_hw_gettsf64(ah);
1329
1330 return tsf;
1331}
1332
1333static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1334{
1335 struct ath_softc *sc = hw->priv;
1336 struct ath_hal *ah = sc->sc_ah;
1337
1338 ath9k_hw_reset_tsf(ah);
1339}
1340
1341static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1342 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001343 struct ieee80211_sta *sta,
1344 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001345{
1346 struct ath_softc *sc = hw->priv;
1347 int ret = 0;
1348
1349 switch (action) {
1350 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05301351 if (!(sc->sc_flags & SC_OP_RXAGGR))
1352 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001353 break;
1354 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001355 break;
1356 case IEEE80211_AMPDU_TX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301357 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001358 if (ret < 0)
1359 DPRINTF(sc, ATH_DBG_FATAL,
1360 "%s: Unable to start TX aggregation\n",
1361 __func__);
1362 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001363 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001364 break;
1365 case IEEE80211_AMPDU_TX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301366 ret = ath_tx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001367 if (ret < 0)
1368 DPRINTF(sc, ATH_DBG_FATAL,
1369 "%s: Unable to stop TX aggregation\n",
1370 __func__);
1371
Johannes Berg17741cd2008-09-11 00:02:02 +02001372 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001373 break;
Sujith8469cde2008-10-29 10:19:28 +05301374 case IEEE80211_AMPDU_TX_RESUME:
1375 ath_tx_aggr_resume(sc, sta, tid);
1376 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001377 default:
1378 DPRINTF(sc, ATH_DBG_FATAL,
1379 "%s: Unknown AMPDU action\n", __func__);
1380 }
1381
1382 return ret;
1383}
1384
Johannes Berg4233df62008-10-13 13:35:05 +02001385static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1386{
1387 return -EOPNOTSUPP;
1388}
1389
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001390static struct ieee80211_ops ath9k_ops = {
1391 .tx = ath9k_tx,
1392 .start = ath9k_start,
1393 .stop = ath9k_stop,
1394 .add_interface = ath9k_add_interface,
1395 .remove_interface = ath9k_remove_interface,
1396 .config = ath9k_config,
1397 .config_interface = ath9k_config_interface,
1398 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001399 .sta_notify = ath9k_sta_notify,
1400 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001401 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001402 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001403 .get_tsf = ath9k_get_tsf,
1404 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02001405 .ampdu_action = ath9k_ampdu_action,
1406 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001407};
1408
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001409static struct {
1410 u32 version;
1411 const char * name;
1412} ath_mac_bb_names[] = {
1413 { AR_SREV_VERSION_5416_PCI, "5416" },
1414 { AR_SREV_VERSION_5416_PCIE, "5418" },
1415 { AR_SREV_VERSION_9100, "9100" },
1416 { AR_SREV_VERSION_9160, "9160" },
1417 { AR_SREV_VERSION_9280, "9280" },
1418 { AR_SREV_VERSION_9285, "9285" }
1419};
1420
1421static struct {
1422 u16 version;
1423 const char * name;
1424} ath_rf_names[] = {
1425 { 0, "5133" },
1426 { AR_RAD5133_SREV_MAJOR, "5133" },
1427 { AR_RAD5122_SREV_MAJOR, "5122" },
1428 { AR_RAD2133_SREV_MAJOR, "2133" },
1429 { AR_RAD2122_SREV_MAJOR, "2122" }
1430};
1431
1432/*
1433 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1434 */
1435
1436static const char *
1437ath_mac_bb_name(u32 mac_bb_version)
1438{
1439 int i;
1440
1441 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1442 if (ath_mac_bb_names[i].version == mac_bb_version) {
1443 return ath_mac_bb_names[i].name;
1444 }
1445 }
1446
1447 return "????";
1448}
1449
1450/*
1451 * Return the RF name. "????" is returned if the RF is unknown.
1452 */
1453
1454static const char *
1455ath_rf_name(u16 rf_version)
1456{
1457 int i;
1458
1459 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1460 if (ath_rf_names[i].version == rf_version) {
1461 return ath_rf_names[i].name;
1462 }
1463 }
1464
1465 return "????";
1466}
1467
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001468static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1469{
1470 void __iomem *mem;
1471 struct ath_softc *sc;
1472 struct ieee80211_hw *hw;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001473 u8 csz;
1474 u32 val;
1475 int ret = 0;
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001476 struct ath_hal *ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001477
1478 if (pci_enable_device(pdev))
1479 return -EIO;
1480
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001481 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1482
1483 if (ret) {
Luis R. Rodriguez1d450cf2008-11-13 19:11:56 -08001484 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001485 goto bad;
1486 }
1487
1488 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1489
1490 if (ret) {
1491 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1492 "DMA enable faled\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001493 goto bad;
1494 }
1495
1496 /*
1497 * Cache line size is used to size and align various
1498 * structures used to communicate with the hardware.
1499 */
1500 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1501 if (csz == 0) {
1502 /*
1503 * Linux 2.4.18 (at least) writes the cache line size
1504 * register as a 16-bit wide register which is wrong.
1505 * We must have this setup properly for rx buffer
1506 * DMA to work so force a reasonable value here if it
1507 * comes up zero.
1508 */
1509 csz = L1_CACHE_BYTES / sizeof(u32);
1510 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1511 }
1512 /*
1513 * The default setting of latency timer yields poor results,
1514 * set it to the value used by other systems. It may be worth
1515 * tweaking this setting more.
1516 */
1517 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1518
1519 pci_set_master(pdev);
1520
1521 /*
1522 * Disable the RETRY_TIMEOUT register (0x41) to keep
1523 * PCI Tx retries from interfering with C3 CPU state.
1524 */
1525 pci_read_config_dword(pdev, 0x40, &val);
1526 if ((val & 0x0000ff00) != 0)
1527 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1528
1529 ret = pci_request_region(pdev, 0, "ath9k");
1530 if (ret) {
1531 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1532 ret = -ENODEV;
1533 goto bad;
1534 }
1535
1536 mem = pci_iomap(pdev, 0, 0);
1537 if (!mem) {
1538 printk(KERN_ERR "PCI memory map error\n") ;
1539 ret = -EIO;
1540 goto bad1;
1541 }
1542
1543 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1544 if (hw == NULL) {
1545 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1546 goto bad2;
1547 }
1548
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001549 SET_IEEE80211_DEV(hw, &pdev->dev);
1550 pci_set_drvdata(pdev, hw);
1551
1552 sc = hw->priv;
1553 sc->hw = hw;
1554 sc->pdev = pdev;
1555 sc->mem = mem;
1556
1557 if (ath_attach(id->device, sc) != 0) {
1558 ret = -ENODEV;
1559 goto bad3;
1560 }
1561
1562 /* setup interrupt service routine */
1563
1564 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1565 printk(KERN_ERR "%s: request_irq failed\n",
1566 wiphy_name(hw->wiphy));
1567 ret = -EIO;
1568 goto bad4;
1569 }
1570
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001571 ah = sc->sc_ah;
1572 printk(KERN_INFO
1573 "%s: Atheros AR%s MAC/BB Rev:%x "
1574 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001575 wiphy_name(hw->wiphy),
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001576 ath_mac_bb_name(ah->ah_macVersion),
1577 ah->ah_macRev,
1578 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1579 ah->ah_phyRev,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001580 (unsigned long)mem, pdev->irq);
1581
1582 return 0;
1583bad4:
1584 ath_detach(sc);
1585bad3:
1586 ieee80211_free_hw(hw);
1587bad2:
1588 pci_iounmap(pdev, mem);
1589bad1:
1590 pci_release_region(pdev, 0);
1591bad:
1592 pci_disable_device(pdev);
1593 return ret;
1594}
1595
1596static void ath_pci_remove(struct pci_dev *pdev)
1597{
1598 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1599 struct ath_softc *sc = hw->priv;
1600
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001601 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +05301602 if (pdev->irq)
1603 free_irq(pdev->irq, sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001604 pci_iounmap(pdev, sc->mem);
1605 pci_release_region(pdev, 0);
1606 pci_disable_device(pdev);
1607 ieee80211_free_hw(hw);
1608}
1609
1610#ifdef CONFIG_PM
1611
1612static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1613{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301614 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1615 struct ath_softc *sc = hw->priv;
1616
1617 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301618
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301619#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301620 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1621 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1622#endif
1623
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001624 pci_save_state(pdev);
1625 pci_disable_device(pdev);
1626 pci_set_power_state(pdev, 3);
1627
1628 return 0;
1629}
1630
1631static int ath_pci_resume(struct pci_dev *pdev)
1632{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301633 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1634 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001635 u32 val;
1636 int err;
1637
1638 err = pci_enable_device(pdev);
1639 if (err)
1640 return err;
1641 pci_restore_state(pdev);
1642 /*
1643 * Suspend/Resume resets the PCI configuration space, so we have to
1644 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1645 * PCI Tx retries from interfering with C3 CPU state
1646 */
1647 pci_read_config_dword(pdev, 0x40, &val);
1648 if ((val & 0x0000ff00) != 0)
1649 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1650
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301651 /* Enable LED */
1652 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1653 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1654 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1655
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301656#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301657 /*
1658 * check the h/w rfkill state on resume
1659 * and start the rfkill poll timer
1660 */
1661 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1662 queue_delayed_work(sc->hw->workqueue,
1663 &sc->rf_kill.rfkill_poll, 0);
1664#endif
1665
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001666 return 0;
1667}
1668
1669#endif /* CONFIG_PM */
1670
1671MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1672
1673static struct pci_driver ath_pci_driver = {
1674 .name = "ath9k",
1675 .id_table = ath_pci_id_table,
1676 .probe = ath_pci_probe,
1677 .remove = ath_pci_remove,
1678#ifdef CONFIG_PM
1679 .suspend = ath_pci_suspend,
1680 .resume = ath_pci_resume,
1681#endif /* CONFIG_PM */
1682};
1683
1684static int __init init_ath_pci(void)
1685{
1686 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1687
1688 if (pci_register_driver(&ath_pci_driver) < 0) {
1689 printk(KERN_ERR
1690 "ath_pci: No devices found, driver not installed.\n");
1691 pci_unregister_driver(&ath_pci_driver);
1692 return -ENODEV;
1693 }
1694
1695 return 0;
1696}
1697module_init(init_ath_pci);
1698
1699static void __exit exit_ath_pci(void)
1700{
1701 pci_unregister_driver(&ath_pci_driver);
1702 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1703}
1704module_exit(exit_ath_pci);