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gerrit-public.fairphone.software / kernel / msm-5.4 / 498315b98144d12bf9e05db68822af8506e697bc / . / arch / arm / boot / dts / dbx5x0.dtsi
blob: 6198616ad4f0efd82c541e232980595271660769 [file] [log] [blame]
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000[diff] [blame]1/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
Gabriel Fernandezb1ba1432013-03-01 14:38:07 +0100[diff] [blame]15 soc {
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000[diff] [blame]16 #address-cells = <1>;
17 #size-cells = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]18 compatible = "stericsson,db8500";
Lee Jonesdab64872012-03-07 17:22:30 +0000[diff] [blame]19 interrupt-parent = <&intc>;
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000[diff] [blame]20 ranges;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]21
Lee Jonesdab64872012-03-07 17:22:30 +0000[diff] [blame]22 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
25 #address-cells = <1>;
26 interrupt-controller;
Lee Jonesdab64872012-03-07 17:22:30 +0000[diff] [blame]27 reg = <0xa0411000 0x1000>,
28 <0xa0410100 0x100>;
29 };
30
Lee Jonesf1949ea2012-03-08 09:02:02 +0000[diff] [blame]31 L2: l2-cache {
32 compatible = "arm,pl310-cache";
33 reg = <0xa0412000 0x1000>;
34 interrupts = <0 13 4>;
35 cache-unified;
36 cache-level = <2>;
37 };
38
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]39 pmu {
40 compatible = "arm,cortex-a9-pmu";
41 interrupts = <0 7 0x4>;
42 };
43
Lee Jones71de5c42012-03-16 09:53:24 +0000[diff] [blame]44 timer@a0410600 {
45 compatible = "arm,cortex-a9-twd-timer";
46 reg = <0xa0410600 0x20>;
47 interrupts = <1 13 0x304>;
48 };
49
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]50 rtc@80154000 {
Lee Jonesddb3b992012-05-26 07:01:31 +0100[diff] [blame]51 compatible = "arm,rtc-pl031", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]52 reg = <0x80154000 0x1000>;
53 interrupts = <0 18 0x4>;
54 };
55
56 gpio0: gpio@8012e000 {
57 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]58 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]59 reg = <0x8012e000 0x80>;
60 interrupts = <0 119 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]61 interrupt-controller;
62 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]63 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]64 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]65 #gpio-cells = <2>;
66 gpio-bank = <0>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]67 };
68
69 gpio1: gpio@8012e080 {
70 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]71 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]72 reg = <0x8012e080 0x80>;
73 interrupts = <0 120 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]74 interrupt-controller;
75 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]76 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]77 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]78 #gpio-cells = <2>;
79 gpio-bank = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]80 };
81
82 gpio2: gpio@8000e000 {
83 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]84 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]85 reg = <0x8000e000 0x80>;
86 interrupts = <0 121 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]87 interrupt-controller;
88 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]89 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]90 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]91 #gpio-cells = <2>;
92 gpio-bank = <2>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]93 };
94
95 gpio3: gpio@8000e080 {
96 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]97 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]98 reg = <0x8000e080 0x80>;
99 interrupts = <0 122 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]100 interrupt-controller;
101 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]102 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]103 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]104 #gpio-cells = <2>;
105 gpio-bank = <3>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]106 };
107
108 gpio4: gpio@8000e100 {
109 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]110 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]111 reg = <0x8000e100 0x80>;
112 interrupts = <0 123 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]113 interrupt-controller;
114 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]115 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]116 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]117 #gpio-cells = <2>;
118 gpio-bank = <4>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]119 };
120
121 gpio5: gpio@8000e180 {
122 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]123 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]124 reg = <0x8000e180 0x80>;
125 interrupts = <0 124 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]126 interrupt-controller;
127 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]128 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]129 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]130 #gpio-cells = <2>;
131 gpio-bank = <5>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]132 };
133
134 gpio6: gpio@8011e000 {
135 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]136 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]137 reg = <0x8011e000 0x80>;
138 interrupts = <0 125 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]139 interrupt-controller;
140 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]141 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]142 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]143 #gpio-cells = <2>;
144 gpio-bank = <6>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]145 };
146
147 gpio7: gpio@8011e080 {
148 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]149 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]150 reg = <0x8011e080 0x80>;
151 interrupts = <0 126 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]152 interrupt-controller;
153 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]154 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]155 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]156 #gpio-cells = <2>;
157 gpio-bank = <7>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]158 };
159
160 gpio8: gpio@a03fe000 {
161 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100[diff] [blame]162 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]163 reg = <0xa03fe000 0x80>;
164 interrupts = <0 127 0x4>;
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]165 interrupt-controller;
166 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100[diff] [blame]167 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]168 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100[diff] [blame]169 #gpio-cells = <2>;
170 gpio-bank = <8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]171 };
172
Lee Jones8979cfe2013-01-11 15:45:28 +0000[diff] [blame]173 pinctrl {
Lee Jones627c1a82013-01-30 17:25:02 +0100[diff] [blame]174 compatible = "stericsson,nmk-pinctrl";
Lee Jones8979cfe2013-01-11 15:45:28 +0000[diff] [blame]175 prcm = <&prcmu>;
Lee Jones5910de92012-05-26 06:25:36 +0100[diff] [blame]176 };
177
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]178 usb@a03e0000 {
179 compatible = "stericsson,db8500-musb",
180 "mentor,musb";
181 reg = <0xa03e0000 0x10000>;
182 interrupts = <0 23 0x4>;
183 };
184
Lee Jonesba074ae2013-05-03 15:31:48 +0100[diff] [blame]185 dma: dma-controller@801C0000 {
186 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]187 reg = <0x801C0000 0x1000 0x40010000 0x800>;
Lee Jones70d39a82013-05-03 15:31:47 +0100[diff] [blame]188 reg-names = "base", "lcpa";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]189 interrupts = <0 25 0x4>;
Lee Jonesba074ae2013-05-03 15:31:48 +0100[diff] [blame]190
191 #dma-cells = <3>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]192 };
193
Lee Jones8979cfe2013-01-11 15:45:28 +0000[diff] [blame]194 prcmu: prcmu@80157000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]195 compatible = "stericsson,db8500-prcmu";
Linus Torvalds4d26aa32013-05-02 08:56:55 -0700[diff] [blame]196 reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
Lee Jonese73081d2013-03-26 10:26:15 +0000[diff] [blame]197 reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
Lee Jonesccf74f72012-05-28 16:50:49 +0800[diff] [blame]198 interrupts = <0 47 0x4>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]199 #address-cells = <1>;
Lee Jones3de3d742012-04-24 10:00:15 +0100[diff] [blame]200 #size-cells = <1>;
Lee Jonesc09090b2012-08-03 15:42:25 +0100[diff] [blame]201 interrupt-controller;
202 #interrupt-cells = <2>;
Lee Jones3de3d742012-04-24 10:00:15 +0100[diff] [blame]203 ranges;
204
Lee Jonesccf74f72012-05-28 16:50:49 +0800[diff] [blame]205 prcmu-timer-4@80157450 {
Lee Jones3de3d742012-04-24 10:00:15 +0100[diff] [blame]206 compatible = "stericsson,db8500-prcmu-timer-4";
207 reg = <0x80157450 0xC>;
208 };
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]209
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800[diff] [blame]210 thermal@801573c0 {
211 compatible = "stericsson,db8500-thermal";
212 reg = <0x801573c0 0x40>;
213 interrupts = <21 0x4>, <22 0x4>;
214 interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
215 status = "disabled";
216 };
217
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]218 db8500-prcmu-regulators {
219 compatible = "stericsson,db8500-prcmu-regulator";
220
221 // DB8500_REGULATOR_VAPE
222 db8500_vape_reg: db8500_vape {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]223 regulator-compatible = "db8500_vape";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]224 regulator-always-on;
225 };
226
227 // DB8500_REGULATOR_VARM
228 db8500_varm_reg: db8500_varm {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]229 regulator-compatible = "db8500_varm";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]230 };
231
232 // DB8500_REGULATOR_VMODEM
233 db8500_vmodem_reg: db8500_vmodem {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]234 regulator-compatible = "db8500_vmodem";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]235 };
236
237 // DB8500_REGULATOR_VPLL
238 db8500_vpll_reg: db8500_vpll {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]239 regulator-compatible = "db8500_vpll";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]240 };
241
242 // DB8500_REGULATOR_VSMPS1
243 db8500_vsmps1_reg: db8500_vsmps1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]244 regulator-compatible = "db8500_vsmps1";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]245 };
246
247 // DB8500_REGULATOR_VSMPS2
248 db8500_vsmps2_reg: db8500_vsmps2 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]249 regulator-compatible = "db8500_vsmps2";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]250 };
251
252 // DB8500_REGULATOR_VSMPS3
253 db8500_vsmps3_reg: db8500_vsmps3 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]254 regulator-compatible = "db8500_vsmps3";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]255 };
256
257 // DB8500_REGULATOR_VRF1
258 db8500_vrf1_reg: db8500_vrf1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]259 regulator-compatible = "db8500_vrf1";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]260 };
261
262 // DB8500_REGULATOR_SWITCH_SVAMMDSP
263 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]264 regulator-compatible = "db8500_sva_mmdsp";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]265 };
266
267 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
268 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]269 regulator-compatible = "db8500_sva_mmdsp_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]270 };
271
272 // DB8500_REGULATOR_SWITCH_SVAPIPE
273 db8500_sva_pipe_reg: db8500_sva_pipe {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]274 regulator-compatible = "db8500_sva_pipe";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]275 };
276
277 // DB8500_REGULATOR_SWITCH_SIAMMDSP
278 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]279 regulator-compatible = "db8500_sia_mmdsp";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]280 };
281
282 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
283 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]284 };
285
286 // DB8500_REGULATOR_SWITCH_SIAPIPE
287 db8500_sia_pipe_reg: db8500_sia_pipe {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]288 regulator-compatible = "db8500_sia_pipe";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]289 };
290
291 // DB8500_REGULATOR_SWITCH_SGA
292 db8500_sga_reg: db8500_sga {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]293 regulator-compatible = "db8500_sga";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]294 vin-supply = <&db8500_vape_reg>;
295 };
296
297 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
298 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]299 regulator-compatible = "db8500_b2r2_mcde";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]300 vin-supply = <&db8500_vape_reg>;
301 };
302
303 // DB8500_REGULATOR_SWITCH_ESRAM12
304 db8500_esram12_reg: db8500_esram12 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]305 regulator-compatible = "db8500_esram12";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]306 };
307
308 // DB8500_REGULATOR_SWITCH_ESRAM12RET
309 db8500_esram12_ret_reg: db8500_esram12_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]310 regulator-compatible = "db8500_esram12_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]311 };
312
313 // DB8500_REGULATOR_SWITCH_ESRAM34
314 db8500_esram34_reg: db8500_esram34 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]315 regulator-compatible = "db8500_esram34";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]316 };
317
318 // DB8500_REGULATOR_SWITCH_ESRAM34RET
319 db8500_esram34_ret_reg: db8500_esram34_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]320 regulator-compatible = "db8500_esram34_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100[diff] [blame]321 };
322 };
323
Arnd Bergmannd52701d32013-03-12 09:39:01 +0100[diff] [blame]324 ab8500 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]325 compatible = "stericsson,ab8500";
Lee Jones8d4c6d42012-08-03 20:37:35 +0100[diff] [blame]326 interrupt-parent = <&intc>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]327 interrupts = <0 40 0x4>;
Lee Jones732973c2012-05-29 10:49:33 +0800[diff] [blame]328 interrupt-controller;
329 #interrupt-cells = <2>;
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]330
Lee Jonesd4b29ac2012-05-26 07:03:48 +0100[diff] [blame]331 ab8500-rtc {
332 compatible = "stericsson,ab8500-rtc";
333 interrupts = <17 0x4
334 18 0x4>;
335 interrupt-names = "60S", "ALARM";
336 };
337
Lee Jones4eda9122012-05-28 16:59:26 +0800[diff] [blame]338 ab8500-gpadc {
339 compatible = "stericsson,ab8500-gpadc";
Lee Jones732973c2012-05-29 10:49:33 +0800[diff] [blame]340 interrupts = <32 0x4
341 39 0x4>;
Lee Jones4eda9122012-05-28 16:59:26 +0800[diff] [blame]342 interrupt-names = "HW_CONV_END", "SW_CONV_END";
343 vddadc-supply = <&ab8500_ldo_tvout_reg>;
344 };
345
Rajanikanth H.Ve0f1abe2012-11-18 18:45:41 -0800[diff] [blame]346 ab8500_battery: ab8500_battery {
347 stericsson,battery-type = "LIPO";
348 thermistor-on-batctrl;
349 };
350
351 ab8500_fg {
352 compatible = "stericsson,ab8500-fg";
353 battery = <&ab8500_battery>;
354 };
355
Rajanikanth H.Vbd9e8ab2012-11-18 19:16:58 -0800[diff] [blame]356 ab8500_btemp {
357 compatible = "stericsson,ab8500-btemp";
358 battery = <&ab8500_battery>;
359 };
360
Rajanikanth H.V4aef72d2012-11-18 19:17:47 -0800[diff] [blame]361 ab8500_charger {
362 compatible = "stericsson,ab8500-charger";
363 battery = <&ab8500_battery>;
364 vddadc-supply = <&ab8500_ldo_tvout_reg>;
365 };
366
Rajanikanth H.Va12810a2012-10-31 15:40:33 +0000[diff] [blame]367 ab8500_chargalg {
368 compatible = "stericsson,ab8500-chargalg";
369 battery = <&ab8500_battery>;
370 };
371
Rajanikanth H.Ve0f1abe2012-11-18 18:45:41 -0800[diff] [blame]372 ab8500_usb {
Lee Jonesee189ce2012-05-03 14:40:24 +0100[diff] [blame]373 compatible = "stericsson,ab8500-usb";
Lee Jones732973c2012-05-29 10:49:33 +0800[diff] [blame]374 interrupts = < 90 0x4
375 96 0x4
376 14 0x4
377 15 0x4
378 79 0x4
379 74 0x4
380 75 0x4>;
Lee Jonesee189ce2012-05-03 14:40:24 +0100[diff] [blame]381 interrupt-names = "ID_WAKEUP_R",
382 "ID_WAKEUP_F",
383 "VBUS_DET_F",
384 "VBUS_DET_R",
385 "USB_LINK_STATUS",
386 "USB_ADP_PROBE_PLUG",
387 "USB_ADP_PROBE_UNPLUG";
Fabio Baltieri99b38ee2013-04-09 11:16:56 +0200[diff] [blame]388 vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
Lee Jonesee189ce2012-05-03 14:40:24 +0100[diff] [blame]389 v-ape-supply = <&db8500_vape_reg>;
390 musb_1v8-supply = <&db8500_vsmps2_reg>;
391 };
392
Lee Jones12cb7bd2012-05-02 08:45:40 +0100[diff] [blame]393 ab8500-ponkey {
Lee Jones74630702012-08-09 13:00:12 +0100[diff] [blame]394 compatible = "stericsson,ab8500-poweron-key";
Lee Jones732973c2012-05-29 10:49:33 +0800[diff] [blame]395 interrupts = <6 0x4
396 7 0x4>;
Lee Jones12cb7bd2012-05-02 08:45:40 +0100[diff] [blame]397 interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
398 };
399
Lee Jones401cd1b2012-05-03 12:53:55 +0100[diff] [blame]400 ab8500-sysctrl {
401 compatible = "stericsson,ab8500-sysctrl";
402 };
403
Lee Jones78451de2012-05-03 13:03:59 +0100[diff] [blame]404 ab8500-pwm {
405 compatible = "stericsson,ab8500-pwm";
406 };
407
Lee Jones215891e2012-05-01 16:11:19 +0100[diff] [blame]408 ab8500-debugfs {
409 compatible = "stericsson,ab8500-debug";
410 };
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]411
Lee Jones9c06af32012-07-25 12:50:13 +0100[diff] [blame]412 codec: ab8500-codec {
413 compatible = "stericsson,ab8500-codec";
414
415 stericsson,earpeice-cmv = <950>; /* Units in mV. */
416 };
417
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]418 ab8500-regulators {
419 compatible = "stericsson,ab8500-regulator";
420
421 // supplies to the display/camera
422 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]423 regulator-compatible = "ab8500_ldo_aux1";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]424 regulator-min-microvolt = <2500000>;
425 regulator-max-microvolt = <2900000>;
426 regulator-boot-on;
427 /* BUG: If turned off MMC will be affected. */
428 regulator-always-on;
429 };
430
431 // supplies to the on-board eMMC
432 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]433 regulator-compatible = "ab8500_ldo_aux2";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]434 regulator-min-microvolt = <1100000>;
435 regulator-max-microvolt = <3300000>;
436 };
437
438 // supply for VAUX3; SDcard slots
439 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]440 regulator-compatible = "ab8500_ldo_aux3";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]441 regulator-min-microvolt = <1100000>;
442 regulator-max-microvolt = <3300000>;
443 };
444
445 // supply for v-intcore12; VINTCORE12 LDO
Fabio Baltieri99b38ee2013-04-09 11:16:56 +0200[diff] [blame]446 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
447 regulator-compatible = "ab8500_ldo_intcore";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]448 };
449
450 // supply for tvout; gpadc; TVOUT LDO
451 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]452 regulator-compatible = "ab8500_ldo_tvout";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]453 };
454
455 // supply for ab8500-usb; USB LDO
456 ab8500_ldo_usb_reg: ab8500_ldo_usb {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]457 regulator-compatible = "ab8500_ldo_usb";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]458 };
459
460 // supply for ab8500-vaudio; VAUDIO LDO
461 ab8500_ldo_audio_reg: ab8500_ldo_audio {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]462 regulator-compatible = "ab8500_ldo_audio";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]463 };
464
465 // supply for v-anamic1 VAMic1-LDO
466 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]467 regulator-compatible = "ab8500_ldo_anamic1";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]468 };
469
470 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
471 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]472 regulator-compatible = "ab8500_ldo_amamic2";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]473 };
474
475 // supply for v-dmic; VDMIC LDO
476 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]477 regulator-compatible = "ab8500_ldo_dmic";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]478 };
479
480 // supply for U8500 CSI/DSI; VANA LDO
481 ab8500_ldo_ana_reg: ab8500_ldo_ana {
Laxman Dewanganda268482012-06-20 17:53:05 +0530[diff] [blame]482 regulator-compatible = "ab8500_ldo_ana";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800[diff] [blame]483 };
484 };
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]485 };
486 };
487
488 i2c@80004000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]489 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]490 reg = <0x80004000 0x1000>;
491 interrupts = <0 21 0x4>;
Lee Jones35b33d22012-10-24 11:07:02 +0100[diff] [blame]492 arm,primecell-periphid = <0x180024>;
493
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]494 #address-cells = <1>;
495 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]496 v-i2c-supply = <&db8500_vape_reg>;
497
498 clock-frequency = <400000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]499 };
500
501 i2c@80122000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]502 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]503 reg = <0x80122000 0x1000>;
504 interrupts = <0 22 0x4>;
Lee Jones35b33d22012-10-24 11:07:02 +0100[diff] [blame]505 arm,primecell-periphid = <0x180024>;
506
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]507 #address-cells = <1>;
508 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]509 v-i2c-supply = <&db8500_vape_reg>;
510
511 clock-frequency = <400000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]512 };
513
514 i2c@80128000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]515 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]516 reg = <0x80128000 0x1000>;
517 interrupts = <0 55 0x4>;
Lee Jones35b33d22012-10-24 11:07:02 +0100[diff] [blame]518 arm,primecell-periphid = <0x180024>;
519
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]520 #address-cells = <1>;
521 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]522 v-i2c-supply = <&db8500_vape_reg>;
523
524 clock-frequency = <400000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]525 };
526
527 i2c@80110000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]528 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]529 reg = <0x80110000 0x1000>;
530 interrupts = <0 12 0x4>;
Lee Jones35b33d22012-10-24 11:07:02 +0100[diff] [blame]531 arm,primecell-periphid = <0x180024>;
532
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]533 #address-cells = <1>;
534 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]535 v-i2c-supply = <&db8500_vape_reg>;
536
537 clock-frequency = <400000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]538 };
539
540 i2c@8012a000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]541 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]542 reg = <0x8012a000 0x1000>;
543 interrupts = <0 51 0x4>;
Lee Jones35b33d22012-10-24 11:07:02 +0100[diff] [blame]544 arm,primecell-periphid = <0x180024>;
545
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]546 #address-cells = <1>;
547 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100[diff] [blame]548 v-i2c-supply = <&db8500_vape_reg>;
549
550 clock-frequency = <400000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]551 };
552
553 ssp@80002000 {
554 compatible = "arm,pl022", "arm,primecell";
Lee Jonesc164fa62012-09-07 12:09:34 +0100[diff] [blame]555 reg = <0x80002000 0x1000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]556 interrupts = <0 14 0x4>;
557 #address-cells = <1>;
558 #size-cells = <0>;
559 status = "disabled";
Lee Jones15daf692012-03-15 16:47:11 +0000[diff] [blame]560
561 // Add one of these for each child device
Lee Jones93b56982012-05-29 14:17:36 +0800[diff] [blame]562 cs-gpios = <&gpio0 31 0x4 &gpio4 14 0x4 &gpio4 16 0x4
563 &gpio6 22 0x4 &gpio7 0 0x4>;
Lee Jones15daf692012-03-15 16:47:11 +0000[diff] [blame]564
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]565 };
566
567 uart@80120000 {
568 compatible = "arm,pl011", "arm,primecell";
569 reg = <0x80120000 0x1000>;
570 interrupts = <0 11 0x4>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100[diff] [blame]571
572 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
573 <&dma 13 0 0x0>; /* Logical - MemToDev */
574 dma-names = "rx", "tx";
575
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]576 status = "disabled";
577 };
Lee Jonesfbff01c2013-05-03 15:31:49 +0100[diff] [blame]578
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]579 uart@80121000 {
580 compatible = "arm,pl011", "arm,primecell";
581 reg = <0x80121000 0x1000>;
582 interrupts = <0 19 0x4>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100[diff] [blame]583
584 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
585 <&dma 12 0 0x0>; /* Logical - MemToDev */
586 dma-names = "rx", "tx";
587
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]588 status = "disabled";
589 };
Lee Jonesfbff01c2013-05-03 15:31:49 +0100[diff] [blame]590
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]591 uart@80007000 {
592 compatible = "arm,pl011", "arm,primecell";
593 reg = <0x80007000 0x1000>;
594 interrupts = <0 26 0x4>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100[diff] [blame]595
596 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
597 <&dma 11 0 0x0>; /* Logical - MemToDev */
598 dma-names = "rx", "tx";
599
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]600 status = "disabled";
601 };
602
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]603 sdi0_per1@80126000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]604 compatible = "arm,pl18x", "arm,primecell";
605 reg = <0x80126000 0x1000>;
606 interrupts = <0 60 0x4>;
Lee Jones498315b92013-05-03 15:31:50 +0100[diff] [blame^]607
608 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
609 <&dma 29 0 0x0>; /* Logical - MemToDev */
610 dma-names = "rx", "tx";
611
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]612 status = "disabled";
613 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]614
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]615 sdi1_per2@80118000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]616 compatible = "arm,pl18x", "arm,primecell";
617 reg = <0x80118000 0x1000>;
618 interrupts = <0 50 0x4>;
Lee Jones498315b92013-05-03 15:31:50 +0100[diff] [blame^]619
620 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
621 <&dma 32 0 0x0>; /* Logical - MemToDev */
622 dma-names = "rx", "tx";
623
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]624 status = "disabled";
625 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]626
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]627 sdi2_per3@80005000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]628 compatible = "arm,pl18x", "arm,primecell";
629 reg = <0x80005000 0x1000>;
630 interrupts = <0 41 0x4>;
Lee Jones498315b92013-05-03 15:31:50 +0100[diff] [blame^]631
632 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
633 <&dma 28 0 0x0>; /* Logical - MemToDev */
634 dma-names = "rx", "tx";
635
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]636 status = "disabled";
637 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]638
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]639 sdi3_per2@80119000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]640 compatible = "arm,pl18x", "arm,primecell";
641 reg = <0x80119000 0x1000>;
642 interrupts = <0 59 0x4>;
643 status = "disabled";
644 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]645
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]646 sdi4_per2@80114000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]647 compatible = "arm,pl18x", "arm,primecell";
648 reg = <0x80114000 0x1000>;
649 interrupts = <0 99 0x4>;
Lee Jones498315b92013-05-03 15:31:50 +0100[diff] [blame^]650
651 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
652 <&dma 42 0 0x0>; /* Logical - MemToDev */
653 dma-names = "rx", "tx";
654
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]655 status = "disabled";
656 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]657
Lee Jones81bf8c22012-09-26 12:55:56 +0100[diff] [blame]658 sdi5_per3@80008000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]659 compatible = "arm,pl18x", "arm,primecell";
Lee Jones76ff4e42012-10-24 11:10:05 +0100[diff] [blame]660 reg = <0x80008000 0x1000>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000[diff] [blame]661 interrupts = <0 100 0x4>;
662 status = "disabled";
663 };
Lee Jonesbf76e062012-04-24 10:53:18 +0100[diff] [blame]664
Lee Jonesfe164522012-07-31 12:37:16 +0100[diff] [blame]665 msp0: msp@80123000 {
666 compatible = "stericsson,ux500-msp-i2s";
667 reg = <0x80123000 0x1000>;
668 interrupts = <0 31 0x4>;
669 v-ape-supply = <&db8500_vape_reg>;
670 status = "disabled";
671 };
672
673 msp1: msp@80124000 {
674 compatible = "stericsson,ux500-msp-i2s";
675 reg = <0x80124000 0x1000>;
676 interrupts = <0 62 0x4>;
677 v-ape-supply = <&db8500_vape_reg>;
678 status = "disabled";
679 };
680
681 // HDMI sound
682 msp2: msp@80117000 {
683 compatible = "stericsson,ux500-msp-i2s";
684 reg = <0x80117000 0x1000>;
685 interrupts = <0 98 0x4>;
686 v-ape-supply = <&db8500_vape_reg>;
687 status = "disabled";
688 };
689
690 msp3: msp@80125000 {
691 compatible = "stericsson,ux500-msp-i2s";
692 reg = <0x80125000 0x1000>;
693 interrupts = <0 62 0x4>;
694 v-ape-supply = <&db8500_vape_reg>;
695 status = "disabled";
696 };
697
Lee Jonesbf76e062012-04-24 10:53:18 +0100[diff] [blame]698 external-bus@50000000 {
699 compatible = "simple-bus";
700 reg = <0x50000000 0x4000000>;
701 #address-cells = <1>;
702 #size-cells = <1>;
703 ranges = <0 0x50000000 0x4000000>;
704 status = "disabled";
705 };
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800[diff] [blame]706
707 cpufreq-cooling {
708 compatible = "stericsson,db8500-cpufreq-cooling";
709 status = "disabled";
710 };
711
Lee Jones0563f632012-10-24 11:18:14 +0100[diff] [blame]712 vmmci: regulator-gpio {
713 compatible = "regulator-gpio";
714
715 regulator-min-microvolt = <1800000>;
Lee Jones4f902b42012-12-06 14:00:01 +0000[diff] [blame]716 regulator-max-microvolt = <2900000>;
Lee Jones0563f632012-10-24 11:18:14 +0100[diff] [blame]717 regulator-name = "mmci-reg";
718 regulator-type = "voltage";
719
Lee Jones874c9202012-12-07 13:46:01 +0000[diff] [blame]720 startup-delay-us = <100>;
Lee Jonese7bda302012-12-06 15:00:46 +0000[diff] [blame]721 enable-active-high;
722
Lee Jones0563f632012-10-24 11:18:14 +0100[diff] [blame]723 states = <1800000 0x1
724 2900000 0x0>;
Lee Jonesc94a4ab2012-11-15 13:02:16 +0000[diff] [blame]725
726 status = "disabled";
Lee Jones0563f632012-10-24 11:18:14 +0100[diff] [blame]727 };
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000[diff] [blame]728 };
729};