blob: 7199e19eb8bab5678afa1c348f97461459137190 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
David Howells760285e2012-10-02 18:01:07 +010028#include <drm/drmP.h>
29#include <drm/radeon_drm.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020030#include "radeon.h"
31
Jerome Glisse771fe6b2009-06-05 14:42:42 +020032void radeon_gem_object_free(struct drm_gem_object *gobj)
33{
Daniel Vetter7e4d15d2011-02-18 17:59:17 +010034 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020035
Jerome Glisse771fe6b2009-06-05 14:42:42 +020036 if (robj) {
Alex Deucher40f5cf92012-05-10 18:33:13 -040037 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
Jerome Glisse4c788672009-11-20 14:29:23 +010039 radeon_bo_unref(&robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020040 }
41}
42
Alex Deucher391bfec2014-07-17 12:26:29 -040043int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
Jerome Glisse4c788672009-11-20 14:29:23 +010044 int alignment, int initial_domain,
Christian Königed5cb432014-07-21 13:27:27 +020045 u32 flags, bool kernel,
Jerome Glisse4c788672009-11-20 14:29:23 +010046 struct drm_gem_object **obj)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020047{
Jerome Glisse4c788672009-11-20 14:29:23 +010048 struct radeon_bo *robj;
Christian König6c0d1122012-10-23 15:53:18 +020049 unsigned long max_size;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020050 int r;
51
52 *obj = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020053 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
56 }
Christian König6c0d1122012-10-23 15:53:18 +020057
Alex Deucher391bfec2014-07-17 12:26:29 -040058 /* Maximum bo size is the unpinned gtt size since we use the gtt to
59 * handle vram to system pool migrations.
60 */
61 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
Christian König6c0d1122012-10-23 15:53:18 +020062 if (size > max_size) {
Alex Deucher391bfec2014-07-17 12:26:29 -040063 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
Michel Dänzer380670a2014-07-16 18:40:32 +090064 size >> 20, max_size >> 20);
Christian König6c0d1122012-10-23 15:53:18 +020065 return -ENOMEM;
66 }
67
Christian König0fe71582012-10-23 15:53:19 +020068retry:
Michel Dänzer02376d82014-07-17 19:01:08 +090069 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
Maarten Lankhorst831b6962014-09-18 14:11:56 +020070 flags, NULL, NULL, &robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020071 if (r) {
Christian König0fe71582012-10-23 15:53:19 +020072 if (r != -ERESTARTSYS) {
73 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
74 initial_domain |= RADEON_GEM_DOMAIN_GTT;
75 goto retry;
76 }
Alex Deucher391bfec2014-07-17 12:26:29 -040077 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
Dave Airlieecabd322009-12-15 10:39:48 +100078 size, initial_domain, alignment, r);
Christian König0fe71582012-10-23 15:53:19 +020079 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +020080 return r;
81 }
Daniel Vetter441921d2011-02-18 17:59:16 +010082 *obj = &robj->gem_base;
Jerome Glisse409851f2013-04-25 22:29:27 -040083 robj->pid = task_pid_nr(current);
Daniel Vetter441921d2011-02-18 17:59:16 +010084
85 mutex_lock(&rdev->gem.mutex);
86 list_add_tail(&robj->list, &rdev->gem.objects);
87 mutex_unlock(&rdev->gem.mutex);
88
Jerome Glisse771fe6b2009-06-05 14:42:42 +020089 return 0;
90}
91
Rashika Kheria248a6c42014-01-06 20:58:45 +053092static int radeon_gem_set_domain(struct drm_gem_object *gobj,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020093 uint32_t rdomain, uint32_t wdomain)
94{
Jerome Glisse4c788672009-11-20 14:29:23 +010095 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020096 uint32_t domain;
Maarten Lankhorst39e7f6f2014-05-14 15:40:49 +020097 long r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020098
99 /* FIXME: reeimplement */
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100100 robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101 /* work out where to validate the buffer to */
102 domain = wdomain;
103 if (!domain) {
104 domain = rdomain;
105 }
106 if (!domain) {
107 /* Do nothings */
Masanari Iidab6cafa22012-02-27 23:28:38 +0900108 printk(KERN_WARNING "Set domain without domain !\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200109 return 0;
110 }
111 if (domain == RADEON_GEM_DOMAIN_CPU) {
112 /* Asking for cpu access wait for object idle */
Maarten Lankhorst39e7f6f2014-05-14 15:40:49 +0200113 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
114 if (!r)
115 r = -EBUSY;
116
117 if (r < 0 && r != -EINTR) {
118 printk(KERN_ERR "Failed to wait for object: %li\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200119 return r;
120 }
121 }
122 return 0;
123}
124
125int radeon_gem_init(struct radeon_device *rdev)
126{
127 INIT_LIST_HEAD(&rdev->gem.objects);
128 return 0;
129}
130
131void radeon_gem_fini(struct radeon_device *rdev)
132{
Jerome Glisse4c788672009-11-20 14:29:23 +0100133 radeon_bo_force_delete(rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200134}
135
Jerome Glisse721604a2012-01-05 22:11:05 -0500136/*
137 * Call from drm_gem_handle_create which appear in both new and open ioctl
138 * case.
139 */
140int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
141{
Christian Könige971bd52012-09-11 16:10:04 +0200142 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
143 struct radeon_device *rdev = rbo->rdev;
144 struct radeon_fpriv *fpriv = file_priv->driver_priv;
145 struct radeon_vm *vm = &fpriv->vm;
146 struct radeon_bo_va *bo_va;
147 int r;
148
Alex Deucher544143f2015-01-28 14:36:26 -0500149 if ((rdev->family < CHIP_CAYMAN) ||
150 (!rdev->accel_working)) {
Christian Könige971bd52012-09-11 16:10:04 +0200151 return 0;
152 }
153
154 r = radeon_bo_reserve(rbo, false);
155 if (r) {
156 return r;
157 }
158
159 bo_va = radeon_vm_bo_find(vm, rbo);
160 if (!bo_va) {
161 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
162 } else {
163 ++bo_va->ref_count;
164 }
165 radeon_bo_unreserve(rbo);
166
Jerome Glisse721604a2012-01-05 22:11:05 -0500167 return 0;
168}
169
170void radeon_gem_object_close(struct drm_gem_object *obj,
171 struct drm_file *file_priv)
172{
173 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
174 struct radeon_device *rdev = rbo->rdev;
175 struct radeon_fpriv *fpriv = file_priv->driver_priv;
176 struct radeon_vm *vm = &fpriv->vm;
Christian Könige971bd52012-09-11 16:10:04 +0200177 struct radeon_bo_va *bo_va;
Christian Königd59f7022012-09-11 16:10:02 +0200178 int r;
Jerome Glisse721604a2012-01-05 22:11:05 -0500179
Alex Deucher544143f2015-01-28 14:36:26 -0500180 if ((rdev->family < CHIP_CAYMAN) ||
181 (!rdev->accel_working)) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500182 return;
183 }
184
Christian Königd59f7022012-09-11 16:10:02 +0200185 r = radeon_bo_reserve(rbo, true);
186 if (r) {
187 dev_err(rdev->dev, "leaking bo va because "
188 "we fail to reserve bo (%d)\n", r);
Jerome Glisse721604a2012-01-05 22:11:05 -0500189 return;
190 }
Christian Könige971bd52012-09-11 16:10:04 +0200191 bo_va = radeon_vm_bo_find(vm, rbo);
192 if (bo_va) {
193 if (--bo_va->ref_count == 0) {
194 radeon_vm_bo_rmv(rdev, bo_va);
195 }
196 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500197 radeon_bo_unreserve(rbo);
198}
199
Christian König6c6f4782012-05-02 15:11:19 +0200200static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
201{
202 if (r == -EDEADLK) {
Christian König6c6f4782012-05-02 15:11:19 +0200203 r = radeon_gpu_reset(rdev);
204 if (!r)
205 r = -EAGAIN;
Christian König6c6f4782012-05-02 15:11:19 +0200206 }
207 return r;
208}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200209
210/*
211 * GEM ioctls.
212 */
213int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
214 struct drm_file *filp)
215{
216 struct radeon_device *rdev = dev->dev_private;
217 struct drm_radeon_gem_info *args = data;
Dave Airlie53595332011-03-14 09:47:24 +1000218 struct ttm_mem_type_manager *man;
219
220 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200221
Dave Airlie7a50f012009-07-21 20:39:30 +1000222 args->vram_size = rdev->mc.real_vram_size;
Dave Airlie53595332011-03-14 09:47:24 +1000223 args->vram_visible = (u64)man->size << PAGE_SHIFT;
Alex Deucherccbe0062014-07-17 12:16:20 -0400224 args->vram_visible -= rdev->vram_pin_size;
225 args->gart_size = rdev->mc.gtt_size;
226 args->gart_size -= rdev->gart_pin_size;
227
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200228 return 0;
229}
230
231int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
232 struct drm_file *filp)
233{
234 /* TODO: implement */
235 DRM_ERROR("unimplemented %s\n", __func__);
236 return -ENOSYS;
237}
238
239int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
240 struct drm_file *filp)
241{
242 /* TODO: implement */
243 DRM_ERROR("unimplemented %s\n", __func__);
244 return -ENOSYS;
245}
246
247int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
248 struct drm_file *filp)
249{
250 struct radeon_device *rdev = dev->dev_private;
251 struct drm_radeon_gem_create *args = data;
252 struct drm_gem_object *gobj;
253 uint32_t handle;
254 int r;
255
Jerome Glissedee53e72012-07-02 12:45:19 -0400256 down_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200257 /* create a gem object to contain this object in */
258 args->size = roundup(args->size, PAGE_SIZE);
259 r = radeon_gem_object_create(rdev, args->size, args->alignment,
Michel Dänzer02376d82014-07-17 19:01:08 +0900260 args->initial_domain, args->flags,
Christian Königed5cb432014-07-21 13:27:27 +0200261 false, &gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200262 if (r) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400263 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200264 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200265 return r;
266 }
267 r = drm_gem_handle_create(filp, gobj, &handle);
Dave Airlie29d08b32010-09-27 16:17:17 +1000268 /* drop reference from allocate - handle holds it now */
269 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200270 if (r) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400271 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200272 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200273 return r;
274 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200275 args->handle = handle;
Jerome Glissedee53e72012-07-02 12:45:19 -0400276 up_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200277 return 0;
278}
279
Christian Königf72a113a2014-08-07 09:36:00 +0200280int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
281 struct drm_file *filp)
282{
283 struct radeon_device *rdev = dev->dev_private;
284 struct drm_radeon_gem_userptr *args = data;
285 struct drm_gem_object *gobj;
286 struct radeon_bo *bo;
287 uint32_t handle;
288 int r;
289
290 if (offset_in_page(args->addr | args->size))
291 return -EINVAL;
292
Christian Königf72a113a2014-08-07 09:36:00 +0200293 /* reject unknown flag values */
Christian Königddd00e32014-08-07 09:36:01 +0200294 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
Christian König341cb9e2014-08-07 09:36:03 +0200295 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
296 RADEON_GEM_USERPTR_REGISTER))
Christian Königf72a113a2014-08-07 09:36:00 +0200297 return -EINVAL;
298
Christian Königbd645e42014-08-07 09:36:04 +0200299 if (args->flags & RADEON_GEM_USERPTR_READONLY) {
300 /* readonly pages not tested on older hardware */
301 if (rdev->family < CHIP_R600)
302 return -EINVAL;
303
304 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
305 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
306
307 /* if we want to write to it we must require anonymous
308 memory and install a MMU notifier */
309 return -EACCES;
310 }
Christian Königf72a113a2014-08-07 09:36:00 +0200311
312 down_read(&rdev->exclusive_lock);
313
314 /* create a gem object to contain this object in */
315 r = radeon_gem_object_create(rdev, args->size, 0,
316 RADEON_GEM_DOMAIN_CPU, 0,
317 false, &gobj);
318 if (r)
319 goto handle_lockup;
320
321 bo = gem_to_radeon_bo(gobj);
322 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
323 if (r)
324 goto release_object;
325
Christian König341cb9e2014-08-07 09:36:03 +0200326 if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
327 r = radeon_mn_register(bo, args->addr);
328 if (r)
329 goto release_object;
330 }
331
Christian König2a84a442014-08-07 09:36:02 +0200332 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
333 down_read(&current->mm->mmap_sem);
334 r = radeon_bo_reserve(bo, true);
335 if (r) {
336 up_read(&current->mm->mmap_sem);
337 goto release_object;
338 }
339
340 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
341 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
342 radeon_bo_unreserve(bo);
343 up_read(&current->mm->mmap_sem);
344 if (r)
345 goto release_object;
346 }
347
Christian Königf72a113a2014-08-07 09:36:00 +0200348 r = drm_gem_handle_create(filp, gobj, &handle);
349 /* drop reference from allocate - handle holds it now */
350 drm_gem_object_unreference_unlocked(gobj);
351 if (r)
352 goto handle_lockup;
353
354 args->handle = handle;
355 up_read(&rdev->exclusive_lock);
356 return 0;
357
358release_object:
359 drm_gem_object_unreference_unlocked(gobj);
360
361handle_lockup:
362 up_read(&rdev->exclusive_lock);
363 r = radeon_gem_handle_lockup(rdev, r);
364
365 return r;
366}
367
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200368int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
369 struct drm_file *filp)
370{
371 /* transition the BO to a domain -
372 * just validate the BO into a certain domain */
Jerome Glissedee53e72012-07-02 12:45:19 -0400373 struct radeon_device *rdev = dev->dev_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200374 struct drm_radeon_gem_set_domain *args = data;
375 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100376 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200377 int r;
378
379 /* for now if someone requests domain CPU -
380 * just make sure the buffer is finished with */
Jerome Glissedee53e72012-07-02 12:45:19 -0400381 down_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200382
383 /* just do a BO wait for now */
384 gobj = drm_gem_object_lookup(dev, filp, args->handle);
385 if (gobj == NULL) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400386 up_read(&rdev->exclusive_lock);
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100387 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200388 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100389 robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200390
391 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
392
Luca Barbieribc9025b2010-02-09 05:49:12 +0000393 drm_gem_object_unreference_unlocked(gobj);
Jerome Glissedee53e72012-07-02 12:45:19 -0400394 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200395 r = radeon_gem_handle_lockup(robj->rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200396 return r;
397}
398
Dave Airlieda6b51d2014-12-24 13:11:17 +1000399int radeon_mode_dumb_mmap(struct drm_file *filp,
400 struct drm_device *dev,
401 uint32_t handle, uint64_t *offset_p)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200402{
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200403 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100404 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200405
Dave Airlieff72145b2011-02-07 12:16:14 +1000406 gobj = drm_gem_object_lookup(dev, filp, handle);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200407 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100408 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200409 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100410 robj = gem_to_radeon_bo(gobj);
Christian Königf72a113a2014-08-07 09:36:00 +0200411 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
412 drm_gem_object_unreference_unlocked(gobj);
413 return -EPERM;
414 }
Dave Airlieff72145b2011-02-07 12:16:14 +1000415 *offset_p = radeon_bo_mmap_offset(robj);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000416 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100417 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200418}
419
Dave Airlieff72145b2011-02-07 12:16:14 +1000420int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
421 struct drm_file *filp)
422{
423 struct drm_radeon_gem_mmap *args = data;
424
Dave Airlieda6b51d2014-12-24 13:11:17 +1000425 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
Dave Airlieff72145b2011-02-07 12:16:14 +1000426}
427
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200428int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
429 struct drm_file *filp)
430{
Dave Airliecefb87e2009-08-16 21:05:45 +1000431 struct drm_radeon_gem_busy *args = data;
432 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100433 struct radeon_bo *robj;
Dave Airliecefb87e2009-08-16 21:05:45 +1000434 int r;
Dave Airlie4361e522009-12-10 15:59:32 +1000435 uint32_t cur_placement = 0;
Dave Airliecefb87e2009-08-16 21:05:45 +1000436
437 gobj = drm_gem_object_lookup(dev, filp, args->handle);
438 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100439 return -ENOENT;
Dave Airliecefb87e2009-08-16 21:05:45 +1000440 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100441 robj = gem_to_radeon_bo(gobj);
Grigori Goronzy828202a2015-07-03 01:54:10 +0200442
443 r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
444 if (r == 0)
445 r = -EBUSY;
446 else
447 r = 0;
448
449 cur_placement = ACCESS_ONCE(robj->tbo.mem.mem_type);
Marek Olšák0bc490a2014-03-02 00:56:19 +0100450 args->domain = radeon_mem_type_to_domain(cur_placement);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000451 drm_gem_object_unreference_unlocked(gobj);
Dave Airliee3b24152009-08-21 09:47:45 +1000452 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200453}
454
455int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
456 struct drm_file *filp)
457{
Jerome Glisse1ef53252012-07-02 12:40:54 -0400458 struct radeon_device *rdev = dev->dev_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200459 struct drm_radeon_gem_wait_idle *args = data;
460 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100461 struct radeon_bo *robj;
Maarten Lankhorst39e7f6f2014-05-14 15:40:49 +0200462 int r = 0;
Michel Dänzer404a6a52014-08-01 17:22:09 +0900463 uint32_t cur_placement = 0;
Maarten Lankhorst39e7f6f2014-05-14 15:40:49 +0200464 long ret;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200465
466 gobj = drm_gem_object_lookup(dev, filp, args->handle);
467 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100468 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200469 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100470 robj = gem_to_radeon_bo(gobj);
Maarten Lankhorst39e7f6f2014-05-14 15:40:49 +0200471
472 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
473 if (ret == 0)
474 r = -EBUSY;
475 else if (ret < 0)
476 r = ret;
477
Michel Dänzer124764f2014-07-31 18:43:48 +0900478 /* Flush HDP cache via MMIO if necessary */
Michel Dänzer404a6a52014-08-01 17:22:09 +0900479 if (rdev->asic->mmio_hdp_flush &&
480 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
Michel Dänzer124764f2014-07-31 18:43:48 +0900481 robj->rdev->asic->mmio_hdp_flush(rdev);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000482 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse1ef53252012-07-02 12:40:54 -0400483 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200484 return r;
485}
Dave Airliee024e112009-06-24 09:48:08 +1000486
487int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
488 struct drm_file *filp)
489{
490 struct drm_radeon_gem_set_tiling *args = data;
491 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100492 struct radeon_bo *robj;
Dave Airliee024e112009-06-24 09:48:08 +1000493 int r = 0;
494
495 DRM_DEBUG("%d \n", args->handle);
496 gobj = drm_gem_object_lookup(dev, filp, args->handle);
497 if (gobj == NULL)
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100498 return -ENOENT;
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100499 robj = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100500 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000501 drm_gem_object_unreference_unlocked(gobj);
Dave Airliee024e112009-06-24 09:48:08 +1000502 return r;
503}
504
505int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
506 struct drm_file *filp)
507{
508 struct drm_radeon_gem_get_tiling *args = data;
509 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100510 struct radeon_bo *rbo;
Dave Airliee024e112009-06-24 09:48:08 +1000511 int r = 0;
512
513 DRM_DEBUG("\n");
514 gobj = drm_gem_object_lookup(dev, filp, args->handle);
515 if (gobj == NULL)
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100516 return -ENOENT;
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100517 rbo = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100518 r = radeon_bo_reserve(rbo, false);
519 if (unlikely(r != 0))
Dave Airlie51f07b72009-12-16 13:10:43 +1000520 goto out;
Jerome Glisse4c788672009-11-20 14:29:23 +0100521 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
522 radeon_bo_unreserve(rbo);
Dave Airlie51f07b72009-12-16 13:10:43 +1000523out:
Luca Barbieribc9025b2010-02-09 05:49:12 +0000524 drm_gem_object_unreference_unlocked(gobj);
Dave Airliee024e112009-06-24 09:48:08 +1000525 return r;
526}
Dave Airlieff72145b2011-02-07 12:16:14 +1000527
Christian König2f2624c2014-09-12 12:25:45 +0200528/**
529 * radeon_gem_va_update_vm -update the bo_va in its VM
530 *
531 * @rdev: radeon_device pointer
532 * @bo_va: bo_va to update
533 *
534 * Update the bo_va directly after setting it's address. Errors are not
535 * vital here, so they are not reported back to userspace.
536 */
537static void radeon_gem_va_update_vm(struct radeon_device *rdev,
538 struct radeon_bo_va *bo_va)
539{
540 struct ttm_validate_buffer tv, *entry;
Christian König1d0c0942014-11-27 14:48:42 +0100541 struct radeon_bo_list *vm_bos;
Christian König2f2624c2014-09-12 12:25:45 +0200542 struct ww_acquire_ctx ticket;
543 struct list_head list;
544 unsigned domain;
545 int r;
546
547 INIT_LIST_HEAD(&list);
548
549 tv.bo = &bo_va->bo->tbo;
550 tv.shared = true;
551 list_add(&tv.head, &list);
552
553 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
554 if (!vm_bos)
555 return;
556
Christian Königaa350712014-12-03 15:46:48 +0100557 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
Christian König2f2624c2014-09-12 12:25:45 +0200558 if (r)
559 goto error_free;
560
561 list_for_each_entry(entry, &list, head) {
562 domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type);
563 /* if anything is swapped out don't swap it in here,
564 just abort and wait for the next CS */
565 if (domain == RADEON_GEM_DOMAIN_CPU)
566 goto error_unreserve;
567 }
568
569 mutex_lock(&bo_va->vm->mutex);
570 r = radeon_vm_clear_freed(rdev, bo_va->vm);
571 if (r)
572 goto error_unlock;
573
574 if (bo_va->it.start)
575 r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem);
576
577error_unlock:
578 mutex_unlock(&bo_va->vm->mutex);
579
580error_unreserve:
581 ttm_eu_backoff_reservation(&ticket, &list);
582
583error_free:
584 drm_free_large(vm_bos);
585
Christian Königad1a6222015-01-09 11:07:49 +0100586 if (r && r != -ERESTARTSYS)
Christian König2f2624c2014-09-12 12:25:45 +0200587 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
588}
589
Jerome Glisse721604a2012-01-05 22:11:05 -0500590int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
591 struct drm_file *filp)
592{
593 struct drm_radeon_gem_va *args = data;
594 struct drm_gem_object *gobj;
595 struct radeon_device *rdev = dev->dev_private;
596 struct radeon_fpriv *fpriv = filp->driver_priv;
597 struct radeon_bo *rbo;
598 struct radeon_bo_va *bo_va;
599 u32 invalid_flags;
600 int r = 0;
601
Alex Deucher67e915e2012-01-06 09:38:15 -0500602 if (!rdev->vm_manager.enabled) {
603 args->operation = RADEON_VA_RESULT_ERROR;
604 return -ENOTTY;
605 }
606
Jerome Glisse721604a2012-01-05 22:11:05 -0500607 /* !! DONT REMOVE !!
608 * We don't support vm_id yet, to be sure we don't have have broken
609 * userspace, reject anyone trying to use non 0 value thus moving
610 * forward we can use those fields without breaking existant userspace
611 */
612 if (args->vm_id) {
613 args->operation = RADEON_VA_RESULT_ERROR;
614 return -EINVAL;
615 }
616
617 if (args->offset < RADEON_VA_RESERVED_SIZE) {
618 dev_err(&dev->pdev->dev,
619 "offset 0x%lX is in reserved area 0x%X\n",
620 (unsigned long)args->offset,
621 RADEON_VA_RESERVED_SIZE);
622 args->operation = RADEON_VA_RESULT_ERROR;
623 return -EINVAL;
624 }
625
626 /* don't remove, we need to enforce userspace to set the snooped flag
627 * otherwise we will endup with broken userspace and we won't be able
628 * to enable this feature without adding new interface
629 */
630 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
631 if ((args->flags & invalid_flags)) {
632 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
633 args->flags, invalid_flags);
634 args->operation = RADEON_VA_RESULT_ERROR;
635 return -EINVAL;
636 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500637
638 switch (args->operation) {
639 case RADEON_VA_MAP:
640 case RADEON_VA_UNMAP:
641 break;
642 default:
643 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
644 args->operation);
645 args->operation = RADEON_VA_RESULT_ERROR;
646 return -EINVAL;
647 }
648
649 gobj = drm_gem_object_lookup(dev, filp, args->handle);
650 if (gobj == NULL) {
651 args->operation = RADEON_VA_RESULT_ERROR;
652 return -ENOENT;
653 }
654 rbo = gem_to_radeon_bo(gobj);
655 r = radeon_bo_reserve(rbo, false);
656 if (r) {
657 args->operation = RADEON_VA_RESULT_ERROR;
658 drm_gem_object_unreference_unlocked(gobj);
659 return r;
660 }
Christian Könige971bd52012-09-11 16:10:04 +0200661 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
662 if (!bo_va) {
663 args->operation = RADEON_VA_RESULT_ERROR;
664 drm_gem_object_unreference_unlocked(gobj);
665 return -ENOENT;
666 }
667
Jerome Glisse721604a2012-01-05 22:11:05 -0500668 switch (args->operation) {
669 case RADEON_VA_MAP:
Alex Deucher0aea5e42014-07-30 11:49:56 -0400670 if (bo_va->it.start) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500671 args->operation = RADEON_VA_RESULT_VA_EXIST;
Alex Deucher0aea5e42014-07-30 11:49:56 -0400672 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
Christian König85761f62014-11-19 14:01:20 +0100673 radeon_bo_unreserve(rbo);
Jerome Glisse721604a2012-01-05 22:11:05 -0500674 goto out;
675 }
Christian Könige971bd52012-09-11 16:10:04 +0200676 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
Jerome Glisse721604a2012-01-05 22:11:05 -0500677 break;
678 case RADEON_VA_UNMAP:
Christian Könige971bd52012-09-11 16:10:04 +0200679 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
Jerome Glisse721604a2012-01-05 22:11:05 -0500680 break;
681 default:
682 break;
683 }
Christian König2f2624c2014-09-12 12:25:45 +0200684 if (!r)
685 radeon_gem_va_update_vm(rdev, bo_va);
Jerome Glisse721604a2012-01-05 22:11:05 -0500686 args->operation = RADEON_VA_RESULT_OK;
687 if (r) {
688 args->operation = RADEON_VA_RESULT_ERROR;
689 }
690out:
Jerome Glisse721604a2012-01-05 22:11:05 -0500691 drm_gem_object_unreference_unlocked(gobj);
692 return r;
693}
694
Marek Olšákbda72d52014-03-02 00:56:17 +0100695int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
696 struct drm_file *filp)
697{
698 struct drm_radeon_gem_op *args = data;
699 struct drm_gem_object *gobj;
700 struct radeon_bo *robj;
701 int r;
702
703 gobj = drm_gem_object_lookup(dev, filp, args->handle);
704 if (gobj == NULL) {
705 return -ENOENT;
706 }
707 robj = gem_to_radeon_bo(gobj);
Christian Königf72a113a2014-08-07 09:36:00 +0200708
709 r = -EPERM;
710 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
711 goto out;
712
Marek Olšákbda72d52014-03-02 00:56:17 +0100713 r = radeon_bo_reserve(robj, false);
714 if (unlikely(r))
715 goto out;
716
717 switch (args->op) {
718 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
719 args->value = robj->initial_domain;
720 break;
721 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
722 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
723 RADEON_GEM_DOMAIN_GTT |
724 RADEON_GEM_DOMAIN_CPU);
725 break;
726 default:
727 r = -EINVAL;
728 }
729
730 radeon_bo_unreserve(robj);
731out:
732 drm_gem_object_unreference_unlocked(gobj);
733 return r;
734}
735
Dave Airlieff72145b2011-02-07 12:16:14 +1000736int radeon_mode_dumb_create(struct drm_file *file_priv,
737 struct drm_device *dev,
738 struct drm_mode_create_dumb *args)
739{
740 struct radeon_device *rdev = dev->dev_private;
741 struct drm_gem_object *gobj;
Dave Airliec87a8d82011-03-17 13:58:34 +1000742 uint32_t handle;
Dave Airlieff72145b2011-02-07 12:16:14 +1000743 int r;
744
745 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
746 args->size = args->pitch * args->height;
747 args->size = ALIGN(args->size, PAGE_SIZE);
748
749 r = radeon_gem_object_create(rdev, args->size, 0,
Michel Dänzer02376d82014-07-17 19:01:08 +0900750 RADEON_GEM_DOMAIN_VRAM, 0,
Christian Königed5cb432014-07-21 13:27:27 +0200751 false, &gobj);
Dave Airlieff72145b2011-02-07 12:16:14 +1000752 if (r)
753 return -ENOMEM;
754
Dave Airliec87a8d82011-03-17 13:58:34 +1000755 r = drm_gem_handle_create(file_priv, gobj, &handle);
756 /* drop reference from allocate - handle holds it now */
757 drm_gem_object_unreference_unlocked(gobj);
Dave Airlieff72145b2011-02-07 12:16:14 +1000758 if (r) {
Dave Airlieff72145b2011-02-07 12:16:14 +1000759 return r;
760 }
Dave Airliec87a8d82011-03-17 13:58:34 +1000761 args->handle = handle;
Dave Airlieff72145b2011-02-07 12:16:14 +1000762 return 0;
763}
764
Jerome Glisse409851f2013-04-25 22:29:27 -0400765#if defined(CONFIG_DEBUG_FS)
766static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
767{
768 struct drm_info_node *node = (struct drm_info_node *)m->private;
769 struct drm_device *dev = node->minor->dev;
770 struct radeon_device *rdev = dev->dev_private;
771 struct radeon_bo *rbo;
772 unsigned i = 0;
773
774 mutex_lock(&rdev->gem.mutex);
775 list_for_each_entry(rbo, &rdev->gem.objects, list) {
776 unsigned domain;
777 const char *placement;
778
779 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
780 switch (domain) {
781 case RADEON_GEM_DOMAIN_VRAM:
782 placement = "VRAM";
783 break;
784 case RADEON_GEM_DOMAIN_GTT:
785 placement = " GTT";
786 break;
787 case RADEON_GEM_DOMAIN_CPU:
788 default:
789 placement = " CPU";
790 break;
791 }
792 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
793 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
794 placement, (unsigned long)rbo->pid);
795 i++;
796 }
797 mutex_unlock(&rdev->gem.mutex);
798 return 0;
799}
800
801static struct drm_info_list radeon_debugfs_gem_list[] = {
802 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
803};
804#endif
805
806int radeon_gem_debugfs_init(struct radeon_device *rdev)
807{
808#if defined(CONFIG_DEBUG_FS)
809 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
810#endif
811 return 0;
812}