Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * CXL Flash Device Driver |
| 3 | * |
| 4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation |
| 5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation |
| 6 | * |
| 7 | * Copyright (C) 2015 IBM Corporation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version |
| 12 | * 2 of the License, or (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/pci.h> |
| 19 | |
| 20 | #include <asm/unaligned.h> |
| 21 | |
| 22 | #include <misc/cxl.h> |
| 23 | |
| 24 | #include <scsi/scsi_cmnd.h> |
| 25 | #include <scsi/scsi_host.h> |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 26 | #include <uapi/scsi/cxlflash_ioctl.h> |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 27 | |
| 28 | #include "main.h" |
| 29 | #include "sislite.h" |
| 30 | #include "common.h" |
| 31 | |
| 32 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); |
| 33 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); |
| 34 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); |
| 35 | MODULE_LICENSE("GPL"); |
| 36 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 37 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 38 | * process_cmd_err() - command error handler |
| 39 | * @cmd: AFU command that experienced the error. |
| 40 | * @scp: SCSI command associated with the AFU command in error. |
| 41 | * |
| 42 | * Translates error bits from AFU command to SCSI command results. |
| 43 | */ |
| 44 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) |
| 45 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 46 | struct afu *afu = cmd->parent; |
| 47 | struct cxlflash_cfg *cfg = afu->parent; |
| 48 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 49 | struct sisl_ioarcb *ioarcb; |
| 50 | struct sisl_ioasa *ioasa; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 51 | u32 resid; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 52 | |
| 53 | if (unlikely(!cmd)) |
| 54 | return; |
| 55 | |
| 56 | ioarcb = &(cmd->rcb); |
| 57 | ioasa = &(cmd->sa); |
| 58 | |
| 59 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 60 | resid = ioasa->resid; |
| 61 | scsi_set_resid(scp, resid); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 62 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
| 63 | __func__, cmd, scp, resid); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 67 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
| 68 | __func__, cmd, scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 69 | scp->result = (DID_ERROR << 16); |
| 70 | } |
| 71 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 72 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
| 73 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, |
| 74 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, |
| 75 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 76 | |
| 77 | if (ioasa->rc.scsi_rc) { |
| 78 | /* We have a SCSI status */ |
| 79 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { |
| 80 | memcpy(scp->sense_buffer, ioasa->sense_data, |
| 81 | SISL_SENSE_DATA_LEN); |
| 82 | scp->result = ioasa->rc.scsi_rc; |
| 83 | } else |
| 84 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); |
| 85 | } |
| 86 | |
| 87 | /* |
| 88 | * We encountered an error. Set scp->result based on nature |
| 89 | * of error. |
| 90 | */ |
| 91 | if (ioasa->rc.fc_rc) { |
| 92 | /* We have an FC status */ |
| 93 | switch (ioasa->rc.fc_rc) { |
| 94 | case SISL_FC_RC_LINKDOWN: |
| 95 | scp->result = (DID_REQUEUE << 16); |
| 96 | break; |
| 97 | case SISL_FC_RC_RESID: |
| 98 | /* This indicates an FCP resid underrun */ |
| 99 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { |
| 100 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, |
| 101 | * then we will handle this error else where. |
| 102 | * If not then we must handle it here. |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 103 | * This is probably an AFU bug. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 104 | */ |
| 105 | scp->result = (DID_ERROR << 16); |
| 106 | } |
| 107 | break; |
| 108 | case SISL_FC_RC_RESIDERR: |
| 109 | /* Resid mismatch between adapter and device */ |
| 110 | case SISL_FC_RC_TGTABORT: |
| 111 | case SISL_FC_RC_ABORTOK: |
| 112 | case SISL_FC_RC_ABORTFAIL: |
| 113 | case SISL_FC_RC_NOLOGI: |
| 114 | case SISL_FC_RC_ABORTPEND: |
| 115 | case SISL_FC_RC_WRABORTPEND: |
| 116 | case SISL_FC_RC_NOEXP: |
| 117 | case SISL_FC_RC_INUSE: |
| 118 | scp->result = (DID_ERROR << 16); |
| 119 | break; |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | if (ioasa->rc.afu_rc) { |
| 124 | /* We have an AFU error */ |
| 125 | switch (ioasa->rc.afu_rc) { |
| 126 | case SISL_AFU_RC_NO_CHANNELS: |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 127 | scp->result = (DID_NO_CONNECT << 16); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 128 | break; |
| 129 | case SISL_AFU_RC_DATA_DMA_ERR: |
| 130 | switch (ioasa->afu_extra) { |
| 131 | case SISL_AFU_DMA_ERR_PAGE_IN: |
| 132 | /* Retry */ |
| 133 | scp->result = (DID_IMM_RETRY << 16); |
| 134 | break; |
| 135 | case SISL_AFU_DMA_ERR_INVALID_EA: |
| 136 | default: |
| 137 | scp->result = (DID_ERROR << 16); |
| 138 | } |
| 139 | break; |
| 140 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: |
| 141 | /* Retry */ |
| 142 | scp->result = (DID_ALLOC_FAILURE << 16); |
| 143 | break; |
| 144 | default: |
| 145 | scp->result = (DID_ERROR << 16); |
| 146 | } |
| 147 | } |
| 148 | } |
| 149 | |
| 150 | /** |
| 151 | * cmd_complete() - command completion handler |
| 152 | * @cmd: AFU command that has completed. |
| 153 | * |
| 154 | * Prepares and submits command that has either completed or timed out to |
| 155 | * the SCSI stack. Checks AFU command back into command pool for non-internal |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 156 | * (cmd->scp populated) commands. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 157 | */ |
| 158 | static void cmd_complete(struct afu_cmd *cmd) |
| 159 | { |
| 160 | struct scsi_cmnd *scp; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 161 | ulong lock_flags; |
| 162 | struct afu *afu = cmd->parent; |
| 163 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 164 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 165 | bool cmd_is_tmf; |
| 166 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 167 | if (cmd->scp) { |
| 168 | scp = cmd->scp; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 169 | if (unlikely(cmd->sa.ioasc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 170 | process_cmd_err(cmd, scp); |
| 171 | else |
| 172 | scp->result = (DID_OK << 16); |
| 173 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 174 | cmd_is_tmf = cmd->cmd_tmf; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 175 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 176 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
| 177 | __func__, scp, scp->result, cmd->sa.ioasc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 178 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 179 | scsi_dma_unmap(scp); |
| 180 | scp->scsi_done(scp); |
| 181 | |
| 182 | if (cmd_is_tmf) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 183 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 184 | cfg->tmf_active = false; |
| 185 | wake_up_all_locked(&cfg->tmf_waitq); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 186 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 187 | } |
| 188 | } else |
| 189 | complete(&cmd->cevent); |
| 190 | } |
| 191 | |
| 192 | /** |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 193 | * context_reset() - reset command owner context via specified register |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 194 | * @cmd: AFU command that timed out. |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 195 | * @reset_reg: MMIO register to perform reset. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 196 | */ |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 197 | static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 198 | { |
| 199 | int nretry = 0; |
| 200 | u64 rrin = 0x1; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 201 | struct afu *afu = cmd->parent; |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 202 | struct cxlflash_cfg *cfg = afu->parent; |
| 203 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 204 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 205 | dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 206 | |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 207 | writeq_be(rrin, reset_reg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 208 | do { |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 209 | rrin = readq_be(reset_reg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 210 | if (rrin != 0x1) |
| 211 | break; |
| 212 | /* Double delay each time */ |
Manoj N. Kumar | ea76543 | 2016-03-25 14:26:49 -0500 | [diff] [blame] | 213 | udelay(1 << nretry); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 214 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 215 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 216 | dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n", |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 217 | __func__, rrin, nretry); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | /** |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 221 | * context_reset_ioarrin() - reset command owner context via IOARRIN register |
| 222 | * @cmd: AFU command that timed out. |
| 223 | */ |
| 224 | static void context_reset_ioarrin(struct afu_cmd *cmd) |
| 225 | { |
| 226 | struct afu *afu = cmd->parent; |
| 227 | |
| 228 | context_reset(cmd, &afu->host_map->ioarrin); |
| 229 | } |
| 230 | |
| 231 | /** |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 232 | * context_reset_sq() - reset command owner context w/ SQ Context Reset register |
| 233 | * @cmd: AFU command that timed out. |
| 234 | */ |
| 235 | static void context_reset_sq(struct afu_cmd *cmd) |
| 236 | { |
| 237 | struct afu *afu = cmd->parent; |
| 238 | |
| 239 | context_reset(cmd, &afu->host_map->sq_ctx_reset); |
| 240 | } |
| 241 | |
| 242 | /** |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 243 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 244 | * @afu: AFU associated with the host. |
| 245 | * @cmd: AFU command to send. |
| 246 | * |
| 247 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 248 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 249 | */ |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 250 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 251 | { |
| 252 | struct cxlflash_cfg *cfg = afu->parent; |
| 253 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 254 | int rc = 0; |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 255 | s64 room; |
| 256 | ulong lock_flags; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 257 | |
| 258 | /* |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 259 | * To avoid the performance penalty of MMIO, spread the update of |
| 260 | * 'room' over multiple commands. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 261 | */ |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 262 | spin_lock_irqsave(&afu->rrin_slock, lock_flags); |
| 263 | if (--afu->room < 0) { |
| 264 | room = readq_be(&afu->host_map->cmd_room); |
| 265 | if (room <= 0) { |
| 266 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " |
| 267 | "0x%02X, room=0x%016llX\n", |
| 268 | __func__, cmd->rcb.cdb[0], room); |
| 269 | afu->room = 0; |
| 270 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 271 | goto out; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 272 | } |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 273 | afu->room = room - 1; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 274 | } |
| 275 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 276 | writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin); |
| 277 | out: |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 278 | spin_unlock_irqrestore(&afu->rrin_slock, lock_flags); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 279 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, |
| 280 | cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 281 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 282 | } |
| 283 | |
| 284 | /** |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 285 | * send_cmd_sq() - sends an AFU command via SQ ring |
| 286 | * @afu: AFU associated with the host. |
| 287 | * @cmd: AFU command to send. |
| 288 | * |
| 289 | * Return: |
| 290 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
| 291 | */ |
| 292 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) |
| 293 | { |
| 294 | struct cxlflash_cfg *cfg = afu->parent; |
| 295 | struct device *dev = &cfg->dev->dev; |
| 296 | int rc = 0; |
| 297 | int newval; |
| 298 | ulong lock_flags; |
| 299 | |
| 300 | newval = atomic_dec_if_positive(&afu->hsq_credits); |
| 301 | if (newval <= 0) { |
| 302 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 303 | goto out; |
| 304 | } |
| 305 | |
| 306 | cmd->rcb.ioasa = &cmd->sa; |
| 307 | |
| 308 | spin_lock_irqsave(&afu->hsq_slock, lock_flags); |
| 309 | |
| 310 | *afu->hsq_curr = cmd->rcb; |
| 311 | if (afu->hsq_curr < afu->hsq_end) |
| 312 | afu->hsq_curr++; |
| 313 | else |
| 314 | afu->hsq_curr = afu->hsq_start; |
| 315 | writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail); |
| 316 | |
| 317 | spin_unlock_irqrestore(&afu->hsq_slock, lock_flags); |
| 318 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 319 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
| 320 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, |
| 321 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr, |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 322 | readq_be(&afu->host_map->sq_head), |
| 323 | readq_be(&afu->host_map->sq_tail)); |
| 324 | return rc; |
| 325 | } |
| 326 | |
| 327 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 328 | * wait_resp() - polls for a response or timeout to a sent AFU command |
| 329 | * @afu: AFU associated with the host. |
| 330 | * @cmd: AFU command that was sent. |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 331 | * |
| 332 | * Return: |
| 333 | * 0 on success, -1 on timeout/error |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 334 | */ |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 335 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 336 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 337 | struct cxlflash_cfg *cfg = afu->parent; |
| 338 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 339 | int rc = 0; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 340 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
| 341 | |
| 342 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 343 | if (!timeout) { |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 344 | afu->context_reset(cmd); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 345 | rc = -1; |
| 346 | } |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 347 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 348 | if (unlikely(cmd->sa.ioasc != 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 349 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
| 350 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 351 | rc = -1; |
| 352 | } |
| 353 | |
| 354 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 358 | * send_tmf() - sends a Task Management Function (TMF) |
| 359 | * @afu: AFU to checkout from. |
| 360 | * @scp: SCSI command from stack. |
| 361 | * @tmfcmd: TMF command to send. |
| 362 | * |
| 363 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 364 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 365 | */ |
| 366 | static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) |
| 367 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 368 | struct cxlflash_cfg *cfg = shost_priv(scp->device->host); |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 369 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 370 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 371 | ulong lock_flags; |
| 372 | int rc = 0; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 373 | ulong to; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 374 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 375 | /* When Task Management Function is active do not send another */ |
| 376 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 377 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 378 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 379 | !cfg->tmf_active, |
| 380 | cfg->tmf_slock); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 381 | cfg->tmf_active = true; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 382 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 383 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 384 | cmd->scp = scp; |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 385 | cmd->parent = afu; |
| 386 | cmd->cmd_tmf = true; |
| 387 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 388 | cmd->rcb.ctx_id = afu->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 389 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 390 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 391 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 392 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 393 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
| 394 | SISL_REQ_FLAGS_TMF_CMD); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 395 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
| 396 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 397 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 398 | if (unlikely(rc)) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 399 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 400 | cfg->tmf_active = false; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 401 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 402 | goto out; |
| 403 | } |
| 404 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 405 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
| 406 | to = msecs_to_jiffies(5000); |
| 407 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, |
| 408 | !cfg->tmf_active, |
| 409 | cfg->tmf_slock, |
| 410 | to); |
| 411 | if (!to) { |
| 412 | cfg->tmf_active = false; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 413 | dev_err(dev, "%s: TMF timed out\n", __func__); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 414 | rc = -1; |
| 415 | } |
| 416 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 417 | out: |
| 418 | return rc; |
| 419 | } |
| 420 | |
| 421 | /** |
| 422 | * cxlflash_driver_info() - information handler for this host driver |
| 423 | * @host: SCSI host associated with device. |
| 424 | * |
| 425 | * Return: A string describing the device. |
| 426 | */ |
| 427 | static const char *cxlflash_driver_info(struct Scsi_Host *host) |
| 428 | { |
| 429 | return CXLFLASH_ADAPTER_NAME; |
| 430 | } |
| 431 | |
| 432 | /** |
| 433 | * cxlflash_queuecommand() - sends a mid-layer request |
| 434 | * @host: SCSI host associated with device. |
| 435 | * @scp: SCSI command to send. |
| 436 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 437 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 438 | */ |
| 439 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) |
| 440 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 441 | struct cxlflash_cfg *cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 442 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 443 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 444 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 445 | struct scatterlist *sg = scsi_sglist(scp); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 446 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 447 | ulong lock_flags; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 448 | int nseg = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 449 | int rc = 0; |
| 450 | |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 451 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 452 | "cdb=(%08x-%08x-%08x-%08x)\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 453 | __func__, scp, host->host_no, scp->device->channel, |
| 454 | scp->device->id, scp->device->lun, |
| 455 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 456 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 457 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 458 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 459 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 460 | /* |
| 461 | * If a Task Management Function is active, wait for it to complete |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 462 | * before continuing with regular commands. |
| 463 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 464 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 465 | if (cfg->tmf_active) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 466 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 467 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 468 | goto out; |
| 469 | } |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 470 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 471 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 472 | switch (cfg->state) { |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 473 | case STATE_RESET: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 474 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 475 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 476 | goto out; |
| 477 | case STATE_FAILTERM: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 478 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 479 | scp->result = (DID_NO_CONNECT << 16); |
| 480 | scp->scsi_done(scp); |
| 481 | rc = 0; |
| 482 | goto out; |
| 483 | default: |
| 484 | break; |
| 485 | } |
| 486 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 487 | if (likely(sg)) { |
| 488 | nseg = scsi_dma_map(scp); |
| 489 | if (unlikely(nseg < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 490 | dev_err(dev, "%s: Fail DMA map\n", __func__); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 491 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 492 | goto out; |
| 493 | } |
| 494 | |
| 495 | cmd->rcb.data_len = sg_dma_len(sg); |
| 496 | cmd->rcb.data_ea = sg_dma_address(sg); |
| 497 | } |
| 498 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 499 | cmd->scp = scp; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 500 | cmd->parent = afu; |
| 501 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 502 | cmd->rcb.ctx_id = afu->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 503 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 504 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 505 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
| 506 | |
| 507 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 508 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 509 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 510 | cmd->rcb.req_flags = req_flags; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 511 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
| 512 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 513 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 514 | if (unlikely(rc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 515 | scsi_dma_unmap(scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 516 | out: |
| 517 | return rc; |
| 518 | } |
| 519 | |
| 520 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 521 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 522 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 523 | */ |
| 524 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
| 525 | { |
| 526 | struct pci_dev *pdev = cfg->dev; |
| 527 | |
| 528 | if (pci_channel_offline(pdev)) |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 529 | wait_event_timeout(cfg->reset_waitq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 530 | !pci_channel_offline(pdev), |
| 531 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); |
| 532 | } |
| 533 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 534 | /** |
| 535 | * free_mem() - free memory associated with the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 536 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 537 | */ |
| 538 | static void free_mem(struct cxlflash_cfg *cfg) |
| 539 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 540 | struct afu *afu = cfg->afu; |
| 541 | |
| 542 | if (cfg->afu) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 543 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
| 544 | cfg->afu = NULL; |
| 545 | } |
| 546 | } |
| 547 | |
| 548 | /** |
| 549 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 550 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 551 | * |
| 552 | * Safe to call with AFU in a partially allocated/initialized state. |
Manoj Kumar | ee91e33 | 2015-12-14 15:07:02 -0600 | [diff] [blame] | 553 | * |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 554 | * Cancels scheduled worker threads, waits for any active internal AFU |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 555 | * commands to timeout, disables IRQ polling and then unmaps the MMIO space. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 556 | */ |
| 557 | static void stop_afu(struct cxlflash_cfg *cfg) |
| 558 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 559 | struct afu *afu = cfg->afu; |
| 560 | |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 561 | cancel_work_sync(&cfg->work_q); |
| 562 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 563 | if (likely(afu)) { |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 564 | while (atomic_read(&afu->cmds_active)) |
| 565 | ssleep(1); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 566 | if (afu_is_irqpoll_enabled(afu)) |
| 567 | irq_poll_disable(&afu->irqpoll); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 568 | if (likely(afu->afu_map)) { |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 569 | cxl_psa_unmap((void __iomem *)afu->afu_map); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 570 | afu->afu_map = NULL; |
| 571 | } |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 576 | * term_intr() - disables all AFU interrupts |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 577 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 578 | * @level: Depth of allocation, where to begin waterfall tear down. |
| 579 | * |
| 580 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 581 | */ |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 582 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 583 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 584 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 585 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 586 | |
| 587 | if (!afu || !cfg->mcctx) { |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 588 | dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 589 | return; |
| 590 | } |
| 591 | |
| 592 | switch (level) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 593 | case UNMAP_THREE: |
| 594 | cxl_unmap_afu_irq(cfg->mcctx, 3, afu); |
| 595 | case UNMAP_TWO: |
| 596 | cxl_unmap_afu_irq(cfg->mcctx, 2, afu); |
| 597 | case UNMAP_ONE: |
| 598 | cxl_unmap_afu_irq(cfg->mcctx, 1, afu); |
| 599 | case FREE_IRQ: |
| 600 | cxl_free_afu_irqs(cfg->mcctx); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 601 | /* fall through */ |
| 602 | case UNDO_NOOP: |
| 603 | /* No action required */ |
| 604 | break; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 605 | } |
| 606 | } |
| 607 | |
| 608 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 609 | * term_mc() - terminates the master context |
| 610 | * @cfg: Internal structure associated with the host. |
| 611 | * @level: Depth of allocation, where to begin waterfall tear down. |
| 612 | * |
| 613 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 614 | */ |
| 615 | static void term_mc(struct cxlflash_cfg *cfg) |
| 616 | { |
| 617 | int rc = 0; |
| 618 | struct afu *afu = cfg->afu; |
| 619 | struct device *dev = &cfg->dev->dev; |
| 620 | |
| 621 | if (!afu || !cfg->mcctx) { |
| 622 | dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); |
| 623 | return; |
| 624 | } |
| 625 | |
| 626 | rc = cxl_stop_context(cfg->mcctx); |
| 627 | WARN_ON(rc); |
| 628 | cfg->mcctx = NULL; |
| 629 | } |
| 630 | |
| 631 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 632 | * term_afu() - terminates the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 633 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 634 | * |
| 635 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 636 | */ |
| 637 | static void term_afu(struct cxlflash_cfg *cfg) |
| 638 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 639 | struct device *dev = &cfg->dev->dev; |
| 640 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 641 | /* |
| 642 | * Tear down is carefully orchestrated to ensure |
| 643 | * no interrupts can come in when the problem state |
| 644 | * area is unmapped. |
| 645 | * |
| 646 | * 1) Disable all AFU interrupts |
| 647 | * 2) Unmap the problem state area |
| 648 | * 3) Stop the master context |
| 649 | */ |
| 650 | term_intr(cfg, UNMAP_THREE); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 651 | if (cfg->afu) |
| 652 | stop_afu(cfg); |
| 653 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 654 | term_mc(cfg); |
Uma Krishnan | 6ded8b3 | 2016-03-04 15:55:15 -0600 | [diff] [blame] | 655 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 656 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 657 | } |
| 658 | |
| 659 | /** |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 660 | * notify_shutdown() - notifies device of pending shutdown |
| 661 | * @cfg: Internal structure associated with the host. |
| 662 | * @wait: Whether to wait for shutdown processing to complete. |
| 663 | * |
| 664 | * This function will notify the AFU that the adapter is being shutdown |
| 665 | * and will wait for shutdown processing to complete if wait is true. |
| 666 | * This notification should flush pending I/Os to the device and halt |
| 667 | * further I/Os until the next AFU reset is issued and device restarted. |
| 668 | */ |
| 669 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) |
| 670 | { |
| 671 | struct afu *afu = cfg->afu; |
| 672 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 673 | struct dev_dependent_vals *ddv; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 674 | __be64 __iomem *fc_port_regs; |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 675 | u64 reg, status; |
| 676 | int i, retry_cnt = 0; |
| 677 | |
| 678 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; |
| 679 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) |
| 680 | return; |
| 681 | |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 682 | if (!afu || !afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 683 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 684 | return; |
| 685 | } |
| 686 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 687 | /* Notify AFU */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 688 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 689 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 690 | |
| 691 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 692 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 693 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 694 | } |
| 695 | |
| 696 | if (!wait) |
| 697 | return; |
| 698 | |
| 699 | /* Wait up to 1.5 seconds for shutdown processing to complete */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 700 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 701 | fc_port_regs = get_fc_port_regs(cfg, i); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 702 | retry_cnt = 0; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 703 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 704 | while (true) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 705 | status = readq_be(&fc_port_regs[FC_STATUS / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 706 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
| 707 | break; |
| 708 | if (++retry_cnt >= MC_RETRY_CNT) { |
| 709 | dev_dbg(dev, "%s: port %d shutdown processing " |
| 710 | "not yet completed\n", __func__, i); |
| 711 | break; |
| 712 | } |
| 713 | msleep(100 * retry_cnt); |
| 714 | } |
| 715 | } |
| 716 | } |
| 717 | |
| 718 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 719 | * cxlflash_remove() - PCI entry point to tear down host |
| 720 | * @pdev: PCI device associated with the host. |
| 721 | * |
| 722 | * Safe to use as a cleanup in partially allocated/initialized state. |
| 723 | */ |
| 724 | static void cxlflash_remove(struct pci_dev *pdev) |
| 725 | { |
| 726 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 727 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 728 | ulong lock_flags; |
| 729 | |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 730 | if (!pci_is_enabled(pdev)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 731 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 732 | return; |
| 733 | } |
| 734 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 735 | /* If a Task Management Function is active, wait for it to complete |
| 736 | * before continuing with remove. |
| 737 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 738 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 739 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 740 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 741 | !cfg->tmf_active, |
| 742 | cfg->tmf_slock); |
| 743 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 744 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 745 | /* Notify AFU and wait for shutdown processing to complete */ |
| 746 | notify_shutdown(cfg, true); |
| 747 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 748 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 749 | cxlflash_stop_term_user_contexts(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 750 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 751 | switch (cfg->init_state) { |
| 752 | case INIT_STATE_SCSI: |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 753 | cxlflash_term_local_luns(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 754 | scsi_remove_host(cfg->host); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 755 | /* fall through */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 756 | case INIT_STATE_AFU: |
Manoj Kumar | b45cdbaf | 2015-12-14 15:07:23 -0600 | [diff] [blame] | 757 | term_afu(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 758 | case INIT_STATE_PCI: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 759 | pci_disable_device(pdev); |
| 760 | case INIT_STATE_NONE: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 761 | free_mem(cfg); |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 762 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 763 | break; |
| 764 | } |
| 765 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 766 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | /** |
| 770 | * alloc_mem() - allocates the AFU and its command pool |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 771 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 772 | * |
| 773 | * A partially allocated state remains on failure. |
| 774 | * |
| 775 | * Return: |
| 776 | * 0 on success |
| 777 | * -ENOMEM on failure to allocate memory |
| 778 | */ |
| 779 | static int alloc_mem(struct cxlflash_cfg *cfg) |
| 780 | { |
| 781 | int rc = 0; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 782 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 783 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 784 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 785 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 786 | get_order(sizeof(struct afu))); |
| 787 | if (unlikely(!cfg->afu)) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 788 | dev_err(dev, "%s: cannot get %d free pages\n", |
| 789 | __func__, get_order(sizeof(struct afu))); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 790 | rc = -ENOMEM; |
| 791 | goto out; |
| 792 | } |
| 793 | cfg->afu->parent = cfg; |
| 794 | cfg->afu->afu_map = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 795 | out: |
| 796 | return rc; |
| 797 | } |
| 798 | |
| 799 | /** |
| 800 | * init_pci() - initializes the host as a PCI device |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 801 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 802 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 803 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 804 | */ |
| 805 | static int init_pci(struct cxlflash_cfg *cfg) |
| 806 | { |
| 807 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 808 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 809 | int rc = 0; |
| 810 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 811 | rc = pci_enable_device(pdev); |
| 812 | if (rc || pci_channel_offline(pdev)) { |
| 813 | if (pci_channel_offline(pdev)) { |
| 814 | cxlflash_wait_for_pci_err_recovery(cfg); |
| 815 | rc = pci_enable_device(pdev); |
| 816 | } |
| 817 | |
| 818 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 819 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 820 | cxlflash_wait_for_pci_err_recovery(cfg); |
Manoj N. Kumar | 961487e | 2016-03-04 15:55:14 -0600 | [diff] [blame] | 821 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 822 | } |
| 823 | } |
| 824 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 825 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 826 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 827 | return rc; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 828 | } |
| 829 | |
| 830 | /** |
| 831 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 832 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 833 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 834 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 835 | */ |
| 836 | static int init_scsi(struct cxlflash_cfg *cfg) |
| 837 | { |
| 838 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 839 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 840 | int rc = 0; |
| 841 | |
| 842 | rc = scsi_add_host(cfg->host, &pdev->dev); |
| 843 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 844 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 845 | goto out; |
| 846 | } |
| 847 | |
| 848 | scsi_scan_host(cfg->host); |
| 849 | |
| 850 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 851 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 852 | return rc; |
| 853 | } |
| 854 | |
| 855 | /** |
| 856 | * set_port_online() - transitions the specified host FC port to online state |
| 857 | * @fc_regs: Top of MMIO region defined for specified port. |
| 858 | * |
| 859 | * The provided MMIO region must be mapped prior to call. Online state means |
| 860 | * that the FC link layer has synced, completed the handshaking process, and |
| 861 | * is ready for login to start. |
| 862 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 863 | static void set_port_online(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 864 | { |
| 865 | u64 cmdcfg; |
| 866 | |
| 867 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 868 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ |
| 869 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ |
| 870 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 871 | } |
| 872 | |
| 873 | /** |
| 874 | * set_port_offline() - transitions the specified host FC port to offline state |
| 875 | * @fc_regs: Top of MMIO region defined for specified port. |
| 876 | * |
| 877 | * The provided MMIO region must be mapped prior to call. |
| 878 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 879 | static void set_port_offline(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 880 | { |
| 881 | u64 cmdcfg; |
| 882 | |
| 883 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 884 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ |
| 885 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ |
| 886 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 887 | } |
| 888 | |
| 889 | /** |
| 890 | * wait_port_online() - waits for the specified host FC port come online |
| 891 | * @fc_regs: Top of MMIO region defined for specified port. |
| 892 | * @delay_us: Number of microseconds to delay between reading port status. |
| 893 | * @nretry: Number of cycles to retry reading port status. |
| 894 | * |
| 895 | * The provided MMIO region must be mapped prior to call. This will timeout |
| 896 | * when the cable is not plugged in. |
| 897 | * |
| 898 | * Return: |
| 899 | * TRUE (1) when the specified port is online |
| 900 | * FALSE (0) when the specified port fails to come online after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 901 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 902 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 903 | { |
| 904 | u64 status; |
| 905 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 906 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 907 | |
| 908 | do { |
| 909 | msleep(delay_us / 1000); |
| 910 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 911 | if (status == U64_MAX) |
| 912 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 913 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
| 914 | nretry--); |
| 915 | |
| 916 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); |
| 917 | } |
| 918 | |
| 919 | /** |
| 920 | * wait_port_offline() - waits for the specified host FC port go offline |
| 921 | * @fc_regs: Top of MMIO region defined for specified port. |
| 922 | * @delay_us: Number of microseconds to delay between reading port status. |
| 923 | * @nretry: Number of cycles to retry reading port status. |
| 924 | * |
| 925 | * The provided MMIO region must be mapped prior to call. |
| 926 | * |
| 927 | * Return: |
| 928 | * TRUE (1) when the specified port is offline |
| 929 | * FALSE (0) when the specified port fails to go offline after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 930 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 931 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 932 | { |
| 933 | u64 status; |
| 934 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 935 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 936 | |
| 937 | do { |
| 938 | msleep(delay_us / 1000); |
| 939 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 940 | if (status == U64_MAX) |
| 941 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 942 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
| 943 | nretry--); |
| 944 | |
| 945 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); |
| 946 | } |
| 947 | |
| 948 | /** |
| 949 | * afu_set_wwpn() - configures the WWPN for the specified host FC port |
| 950 | * @afu: AFU associated with the host that owns the specified FC port. |
| 951 | * @port: Port number being configured. |
| 952 | * @fc_regs: Top of MMIO region defined for specified port. |
| 953 | * @wwpn: The world-wide-port-number previously discovered for port. |
| 954 | * |
| 955 | * The provided MMIO region must be mapped prior to call. As part of the |
| 956 | * sequence to configure the WWPN, the port is toggled offline and then back |
| 957 | * online. This toggling action can cause this routine to delay up to a few |
| 958 | * seconds. When configured to use the internal LUN feature of the AFU, a |
| 959 | * failure to come online is overridden. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 960 | */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 961 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
| 962 | u64 wwpn) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 963 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 964 | struct cxlflash_cfg *cfg = afu->parent; |
| 965 | struct device *dev = &cfg->dev->dev; |
| 966 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 967 | set_port_offline(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 968 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 969 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 970 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
| 971 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 972 | } |
| 973 | |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 974 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
Matthew R. Ochs | 964497b | 2015-10-21 15:13:54 -0500 | [diff] [blame] | 975 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 976 | set_port_online(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 977 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 978 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 979 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
| 980 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 981 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 982 | } |
| 983 | |
| 984 | /** |
| 985 | * afu_link_reset() - resets the specified host FC port |
| 986 | * @afu: AFU associated with the host that owns the specified FC port. |
| 987 | * @port: Port number being configured. |
| 988 | * @fc_regs: Top of MMIO region defined for specified port. |
| 989 | * |
| 990 | * The provided MMIO region must be mapped prior to call. The sequence to |
| 991 | * reset the port involves toggling it offline and then back online. This |
| 992 | * action can cause this routine to delay up to a few seconds. An effort |
| 993 | * is made to maintain link with the device by switching to host to use |
| 994 | * the alternate port exclusively while the reset takes place. |
| 995 | * failure to come online is overridden. |
| 996 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 997 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 998 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 999 | struct cxlflash_cfg *cfg = afu->parent; |
| 1000 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1001 | u64 port_sel; |
| 1002 | |
| 1003 | /* first switch the AFU to the other links, if any */ |
| 1004 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1005 | port_sel &= ~(1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1006 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1007 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1008 | |
| 1009 | set_port_offline(fc_regs); |
| 1010 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1011 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1012 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
| 1013 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1014 | |
| 1015 | set_port_online(fc_regs); |
| 1016 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1017 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1018 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
| 1019 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1020 | |
| 1021 | /* switch back to include this port */ |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1022 | port_sel |= (1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1023 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1024 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1025 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1026 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1027 | } |
| 1028 | |
| 1029 | /* |
| 1030 | * Asynchronous interrupt information table |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1031 | * |
| 1032 | * NOTE: The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro |
| 1033 | * as complex and complains because it is not wrapped with parentheses/braces. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1034 | */ |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1035 | #define ASTATUS_FC(_a, _b, _c, _d) \ |
| 1036 | { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } |
| 1037 | |
| 1038 | #define BUILD_SISL_ASTATUS_FC_PORT(_a) \ |
| 1039 | ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET), \ |
| 1040 | ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ |
| 1041 | ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ |
| 1042 | ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ |
| 1043 | ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ |
| 1044 | ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ |
| 1045 | ASTATUS_FC(_a, LINK_DN, "link down", 0), \ |
| 1046 | ASTATUS_FC(_a, LINK_UP, "link up", 0) |
| 1047 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1048 | static const struct asyc_intr_info ainfo[] = { |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1049 | BUILD_SISL_ASTATUS_FC_PORT(2), |
| 1050 | BUILD_SISL_ASTATUS_FC_PORT(3), |
| 1051 | BUILD_SISL_ASTATUS_FC_PORT(0), |
| 1052 | BUILD_SISL_ASTATUS_FC_PORT(1), |
| 1053 | { 0x0, "", 0, 0 } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1054 | }; |
| 1055 | |
| 1056 | /** |
| 1057 | * find_ainfo() - locates and returns asynchronous interrupt information |
| 1058 | * @status: Status code set by AFU on error. |
| 1059 | * |
| 1060 | * Return: The located information or NULL when the status code is invalid. |
| 1061 | */ |
| 1062 | static const struct asyc_intr_info *find_ainfo(u64 status) |
| 1063 | { |
| 1064 | const struct asyc_intr_info *info; |
| 1065 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1066 | BUILD_BUG_ON(ainfo[ARRAY_SIZE(ainfo) - 1].status != 0); |
| 1067 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1068 | for (info = &ainfo[0]; info->status; info++) |
| 1069 | if (info->status == status) |
| 1070 | return info; |
| 1071 | |
| 1072 | return NULL; |
| 1073 | } |
| 1074 | |
| 1075 | /** |
| 1076 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts |
| 1077 | * @afu: AFU associated with the host. |
| 1078 | */ |
| 1079 | static void afu_err_intr_init(struct afu *afu) |
| 1080 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1081 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1082 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1083 | int i; |
| 1084 | u64 reg; |
| 1085 | |
| 1086 | /* global async interrupts: AFU clears afu_ctrl on context exit |
| 1087 | * if async interrupts were sent to that context. This prevents |
| 1088 | * the AFU form sending further async interrupts when |
| 1089 | * there is |
| 1090 | * nobody to receive them. |
| 1091 | */ |
| 1092 | |
| 1093 | /* mask all */ |
| 1094 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); |
| 1095 | /* set LISN# to send and point to master context */ |
| 1096 | reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); |
| 1097 | |
| 1098 | if (afu->internal_lun) |
| 1099 | reg |= 1; /* Bit 63 indicates local lun */ |
| 1100 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); |
| 1101 | /* clear all */ |
| 1102 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1103 | /* unmask bits that are of interest */ |
| 1104 | /* note: afu can send an interrupt after this step */ |
| 1105 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); |
| 1106 | /* clear again in case a bit came on after previous clear but before */ |
| 1107 | /* unmask */ |
| 1108 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1109 | |
| 1110 | /* Clear/Set internal lun bits */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1111 | fc_port_regs = get_fc_port_regs(cfg, 0); |
| 1112 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1113 | reg &= SISL_FC_INTERNAL_MASK; |
| 1114 | if (afu->internal_lun) |
| 1115 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1116 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1117 | |
| 1118 | /* now clear FC errors */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1119 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1120 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 1121 | |
| 1122 | writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); |
| 1123 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1124 | } |
| 1125 | |
| 1126 | /* sync interrupts for master's IOARRIN write */ |
| 1127 | /* note that unlike asyncs, there can be no pending sync interrupts */ |
| 1128 | /* at this time (this is a fresh context and master has not written */ |
| 1129 | /* IOARRIN yet), so there is nothing to clear. */ |
| 1130 | |
| 1131 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ |
| 1132 | writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl); |
| 1133 | writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask); |
| 1134 | } |
| 1135 | |
| 1136 | /** |
| 1137 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors |
| 1138 | * @irq: Interrupt number. |
| 1139 | * @data: Private data provided at interrupt registration, the AFU. |
| 1140 | * |
| 1141 | * Return: Always return IRQ_HANDLED. |
| 1142 | */ |
| 1143 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) |
| 1144 | { |
| 1145 | struct afu *afu = (struct afu *)data; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1146 | struct cxlflash_cfg *cfg = afu->parent; |
| 1147 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1148 | u64 reg; |
| 1149 | u64 reg_unmasked; |
| 1150 | |
| 1151 | reg = readq_be(&afu->host_map->intr_status); |
| 1152 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
| 1153 | |
| 1154 | if (reg_unmasked == 0UL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1155 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
| 1156 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1157 | goto cxlflash_sync_err_irq_exit; |
| 1158 | } |
| 1159 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1160 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
| 1161 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1162 | |
| 1163 | writeq_be(reg_unmasked, &afu->host_map->intr_clear); |
| 1164 | |
| 1165 | cxlflash_sync_err_irq_exit: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1166 | return IRQ_HANDLED; |
| 1167 | } |
| 1168 | |
| 1169 | /** |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1170 | * process_hrrq() - process the read-response queue |
| 1171 | * @afu: AFU associated with the host. |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1172 | * @doneq: Queue of commands harvested from the RRQ. |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1173 | * @budget: Threshold of RRQ entries to process. |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1174 | * |
| 1175 | * This routine must be called holding the disabled RRQ spin lock. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1176 | * |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1177 | * Return: The number of entries processed. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1178 | */ |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1179 | static int process_hrrq(struct afu *afu, struct list_head *doneq, int budget) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1180 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1181 | struct afu_cmd *cmd; |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1182 | struct sisl_ioasa *ioasa; |
| 1183 | struct sisl_ioarcb *ioarcb; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1184 | bool toggle = afu->toggle; |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1185 | int num_hrrq = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1186 | u64 entry, |
| 1187 | *hrrq_start = afu->hrrq_start, |
| 1188 | *hrrq_end = afu->hrrq_end, |
| 1189 | *hrrq_curr = afu->hrrq_curr; |
| 1190 | |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1191 | /* Process ready RRQ entries up to the specified budget (if any) */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1192 | while (true) { |
| 1193 | entry = *hrrq_curr; |
| 1194 | |
| 1195 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) |
| 1196 | break; |
| 1197 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1198 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
| 1199 | |
| 1200 | if (afu_is_sq_cmd_mode(afu)) { |
| 1201 | ioasa = (struct sisl_ioasa *)entry; |
| 1202 | cmd = container_of(ioasa, struct afu_cmd, sa); |
| 1203 | } else { |
| 1204 | ioarcb = (struct sisl_ioarcb *)entry; |
| 1205 | cmd = container_of(ioarcb, struct afu_cmd, rcb); |
| 1206 | } |
| 1207 | |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1208 | list_add_tail(&cmd->queue, doneq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1209 | |
| 1210 | /* Advance to next entry or wrap and flip the toggle bit */ |
| 1211 | if (hrrq_curr < hrrq_end) |
| 1212 | hrrq_curr++; |
| 1213 | else { |
| 1214 | hrrq_curr = hrrq_start; |
| 1215 | toggle ^= SISL_RESP_HANDLE_T_BIT; |
| 1216 | } |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1217 | |
| 1218 | atomic_inc(&afu->hsq_credits); |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1219 | num_hrrq++; |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1220 | |
| 1221 | if (budget > 0 && num_hrrq >= budget) |
| 1222 | break; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1223 | } |
| 1224 | |
| 1225 | afu->hrrq_curr = hrrq_curr; |
| 1226 | afu->toggle = toggle; |
| 1227 | |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1228 | return num_hrrq; |
| 1229 | } |
| 1230 | |
| 1231 | /** |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1232 | * process_cmd_doneq() - process a queue of harvested RRQ commands |
| 1233 | * @doneq: Queue of completed commands. |
| 1234 | * |
| 1235 | * Note that upon return the queue can no longer be trusted. |
| 1236 | */ |
| 1237 | static void process_cmd_doneq(struct list_head *doneq) |
| 1238 | { |
| 1239 | struct afu_cmd *cmd, *tmp; |
| 1240 | |
| 1241 | WARN_ON(list_empty(doneq)); |
| 1242 | |
| 1243 | list_for_each_entry_safe(cmd, tmp, doneq, queue) |
| 1244 | cmd_complete(cmd); |
| 1245 | } |
| 1246 | |
| 1247 | /** |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1248 | * cxlflash_irqpoll() - process a queue of harvested RRQ commands |
| 1249 | * @irqpoll: IRQ poll structure associated with queue to poll. |
| 1250 | * @budget: Threshold of RRQ entries to process per poll. |
| 1251 | * |
| 1252 | * Return: The number of entries processed. |
| 1253 | */ |
| 1254 | static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) |
| 1255 | { |
| 1256 | struct afu *afu = container_of(irqpoll, struct afu, irqpoll); |
| 1257 | unsigned long hrrq_flags; |
| 1258 | LIST_HEAD(doneq); |
| 1259 | int num_entries = 0; |
| 1260 | |
| 1261 | spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags); |
| 1262 | |
| 1263 | num_entries = process_hrrq(afu, &doneq, budget); |
| 1264 | if (num_entries < budget) |
| 1265 | irq_poll_complete(irqpoll); |
| 1266 | |
| 1267 | spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags); |
| 1268 | |
| 1269 | process_cmd_doneq(&doneq); |
| 1270 | return num_entries; |
| 1271 | } |
| 1272 | |
| 1273 | /** |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1274 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) |
| 1275 | * @irq: Interrupt number. |
| 1276 | * @data: Private data provided at interrupt registration, the AFU. |
| 1277 | * |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1278 | * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1279 | */ |
| 1280 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) |
| 1281 | { |
| 1282 | struct afu *afu = (struct afu *)data; |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1283 | unsigned long hrrq_flags; |
| 1284 | LIST_HEAD(doneq); |
| 1285 | int num_entries = 0; |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1286 | |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1287 | spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1288 | |
| 1289 | if (afu_is_irqpoll_enabled(afu)) { |
| 1290 | irq_poll_sched(&afu->irqpoll); |
| 1291 | spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags); |
| 1292 | return IRQ_HANDLED; |
| 1293 | } |
| 1294 | |
| 1295 | num_entries = process_hrrq(afu, &doneq, -1); |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1296 | spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags); |
| 1297 | |
| 1298 | if (num_entries == 0) |
| 1299 | return IRQ_NONE; |
| 1300 | |
| 1301 | process_cmd_doneq(&doneq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1302 | return IRQ_HANDLED; |
| 1303 | } |
| 1304 | |
| 1305 | /** |
| 1306 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors |
| 1307 | * @irq: Interrupt number. |
| 1308 | * @data: Private data provided at interrupt registration, the AFU. |
| 1309 | * |
| 1310 | * Return: Always return IRQ_HANDLED. |
| 1311 | */ |
| 1312 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) |
| 1313 | { |
| 1314 | struct afu *afu = (struct afu *)data; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1315 | struct cxlflash_cfg *cfg = afu->parent; |
| 1316 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1317 | u64 reg_unmasked; |
| 1318 | const struct asyc_intr_info *info; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1319 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1320 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1321 | u64 reg; |
| 1322 | u8 port; |
| 1323 | int i; |
| 1324 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1325 | reg = readq_be(&global->regs.aintr_status); |
| 1326 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); |
| 1327 | |
| 1328 | if (reg_unmasked == 0) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1329 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1330 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1331 | goto out; |
| 1332 | } |
| 1333 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1334 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1335 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
| 1336 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1337 | /* Check each bit that is on */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1338 | for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) { |
| 1339 | info = find_ainfo(1ULL << i); |
Matthew R. Ochs | 16798d3 | 2015-10-21 15:13:45 -0500 | [diff] [blame] | 1340 | if (((reg_unmasked & 0x1) == 0) || !info) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1341 | continue; |
| 1342 | |
| 1343 | port = info->port; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1344 | fc_port_regs = get_fc_port_regs(cfg, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1345 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1346 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1347 | __func__, port, info->desc, |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1348 | readq_be(&fc_port_regs[FC_STATUS / 8])); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1349 | |
| 1350 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1351 | * Do link reset first, some OTHER errors will set FC_ERROR |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1352 | * again if cleared before or w/o a reset |
| 1353 | */ |
| 1354 | if (info->action & LINK_RESET) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1355 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
| 1356 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1357 | cfg->lr_state = LINK_RESET_REQUIRED; |
| 1358 | cfg->lr_port = port; |
| 1359 | schedule_work(&cfg->work_q); |
| 1360 | } |
| 1361 | |
| 1362 | if (info->action & CLR_FC_ERROR) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1363 | reg = readq_be(&fc_port_regs[FC_ERROR / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1364 | |
| 1365 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1366 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1367 | * should be the same and tracing one is sufficient. |
| 1368 | */ |
| 1369 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1370 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1371 | __func__, port, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1372 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1373 | writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); |
| 1374 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1375 | } |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 1376 | |
| 1377 | if (info->action & SCAN_HOST) { |
| 1378 | atomic_inc(&cfg->scan_host_needed); |
| 1379 | schedule_work(&cfg->work_q); |
| 1380 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1381 | } |
| 1382 | |
| 1383 | out: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1384 | return IRQ_HANDLED; |
| 1385 | } |
| 1386 | |
| 1387 | /** |
| 1388 | * start_context() - starts the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1389 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1390 | * |
| 1391 | * Return: A success or failure value from CXL services. |
| 1392 | */ |
| 1393 | static int start_context(struct cxlflash_cfg *cfg) |
| 1394 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1395 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1396 | int rc = 0; |
| 1397 | |
| 1398 | rc = cxl_start_context(cfg->mcctx, |
| 1399 | cfg->afu->work.work_element_descriptor, |
| 1400 | NULL); |
| 1401 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1402 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1403 | return rc; |
| 1404 | } |
| 1405 | |
| 1406 | /** |
| 1407 | * read_vpd() - obtains the WWPNs from VPD |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1408 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1409 | * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1410 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1411 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1412 | */ |
| 1413 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) |
| 1414 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1415 | struct device *dev = &cfg->dev->dev; |
| 1416 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1417 | int rc = 0; |
| 1418 | int ro_start, ro_size, i, j, k; |
| 1419 | ssize_t vpd_size; |
| 1420 | char vpd_data[CXLFLASH_VPD_LEN]; |
| 1421 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1422 | char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6" }; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1423 | |
| 1424 | /* Get the VPD data from the device */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1425 | vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1426 | if (unlikely(vpd_size <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1427 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
| 1428 | __func__, vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1429 | rc = -ENODEV; |
| 1430 | goto out; |
| 1431 | } |
| 1432 | |
| 1433 | /* Get the read only section offset */ |
| 1434 | ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, |
| 1435 | PCI_VPD_LRDT_RO_DATA); |
| 1436 | if (unlikely(ro_start < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1437 | dev_err(dev, "%s: VPD Read-only data not found\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1438 | rc = -ENODEV; |
| 1439 | goto out; |
| 1440 | } |
| 1441 | |
| 1442 | /* Get the read only section size, cap when extends beyond read VPD */ |
| 1443 | ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); |
| 1444 | j = ro_size; |
| 1445 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1446 | if (unlikely((i + j) > vpd_size)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1447 | dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n", |
| 1448 | __func__, (i + j), vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1449 | ro_size = vpd_size - i; |
| 1450 | } |
| 1451 | |
| 1452 | /* |
| 1453 | * Find the offset of the WWPN tag within the read only |
| 1454 | * VPD data and validate the found field (partials are |
| 1455 | * no good to us). Convert the ASCII data to an integer |
| 1456 | * value. Note that we must copy to a temporary buffer |
| 1457 | * because the conversion service requires that the ASCII |
| 1458 | * string be terminated. |
| 1459 | */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1460 | for (k = 0; k < cfg->num_fc_ports; k++) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1461 | j = ro_size; |
| 1462 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1463 | |
| 1464 | i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]); |
| 1465 | if (unlikely(i < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1466 | dev_err(dev, "%s: Port %d WWPN not found in VPD\n", |
| 1467 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1468 | rc = -ENODEV; |
| 1469 | goto out; |
| 1470 | } |
| 1471 | |
| 1472 | j = pci_vpd_info_field_size(&vpd_data[i]); |
| 1473 | i += PCI_VPD_INFO_FLD_HDR_SIZE; |
| 1474 | if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1475 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
| 1476 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1477 | rc = -ENODEV; |
| 1478 | goto out; |
| 1479 | } |
| 1480 | |
| 1481 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); |
| 1482 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); |
| 1483 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1484 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
| 1485 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1486 | rc = -ENODEV; |
| 1487 | goto out; |
| 1488 | } |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1489 | |
| 1490 | dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1491 | } |
| 1492 | |
| 1493 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1494 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1495 | return rc; |
| 1496 | } |
| 1497 | |
| 1498 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1499 | * init_pcr() - initialize the provisioning and control registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1500 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1501 | * |
| 1502 | * Also sets up fast access to the mapped registers and initializes AFU |
| 1503 | * command fields that never change. |
| 1504 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1505 | static void init_pcr(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1506 | { |
| 1507 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1508 | struct sisl_ctrl_map __iomem *ctrl_map; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1509 | int i; |
| 1510 | |
| 1511 | for (i = 0; i < MAX_CONTEXT; i++) { |
| 1512 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1513 | /* Disrupt any clients that could be running */ |
| 1514 | /* e.g. clients that survived a master restart */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1515 | writeq_be(0, &ctrl_map->rht_start); |
| 1516 | writeq_be(0, &ctrl_map->rht_cnt_id); |
| 1517 | writeq_be(0, &ctrl_map->ctx_cap); |
| 1518 | } |
| 1519 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1520 | /* Copy frequently used fields into afu */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1521 | afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1522 | afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host; |
| 1523 | afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl; |
| 1524 | |
| 1525 | /* Program the Endian Control for the master context */ |
| 1526 | writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1527 | } |
| 1528 | |
| 1529 | /** |
| 1530 | * init_global() - initialize AFU global registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1531 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1532 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1533 | static int init_global(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1534 | { |
| 1535 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1536 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1537 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1538 | u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1539 | int i = 0, num_ports = 0; |
| 1540 | int rc = 0; |
| 1541 | u64 reg; |
| 1542 | |
| 1543 | rc = read_vpd(cfg, &wwpn[0]); |
| 1544 | if (rc) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1545 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1546 | goto out; |
| 1547 | } |
| 1548 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1549 | /* Set up RRQ and SQ in AFU for master issued cmds */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1550 | writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start); |
| 1551 | writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end); |
| 1552 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1553 | if (afu_is_sq_cmd_mode(afu)) { |
| 1554 | writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start); |
| 1555 | writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end); |
| 1556 | } |
| 1557 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1558 | /* AFU configuration */ |
| 1559 | reg = readq_be(&afu->afu_map->global.regs.afu_config); |
| 1560 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; |
| 1561 | /* enable all auto retry options and control endianness */ |
| 1562 | /* leave others at default: */ |
| 1563 | /* CTX_CAP write protected, mbox_r does not clear on read and */ |
| 1564 | /* checker on if dual afu */ |
| 1565 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); |
| 1566 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1567 | /* Global port select: select either port */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1568 | if (afu->internal_lun) { |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1569 | /* Only use port 0 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1570 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1571 | num_ports = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1572 | } else { |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 1573 | writeq_be(PORT_MASK(cfg->num_fc_ports), |
| 1574 | &afu->afu_map->global.regs.afu_port_sel); |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1575 | num_ports = cfg->num_fc_ports; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1576 | } |
| 1577 | |
| 1578 | for (i = 0; i < num_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1579 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 1580 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1581 | /* Unmask all errors (but they are still masked at AFU) */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1582 | writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1583 | /* Clear CRC error cnt & set a threshold */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1584 | (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); |
| 1585 | writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1586 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1587 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 1588 | if (wwpn[i] != 0) |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1589 | afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1590 | /* Programming WWPN back to back causes additional |
| 1591 | * offline/online transitions and a PLOGI |
| 1592 | */ |
| 1593 | msleep(100); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1594 | } |
| 1595 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1596 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
| 1597 | /* tables, afu cmds and read/write GSCSI cmds. */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1598 | /* First, unlock ctx_cap write by reading mbox */ |
| 1599 | (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */ |
| 1600 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | |
| 1601 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | |
| 1602 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), |
| 1603 | &afu->ctrl_map->ctx_cap); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1604 | /* Initialize heartbeat */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1605 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1606 | out: |
| 1607 | return rc; |
| 1608 | } |
| 1609 | |
| 1610 | /** |
| 1611 | * start_afu() - initializes and starts the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1612 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1613 | */ |
| 1614 | static int start_afu(struct cxlflash_cfg *cfg) |
| 1615 | { |
| 1616 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1617 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1618 | int rc = 0; |
| 1619 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1620 | init_pcr(cfg); |
| 1621 | |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1622 | /* Initialize RRQ */ |
Matthew R. Ochs | af10483 | 2015-10-21 15:15:14 -0500 | [diff] [blame] | 1623 | memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1624 | afu->hrrq_start = &afu->rrq_entry[0]; |
| 1625 | afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1]; |
| 1626 | afu->hrrq_curr = afu->hrrq_start; |
| 1627 | afu->toggle = 1; |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1628 | spin_lock_init(&afu->hrrq_slock); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1629 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1630 | /* Initialize SQ */ |
| 1631 | if (afu_is_sq_cmd_mode(afu)) { |
| 1632 | memset(&afu->sq, 0, sizeof(afu->sq)); |
| 1633 | afu->hsq_start = &afu->sq[0]; |
| 1634 | afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1]; |
| 1635 | afu->hsq_curr = afu->hsq_start; |
| 1636 | |
| 1637 | spin_lock_init(&afu->hsq_slock); |
| 1638 | atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1); |
| 1639 | } |
| 1640 | |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1641 | /* Initialize IRQ poll */ |
| 1642 | if (afu_is_irqpoll_enabled(afu)) |
| 1643 | irq_poll_init(&afu->irqpoll, afu->irqpoll_weight, |
| 1644 | cxlflash_irqpoll); |
| 1645 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1646 | rc = init_global(cfg); |
| 1647 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1648 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1649 | return rc; |
| 1650 | } |
| 1651 | |
| 1652 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1653 | * init_intr() - setup interrupt handlers for the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1654 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1655 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1656 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1657 | */ |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1658 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
| 1659 | struct cxl_context *ctx) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1660 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1661 | struct afu *afu = cfg->afu; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1662 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1663 | int rc = 0; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1664 | enum undo_level level = UNDO_NOOP; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1665 | |
| 1666 | rc = cxl_allocate_afu_irqs(ctx, 3); |
| 1667 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1668 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1669 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1670 | level = UNDO_NOOP; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1671 | goto out; |
| 1672 | } |
| 1673 | |
| 1674 | rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu, |
| 1675 | "SISL_MSI_SYNC_ERROR"); |
| 1676 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1677 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1678 | level = FREE_IRQ; |
| 1679 | goto out; |
| 1680 | } |
| 1681 | |
| 1682 | rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu, |
| 1683 | "SISL_MSI_RRQ_UPDATED"); |
| 1684 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1685 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1686 | level = UNMAP_ONE; |
| 1687 | goto out; |
| 1688 | } |
| 1689 | |
| 1690 | rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu, |
| 1691 | "SISL_MSI_ASYNC_ERROR"); |
| 1692 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1693 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1694 | level = UNMAP_TWO; |
| 1695 | goto out; |
| 1696 | } |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1697 | out: |
| 1698 | return level; |
| 1699 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1700 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1701 | /** |
| 1702 | * init_mc() - create and register as the master context |
| 1703 | * @cfg: Internal structure associated with the host. |
| 1704 | * |
| 1705 | * Return: 0 on success, -errno on failure |
| 1706 | */ |
| 1707 | static int init_mc(struct cxlflash_cfg *cfg) |
| 1708 | { |
| 1709 | struct cxl_context *ctx; |
| 1710 | struct device *dev = &cfg->dev->dev; |
| 1711 | int rc = 0; |
| 1712 | enum undo_level level; |
| 1713 | |
| 1714 | ctx = cxl_get_context(cfg->dev); |
| 1715 | if (unlikely(!ctx)) { |
| 1716 | rc = -ENOMEM; |
| 1717 | goto ret; |
| 1718 | } |
| 1719 | cfg->mcctx = ctx; |
| 1720 | |
| 1721 | /* Set it up as a master with the CXL */ |
| 1722 | cxl_set_master(ctx); |
| 1723 | |
| 1724 | /* During initialization reset the AFU to start from a clean slate */ |
| 1725 | rc = cxl_afu_reset(cfg->mcctx); |
| 1726 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1727 | dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1728 | goto ret; |
| 1729 | } |
| 1730 | |
| 1731 | level = init_intr(cfg, ctx); |
| 1732 | if (unlikely(level)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1733 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1734 | goto out; |
| 1735 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1736 | |
| 1737 | /* This performs the equivalent of the CXL_IOCTL_START_WORK. |
| 1738 | * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process |
| 1739 | * element (pe) that is embedded in the context (ctx) |
| 1740 | */ |
| 1741 | rc = start_context(cfg); |
| 1742 | if (unlikely(rc)) { |
| 1743 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); |
| 1744 | level = UNMAP_THREE; |
| 1745 | goto out; |
| 1746 | } |
| 1747 | ret: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1748 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1749 | return rc; |
| 1750 | out: |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1751 | term_intr(cfg, level); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1752 | goto ret; |
| 1753 | } |
| 1754 | |
| 1755 | /** |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1756 | * get_num_afu_ports() - determines and configures the number of AFU ports |
| 1757 | * @cfg: Internal structure associated with the host. |
| 1758 | * |
| 1759 | * This routine determines the number of AFU ports by converting the global |
| 1760 | * port selection mask. The converted value is only valid following an AFU |
| 1761 | * reset (explicit or power-on). This routine must be invoked shortly after |
| 1762 | * mapping as other routines are dependent on the number of ports during the |
| 1763 | * initialization sequence. |
| 1764 | * |
| 1765 | * To support legacy AFUs that might not have reflected an initial global |
| 1766 | * port mask (value read is 0), default to the number of ports originally |
| 1767 | * supported by the cxlflash driver (2) before hardware with other port |
| 1768 | * offerings was introduced. |
| 1769 | */ |
| 1770 | static void get_num_afu_ports(struct cxlflash_cfg *cfg) |
| 1771 | { |
| 1772 | struct afu *afu = cfg->afu; |
| 1773 | struct device *dev = &cfg->dev->dev; |
| 1774 | u64 port_mask; |
| 1775 | int num_fc_ports = LEGACY_FC_PORTS; |
| 1776 | |
| 1777 | port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); |
| 1778 | if (port_mask != 0ULL) |
| 1779 | num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); |
| 1780 | |
| 1781 | dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n", |
| 1782 | __func__, port_mask, num_fc_ports); |
| 1783 | |
| 1784 | cfg->num_fc_ports = num_fc_ports; |
| 1785 | cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports); |
| 1786 | } |
| 1787 | |
| 1788 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1789 | * init_afu() - setup as master context and start AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1790 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1791 | * |
| 1792 | * This routine is a higher level of control for configuring the |
| 1793 | * AFU on probe and reset paths. |
| 1794 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1795 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1796 | */ |
| 1797 | static int init_afu(struct cxlflash_cfg *cfg) |
| 1798 | { |
| 1799 | u64 reg; |
| 1800 | int rc = 0; |
| 1801 | struct afu *afu = cfg->afu; |
| 1802 | struct device *dev = &cfg->dev->dev; |
| 1803 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1804 | cxl_perst_reloads_same_image(cfg->cxl_afu, true); |
| 1805 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1806 | rc = init_mc(cfg); |
| 1807 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1808 | dev_err(dev, "%s: init_mc failed rc=%d\n", |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1809 | __func__, rc); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1810 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1811 | } |
| 1812 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1813 | /* Map the entire MMIO space of the AFU */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1814 | afu->afu_map = cxl_psa_map(cfg->mcctx); |
| 1815 | if (!afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1816 | dev_err(dev, "%s: cxl_psa_map failed\n", __func__); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1817 | rc = -ENOMEM; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1818 | goto err1; |
| 1819 | } |
| 1820 | |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1821 | /* No byte reverse on reading afu_version or string will be backwards */ |
| 1822 | reg = readq(&afu->afu_map->global.regs.afu_version); |
| 1823 | memcpy(afu->version, ®, sizeof(reg)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1824 | afu->interface_version = |
| 1825 | readq_be(&afu->afu_map->global.regs.interface_version); |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1826 | if ((afu->interface_version + 1) == 0) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1827 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
| 1828 | "interface version %016llx\n", afu->version, |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1829 | afu->interface_version); |
| 1830 | rc = -EINVAL; |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 1831 | goto err1; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1832 | } |
| 1833 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1834 | if (afu_is_sq_cmd_mode(afu)) { |
| 1835 | afu->send_cmd = send_cmd_sq; |
| 1836 | afu->context_reset = context_reset_sq; |
| 1837 | } else { |
| 1838 | afu->send_cmd = send_cmd_ioarrin; |
| 1839 | afu->context_reset = context_reset_ioarrin; |
| 1840 | } |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 1841 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1842 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
| 1843 | afu->version, afu->interface_version); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1844 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame^] | 1845 | get_num_afu_ports(cfg); |
| 1846 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1847 | rc = start_afu(cfg); |
| 1848 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1849 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 1850 | goto err1; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1851 | } |
| 1852 | |
| 1853 | afu_err_intr_init(cfg->afu); |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 1854 | spin_lock_init(&afu->rrin_slock); |
| 1855 | afu->room = readq_be(&afu->host_map->cmd_room); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1856 | |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 1857 | /* Restore the LUN mappings */ |
| 1858 | cxlflash_restore_luntable(cfg); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1859 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1860 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1861 | return rc; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1862 | |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1863 | err1: |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1864 | term_intr(cfg, UNMAP_THREE); |
| 1865 | term_mc(cfg); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1866 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1867 | } |
| 1868 | |
| 1869 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1870 | * cxlflash_afu_sync() - builds and sends an AFU sync command |
| 1871 | * @afu: AFU associated with the host. |
| 1872 | * @ctx_hndl_u: Identifies context requesting sync. |
| 1873 | * @res_hndl_u: Identifies resource requesting sync. |
| 1874 | * @mode: Type of sync to issue (lightweight, heavyweight, global). |
| 1875 | * |
| 1876 | * The AFU can only take 1 sync command at a time. This routine enforces this |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1877 | * limitation by using a mutex to provide exclusive access to the AFU during |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1878 | * the sync. This design point requires calling threads to not be on interrupt |
| 1879 | * context due to the possibility of sleeping during concurrent sync operations. |
| 1880 | * |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1881 | * AFU sync operations are only necessary and allowed when the device is |
| 1882 | * operating normally. When not operating normally, sync requests can occur as |
| 1883 | * part of cleaning up resources associated with an adapter prior to removal. |
| 1884 | * In this scenario, these requests are simply ignored (safe due to the AFU |
| 1885 | * going away). |
| 1886 | * |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1887 | * Return: |
| 1888 | * 0 on success |
| 1889 | * -1 on failure |
| 1890 | */ |
| 1891 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u, |
| 1892 | res_hndl_t res_hndl_u, u8 mode) |
| 1893 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1894 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1895 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1896 | struct afu_cmd *cmd = NULL; |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1897 | char *buf = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1898 | int rc = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1899 | static DEFINE_MUTEX(sync_active); |
| 1900 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1901 | if (cfg->state != STATE_NORMAL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1902 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
| 1903 | __func__, cfg->state); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1904 | return 0; |
| 1905 | } |
| 1906 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1907 | mutex_lock(&sync_active); |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 1908 | atomic_inc(&afu->cmds_active); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1909 | buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
| 1910 | if (unlikely(!buf)) { |
| 1911 | dev_err(dev, "%s: no memory for command\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1912 | rc = -1; |
| 1913 | goto out; |
| 1914 | } |
| 1915 | |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1916 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
| 1917 | init_completion(&cmd->cevent); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1918 | cmd->parent = afu; |
| 1919 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1920 | dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1921 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1922 | cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1923 | cmd->rcb.ctx_id = afu->ctx_hndl; |
| 1924 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1925 | cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT; |
| 1926 | |
| 1927 | cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */ |
| 1928 | cmd->rcb.cdb[1] = mode; |
| 1929 | |
| 1930 | /* The cdb is aligned, no unaligned accessors required */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1931 | *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u); |
| 1932 | *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1933 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 1934 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1935 | if (unlikely(rc)) |
| 1936 | goto out; |
| 1937 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 1938 | rc = wait_resp(afu, cmd); |
| 1939 | if (unlikely(rc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1940 | rc = -1; |
| 1941 | out: |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 1942 | atomic_dec(&afu->cmds_active); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1943 | mutex_unlock(&sync_active); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1944 | kfree(buf); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1945 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1946 | return rc; |
| 1947 | } |
| 1948 | |
| 1949 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1950 | * afu_reset() - resets the AFU |
| 1951 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1952 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1953 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1954 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1955 | static int afu_reset(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1956 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1957 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1958 | int rc = 0; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1959 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1960 | /* Stop the context before the reset. Since the context is |
| 1961 | * no longer available restart it after the reset is complete |
| 1962 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1963 | term_afu(cfg); |
| 1964 | |
| 1965 | rc = init_afu(cfg); |
| 1966 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1967 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1968 | return rc; |
| 1969 | } |
| 1970 | |
| 1971 | /** |
Manoj N. Kumar | f411396 | 2016-06-15 18:49:20 -0500 | [diff] [blame] | 1972 | * drain_ioctls() - wait until all currently executing ioctls have completed |
| 1973 | * @cfg: Internal structure associated with the host. |
| 1974 | * |
| 1975 | * Obtain write access to read/write semaphore that wraps ioctl |
| 1976 | * handling to 'drain' ioctls currently executing. |
| 1977 | */ |
| 1978 | static void drain_ioctls(struct cxlflash_cfg *cfg) |
| 1979 | { |
| 1980 | down_write(&cfg->ioctl_rwsem); |
| 1981 | up_write(&cfg->ioctl_rwsem); |
| 1982 | } |
| 1983 | |
| 1984 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1985 | * cxlflash_eh_device_reset_handler() - reset a single LUN |
| 1986 | * @scp: SCSI command to send. |
| 1987 | * |
| 1988 | * Return: |
| 1989 | * SUCCESS as defined in scsi/scsi.h |
| 1990 | * FAILED as defined in scsi/scsi.h |
| 1991 | */ |
| 1992 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) |
| 1993 | { |
| 1994 | int rc = SUCCESS; |
| 1995 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1996 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 1997 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1998 | struct afu *afu = cfg->afu; |
| 1999 | int rcr = 0; |
| 2000 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2001 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 2002 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 2003 | scp->device->channel, scp->device->id, scp->device->lun, |
| 2004 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 2005 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 2006 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 2007 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2008 | |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 2009 | retry: |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2010 | switch (cfg->state) { |
| 2011 | case STATE_NORMAL: |
| 2012 | rcr = send_tmf(afu, scp, TMF_LUN_RESET); |
| 2013 | if (unlikely(rcr)) |
| 2014 | rc = FAILED; |
| 2015 | break; |
| 2016 | case STATE_RESET: |
| 2017 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 2018 | goto retry; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2019 | default: |
| 2020 | rc = FAILED; |
| 2021 | break; |
| 2022 | } |
| 2023 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2024 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2025 | return rc; |
| 2026 | } |
| 2027 | |
| 2028 | /** |
| 2029 | * cxlflash_eh_host_reset_handler() - reset the host adapter |
| 2030 | * @scp: SCSI command from stack identifying host. |
| 2031 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2032 | * Following a reset, the state is evaluated again in case an EEH occurred |
| 2033 | * during the reset. In such a scenario, the host reset will either yield |
| 2034 | * until the EEH recovery is complete or return success or failure based |
| 2035 | * upon the current device state. |
| 2036 | * |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2037 | * Return: |
| 2038 | * SUCCESS as defined in scsi/scsi.h |
| 2039 | * FAILED as defined in scsi/scsi.h |
| 2040 | */ |
| 2041 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) |
| 2042 | { |
| 2043 | int rc = SUCCESS; |
| 2044 | int rcr = 0; |
| 2045 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2046 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 2047 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2048 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2049 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 2050 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 2051 | scp->device->channel, scp->device->id, scp->device->lun, |
| 2052 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 2053 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 2054 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 2055 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2056 | |
| 2057 | switch (cfg->state) { |
| 2058 | case STATE_NORMAL: |
| 2059 | cfg->state = STATE_RESET; |
Manoj N. Kumar | f411396 | 2016-06-15 18:49:20 -0500 | [diff] [blame] | 2060 | drain_ioctls(cfg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2061 | cxlflash_mark_contexts_error(cfg); |
| 2062 | rcr = afu_reset(cfg); |
| 2063 | if (rcr) { |
| 2064 | rc = FAILED; |
| 2065 | cfg->state = STATE_FAILTERM; |
| 2066 | } else |
| 2067 | cfg->state = STATE_NORMAL; |
| 2068 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2069 | ssleep(1); |
| 2070 | /* fall through */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2071 | case STATE_RESET: |
| 2072 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 2073 | if (cfg->state == STATE_NORMAL) |
| 2074 | break; |
| 2075 | /* fall through */ |
| 2076 | default: |
| 2077 | rc = FAILED; |
| 2078 | break; |
| 2079 | } |
| 2080 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2081 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2082 | return rc; |
| 2083 | } |
| 2084 | |
| 2085 | /** |
| 2086 | * cxlflash_change_queue_depth() - change the queue depth for the device |
| 2087 | * @sdev: SCSI device destined for queue depth change. |
| 2088 | * @qdepth: Requested queue depth value to set. |
| 2089 | * |
| 2090 | * The requested queue depth is capped to the maximum supported value. |
| 2091 | * |
| 2092 | * Return: The actual queue depth set. |
| 2093 | */ |
| 2094 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) |
| 2095 | { |
| 2096 | |
| 2097 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) |
| 2098 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; |
| 2099 | |
| 2100 | scsi_change_queue_depth(sdev, qdepth); |
| 2101 | return sdev->queue_depth; |
| 2102 | } |
| 2103 | |
| 2104 | /** |
| 2105 | * cxlflash_show_port_status() - queries and presents the current port status |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2106 | * @port: Desired port for status reporting. |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2107 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2108 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2109 | * |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2110 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2111 | */ |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2112 | static ssize_t cxlflash_show_port_status(u32 port, |
| 2113 | struct cxlflash_cfg *cfg, |
| 2114 | char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2115 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2116 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2117 | char *disp_status; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2118 | u64 status; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2119 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2120 | |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2121 | WARN_ON(port >= MAX_FC_PORTS); |
| 2122 | |
| 2123 | if (port >= cfg->num_fc_ports) { |
| 2124 | dev_info(dev, "%s: Port %d not supported on this card.\n", |
| 2125 | __func__, port); |
| 2126 | return -EINVAL; |
| 2127 | } |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2128 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2129 | fc_port_regs = get_fc_port_regs(cfg, port); |
| 2130 | status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2131 | status &= FC_MTIP_STATUS_MASK; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2132 | |
| 2133 | if (status == FC_MTIP_STATUS_ONLINE) |
| 2134 | disp_status = "online"; |
| 2135 | else if (status == FC_MTIP_STATUS_OFFLINE) |
| 2136 | disp_status = "offline"; |
| 2137 | else |
| 2138 | disp_status = "unknown"; |
| 2139 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2140 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2141 | } |
| 2142 | |
| 2143 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2144 | * port0_show() - queries and presents the current status of port 0 |
| 2145 | * @dev: Generic device associated with the host owning the port. |
| 2146 | * @attr: Device attribute representing the port. |
| 2147 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2148 | * |
| 2149 | * Return: The size of the ASCII string returned in @buf. |
| 2150 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2151 | static ssize_t port0_show(struct device *dev, |
| 2152 | struct device_attribute *attr, |
| 2153 | char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2154 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2155 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2156 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2157 | return cxlflash_show_port_status(0, cfg, buf); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2158 | } |
| 2159 | |
| 2160 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2161 | * port1_show() - queries and presents the current status of port 1 |
| 2162 | * @dev: Generic device associated with the host owning the port. |
| 2163 | * @attr: Device attribute representing the port. |
| 2164 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2165 | * |
| 2166 | * Return: The size of the ASCII string returned in @buf. |
| 2167 | */ |
| 2168 | static ssize_t port1_show(struct device *dev, |
| 2169 | struct device_attribute *attr, |
| 2170 | char *buf) |
| 2171 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2172 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2173 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2174 | return cxlflash_show_port_status(1, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2175 | } |
| 2176 | |
| 2177 | /** |
| 2178 | * lun_mode_show() - presents the current LUN mode of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2179 | * @dev: Generic device associated with the host. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2180 | * @attr: Device attribute representing the LUN mode. |
| 2181 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
| 2182 | * |
| 2183 | * Return: The size of the ASCII string returned in @buf. |
| 2184 | */ |
| 2185 | static ssize_t lun_mode_show(struct device *dev, |
| 2186 | struct device_attribute *attr, char *buf) |
| 2187 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2188 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2189 | struct afu *afu = cfg->afu; |
| 2190 | |
| 2191 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
| 2192 | } |
| 2193 | |
| 2194 | /** |
| 2195 | * lun_mode_store() - sets the LUN mode of the host |
| 2196 | * @dev: Generic device associated with the host. |
| 2197 | * @attr: Device attribute representing the LUN mode. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2198 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
| 2199 | * @count: Length of data resizing in @buf. |
| 2200 | * |
| 2201 | * The CXL Flash AFU supports a dummy LUN mode where the external |
| 2202 | * links and storage are not required. Space on the FPGA is used |
| 2203 | * to create 1 or 2 small LUNs which are presented to the system |
| 2204 | * as if they were a normal storage device. This feature is useful |
| 2205 | * during development and also provides manufacturing with a way |
| 2206 | * to test the AFU without an actual device. |
| 2207 | * |
| 2208 | * 0 = external LUN[s] (default) |
| 2209 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) |
| 2210 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) |
| 2211 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) |
| 2212 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) |
| 2213 | * |
| 2214 | * Return: The size of the ASCII string returned in @buf. |
| 2215 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2216 | static ssize_t lun_mode_store(struct device *dev, |
| 2217 | struct device_attribute *attr, |
| 2218 | const char *buf, size_t count) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2219 | { |
| 2220 | struct Scsi_Host *shost = class_to_shost(dev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2221 | struct cxlflash_cfg *cfg = shost_priv(shost); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2222 | struct afu *afu = cfg->afu; |
| 2223 | int rc; |
| 2224 | u32 lun_mode; |
| 2225 | |
| 2226 | rc = kstrtouint(buf, 10, &lun_mode); |
| 2227 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { |
| 2228 | afu->internal_lun = lun_mode; |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2229 | |
| 2230 | /* |
| 2231 | * When configured for internal LUN, there is only one channel, |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2232 | * channel number 0, else there will be one less than the number |
| 2233 | * of fc ports for this card. |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2234 | */ |
| 2235 | if (afu->internal_lun) |
| 2236 | shost->max_channel = 0; |
| 2237 | else |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 2238 | shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports); |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2239 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2240 | afu_reset(cfg); |
| 2241 | scsi_scan_host(cfg->host); |
| 2242 | } |
| 2243 | |
| 2244 | return count; |
| 2245 | } |
| 2246 | |
| 2247 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2248 | * ioctl_version_show() - presents the current ioctl version of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2249 | * @dev: Generic device associated with the host. |
| 2250 | * @attr: Device attribute representing the ioctl version. |
| 2251 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. |
| 2252 | * |
| 2253 | * Return: The size of the ASCII string returned in @buf. |
| 2254 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2255 | static ssize_t ioctl_version_show(struct device *dev, |
| 2256 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2257 | { |
| 2258 | return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0); |
| 2259 | } |
| 2260 | |
| 2261 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2262 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
| 2263 | * @port: Desired port for status reporting. |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2264 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2265 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2266 | * |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2267 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2268 | */ |
| 2269 | static ssize_t cxlflash_show_port_lun_table(u32 port, |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2270 | struct cxlflash_cfg *cfg, |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2271 | char *buf) |
| 2272 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2273 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2274 | __be64 __iomem *fc_port_luns; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2275 | int i; |
| 2276 | ssize_t bytes = 0; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2277 | |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2278 | WARN_ON(port >= MAX_FC_PORTS); |
| 2279 | |
| 2280 | if (port >= cfg->num_fc_ports) { |
| 2281 | dev_info(dev, "%s: Port %d not supported on this card.\n", |
| 2282 | __func__, port); |
| 2283 | return -EINVAL; |
| 2284 | } |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2285 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2286 | fc_port_luns = get_fc_port_luns(cfg, port); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2287 | |
| 2288 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) |
| 2289 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2290 | "%03d: %016llx\n", |
| 2291 | i, readq_be(&fc_port_luns[i])); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2292 | return bytes; |
| 2293 | } |
| 2294 | |
| 2295 | /** |
| 2296 | * port0_lun_table_show() - presents the current LUN table of port 0 |
| 2297 | * @dev: Generic device associated with the host owning the port. |
| 2298 | * @attr: Device attribute representing the port. |
| 2299 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2300 | * |
| 2301 | * Return: The size of the ASCII string returned in @buf. |
| 2302 | */ |
| 2303 | static ssize_t port0_lun_table_show(struct device *dev, |
| 2304 | struct device_attribute *attr, |
| 2305 | char *buf) |
| 2306 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2307 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2308 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2309 | return cxlflash_show_port_lun_table(0, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2310 | } |
| 2311 | |
| 2312 | /** |
| 2313 | * port1_lun_table_show() - presents the current LUN table of port 1 |
| 2314 | * @dev: Generic device associated with the host owning the port. |
| 2315 | * @attr: Device attribute representing the port. |
| 2316 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2317 | * |
| 2318 | * Return: The size of the ASCII string returned in @buf. |
| 2319 | */ |
| 2320 | static ssize_t port1_lun_table_show(struct device *dev, |
| 2321 | struct device_attribute *attr, |
| 2322 | char *buf) |
| 2323 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2324 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2325 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2326 | return cxlflash_show_port_lun_table(1, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2327 | } |
| 2328 | |
| 2329 | /** |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2330 | * irqpoll_weight_show() - presents the current IRQ poll weight for the host |
| 2331 | * @dev: Generic device associated with the host. |
| 2332 | * @attr: Device attribute representing the IRQ poll weight. |
| 2333 | * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll |
| 2334 | * weight in ASCII. |
| 2335 | * |
| 2336 | * An IRQ poll weight of 0 indicates polling is disabled. |
| 2337 | * |
| 2338 | * Return: The size of the ASCII string returned in @buf. |
| 2339 | */ |
| 2340 | static ssize_t irqpoll_weight_show(struct device *dev, |
| 2341 | struct device_attribute *attr, char *buf) |
| 2342 | { |
| 2343 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2344 | struct afu *afu = cfg->afu; |
| 2345 | |
| 2346 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight); |
| 2347 | } |
| 2348 | |
| 2349 | /** |
| 2350 | * irqpoll_weight_store() - sets the current IRQ poll weight for the host |
| 2351 | * @dev: Generic device associated with the host. |
| 2352 | * @attr: Device attribute representing the IRQ poll weight. |
| 2353 | * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll |
| 2354 | * weight in ASCII. |
| 2355 | * @count: Length of data resizing in @buf. |
| 2356 | * |
| 2357 | * An IRQ poll weight of 0 indicates polling is disabled. |
| 2358 | * |
| 2359 | * Return: The size of the ASCII string returned in @buf. |
| 2360 | */ |
| 2361 | static ssize_t irqpoll_weight_store(struct device *dev, |
| 2362 | struct device_attribute *attr, |
| 2363 | const char *buf, size_t count) |
| 2364 | { |
| 2365 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2366 | struct device *cfgdev = &cfg->dev->dev; |
| 2367 | struct afu *afu = cfg->afu; |
| 2368 | u32 weight; |
| 2369 | int rc; |
| 2370 | |
| 2371 | rc = kstrtouint(buf, 10, &weight); |
| 2372 | if (rc) |
| 2373 | return -EINVAL; |
| 2374 | |
| 2375 | if (weight > 256) { |
| 2376 | dev_info(cfgdev, |
| 2377 | "Invalid IRQ poll weight. It must be 256 or less.\n"); |
| 2378 | return -EINVAL; |
| 2379 | } |
| 2380 | |
| 2381 | if (weight == afu->irqpoll_weight) { |
| 2382 | dev_info(cfgdev, |
| 2383 | "Current IRQ poll weight has the same weight.\n"); |
| 2384 | return -EINVAL; |
| 2385 | } |
| 2386 | |
| 2387 | if (afu_is_irqpoll_enabled(afu)) |
| 2388 | irq_poll_disable(&afu->irqpoll); |
| 2389 | |
| 2390 | afu->irqpoll_weight = weight; |
| 2391 | |
| 2392 | if (weight > 0) |
| 2393 | irq_poll_init(&afu->irqpoll, weight, cxlflash_irqpoll); |
| 2394 | |
| 2395 | return count; |
| 2396 | } |
| 2397 | |
| 2398 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2399 | * mode_show() - presents the current mode of the device |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2400 | * @dev: Generic device associated with the device. |
| 2401 | * @attr: Device attribute representing the device mode. |
| 2402 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. |
| 2403 | * |
| 2404 | * Return: The size of the ASCII string returned in @buf. |
| 2405 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2406 | static ssize_t mode_show(struct device *dev, |
| 2407 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2408 | { |
| 2409 | struct scsi_device *sdev = to_scsi_device(dev); |
| 2410 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2411 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
| 2412 | sdev->hostdata ? "superpipe" : "legacy"); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2413 | } |
| 2414 | |
| 2415 | /* |
| 2416 | * Host attributes |
| 2417 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2418 | static DEVICE_ATTR_RO(port0); |
| 2419 | static DEVICE_ATTR_RO(port1); |
| 2420 | static DEVICE_ATTR_RW(lun_mode); |
| 2421 | static DEVICE_ATTR_RO(ioctl_version); |
| 2422 | static DEVICE_ATTR_RO(port0_lun_table); |
| 2423 | static DEVICE_ATTR_RO(port1_lun_table); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2424 | static DEVICE_ATTR_RW(irqpoll_weight); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2425 | |
| 2426 | static struct device_attribute *cxlflash_host_attrs[] = { |
| 2427 | &dev_attr_port0, |
| 2428 | &dev_attr_port1, |
| 2429 | &dev_attr_lun_mode, |
| 2430 | &dev_attr_ioctl_version, |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2431 | &dev_attr_port0_lun_table, |
| 2432 | &dev_attr_port1_lun_table, |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2433 | &dev_attr_irqpoll_weight, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2434 | NULL |
| 2435 | }; |
| 2436 | |
| 2437 | /* |
| 2438 | * Device attributes |
| 2439 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2440 | static DEVICE_ATTR_RO(mode); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2441 | |
| 2442 | static struct device_attribute *cxlflash_dev_attrs[] = { |
| 2443 | &dev_attr_mode, |
| 2444 | NULL |
| 2445 | }; |
| 2446 | |
| 2447 | /* |
| 2448 | * Host template |
| 2449 | */ |
| 2450 | static struct scsi_host_template driver_template = { |
| 2451 | .module = THIS_MODULE, |
| 2452 | .name = CXLFLASH_ADAPTER_NAME, |
| 2453 | .info = cxlflash_driver_info, |
| 2454 | .ioctl = cxlflash_ioctl, |
| 2455 | .proc_name = CXLFLASH_NAME, |
| 2456 | .queuecommand = cxlflash_queuecommand, |
| 2457 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, |
| 2458 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, |
| 2459 | .change_queue_depth = cxlflash_change_queue_depth, |
Manoj N. Kumar | 8343083 | 2016-03-04 15:55:20 -0600 | [diff] [blame] | 2460 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2461 | .can_queue = CXLFLASH_MAX_CMDS, |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 2462 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2463 | .this_id = -1, |
Uma Krishnan | 68ab2d7 | 2016-11-28 18:41:06 -0600 | [diff] [blame] | 2464 | .sg_tablesize = 1, /* No scatter gather support */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2465 | .max_sectors = CXLFLASH_MAX_SECTORS, |
| 2466 | .use_clustering = ENABLE_CLUSTERING, |
| 2467 | .shost_attrs = cxlflash_host_attrs, |
| 2468 | .sdev_attrs = cxlflash_dev_attrs, |
| 2469 | }; |
| 2470 | |
| 2471 | /* |
| 2472 | * Device dependent values |
| 2473 | */ |
Uma Krishnan | 96e1b66 | 2016-06-15 18:49:38 -0500 | [diff] [blame] | 2474 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
| 2475 | 0ULL }; |
| 2476 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 2477 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 2478 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
| 2479 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2480 | |
| 2481 | /* |
| 2482 | * PCI device binding table |
| 2483 | */ |
| 2484 | static struct pci_device_id cxlflash_pci_table[] = { |
| 2485 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, |
| 2486 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, |
Manoj Kumar | a2746fb | 2015-12-14 15:07:43 -0600 | [diff] [blame] | 2487 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
| 2488 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 2489 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
| 2490 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2491 | {} |
| 2492 | }; |
| 2493 | |
| 2494 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); |
| 2495 | |
| 2496 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2497 | * cxlflash_worker_thread() - work thread handler for the AFU |
| 2498 | * @work: Work structure contained within cxlflash associated with host. |
| 2499 | * |
| 2500 | * Handles the following events: |
| 2501 | * - Link reset which cannot be performed on interrupt context due to |
| 2502 | * blocking up to a few seconds |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 2503 | * - Rescan the host |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2504 | */ |
| 2505 | static void cxlflash_worker_thread(struct work_struct *work) |
| 2506 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2507 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
| 2508 | work_q); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2509 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 2510 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2511 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2512 | int port; |
| 2513 | ulong lock_flags; |
| 2514 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2515 | /* Avoid MMIO if the device has failed */ |
| 2516 | |
| 2517 | if (cfg->state != STATE_NORMAL) |
| 2518 | return; |
| 2519 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2520 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 2521 | |
| 2522 | if (cfg->lr_state == LINK_RESET_REQUIRED) { |
| 2523 | port = cfg->lr_port; |
| 2524 | if (port < 0) |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 2525 | dev_err(dev, "%s: invalid port index %d\n", |
| 2526 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2527 | else { |
| 2528 | spin_unlock_irqrestore(cfg->host->host_lock, |
| 2529 | lock_flags); |
| 2530 | |
| 2531 | /* The reset can block... */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2532 | fc_port_regs = get_fc_port_regs(cfg, port); |
| 2533 | afu_link_reset(afu, port, fc_port_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2534 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 2535 | } |
| 2536 | |
| 2537 | cfg->lr_state = LINK_RESET_COMPLETE; |
| 2538 | } |
| 2539 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2540 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 2541 | |
| 2542 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) |
| 2543 | scsi_scan_host(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2544 | } |
| 2545 | |
| 2546 | /** |
| 2547 | * cxlflash_probe() - PCI entry point to add host |
| 2548 | * @pdev: PCI device associated with the host. |
| 2549 | * @dev_id: PCI device id associated with device. |
| 2550 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2551 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2552 | */ |
| 2553 | static int cxlflash_probe(struct pci_dev *pdev, |
| 2554 | const struct pci_device_id *dev_id) |
| 2555 | { |
| 2556 | struct Scsi_Host *host; |
| 2557 | struct cxlflash_cfg *cfg = NULL; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2558 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2559 | struct dev_dependent_vals *ddv; |
| 2560 | int rc = 0; |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2561 | int k; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2562 | |
| 2563 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", |
| 2564 | __func__, pdev->irq); |
| 2565 | |
| 2566 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; |
| 2567 | driver_template.max_sectors = ddv->max_sectors; |
| 2568 | |
| 2569 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); |
| 2570 | if (!host) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2571 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2572 | rc = -ENOMEM; |
| 2573 | goto out; |
| 2574 | } |
| 2575 | |
| 2576 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; |
| 2577 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2578 | host->unique_id = host->host_no; |
| 2579 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; |
| 2580 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2581 | cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2582 | cfg->host = host; |
| 2583 | rc = alloc_mem(cfg); |
| 2584 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2585 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2586 | rc = -ENOMEM; |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 2587 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2588 | goto out; |
| 2589 | } |
| 2590 | |
| 2591 | cfg->init_state = INIT_STATE_NONE; |
| 2592 | cfg->dev = pdev; |
Matthew R. Ochs | 17ead26 | 2015-10-21 15:15:37 -0500 | [diff] [blame] | 2593 | cfg->cxl_fops = cxlflash_cxl_fops; |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 2594 | |
| 2595 | /* |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2596 | * Promoted LUNs move to the top of the LUN table. The rest stay on |
| 2597 | * the bottom half. The bottom half grows from the end (index = 255), |
| 2598 | * whereas the top half grows from the beginning (index = 0). |
| 2599 | * |
| 2600 | * Initialize the last LUN index for all possible ports. |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 2601 | */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2602 | cfg->promote_lun_index = 0; |
| 2603 | |
| 2604 | for (k = 0; k < MAX_FC_PORTS; k++) |
| 2605 | cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1; |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 2606 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2607 | cfg->dev_id = (struct pci_device_id *)dev_id; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2608 | |
| 2609 | init_waitqueue_head(&cfg->tmf_waitq); |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2610 | init_waitqueue_head(&cfg->reset_waitq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2611 | |
| 2612 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); |
| 2613 | cfg->lr_state = LINK_RESET_INVALID; |
| 2614 | cfg->lr_port = -1; |
Matthew R. Ochs | 0d73122 | 2015-10-21 15:16:24 -0500 | [diff] [blame] | 2615 | spin_lock_init(&cfg->tmf_slock); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2616 | mutex_init(&cfg->ctx_tbl_list_mutex); |
| 2617 | mutex_init(&cfg->ctx_recovery_mutex); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 2618 | init_rwsem(&cfg->ioctl_rwsem); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2619 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
| 2620 | INIT_LIST_HEAD(&cfg->lluns); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2621 | |
| 2622 | pci_set_drvdata(pdev, cfg); |
| 2623 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2624 | cfg->cxl_afu = cxl_pci_to_afu(pdev); |
| 2625 | |
| 2626 | rc = init_pci(cfg); |
| 2627 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2628 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2629 | goto out_remove; |
| 2630 | } |
| 2631 | cfg->init_state = INIT_STATE_PCI; |
| 2632 | |
| 2633 | rc = init_afu(cfg); |
| 2634 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2635 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2636 | goto out_remove; |
| 2637 | } |
| 2638 | cfg->init_state = INIT_STATE_AFU; |
| 2639 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2640 | rc = init_scsi(cfg); |
| 2641 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2642 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2643 | goto out_remove; |
| 2644 | } |
| 2645 | cfg->init_state = INIT_STATE_SCSI; |
| 2646 | |
| 2647 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2648 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2649 | return rc; |
| 2650 | |
| 2651 | out_remove: |
| 2652 | cxlflash_remove(pdev); |
| 2653 | goto out; |
| 2654 | } |
| 2655 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2656 | /** |
| 2657 | * cxlflash_pci_error_detected() - called when a PCI error is detected |
| 2658 | * @pdev: PCI device struct. |
| 2659 | * @state: PCI channel state. |
| 2660 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2661 | * When an EEH occurs during an active reset, wait until the reset is |
| 2662 | * complete and then take action based upon the device state. |
| 2663 | * |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2664 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
| 2665 | */ |
| 2666 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, |
| 2667 | pci_channel_state_t state) |
| 2668 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2669 | int rc = 0; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2670 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2671 | struct device *dev = &cfg->dev->dev; |
| 2672 | |
| 2673 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); |
| 2674 | |
| 2675 | switch (state) { |
| 2676 | case pci_channel_io_frozen: |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2677 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 2678 | if (cfg->state == STATE_FAILTERM) |
| 2679 | return PCI_ERS_RESULT_DISCONNECT; |
| 2680 | |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2681 | cfg->state = STATE_RESET; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2682 | scsi_block_requests(cfg->host); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 2683 | drain_ioctls(cfg); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2684 | rc = cxlflash_mark_contexts_error(cfg); |
| 2685 | if (unlikely(rc)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2686 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2687 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 2688 | term_afu(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2689 | return PCI_ERS_RESULT_NEED_RESET; |
| 2690 | case pci_channel_io_perm_failure: |
| 2691 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2692 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2693 | scsi_unblock_requests(cfg->host); |
| 2694 | return PCI_ERS_RESULT_DISCONNECT; |
| 2695 | default: |
| 2696 | break; |
| 2697 | } |
| 2698 | return PCI_ERS_RESULT_NEED_RESET; |
| 2699 | } |
| 2700 | |
| 2701 | /** |
| 2702 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset |
| 2703 | * @pdev: PCI device struct. |
| 2704 | * |
| 2705 | * This routine is called by the pci error recovery code after the PCI |
| 2706 | * slot has been reset, just before we should resume normal operations. |
| 2707 | * |
| 2708 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT |
| 2709 | */ |
| 2710 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) |
| 2711 | { |
| 2712 | int rc = 0; |
| 2713 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2714 | struct device *dev = &cfg->dev->dev; |
| 2715 | |
| 2716 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 2717 | |
| 2718 | rc = init_afu(cfg); |
| 2719 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2720 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2721 | return PCI_ERS_RESULT_DISCONNECT; |
| 2722 | } |
| 2723 | |
| 2724 | return PCI_ERS_RESULT_RECOVERED; |
| 2725 | } |
| 2726 | |
| 2727 | /** |
| 2728 | * cxlflash_pci_resume() - called when normal operation can resume |
| 2729 | * @pdev: PCI device struct |
| 2730 | */ |
| 2731 | static void cxlflash_pci_resume(struct pci_dev *pdev) |
| 2732 | { |
| 2733 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2734 | struct device *dev = &cfg->dev->dev; |
| 2735 | |
| 2736 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 2737 | |
| 2738 | cfg->state = STATE_NORMAL; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2739 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2740 | scsi_unblock_requests(cfg->host); |
| 2741 | } |
| 2742 | |
| 2743 | static const struct pci_error_handlers cxlflash_err_handler = { |
| 2744 | .error_detected = cxlflash_pci_error_detected, |
| 2745 | .slot_reset = cxlflash_pci_slot_reset, |
| 2746 | .resume = cxlflash_pci_resume, |
| 2747 | }; |
| 2748 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2749 | /* |
| 2750 | * PCI device structure |
| 2751 | */ |
| 2752 | static struct pci_driver cxlflash_driver = { |
| 2753 | .name = CXLFLASH_NAME, |
| 2754 | .id_table = cxlflash_pci_table, |
| 2755 | .probe = cxlflash_probe, |
| 2756 | .remove = cxlflash_remove, |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 2757 | .shutdown = cxlflash_remove, |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2758 | .err_handler = &cxlflash_err_handler, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2759 | }; |
| 2760 | |
| 2761 | /** |
| 2762 | * init_cxlflash() - module entry point |
| 2763 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2764 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2765 | */ |
| 2766 | static int __init init_cxlflash(void) |
| 2767 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2768 | cxlflash_list_init(); |
| 2769 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2770 | return pci_register_driver(&cxlflash_driver); |
| 2771 | } |
| 2772 | |
| 2773 | /** |
| 2774 | * exit_cxlflash() - module exit point |
| 2775 | */ |
| 2776 | static void __exit exit_cxlflash(void) |
| 2777 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2778 | cxlflash_term_global_luns(); |
| 2779 | cxlflash_free_errpage(); |
| 2780 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2781 | pci_unregister_driver(&cxlflash_driver); |
| 2782 | } |
| 2783 | |
| 2784 | module_init(init_cxlflash); |
| 2785 | module_exit(exit_cxlflash); |