blob: 4b61666261e34f7d8e983dae54fccc434dfa8eb6 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25#define IEEE80211_ACTION_CAT_HT 7
26#define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28static char *dev_info = "ath9k";
29
30MODULE_AUTHOR("Atheros Communications");
31MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33MODULE_LICENSE("Dual BSD/GPL");
34
35static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42};
43
44static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46{
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55}
56
57static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59{
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92}
93
94
95static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99{
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135}
136
137static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140{
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 sc->sc_keytype = hk.kv_type;
210 return 0;
211}
212
213static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214{
215#define ATH_MAX_NUM_KEYS 4
216 int freeslot;
217
218 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
219 ath_key_reset(sc, key->keyidx, freeslot);
220#undef ATH_MAX_NUM_KEYS
221}
222
223static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
224{
225/* Until mac80211 includes these fields */
226
227#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
228#define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
229#define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
230
231 ht_info->ht_supported = 1;
232 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
233 |(u16)IEEE80211_HT_CAP_MIMO_PS
234 |(u16)IEEE80211_HT_CAP_SGI_40
235 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
236
237 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
238 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
239 /* setup supported mcs set */
240 memset(ht_info->supp_mcs_set, 0, 16);
241 ht_info->supp_mcs_set[0] = 0xff;
242 ht_info->supp_mcs_set[1] = 0xff;
243 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
244}
245
246static int ath_rate2idx(struct ath_softc *sc, int rate)
247{
248 int i = 0, cur_band, n_rates;
249 struct ieee80211_hw *hw = sc->hw;
250
251 cur_band = hw->conf.channel->band;
252 n_rates = sc->sbands[cur_band].n_bitrates;
253
254 for (i = 0; i < n_rates; i++) {
255 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
256 break;
257 }
258
259 /*
260 * NB:mac80211 validates rx rate index against the supported legacy rate
261 * index only (should be done against ht rates also), return the highest
262 * legacy rate index for rx rate which does not match any one of the
263 * supported basic and extended rates to make mac80211 happy.
264 * The following hack will be cleaned up once the issue with
265 * the rx rate index validation in mac80211 is fixed.
266 */
267 if (i == n_rates)
268 return n_rates - 1;
269 return i;
270}
271
272static void ath9k_rx_prepare(struct ath_softc *sc,
273 struct sk_buff *skb,
274 struct ath_recv_status *status,
275 struct ieee80211_rx_status *rx_status)
276{
277 struct ieee80211_hw *hw = sc->hw;
278 struct ieee80211_channel *curchan = hw->conf.channel;
279
280 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
281
282 rx_status->mactime = status->tsf;
283 rx_status->band = curchan->band;
284 rx_status->freq = curchan->center_freq;
285 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
286 rx_status->signal = rx_status->noise + status->rssi;
287 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
288 rx_status->antenna = status->antenna;
289 rx_status->qual = status->rssi * 100 / 64;
290
291 if (status->flags & ATH_RX_MIC_ERROR)
292 rx_status->flag |= RX_FLAG_MMIC_ERROR;
293 if (status->flags & ATH_RX_FCS_ERROR)
294 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
295
296 rx_status->flag |= RX_FLAG_TSFT;
297}
298
299static u8 parse_mpdudensity(u8 mpdudensity)
300{
301 /*
302 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
303 * 0 for no restriction
304 * 1 for 1/4 us
305 * 2 for 1/2 us
306 * 3 for 1 us
307 * 4 for 2 us
308 * 5 for 4 us
309 * 6 for 8 us
310 * 7 for 16 us
311 */
312 switch (mpdudensity) {
313 case 0:
314 return 0;
315 case 1:
316 case 2:
317 case 3:
318 /* Our lower layer calculations limit our precision to
319 1 microsecond */
320 return 1;
321 case 4:
322 return 2;
323 case 5:
324 return 4;
325 case 6:
326 return 8;
327 case 7:
328 return 16;
329 default:
330 return 0;
331 }
332}
333
334static int ath9k_start(struct ieee80211_hw *hw)
335{
336 struct ath_softc *sc = hw->priv;
337 struct ieee80211_channel *curchan = hw->conf.channel;
338 int error = 0, pos;
339
340 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
341 "initial channel: %d MHz\n", __func__, curchan->center_freq);
342
343 /* setup initial channel */
344
345 pos = ath_get_channel(sc, curchan);
346 if (pos == -1) {
347 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
348 return -EINVAL;
349 }
350
351 sc->sc_ah->ah_channels[pos].chanmode =
352 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
353
354 /* open ath_dev */
355 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
356 if (error) {
357 DPRINTF(sc, ATH_DBG_FATAL,
358 "%s: Unable to complete ath_open\n", __func__);
359 return error;
360 }
361
362 ieee80211_wake_queues(hw);
363 return 0;
364}
365
366static int ath9k_tx(struct ieee80211_hw *hw,
367 struct sk_buff *skb)
368{
369 struct ath_softc *sc = hw->priv;
370 int hdrlen, padsize;
371
372 /* Add the padding after the header if this is not already done */
373 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
374 if (hdrlen & 3) {
375 padsize = hdrlen % 4;
376 if (skb_headroom(skb) < padsize)
377 return -1;
378 skb_push(skb, padsize);
379 memmove(skb->data, skb->data + padsize, hdrlen);
380 }
381
382 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
383 __func__,
384 skb);
385
386 if (ath_tx_start(sc, skb) != 0) {
387 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
388 dev_kfree_skb_any(skb);
389 /* FIXME: Check for proper return value from ATH_DEV */
390 return 0;
391 }
392
393 return 0;
394}
395
396static void ath9k_stop(struct ieee80211_hw *hw)
397{
398 struct ath_softc *sc = hw->priv;
399 int error;
400
401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
402
403 error = ath_suspend(sc);
404 if (error)
405 DPRINTF(sc, ATH_DBG_CONFIG,
406 "%s: Device is no longer present\n", __func__);
407
408 ieee80211_stop_queues(hw);
409}
410
411static int ath9k_add_interface(struct ieee80211_hw *hw,
412 struct ieee80211_if_init_conf *conf)
413{
414 struct ath_softc *sc = hw->priv;
415 int error, ic_opmode = 0;
416
417 /* Support only vap for now */
418
419 if (sc->sc_nvaps)
420 return -ENOBUFS;
421
422 switch (conf->type) {
423 case IEEE80211_IF_TYPE_STA:
424 ic_opmode = ATH9K_M_STA;
425 break;
426 case IEEE80211_IF_TYPE_IBSS:
427 ic_opmode = ATH9K_M_IBSS;
428 break;
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300429 case IEEE80211_IF_TYPE_AP:
430 ic_opmode = ATH9K_M_HOSTAP;
431 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700432 default:
433 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300434 "%s: Interface type %d not yet supported\n",
435 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700436 return -EOPNOTSUPP;
437 }
438
439 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
440 __func__,
441 ic_opmode);
442
443 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
444 if (error) {
445 DPRINTF(sc, ATH_DBG_FATAL,
446 "%s: Unable to attach vap, error: %d\n",
447 __func__, error);
448 return error;
449 }
450
451 return 0;
452}
453
454static void ath9k_remove_interface(struct ieee80211_hw *hw,
455 struct ieee80211_if_init_conf *conf)
456{
457 struct ath_softc *sc = hw->priv;
458 struct ath_vap *avp;
459 int error;
460
461 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
462
463 avp = sc->sc_vaps[0];
464 if (avp == NULL) {
465 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
466 __func__);
467 return;
468 }
469
470#ifdef CONFIG_SLOW_ANT_DIV
471 ath_slow_ant_div_stop(&sc->sc_antdiv);
472#endif
473
474 /* Update ratectrl */
475 ath_rate_newstate(sc, avp);
476
477 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +0530478 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
479 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700480 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
481 ath_beacon_return(sc, avp);
482 }
483
484 /* Set interrupt mask */
485 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
486 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
Sujith672840a2008-08-11 14:05:08 +0530487 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700488
489 error = ath_vap_detach(sc, 0);
490 if (error)
491 DPRINTF(sc, ATH_DBG_FATAL,
492 "%s: Unable to detach vap, error: %d\n",
493 __func__, error);
494}
495
496static int ath9k_config(struct ieee80211_hw *hw,
497 struct ieee80211_conf *conf)
498{
499 struct ath_softc *sc = hw->priv;
500 struct ieee80211_channel *curchan = hw->conf.channel;
501 int pos;
502
503 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
504 __func__,
505 curchan->center_freq);
506
507 pos = ath_get_channel(sc, curchan);
508 if (pos == -1) {
509 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
510 return -EINVAL;
511 }
512
513 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +0530514 (curchan->band == IEEE80211_BAND_2GHZ) ?
515 CHANNEL_G : CHANNEL_A;
516
517 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
518 sc->sc_ah->ah_channels[pos].chanmode =
519 ath_get_extchanmode(sc, curchan);
520
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700521 sc->sc_config.txpowlimit = 2 * conf->power_level;
522
523 /* set h/w channel */
524 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
525 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
526 __func__);
527
528 return 0;
529}
530
531static int ath9k_config_interface(struct ieee80211_hw *hw,
532 struct ieee80211_vif *vif,
533 struct ieee80211_if_conf *conf)
534{
535 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300536 struct ath_hal *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700537 struct ath_vap *avp;
538 u32 rfilt = 0;
539 int error, i;
540 DECLARE_MAC_BUF(mac);
541
542 avp = sc->sc_vaps[0];
543 if (avp == NULL) {
544 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
545 __func__);
546 return -EINVAL;
547 }
548
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300549 /* TODO: Need to decide which hw opmode to use for multi-interface
550 * cases */
551 if (vif->type == IEEE80211_IF_TYPE_AP &&
552 ah->ah_opmode != ATH9K_M_HOSTAP) {
553 ah->ah_opmode = ATH9K_M_HOSTAP;
554 ath9k_hw_setopmode(ah);
555 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
556 /* Request full reset to get hw opmode changed properly */
557 sc->sc_flags |= SC_OP_FULL_RESET;
558 }
559
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700560 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
561 !is_zero_ether_addr(conf->bssid)) {
562 switch (vif->type) {
563 case IEEE80211_IF_TYPE_STA:
564 case IEEE80211_IF_TYPE_IBSS:
565 /* Update ratectrl about the new state */
566 ath_rate_newstate(sc, avp);
567
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700568 /* Set BSSID */
569 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
570 sc->sc_curaid = 0;
571 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
572 sc->sc_curaid);
573
574 /* Set aggregation protection mode parameters */
575 sc->sc_config.ath_aggr_prot = 0;
576
577 /*
578 * Reset our TSF so that its value is lower than the
579 * beacon that we are trying to catch.
580 * Only then hw will update its TSF register with the
581 * new beacon. Reset the TSF before setting the BSSID
582 * to avoid allowing in any frames that would update
583 * our TSF only to have us clear it
584 * immediately thereafter.
585 */
586 ath9k_hw_reset_tsf(sc->sc_ah);
587
588 /* Disable BMISS interrupt when we're not associated */
589 ath9k_hw_set_interrupts(sc->sc_ah,
590 sc->sc_imask &
591 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
592 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
593
594 DPRINTF(sc, ATH_DBG_CONFIG,
595 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
596 __func__, rfilt,
597 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
598
599 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +0530600 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700601
602 break;
603 default:
604 break;
605 }
606 }
607
608 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
609 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
610 /*
611 * Allocate and setup the beacon frame.
612 *
613 * Stop any previous beacon DMA. This may be
614 * necessary, for example, when an ibss merge
615 * causes reconfiguration; we may be called
616 * with beacon transmission active.
617 */
618 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
619
620 error = ath_beacon_alloc(sc, 0);
621 if (error != 0)
622 return error;
623
624 ath_beacon_sync(sc, 0);
625 }
626
Jouni Malinena8fff502008-08-11 14:01:48 +0300627 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
628 (vif->type == IEEE80211_IF_TYPE_AP)) {
629 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
630
631 error = ath_beacon_alloc(sc, 0);
632 if (error != 0)
633 return error;
634
635 ath_beacon_config(sc, 0);
636 sc->sc_flags |= SC_OP_BEACONS;
637 }
638
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700639 /* Check for WLAN_CAPABILITY_PRIVACY ? */
640 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
641 for (i = 0; i < IEEE80211_WEP_NKID; i++)
642 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
643 ath9k_hw_keysetmac(sc->sc_ah,
644 (u16)i,
645 sc->sc_curbssid);
646 }
647
648 /* Only legacy IBSS for now */
649 if (vif->type == IEEE80211_IF_TYPE_IBSS)
650 ath_update_chainmask(sc, 0);
651
652 return 0;
653}
654
655#define SUPPORTED_FILTERS \
656 (FIF_PROMISC_IN_BSS | \
657 FIF_ALLMULTI | \
658 FIF_CONTROL | \
659 FIF_OTHER_BSS | \
660 FIF_BCN_PRBRESP_PROMISC | \
661 FIF_FCSFAIL)
662
Sujith7dcfdcd2008-08-11 14:03:13 +0530663/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700664static void ath9k_configure_filter(struct ieee80211_hw *hw,
665 unsigned int changed_flags,
666 unsigned int *total_flags,
667 int mc_count,
668 struct dev_mc_list *mclist)
669{
670 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +0530671 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700672
673 changed_flags &= SUPPORTED_FILTERS;
674 *total_flags &= SUPPORTED_FILTERS;
675
Sujith7dcfdcd2008-08-11 14:03:13 +0530676 sc->rx_filter = *total_flags;
677 rfilt = ath_calcrxfilter(sc);
678 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
679
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700680 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
681 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +0530682 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700683 }
Sujith7dcfdcd2008-08-11 14:03:13 +0530684
685 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
686 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700687}
688
689static void ath9k_sta_notify(struct ieee80211_hw *hw,
690 struct ieee80211_vif *vif,
691 enum sta_notify_cmd cmd,
692 const u8 *addr)
693{
694 struct ath_softc *sc = hw->priv;
695 struct ath_node *an;
696 unsigned long flags;
697 DECLARE_MAC_BUF(mac);
698
699 spin_lock_irqsave(&sc->node_lock, flags);
700 an = ath_node_find(sc, (u8 *) addr);
701 spin_unlock_irqrestore(&sc->node_lock, flags);
702
703 switch (cmd) {
704 case STA_NOTIFY_ADD:
705 spin_lock_irqsave(&sc->node_lock, flags);
706 if (!an) {
707 ath_node_attach(sc, (u8 *)addr, 0);
708 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
709 __func__,
710 print_mac(mac, addr));
711 } else {
712 ath_node_get(sc, (u8 *)addr);
713 }
714 spin_unlock_irqrestore(&sc->node_lock, flags);
715 break;
716 case STA_NOTIFY_REMOVE:
717 if (!an)
718 DPRINTF(sc, ATH_DBG_FATAL,
719 "%s: Removal of a non-existent node\n",
720 __func__);
721 else {
722 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
723 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
724 __func__,
725 print_mac(mac, addr));
726 }
727 break;
728 default:
729 break;
730 }
731}
732
733static int ath9k_conf_tx(struct ieee80211_hw *hw,
734 u16 queue,
735 const struct ieee80211_tx_queue_params *params)
736{
737 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +0530738 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700739 int ret = 0, qnum;
740
741 if (queue >= WME_NUM_AC)
742 return 0;
743
744 qi.tqi_aifs = params->aifs;
745 qi.tqi_cwmin = params->cw_min;
746 qi.tqi_cwmax = params->cw_max;
747 qi.tqi_burstTime = params->txop;
748 qnum = ath_get_hal_qnum(queue, sc);
749
750 DPRINTF(sc, ATH_DBG_CONFIG,
751 "%s: Configure tx [queue/halq] [%d/%d], "
752 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
753 __func__,
754 queue,
755 qnum,
756 params->aifs,
757 params->cw_min,
758 params->cw_max,
759 params->txop);
760
761 ret = ath_txq_update(sc, qnum, &qi);
762 if (ret)
763 DPRINTF(sc, ATH_DBG_FATAL,
764 "%s: TXQ Update failed\n", __func__);
765
766 return ret;
767}
768
769static int ath9k_set_key(struct ieee80211_hw *hw,
770 enum set_key_cmd cmd,
771 const u8 *local_addr,
772 const u8 *addr,
773 struct ieee80211_key_conf *key)
774{
775 struct ath_softc *sc = hw->priv;
776 int ret = 0;
777
778 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
779
780 switch (cmd) {
781 case SET_KEY:
782 ret = ath_key_config(sc, addr, key);
783 if (!ret) {
784 set_bit(key->keyidx, sc->sc_keymap);
785 key->hw_key_idx = key->keyidx;
786 /* push IV and Michael MIC generation to stack */
787 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
788 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
789 }
790 break;
791 case DISABLE_KEY:
792 ath_key_delete(sc, key);
793 clear_bit(key->keyidx, sc->sc_keymap);
794 sc->sc_keytype = ATH9K_CIPHER_CLR;
795 break;
796 default:
797 ret = -EINVAL;
798 }
799
800 return ret;
801}
802
803static void ath9k_ht_conf(struct ath_softc *sc,
804 struct ieee80211_bss_conf *bss_conf)
805{
806#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
807 struct ath_ht_info *ht_info = &sc->sc_ht_info;
808
809 if (bss_conf->assoc_ht) {
810 ht_info->ext_chan_offset =
811 bss_conf->ht_bss_conf->bss_cap &
812 IEEE80211_HT_IE_CHA_SEC_OFFSET;
813
814 if (!(bss_conf->ht_conf->cap &
815 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
816 (bss_conf->ht_bss_conf->bss_cap &
817 IEEE80211_HT_IE_CHA_WIDTH))
818 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
819 else
820 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
821
822 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
823 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
824 bss_conf->ht_conf->ampdu_factor);
825 ht_info->mpdudensity =
826 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
827
828 }
829
830#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
831}
832
833static void ath9k_bss_assoc_info(struct ath_softc *sc,
834 struct ieee80211_bss_conf *bss_conf)
835{
836 struct ieee80211_hw *hw = sc->hw;
837 struct ieee80211_channel *curchan = hw->conf.channel;
838 struct ath_vap *avp;
839 int pos;
840 DECLARE_MAC_BUF(mac);
841
842 if (bss_conf->assoc) {
843 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
844 __func__,
845 bss_conf->aid);
846
847 avp = sc->sc_vaps[0];
848 if (avp == NULL) {
849 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
850 __func__);
851 return;
852 }
853
854 /* New association, store aid */
855 if (avp->av_opmode == ATH9K_M_STA) {
856 sc->sc_curaid = bss_conf->aid;
857 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
858 sc->sc_curaid);
859 }
860
861 /* Configure the beacon */
862 ath_beacon_config(sc, 0);
Sujith672840a2008-08-11 14:05:08 +0530863 sc->sc_flags |= SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700864
865 /* Reset rssi stats */
866 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
867 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
868 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
869 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
870
871 /* Update chainmask */
872 ath_update_chainmask(sc, bss_conf->assoc_ht);
873
874 DPRINTF(sc, ATH_DBG_CONFIG,
875 "%s: bssid %s aid 0x%x\n",
876 __func__,
877 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
878
879 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
880 __func__,
881 curchan->center_freq);
882
883 pos = ath_get_channel(sc, curchan);
884 if (pos == -1) {
885 DPRINTF(sc, ATH_DBG_FATAL,
886 "%s: Invalid channel\n", __func__);
887 return;
888 }
889
890 if (hw->conf.ht_conf.ht_supported)
891 sc->sc_ah->ah_channels[pos].chanmode =
892 ath_get_extchanmode(sc, curchan);
893 else
894 sc->sc_ah->ah_channels[pos].chanmode =
895 (curchan->band == IEEE80211_BAND_2GHZ) ?
896 CHANNEL_G : CHANNEL_A;
897
898 /* set h/w channel */
899 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
900 DPRINTF(sc, ATH_DBG_FATAL,
901 "%s: Unable to set channel\n",
902 __func__);
903
904 ath_rate_newstate(sc, avp);
905 /* Update ratectrl about the new state */
906 ath_rc_node_update(hw, avp->rc_node);
907 } else {
908 DPRINTF(sc, ATH_DBG_CONFIG,
909 "%s: Bss Info DISSOC\n", __func__);
910 sc->sc_curaid = 0;
911 }
912}
913
914static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
915 struct ieee80211_vif *vif,
916 struct ieee80211_bss_conf *bss_conf,
917 u32 changed)
918{
919 struct ath_softc *sc = hw->priv;
920
921 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
922 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
923 __func__,
924 bss_conf->use_short_preamble);
925 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +0530926 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700927 else
Sujith672840a2008-08-11 14:05:08 +0530928 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700929 }
930
931 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
932 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
933 __func__,
934 bss_conf->use_cts_prot);
935 if (bss_conf->use_cts_prot &&
936 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +0530937 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700938 else
Sujith672840a2008-08-11 14:05:08 +0530939 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700940 }
941
942 if (changed & BSS_CHANGED_HT) {
943 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
944 __func__,
945 bss_conf->assoc_ht);
946 ath9k_ht_conf(sc, bss_conf);
947 }
948
949 if (changed & BSS_CHANGED_ASSOC) {
950 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
951 __func__,
952 bss_conf->assoc);
953 ath9k_bss_assoc_info(sc, bss_conf);
954 }
955}
956
957static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
958{
959 u64 tsf;
960 struct ath_softc *sc = hw->priv;
961 struct ath_hal *ah = sc->sc_ah;
962
963 tsf = ath9k_hw_gettsf64(ah);
964
965 return tsf;
966}
967
968static void ath9k_reset_tsf(struct ieee80211_hw *hw)
969{
970 struct ath_softc *sc = hw->priv;
971 struct ath_hal *ah = sc->sc_ah;
972
973 ath9k_hw_reset_tsf(ah);
974}
975
976static int ath9k_ampdu_action(struct ieee80211_hw *hw,
977 enum ieee80211_ampdu_mlme_action action,
978 const u8 *addr,
979 u16 tid,
980 u16 *ssn)
981{
982 struct ath_softc *sc = hw->priv;
983 int ret = 0;
984
985 switch (action) {
986 case IEEE80211_AMPDU_RX_START:
987 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
988 if (ret < 0)
989 DPRINTF(sc, ATH_DBG_FATAL,
990 "%s: Unable to start RX aggregation\n",
991 __func__);
992 break;
993 case IEEE80211_AMPDU_RX_STOP:
994 ret = ath_rx_aggr_stop(sc, addr, tid);
995 if (ret < 0)
996 DPRINTF(sc, ATH_DBG_FATAL,
997 "%s: Unable to stop RX aggregation\n",
998 __func__);
999 break;
1000 case IEEE80211_AMPDU_TX_START:
1001 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
1002 if (ret < 0)
1003 DPRINTF(sc, ATH_DBG_FATAL,
1004 "%s: Unable to start TX aggregation\n",
1005 __func__);
1006 else
1007 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1008 break;
1009 case IEEE80211_AMPDU_TX_STOP:
1010 ret = ath_tx_aggr_stop(sc, addr, tid);
1011 if (ret < 0)
1012 DPRINTF(sc, ATH_DBG_FATAL,
1013 "%s: Unable to stop TX aggregation\n",
1014 __func__);
1015
1016 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1017 break;
1018 default:
1019 DPRINTF(sc, ATH_DBG_FATAL,
1020 "%s: Unknown AMPDU action\n", __func__);
1021 }
1022
1023 return ret;
1024}
1025
1026static struct ieee80211_ops ath9k_ops = {
1027 .tx = ath9k_tx,
1028 .start = ath9k_start,
1029 .stop = ath9k_stop,
1030 .add_interface = ath9k_add_interface,
1031 .remove_interface = ath9k_remove_interface,
1032 .config = ath9k_config,
1033 .config_interface = ath9k_config_interface,
1034 .configure_filter = ath9k_configure_filter,
1035 .get_stats = NULL,
1036 .sta_notify = ath9k_sta_notify,
1037 .conf_tx = ath9k_conf_tx,
1038 .get_tx_stats = NULL,
1039 .bss_info_changed = ath9k_bss_info_changed,
1040 .set_tim = NULL,
1041 .set_key = ath9k_set_key,
1042 .hw_scan = NULL,
1043 .get_tkip_seq = NULL,
1044 .set_rts_threshold = NULL,
1045 .set_frag_threshold = NULL,
1046 .set_retry_limit = NULL,
1047 .get_tsf = ath9k_get_tsf,
1048 .reset_tsf = ath9k_reset_tsf,
1049 .tx_last_beacon = NULL,
1050 .ampdu_action = ath9k_ampdu_action
1051};
1052
1053void ath_get_beaconconfig(struct ath_softc *sc,
1054 int if_id,
1055 struct ath_beacon_config *conf)
1056{
1057 struct ieee80211_hw *hw = sc->hw;
1058
1059 /* fill in beacon config data */
1060
1061 conf->beacon_interval = hw->conf.beacon_int;
1062 conf->listen_interval = 100;
1063 conf->dtim_count = 1;
1064 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1065}
1066
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001067void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1068 struct ath_xmit_status *tx_status, struct ath_node *an)
1069{
1070 struct ieee80211_hw *hw = sc->hw;
1071 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1072
1073 DPRINTF(sc, ATH_DBG_XMIT,
1074 "%s: TX complete: skb: %p\n", __func__, skb);
1075
1076 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1077 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1078 /* free driver's private data area of tx_info */
1079 if (tx_info->driver_data[0] != NULL)
1080 kfree(tx_info->driver_data[0]);
1081 tx_info->driver_data[0] = NULL;
1082 }
1083
1084 if (tx_status->flags & ATH_TX_BAR) {
1085 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1086 tx_status->flags &= ~ATH_TX_BAR;
1087 }
Jouni Malinen580f0b82008-08-11 14:01:49 +03001088
1089 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1090 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1091 /* Frame was not ACKed, but an ACK was expected */
1092 tx_info->status.excessive_retries = 1;
1093 }
1094 } else {
1095 /* Frame was ACKed */
1096 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1097 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001098
1099 tx_info->status.retry_count = tx_status->retries;
1100
1101 ieee80211_tx_status(hw, skb);
1102 if (an)
1103 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1104}
1105
1106int ath__rx_indicate(struct ath_softc *sc,
1107 struct sk_buff *skb,
1108 struct ath_recv_status *status,
1109 u16 keyix)
1110{
1111 struct ieee80211_hw *hw = sc->hw;
1112 struct ath_node *an = NULL;
1113 struct ieee80211_rx_status rx_status;
1114 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1115 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1116 int padsize;
1117 enum ATH_RX_TYPE st;
1118
1119 /* see if any padding is done by the hw and remove it */
1120 if (hdrlen & 3) {
1121 padsize = hdrlen % 4;
1122 memmove(skb->data + padsize, skb->data, hdrlen);
1123 skb_pull(skb, padsize);
1124 }
1125
1126 /* remove FCS before passing up to protocol stack */
1127 skb_trim(skb, (skb->len - FCS_LEN));
1128
1129 /* Prepare rx status */
1130 ath9k_rx_prepare(sc, skb, status, &rx_status);
1131
1132 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1133 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1134 rx_status.flag |= RX_FLAG_DECRYPTED;
1135 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1136 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1137 && skb->len >= hdrlen + 4) {
1138 keyix = skb->data[hdrlen + 3] >> 6;
1139
1140 if (test_bit(keyix, sc->sc_keymap))
1141 rx_status.flag |= RX_FLAG_DECRYPTED;
1142 }
1143
1144 spin_lock_bh(&sc->node_lock);
1145 an = ath_node_find(sc, hdr->addr2);
1146 spin_unlock_bh(&sc->node_lock);
1147
1148 if (an) {
1149 ath_rx_input(sc, an,
1150 hw->conf.ht_conf.ht_supported,
1151 skb, status, &st);
1152 }
1153 if (!an || (st != ATH_RX_CONSUMED))
1154 __ieee80211_rx(hw, skb, &rx_status);
1155
1156 return 0;
1157}
1158
1159int ath_rx_subframe(struct ath_node *an,
1160 struct sk_buff *skb,
1161 struct ath_recv_status *status)
1162{
1163 struct ath_softc *sc = an->an_sc;
1164 struct ieee80211_hw *hw = sc->hw;
1165 struct ieee80211_rx_status rx_status;
1166
1167 /* Prepare rx status */
1168 ath9k_rx_prepare(sc, skb, status, &rx_status);
1169 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1170 rx_status.flag |= RX_FLAG_DECRYPTED;
1171
1172 __ieee80211_rx(hw, skb, &rx_status);
1173
1174 return 0;
1175}
1176
1177enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1178{
1179 return sc->sc_ht_info.tx_chan_width;
1180}
1181
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001182static int ath_detach(struct ath_softc *sc)
1183{
1184 struct ieee80211_hw *hw = sc->hw;
1185
1186 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1187
1188 /* Unregister hw */
1189
1190 ieee80211_unregister_hw(hw);
1191
1192 /* unregister Rate control */
1193 ath_rate_control_unregister();
1194
1195 /* tx/rx cleanup */
1196
1197 ath_rx_cleanup(sc);
1198 ath_tx_cleanup(sc);
1199
1200 /* Deinit */
1201
1202 ath_deinit(sc);
1203
1204 return 0;
1205}
1206
1207static int ath_attach(u16 devid,
1208 struct ath_softc *sc)
1209{
1210 struct ieee80211_hw *hw = sc->hw;
1211 int error = 0;
1212
1213 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1214
1215 error = ath_init(devid, sc);
1216 if (error != 0)
1217 return error;
1218
1219 /* Init nodes */
1220
1221 INIT_LIST_HEAD(&sc->node_list);
1222 spin_lock_init(&sc->node_lock);
1223
1224 /* get mac address from hardware and set in mac80211 */
1225
1226 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1227
1228 /* setup channels and rates */
1229
1230 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1231 sc->channels[IEEE80211_BAND_2GHZ];
1232 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1233 sc->rates[IEEE80211_BAND_2GHZ];
1234 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1235
Sujith60b67f52008-08-07 10:52:38 +05301236 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001237 /* Setup HT capabilities for 2.4Ghz*/
1238 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1239
1240 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1241 &sc->sbands[IEEE80211_BAND_2GHZ];
1242
Sujith86b89ee2008-08-07 10:54:57 +05301243 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001244 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1245 sc->channels[IEEE80211_BAND_5GHZ];
1246 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1247 sc->rates[IEEE80211_BAND_5GHZ];
1248 sc->sbands[IEEE80211_BAND_5GHZ].band =
1249 IEEE80211_BAND_5GHZ;
1250
Sujith60b67f52008-08-07 10:52:38 +05301251 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001252 /* Setup HT capabilities for 5Ghz*/
1253 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1254
1255 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1256 &sc->sbands[IEEE80211_BAND_5GHZ];
1257 }
1258
1259 /* FIXME: Have to figure out proper hw init values later */
1260
1261 hw->queues = 4;
1262 hw->ampdu_queues = 1;
1263
1264 /* Register rate control */
1265 hw->rate_control_algorithm = "ath9k_rate_control";
1266 error = ath_rate_control_register();
1267 if (error != 0) {
1268 DPRINTF(sc, ATH_DBG_FATAL,
1269 "%s: Unable to register rate control "
1270 "algorithm:%d\n", __func__, error);
1271 ath_rate_control_unregister();
1272 goto bad;
1273 }
1274
1275 error = ieee80211_register_hw(hw);
1276 if (error != 0) {
1277 ath_rate_control_unregister();
1278 goto bad;
1279 }
1280
1281 /* initialize tx/rx engine */
1282
1283 error = ath_tx_init(sc, ATH_TXBUF);
1284 if (error != 0)
1285 goto bad1;
1286
1287 error = ath_rx_init(sc, ATH_RXBUF);
1288 if (error != 0)
1289 goto bad1;
1290
1291 return 0;
1292bad1:
1293 ath_detach(sc);
1294bad:
1295 return error;
1296}
1297
1298static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1299{
1300 void __iomem *mem;
1301 struct ath_softc *sc;
1302 struct ieee80211_hw *hw;
1303 const char *athname;
1304 u8 csz;
1305 u32 val;
1306 int ret = 0;
1307
1308 if (pci_enable_device(pdev))
1309 return -EIO;
1310
1311 /* XXX 32-bit addressing only */
1312 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1313 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1314 ret = -ENODEV;
1315 goto bad;
1316 }
1317
1318 /*
1319 * Cache line size is used to size and align various
1320 * structures used to communicate with the hardware.
1321 */
1322 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1323 if (csz == 0) {
1324 /*
1325 * Linux 2.4.18 (at least) writes the cache line size
1326 * register as a 16-bit wide register which is wrong.
1327 * We must have this setup properly for rx buffer
1328 * DMA to work so force a reasonable value here if it
1329 * comes up zero.
1330 */
1331 csz = L1_CACHE_BYTES / sizeof(u32);
1332 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1333 }
1334 /*
1335 * The default setting of latency timer yields poor results,
1336 * set it to the value used by other systems. It may be worth
1337 * tweaking this setting more.
1338 */
1339 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1340
1341 pci_set_master(pdev);
1342
1343 /*
1344 * Disable the RETRY_TIMEOUT register (0x41) to keep
1345 * PCI Tx retries from interfering with C3 CPU state.
1346 */
1347 pci_read_config_dword(pdev, 0x40, &val);
1348 if ((val & 0x0000ff00) != 0)
1349 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1350
1351 ret = pci_request_region(pdev, 0, "ath9k");
1352 if (ret) {
1353 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1354 ret = -ENODEV;
1355 goto bad;
1356 }
1357
1358 mem = pci_iomap(pdev, 0, 0);
1359 if (!mem) {
1360 printk(KERN_ERR "PCI memory map error\n") ;
1361 ret = -EIO;
1362 goto bad1;
1363 }
1364
1365 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1366 if (hw == NULL) {
1367 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1368 goto bad2;
1369 }
1370
1371 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1372 IEEE80211_HW_NOISE_DBM;
1373
1374 SET_IEEE80211_DEV(hw, &pdev->dev);
1375 pci_set_drvdata(pdev, hw);
1376
1377 sc = hw->priv;
1378 sc->hw = hw;
1379 sc->pdev = pdev;
1380 sc->mem = mem;
1381
1382 if (ath_attach(id->device, sc) != 0) {
1383 ret = -ENODEV;
1384 goto bad3;
1385 }
1386
1387 /* setup interrupt service routine */
1388
1389 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1390 printk(KERN_ERR "%s: request_irq failed\n",
1391 wiphy_name(hw->wiphy));
1392 ret = -EIO;
1393 goto bad4;
1394 }
1395
1396 athname = ath9k_hw_probe(id->vendor, id->device);
1397
1398 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1399 wiphy_name(hw->wiphy),
1400 athname ? athname : "Atheros ???",
1401 (unsigned long)mem, pdev->irq);
1402
1403 return 0;
1404bad4:
1405 ath_detach(sc);
1406bad3:
1407 ieee80211_free_hw(hw);
1408bad2:
1409 pci_iounmap(pdev, mem);
1410bad1:
1411 pci_release_region(pdev, 0);
1412bad:
1413 pci_disable_device(pdev);
1414 return ret;
1415}
1416
1417static void ath_pci_remove(struct pci_dev *pdev)
1418{
1419 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1420 struct ath_softc *sc = hw->priv;
1421
1422 if (pdev->irq)
1423 free_irq(pdev->irq, sc);
1424 ath_detach(sc);
1425 pci_iounmap(pdev, sc->mem);
1426 pci_release_region(pdev, 0);
1427 pci_disable_device(pdev);
1428 ieee80211_free_hw(hw);
1429}
1430
1431#ifdef CONFIG_PM
1432
1433static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1434{
1435 pci_save_state(pdev);
1436 pci_disable_device(pdev);
1437 pci_set_power_state(pdev, 3);
1438
1439 return 0;
1440}
1441
1442static int ath_pci_resume(struct pci_dev *pdev)
1443{
1444 u32 val;
1445 int err;
1446
1447 err = pci_enable_device(pdev);
1448 if (err)
1449 return err;
1450 pci_restore_state(pdev);
1451 /*
1452 * Suspend/Resume resets the PCI configuration space, so we have to
1453 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1454 * PCI Tx retries from interfering with C3 CPU state
1455 */
1456 pci_read_config_dword(pdev, 0x40, &val);
1457 if ((val & 0x0000ff00) != 0)
1458 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1459
1460 return 0;
1461}
1462
1463#endif /* CONFIG_PM */
1464
1465MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1466
1467static struct pci_driver ath_pci_driver = {
1468 .name = "ath9k",
1469 .id_table = ath_pci_id_table,
1470 .probe = ath_pci_probe,
1471 .remove = ath_pci_remove,
1472#ifdef CONFIG_PM
1473 .suspend = ath_pci_suspend,
1474 .resume = ath_pci_resume,
1475#endif /* CONFIG_PM */
1476};
1477
1478static int __init init_ath_pci(void)
1479{
1480 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1481
1482 if (pci_register_driver(&ath_pci_driver) < 0) {
1483 printk(KERN_ERR
1484 "ath_pci: No devices found, driver not installed.\n");
1485 pci_unregister_driver(&ath_pci_driver);
1486 return -ENODEV;
1487 }
1488
1489 return 0;
1490}
1491module_init(init_ath_pci);
1492
1493static void __exit exit_ath_pci(void)
1494{
1495 pci_unregister_driver(&ath_pci_driver);
1496 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1497}
1498module_exit(exit_ath_pci);