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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl4030.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +020045 0x91, /* REG_CODEC_MODE (0x1) */
Steve Sakomancc175572008-10-30 21:35:26 -070046 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020049 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Steve Sakomancc175572008-10-30 21:35:26 -070092 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118};
119
Peter Ujfalusi73939582009-01-29 14:57:50 +0200120/* codec private data */
121struct twl4030_priv {
122 unsigned int bypass_state;
123 unsigned int codec_powered;
124 unsigned int codec_muted;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200125
126 struct snd_pcm_substream *master_substream;
127 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300128
129 unsigned int configured;
130 unsigned int rate;
131 unsigned int sample_bits;
132 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300133
134 unsigned int sysclk;
135
136 /* Headset output state handling */
137 unsigned int hsl_enabled;
138 unsigned int hsr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200139};
140
Steve Sakomancc175572008-10-30 21:35:26 -0700141/*
142 * read twl4030 register cache
143 */
144static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
145 unsigned int reg)
146{
147 u8 *cache = codec->reg_cache;
148
Ian Molton91432e92009-01-17 17:44:23 +0000149 if (reg >= TWL4030_CACHEREGNUM)
150 return -EIO;
151
Steve Sakomancc175572008-10-30 21:35:26 -0700152 return cache[reg];
153}
154
155/*
156 * write twl4030 register cache
157 */
158static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
159 u8 reg, u8 value)
160{
161 u8 *cache = codec->reg_cache;
162
163 if (reg >= TWL4030_CACHEREGNUM)
164 return;
165 cache[reg] = value;
166}
167
168/*
169 * write to the twl4030 register space
170 */
171static int twl4030_write(struct snd_soc_codec *codec,
172 unsigned int reg, unsigned int value)
173{
174 twl4030_write_reg_cache(codec, reg, value);
175 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
176}
177
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200178static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700179{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200180 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -0700181 u8 mode;
182
Peter Ujfalusi73939582009-01-29 14:57:50 +0200183 if (enable == twl4030->codec_powered)
184 return;
185
Steve Sakomancc175572008-10-30 21:35:26 -0700186 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200187 if (enable)
188 mode |= TWL4030_CODECPDZ;
189 else
190 mode &= ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -0700191
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200192 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200193 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700194
195 /* REVISIT: this delay is present in TI sample drivers */
196 /* but there seems to be no TRM requirement for it */
197 udelay(10);
198}
199
200static void twl4030_init_chip(struct snd_soc_codec *codec)
201{
202 int i;
203
204 /* clear CODECPDZ prior to setting register defaults */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200205 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700206
207 /* set all audio section registers to reasonable defaults */
208 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
209 twl4030_write(codec, i, twl4030_reg[i]);
210
211}
212
Peter Ujfalusi73939582009-01-29 14:57:50 +0200213static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute)
214{
215 struct twl4030_priv *twl4030 = codec->private_data;
216 u8 reg_val;
217
218 if (mute == twl4030->codec_muted)
219 return;
220
221 if (mute) {
222 /* Bypass the reg_cache and mute the volumes
223 * Headset mute is done in it's own event handler
224 * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
225 */
226 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL);
227 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
228 reg_val & (~TWL4030_EAR_GAIN),
229 TWL4030_REG_EAR_CTL);
230
231 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL);
232 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
233 reg_val & (~TWL4030_PREDL_GAIN),
234 TWL4030_REG_PREDL_CTL);
235 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL);
236 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
237 reg_val & (~TWL4030_PREDR_GAIN),
238 TWL4030_REG_PREDL_CTL);
239
240 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL);
241 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
242 reg_val & (~TWL4030_PRECKL_GAIN),
243 TWL4030_REG_PRECKL_CTL);
244 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL);
245 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
Peter Ujfalusic198d812009-05-07 14:32:00 +0300246 reg_val & (~TWL4030_PRECKR_GAIN),
Peter Ujfalusi73939582009-01-29 14:57:50 +0200247 TWL4030_REG_PRECKR_CTL);
248
249 /* Disable PLL */
250 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
251 reg_val &= ~TWL4030_APLL_EN;
252 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
253 } else {
254 /* Restore the volumes
255 * Headset mute is done in it's own event handler
256 * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
257 */
258 twl4030_write(codec, TWL4030_REG_EAR_CTL,
259 twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL));
260
261 twl4030_write(codec, TWL4030_REG_PREDL_CTL,
262 twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL));
263 twl4030_write(codec, TWL4030_REG_PREDR_CTL,
264 twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL));
265
266 twl4030_write(codec, TWL4030_REG_PRECKL_CTL,
267 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL));
268 twl4030_write(codec, TWL4030_REG_PRECKR_CTL,
269 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL));
270
271 /* Enable PLL */
272 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
273 reg_val |= TWL4030_APLL_EN;
274 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
275 }
276
277 twl4030->codec_muted = mute;
278}
279
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200280static void twl4030_power_up(struct snd_soc_codec *codec)
281{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200282 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200283 u8 anamicl, regmisc1, byte;
284 int i = 0;
285
Peter Ujfalusi73939582009-01-29 14:57:50 +0200286 if (twl4030->codec_powered)
287 return;
288
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200289 /* set CODECPDZ to turn on codec */
290 twl4030_codec_enable(codec, 1);
291
292 /* initiate offset cancellation */
293 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
294 twl4030_write(codec, TWL4030_REG_ANAMICL,
295 anamicl | TWL4030_CNCL_OFFSET_START);
296
297 /* wait for offset cancellation to complete */
298 do {
299 /* this takes a little while, so don't slam i2c */
300 udelay(2000);
301 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
302 TWL4030_REG_ANAMICL);
303 } while ((i++ < 100) &&
304 ((byte & TWL4030_CNCL_OFFSET_START) ==
305 TWL4030_CNCL_OFFSET_START));
306
307 /* Make sure that the reg_cache has the same value as the HW */
308 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
309
310 /* anti-pop when changing analog gain */
311 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
312 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
313 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
314
315 /* toggle CODECPDZ as per TRM */
316 twl4030_codec_enable(codec, 0);
317 twl4030_codec_enable(codec, 1);
318}
319
Peter Ujfalusi73939582009-01-29 14:57:50 +0200320/*
321 * Unconditional power down
322 */
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200323static void twl4030_power_down(struct snd_soc_codec *codec)
324{
325 /* power down */
326 twl4030_codec_enable(codec, 0);
327}
328
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200329/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900330static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
331 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
332 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
333 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
334 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
335};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200336
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200337/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900338static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
339 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
340 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
341 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
342 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
343};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200344
345/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900346static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
347 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
348 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
349 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
350 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
351};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200352
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200353/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900354static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
355 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
356 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
357 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
358};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200359
360/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900361static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
362 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
363 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
364 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
365};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200366
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200367/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900368static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
369 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
370 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
371 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
372};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200373
374/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900375static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
376 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
377 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
378 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
379};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200380
Peter Ujfalusidf339802008-12-09 12:35:51 +0200381/* Handsfree Left */
382static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900383 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200384
385static const struct soc_enum twl4030_handsfreel_enum =
386 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
387 ARRAY_SIZE(twl4030_handsfreel_texts),
388 twl4030_handsfreel_texts);
389
390static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
391SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
392
393/* Handsfree Right */
394static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900395 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200396
397static const struct soc_enum twl4030_handsfreer_enum =
398 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
399 ARRAY_SIZE(twl4030_handsfreer_texts),
400 twl4030_handsfreer_texts);
401
402static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
403SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
404
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300405/* Vibra */
406/* Vibra audio path selection */
407static const char *twl4030_vibra_texts[] =
408 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
409
410static const struct soc_enum twl4030_vibra_enum =
411 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
412 ARRAY_SIZE(twl4030_vibra_texts),
413 twl4030_vibra_texts);
414
415static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
416SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
417
418/* Vibra path selection: local vibrator (PWM) or audio driven */
419static const char *twl4030_vibrapath_texts[] =
420 {"Local vibrator", "Audio"};
421
422static const struct soc_enum twl4030_vibrapath_enum =
423 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
424 ARRAY_SIZE(twl4030_vibrapath_texts),
425 twl4030_vibrapath_texts);
426
427static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
428SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
429
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200430/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900431static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
432 SOC_DAPM_SINGLE("Main mic", TWL4030_REG_ANAMICL, 0, 1, 0),
433 SOC_DAPM_SINGLE("Headset mic", TWL4030_REG_ANAMICL, 1, 1, 0),
434 SOC_DAPM_SINGLE("AUXL", TWL4030_REG_ANAMICL, 2, 1, 0),
435 SOC_DAPM_SINGLE("Carkit mic", TWL4030_REG_ANAMICL, 3, 1, 0),
436};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200437
438/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900439static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
440 SOC_DAPM_SINGLE("Sub mic", TWL4030_REG_ANAMICR, 0, 1, 0),
Peter Ujfalusi181da782009-05-19 10:51:03 +0300441 SOC_DAPM_SINGLE("AUXR", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900442};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200443
444/* TX1 L/R Analog/Digital microphone selection */
445static const char *twl4030_micpathtx1_texts[] =
446 {"Analog", "Digimic0"};
447
448static const struct soc_enum twl4030_micpathtx1_enum =
449 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
450 ARRAY_SIZE(twl4030_micpathtx1_texts),
451 twl4030_micpathtx1_texts);
452
453static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
454SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
455
456/* TX2 L/R Analog/Digital microphone selection */
457static const char *twl4030_micpathtx2_texts[] =
458 {"Analog", "Digimic1"};
459
460static const struct soc_enum twl4030_micpathtx2_enum =
461 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
462 ARRAY_SIZE(twl4030_micpathtx2_texts),
463 twl4030_micpathtx2_texts);
464
465static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
466SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
467
Peter Ujfalusi73939582009-01-29 14:57:50 +0200468/* Analog bypass for AudioR1 */
469static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
470 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
471
472/* Analog bypass for AudioL1 */
473static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
474 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
475
476/* Analog bypass for AudioR2 */
477static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
478 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
479
480/* Analog bypass for AudioL2 */
481static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
482 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
483
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500484/* Analog bypass for Voice */
485static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
486 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
487
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200488/* Digital bypass gain, 0 mutes the bypass */
489static const unsigned int twl4030_dapm_dbypass_tlv[] = {
490 TLV_DB_RANGE_HEAD(2),
491 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
492 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
493};
494
495/* Digital bypass left (TX1L -> RX2L) */
496static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
497 SOC_DAPM_SINGLE_TLV("Volume",
498 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
499 twl4030_dapm_dbypass_tlv);
500
501/* Digital bypass right (TX1R -> RX2R) */
502static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
503 SOC_DAPM_SINGLE_TLV("Volume",
504 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
505 twl4030_dapm_dbypass_tlv);
506
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500507/*
508 * Voice Sidetone GAIN volume control:
509 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
510 */
511static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
512
513/* Digital bypass voice: sidetone (VUL -> VDL)*/
514static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
515 SOC_DAPM_SINGLE_TLV("Volume",
516 TWL4030_REG_VSTPGA, 0, 0x29, 0,
517 twl4030_dapm_dbypassv_tlv);
518
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200519static int micpath_event(struct snd_soc_dapm_widget *w,
520 struct snd_kcontrol *kcontrol, int event)
521{
522 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
523 unsigned char adcmicsel, micbias_ctl;
524
525 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
526 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
527 /* Prepare the bits for the given TX path:
528 * shift_l == 0: TX1 microphone path
529 * shift_l == 2: TX2 microphone path */
530 if (e->shift_l) {
531 /* TX2 microphone path */
532 if (adcmicsel & TWL4030_TX2IN_SEL)
533 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
534 else
535 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
536 } else {
537 /* TX1 microphone path */
538 if (adcmicsel & TWL4030_TX1IN_SEL)
539 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
540 else
541 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
542 }
543
544 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
545
546 return 0;
547}
548
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300549static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800550{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800551 unsigned char hs_ctl;
552
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300553 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800554
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300555 if (ramp) {
556 /* HF ramp-up */
557 hs_ctl |= TWL4030_HF_CTL_REF_EN;
558 twl4030_write(codec, reg, hs_ctl);
559 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800560 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300561 twl4030_write(codec, reg, hs_ctl);
562 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800563 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800564 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300565 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800566 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300567 /* HF ramp-down */
568 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
569 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
570 twl4030_write(codec, reg, hs_ctl);
571 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
572 twl4030_write(codec, reg, hs_ctl);
573 udelay(40);
574 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
575 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800576 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300577}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800578
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300579static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
580 struct snd_kcontrol *kcontrol, int event)
581{
582 switch (event) {
583 case SND_SOC_DAPM_POST_PMU:
584 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
585 break;
586 case SND_SOC_DAPM_POST_PMD:
587 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
588 break;
589 }
590 return 0;
591}
592
593static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
594 struct snd_kcontrol *kcontrol, int event)
595{
596 switch (event) {
597 case SND_SOC_DAPM_POST_PMU:
598 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
599 break;
600 case SND_SOC_DAPM_POST_PMD:
601 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
602 break;
603 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800604 return 0;
605}
606
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300607static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200608{
609 unsigned char hs_gain, hs_pop;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300610 struct twl4030_priv *twl4030 = codec->private_data;
611 /* Base values for ramp delay calculation: 2^19 - 2^26 */
612 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
613 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200614
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300615 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
616 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200617
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300618 if (ramp) {
619 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200620 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300621 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
622 twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200623 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300624 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
625 } else {
626 /* Headset ramp-down _not_ according to
627 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200628 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300629 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
630 /* Wait ramp delay time + 1, so the VMID can settle */
631 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
632 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200633 /* Bypass the reg_cache to mute the headset */
634 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
635 hs_gain & (~0x0f),
636 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300637
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200638 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300639 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
640 }
641}
642
643static int headsetlpga_event(struct snd_soc_dapm_widget *w,
644 struct snd_kcontrol *kcontrol, int event)
645{
646 struct twl4030_priv *twl4030 = w->codec->private_data;
647
648 switch (event) {
649 case SND_SOC_DAPM_POST_PMU:
650 /* Do the ramp-up only once */
651 if (!twl4030->hsr_enabled)
652 headset_ramp(w->codec, 1);
653
654 twl4030->hsl_enabled = 1;
655 break;
656 case SND_SOC_DAPM_POST_PMD:
657 /* Do the ramp-down only if both headsetL/R is disabled */
658 if (!twl4030->hsr_enabled)
659 headset_ramp(w->codec, 0);
660
661 twl4030->hsl_enabled = 0;
662 break;
663 }
664 return 0;
665}
666
667static int headsetrpga_event(struct snd_soc_dapm_widget *w,
668 struct snd_kcontrol *kcontrol, int event)
669{
670 struct twl4030_priv *twl4030 = w->codec->private_data;
671
672 switch (event) {
673 case SND_SOC_DAPM_POST_PMU:
674 /* Do the ramp-up only once */
675 if (!twl4030->hsl_enabled)
676 headset_ramp(w->codec, 1);
677
678 twl4030->hsr_enabled = 1;
679 break;
680 case SND_SOC_DAPM_POST_PMD:
681 /* Do the ramp-down only if both headsetL/R is disabled */
682 if (!twl4030->hsl_enabled)
683 headset_ramp(w->codec, 0);
684
685 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200686 break;
687 }
688 return 0;
689}
690
Peter Ujfalusi73939582009-01-29 14:57:50 +0200691static int bypass_event(struct snd_soc_dapm_widget *w,
692 struct snd_kcontrol *kcontrol, int event)
693{
694 struct soc_mixer_control *m =
695 (struct soc_mixer_control *)w->kcontrols->private_value;
696 struct twl4030_priv *twl4030 = w->codec->private_data;
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500697 unsigned char reg, misc;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200698
699 reg = twl4030_read_reg_cache(w->codec, m->reg);
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200700
701 if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
702 /* Analog bypass */
703 if (reg & (1 << m->shift))
704 twl4030->bypass_state |=
705 (1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
706 else
707 twl4030->bypass_state &=
708 ~(1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500709 } else if (m->reg == TWL4030_REG_VDL_APGA_CTL) {
710 /* Analog voice bypass */
711 if (reg & (1 << m->shift))
712 twl4030->bypass_state |= (1 << 4);
713 else
714 twl4030->bypass_state &= ~(1 << 4);
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500715 } else if (m->reg == TWL4030_REG_VSTPGA) {
716 /* Voice digital bypass */
717 if (reg)
718 twl4030->bypass_state |= (1 << 5);
719 else
720 twl4030->bypass_state &= ~(1 << 5);
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200721 } else {
722 /* Digital bypass */
723 if (reg & (0x7 << m->shift))
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500724 twl4030->bypass_state |= (1 << (m->shift ? 7 : 6));
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200725 else
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500726 twl4030->bypass_state &= ~(1 << (m->shift ? 7 : 6));
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200727 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200728
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500729 /* Enable master analog loopback mode if any analog switch is enabled*/
730 misc = twl4030_read_reg_cache(w->codec, TWL4030_REG_MISC_SET_1);
731 if (twl4030->bypass_state & 0x1F)
732 misc |= TWL4030_FMLOOP_EN;
733 else
734 misc &= ~TWL4030_FMLOOP_EN;
735 twl4030_write(w->codec, TWL4030_REG_MISC_SET_1, misc);
736
Peter Ujfalusi73939582009-01-29 14:57:50 +0200737 if (w->codec->bias_level == SND_SOC_BIAS_STANDBY) {
738 if (twl4030->bypass_state)
739 twl4030_codec_mute(w->codec, 0);
740 else
741 twl4030_codec_mute(w->codec, 1);
742 }
743 return 0;
744}
745
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200746/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200747 * Some of the gain controls in TWL (mostly those which are associated with
748 * the outputs) are implemented in an interesting way:
749 * 0x0 : Power down (mute)
750 * 0x1 : 6dB
751 * 0x2 : 0 dB
752 * 0x3 : -6 dB
753 * Inverting not going to help with these.
754 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
755 */
756#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
757 xinvert, tlv_array) \
758{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
759 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
760 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
761 .tlv.p = (tlv_array), \
762 .info = snd_soc_info_volsw, \
763 .get = snd_soc_get_volsw_twl4030, \
764 .put = snd_soc_put_volsw_twl4030, \
765 .private_value = (unsigned long)&(struct soc_mixer_control) \
766 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
767 .max = xmax, .invert = xinvert} }
768#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
769 xinvert, tlv_array) \
770{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
771 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
772 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
773 .tlv.p = (tlv_array), \
774 .info = snd_soc_info_volsw_2r, \
775 .get = snd_soc_get_volsw_r2_twl4030,\
776 .put = snd_soc_put_volsw_r2_twl4030, \
777 .private_value = (unsigned long)&(struct soc_mixer_control) \
778 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000779 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200780#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
781 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
782 xinvert, tlv_array)
783
784static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
785 struct snd_ctl_elem_value *ucontrol)
786{
787 struct soc_mixer_control *mc =
788 (struct soc_mixer_control *)kcontrol->private_value;
789 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
790 unsigned int reg = mc->reg;
791 unsigned int shift = mc->shift;
792 unsigned int rshift = mc->rshift;
793 int max = mc->max;
794 int mask = (1 << fls(max)) - 1;
795
796 ucontrol->value.integer.value[0] =
797 (snd_soc_read(codec, reg) >> shift) & mask;
798 if (ucontrol->value.integer.value[0])
799 ucontrol->value.integer.value[0] =
800 max + 1 - ucontrol->value.integer.value[0];
801
802 if (shift != rshift) {
803 ucontrol->value.integer.value[1] =
804 (snd_soc_read(codec, reg) >> rshift) & mask;
805 if (ucontrol->value.integer.value[1])
806 ucontrol->value.integer.value[1] =
807 max + 1 - ucontrol->value.integer.value[1];
808 }
809
810 return 0;
811}
812
813static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
814 struct snd_ctl_elem_value *ucontrol)
815{
816 struct soc_mixer_control *mc =
817 (struct soc_mixer_control *)kcontrol->private_value;
818 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
819 unsigned int reg = mc->reg;
820 unsigned int shift = mc->shift;
821 unsigned int rshift = mc->rshift;
822 int max = mc->max;
823 int mask = (1 << fls(max)) - 1;
824 unsigned short val, val2, val_mask;
825
826 val = (ucontrol->value.integer.value[0] & mask);
827
828 val_mask = mask << shift;
829 if (val)
830 val = max + 1 - val;
831 val = val << shift;
832 if (shift != rshift) {
833 val2 = (ucontrol->value.integer.value[1] & mask);
834 val_mask |= mask << rshift;
835 if (val2)
836 val2 = max + 1 - val2;
837 val |= val2 << rshift;
838 }
839 return snd_soc_update_bits(codec, reg, val_mask, val);
840}
841
842static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
843 struct snd_ctl_elem_value *ucontrol)
844{
845 struct soc_mixer_control *mc =
846 (struct soc_mixer_control *)kcontrol->private_value;
847 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
848 unsigned int reg = mc->reg;
849 unsigned int reg2 = mc->rreg;
850 unsigned int shift = mc->shift;
851 int max = mc->max;
852 int mask = (1<<fls(max))-1;
853
854 ucontrol->value.integer.value[0] =
855 (snd_soc_read(codec, reg) >> shift) & mask;
856 ucontrol->value.integer.value[1] =
857 (snd_soc_read(codec, reg2) >> shift) & mask;
858
859 if (ucontrol->value.integer.value[0])
860 ucontrol->value.integer.value[0] =
861 max + 1 - ucontrol->value.integer.value[0];
862 if (ucontrol->value.integer.value[1])
863 ucontrol->value.integer.value[1] =
864 max + 1 - ucontrol->value.integer.value[1];
865
866 return 0;
867}
868
869static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
870 struct snd_ctl_elem_value *ucontrol)
871{
872 struct soc_mixer_control *mc =
873 (struct soc_mixer_control *)kcontrol->private_value;
874 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
875 unsigned int reg = mc->reg;
876 unsigned int reg2 = mc->rreg;
877 unsigned int shift = mc->shift;
878 int max = mc->max;
879 int mask = (1 << fls(max)) - 1;
880 int err;
881 unsigned short val, val2, val_mask;
882
883 val_mask = mask << shift;
884 val = (ucontrol->value.integer.value[0] & mask);
885 val2 = (ucontrol->value.integer.value[1] & mask);
886
887 if (val)
888 val = max + 1 - val;
889 if (val2)
890 val2 = max + 1 - val2;
891
892 val = val << shift;
893 val2 = val2 << shift;
894
895 err = snd_soc_update_bits(codec, reg, val_mask, val);
896 if (err < 0)
897 return err;
898
899 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
900 return err;
901}
902
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500903/* Codec operation modes */
904static const char *twl4030_op_modes_texts[] = {
905 "Option 2 (voice/audio)", "Option 1 (audio)"
906};
907
908static const struct soc_enum twl4030_op_modes_enum =
909 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
910 ARRAY_SIZE(twl4030_op_modes_texts),
911 twl4030_op_modes_texts);
912
913int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
914 struct snd_ctl_elem_value *ucontrol)
915{
916 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
917 struct twl4030_priv *twl4030 = codec->private_data;
918 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
919 unsigned short val;
920 unsigned short mask, bitmask;
921
922 if (twl4030->configured) {
923 printk(KERN_ERR "twl4030 operation mode cannot be "
924 "changed on-the-fly\n");
925 return -EBUSY;
926 }
927
928 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
929 ;
930 if (ucontrol->value.enumerated.item[0] > e->max - 1)
931 return -EINVAL;
932
933 val = ucontrol->value.enumerated.item[0] << e->shift_l;
934 mask = (bitmask - 1) << e->shift_l;
935 if (e->shift_l != e->shift_r) {
936 if (ucontrol->value.enumerated.item[1] > e->max - 1)
937 return -EINVAL;
938 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
939 mask |= (bitmask - 1) << e->shift_r;
940 }
941
942 return snd_soc_update_bits(codec, e->reg, mask, val);
943}
944
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200945/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200946 * FGAIN volume control:
947 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
948 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200949static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200950
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200951/*
952 * CGAIN volume control:
953 * 0 dB to 12 dB in 6 dB steps
954 * value 2 and 3 means 12 dB
955 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200956static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
957
958/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900959 * Voice Downlink GAIN volume control:
960 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
961 */
962static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
963
964/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200965 * Analog playback gain
966 * -24 dB to 12 dB in 2 dB steps
967 */
968static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200969
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200970/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200971 * Gain controls tied to outputs
972 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
973 */
974static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
975
976/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +0900977 * Gain control for earpiece amplifier
978 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
979 */
980static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
981
982/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200983 * Capture gain after the ADCs
984 * from 0 dB to 31 dB in 1 dB steps
985 */
986static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
987
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200988/*
989 * Gain control for input amplifiers
990 * 0 dB to 30 dB in 6 dB steps
991 */
992static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
993
Peter Ujfalusi89492be2009-03-05 12:48:49 +0200994static const char *twl4030_rampdelay_texts[] = {
995 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
996 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
997 "3495/2581/1748 ms"
998};
999
1000static const struct soc_enum twl4030_rampdelay_enum =
1001 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1002 ARRAY_SIZE(twl4030_rampdelay_texts),
1003 twl4030_rampdelay_texts);
1004
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001005/* Vibra H-bridge direction mode */
1006static const char *twl4030_vibradirmode_texts[] = {
1007 "Vibra H-bridge direction", "Audio data MSB",
1008};
1009
1010static const struct soc_enum twl4030_vibradirmode_enum =
1011 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1012 ARRAY_SIZE(twl4030_vibradirmode_texts),
1013 twl4030_vibradirmode_texts);
1014
1015/* Vibra H-bridge direction */
1016static const char *twl4030_vibradir_texts[] = {
1017 "Positive polarity", "Negative polarity",
1018};
1019
1020static const struct soc_enum twl4030_vibradir_enum =
1021 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1022 ARRAY_SIZE(twl4030_vibradir_texts),
1023 twl4030_vibradir_texts);
1024
Steve Sakomancc175572008-10-30 21:35:26 -07001025static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001026 /* Codec operation mode control */
1027 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1028 snd_soc_get_enum_double,
1029 snd_soc_put_twl4030_opmode_enum_double),
1030
Peter Ujfalusid889a722008-12-01 10:03:46 +02001031 /* Common playback gain controls */
1032 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1033 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1034 0, 0x3f, 0, digital_fine_tlv),
1035 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1036 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1037 0, 0x3f, 0, digital_fine_tlv),
1038
1039 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1040 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1041 6, 0x2, 0, digital_coarse_tlv),
1042 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1043 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1044 6, 0x2, 0, digital_coarse_tlv),
1045
1046 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1047 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1048 3, 0x12, 1, analog_tlv),
1049 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1050 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1051 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001052 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1053 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1054 1, 1, 0),
1055 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1056 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1057 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001058
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001059 /* Common voice downlink gain controls */
1060 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1061 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1062
1063 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1064 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1065
1066 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1067 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1068
Peter Ujfalusi42902392008-12-01 10:03:47 +02001069 /* Separate output gain controls */
1070 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1071 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1072 4, 3, 0, output_tvl),
1073
1074 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1075 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1076
1077 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1078 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1079 4, 3, 0, output_tvl),
1080
1081 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001082 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001083
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001084 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001085 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001086 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1087 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001088 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1089 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1090 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001091
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001092 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001093 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001094
1095 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001096
1097 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1098 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001099};
1100
Steve Sakomancc175572008-10-30 21:35:26 -07001101static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001102 /* Left channel inputs */
1103 SND_SOC_DAPM_INPUT("MAINMIC"),
1104 SND_SOC_DAPM_INPUT("HSMIC"),
1105 SND_SOC_DAPM_INPUT("AUXL"),
1106 SND_SOC_DAPM_INPUT("CARKITMIC"),
1107 /* Right channel inputs */
1108 SND_SOC_DAPM_INPUT("SUBMIC"),
1109 SND_SOC_DAPM_INPUT("AUXR"),
1110 /* Digital microphones (Stereo) */
1111 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1112 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001113
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001114 /* Outputs */
Steve Sakomancc175572008-10-30 21:35:26 -07001115 SND_SOC_DAPM_OUTPUT("OUTL"),
1116 SND_SOC_DAPM_OUTPUT("OUTR"),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001117 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001118 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1119 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001120 SND_SOC_DAPM_OUTPUT("HSOL"),
1121 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001122 SND_SOC_DAPM_OUTPUT("CARKITL"),
1123 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001124 SND_SOC_DAPM_OUTPUT("HFL"),
1125 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001126 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001127
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001128 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001129 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001130 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001131 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001132 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001133 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001134 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001135 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001136 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001137 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001138 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001139
Peter Ujfalusi73939582009-01-29 14:57:50 +02001140 /* Analog bypasses */
1141 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1142 &twl4030_dapm_abypassr1_control, bypass_event,
1143 SND_SOC_DAPM_POST_REG),
1144 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1145 &twl4030_dapm_abypassl1_control,
1146 bypass_event, SND_SOC_DAPM_POST_REG),
1147 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1148 &twl4030_dapm_abypassr2_control,
1149 bypass_event, SND_SOC_DAPM_POST_REG),
1150 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1151 &twl4030_dapm_abypassl2_control,
1152 bypass_event, SND_SOC_DAPM_POST_REG),
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001153 SND_SOC_DAPM_SWITCH_E("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1154 &twl4030_dapm_abypassv_control,
1155 bypass_event, SND_SOC_DAPM_POST_REG),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001156
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001157 /* Digital bypasses */
1158 SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1159 &twl4030_dapm_dbypassl_control, bypass_event,
1160 SND_SOC_DAPM_POST_REG),
1161 SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1162 &twl4030_dapm_dbypassr_control, bypass_event,
1163 SND_SOC_DAPM_POST_REG),
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001164 SND_SOC_DAPM_SWITCH_E("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1165 &twl4030_dapm_dbypassv_control, bypass_event,
1166 SND_SOC_DAPM_POST_REG),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001167
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001168 /* Digital mixers, power control for the physical DACs */
1169 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1170 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1171 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1172 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1173 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1174 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1175 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1176 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1177 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1178 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1179
1180 /* Analog mixers, power control for the physical PGAs */
1181 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1182 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1183 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1184 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1185 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1186 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1187 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1188 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1189 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1190 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001191
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001192 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001193 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001194 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1195 &twl4030_dapm_earpiece_controls[0],
1196 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001197 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001198 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1199 &twl4030_dapm_predrivel_controls[0],
1200 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1201 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1202 &twl4030_dapm_predriver_controls[0],
1203 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001204 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001205 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001206 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001207 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1208 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1209 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001210 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1211 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1212 &twl4030_dapm_hsor_controls[0],
1213 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001214 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1215 0, 0, NULL, 0, headsetrpga_event,
1216 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001217 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001218 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1219 &twl4030_dapm_carkitl_controls[0],
1220 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1221 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1222 &twl4030_dapm_carkitr_controls[0],
1223 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1224
1225 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001226 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001227 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1228 &twl4030_dapm_handsfreel_control),
1229 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1230 0, 0, NULL, 0, handsfreelpga_event,
1231 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1232 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1233 &twl4030_dapm_handsfreer_control),
1234 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1235 0, 0, NULL, 0, handsfreerpga_event,
1236 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001237 /* Vibra */
1238 SND_SOC_DAPM_MUX("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1239 &twl4030_dapm_vibra_control),
1240 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1241 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001242
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001243 /* Introducing four virtual ADC, since TWL4030 have four channel for
1244 capture */
1245 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1246 SND_SOC_NOPM, 0, 0),
1247 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1248 SND_SOC_NOPM, 0, 0),
1249 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1250 SND_SOC_NOPM, 0, 0),
1251 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1252 SND_SOC_NOPM, 0, 0),
1253
1254 /* Analog/Digital mic path selection.
1255 TX1 Left/Right: either analog Left/Right or Digimic0
1256 TX2 Left/Right: either analog Left/Right or Digimic1 */
1257 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1258 &twl4030_dapm_micpathtx1_control, micpath_event,
1259 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1260 SND_SOC_DAPM_POST_REG),
1261 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1262 &twl4030_dapm_micpathtx2_control, micpath_event,
1263 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1264 SND_SOC_DAPM_POST_REG),
1265
Joonyoung Shim97b80962009-05-11 20:36:08 +09001266 /* Analog input mixers for the capture amplifiers */
1267 SND_SOC_DAPM_MIXER("Analog Left Capture Route",
1268 TWL4030_REG_ANAMICL, 4, 0,
1269 &twl4030_dapm_analoglmic_controls[0],
1270 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1271 SND_SOC_DAPM_MIXER("Analog Right Capture Route",
1272 TWL4030_REG_ANAMICR, 4, 0,
1273 &twl4030_dapm_analogrmic_controls[0],
1274 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001275
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001276 SND_SOC_DAPM_PGA("ADC Physical Left",
1277 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1278 SND_SOC_DAPM_PGA("ADC Physical Right",
1279 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001280
1281 SND_SOC_DAPM_PGA("Digimic0 Enable",
1282 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1283 SND_SOC_DAPM_PGA("Digimic1 Enable",
1284 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1285
1286 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1287 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1288 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001289
Steve Sakomancc175572008-10-30 21:35:26 -07001290};
1291
1292static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001293 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1294 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1295 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1296 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1297 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001298
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001299 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1300 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1301 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1302 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1303 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001304
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001305 /* Internal playback routings */
1306 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001307 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1308 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1309 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1310 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001311 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001312 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1313 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1314 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1315 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001316 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001317 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1318 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1319 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1320 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001321 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001322 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1323 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1324 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001325 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001326 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001327 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1328 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1329 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001330 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001331 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001332 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1333 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1334 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001335 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001336 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1337 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1338 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001339 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001340 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1341 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1342 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1343 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001344 {"HandsfreeL PGA", NULL, "HandsfreeL Mux"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001345 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001346 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1347 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1348 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1349 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001350 {"HandsfreeR PGA", NULL, "HandsfreeR Mux"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001351 /* Vibra */
1352 {"Vibra Mux", "AudioL1", "DAC Left1"},
1353 {"Vibra Mux", "AudioR1", "DAC Right1"},
1354 {"Vibra Mux", "AudioL2", "DAC Left2"},
1355 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001356
Steve Sakomancc175572008-10-30 21:35:26 -07001357 /* outputs */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001358 {"OUTL", NULL, "Analog L2 Playback Mixer"},
1359 {"OUTR", NULL, "Analog R2 Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001360 {"EARPIECE", NULL, "Earpiece Mixer"},
1361 {"PREDRIVEL", NULL, "PredriveL Mixer"},
1362 {"PREDRIVER", NULL, "PredriveR Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001363 {"HSOL", NULL, "HeadsetL PGA"},
1364 {"HSOR", NULL, "HeadsetR PGA"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001365 {"CARKITL", NULL, "CarkitL Mixer"},
1366 {"CARKITR", NULL, "CarkitR Mixer"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001367 {"HFL", NULL, "HandsfreeL PGA"},
1368 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001369 {"Vibra Route", "Audio", "Vibra Mux"},
1370 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001371
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001372 /* Capture path */
1373 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
1374 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
1375 {"Analog Left Capture Route", "AUXL", "AUXL"},
1376 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
1377
1378 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
1379 {"Analog Right Capture Route", "AUXR", "AUXR"},
1380
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001381 {"ADC Physical Left", NULL, "Analog Left Capture Route"},
1382 {"ADC Physical Right", NULL, "Analog Right Capture Route"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001383
1384 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1385 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1386
1387 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001388 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001389 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1390 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001391 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001392 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1393 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001394 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001395 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1396 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001397 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001398 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1399
1400 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1401 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1402 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1403 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1404
Peter Ujfalusi73939582009-01-29 14:57:50 +02001405 /* Analog bypass routes */
1406 {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
1407 {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
1408 {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
1409 {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001410 {"Voice Analog Loopback", "Switch", "Analog Left Capture Route"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001411
1412 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1413 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1414 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1415 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001416 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001417
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001418 /* Digital bypass routes */
1419 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1420 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001421 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001422
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001423 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1424 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1425 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001426
Steve Sakomancc175572008-10-30 21:35:26 -07001427};
1428
1429static int twl4030_add_widgets(struct snd_soc_codec *codec)
1430{
1431 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1432 ARRAY_SIZE(twl4030_dapm_widgets));
1433
1434 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1435
1436 snd_soc_dapm_new_widgets(codec);
1437 return 0;
1438}
1439
Steve Sakomancc175572008-10-30 21:35:26 -07001440static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1441 enum snd_soc_bias_level level)
1442{
Peter Ujfalusi73939582009-01-29 14:57:50 +02001443 struct twl4030_priv *twl4030 = codec->private_data;
1444
Steve Sakomancc175572008-10-30 21:35:26 -07001445 switch (level) {
1446 case SND_SOC_BIAS_ON:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001447 twl4030_codec_mute(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001448 break;
1449 case SND_SOC_BIAS_PREPARE:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001450 twl4030_power_up(codec);
1451 if (twl4030->bypass_state)
1452 twl4030_codec_mute(codec, 0);
1453 else
1454 twl4030_codec_mute(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001455 break;
1456 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001457 twl4030_power_up(codec);
1458 if (twl4030->bypass_state)
1459 twl4030_codec_mute(codec, 0);
1460 else
1461 twl4030_codec_mute(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001462 break;
1463 case SND_SOC_BIAS_OFF:
1464 twl4030_power_down(codec);
1465 break;
1466 }
1467 codec->bias_level = level;
1468
1469 return 0;
1470}
1471
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001472static void twl4030_constraints(struct twl4030_priv *twl4030,
1473 struct snd_pcm_substream *mst_substream)
1474{
1475 struct snd_pcm_substream *slv_substream;
1476
1477 /* Pick the stream, which need to be constrained */
1478 if (mst_substream == twl4030->master_substream)
1479 slv_substream = twl4030->slave_substream;
1480 else if (mst_substream == twl4030->slave_substream)
1481 slv_substream = twl4030->master_substream;
1482 else /* This should not happen.. */
1483 return;
1484
1485 /* Set the constraints according to the already configured stream */
1486 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1487 SNDRV_PCM_HW_PARAM_RATE,
1488 twl4030->rate,
1489 twl4030->rate);
1490
1491 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1492 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1493 twl4030->sample_bits,
1494 twl4030->sample_bits);
1495
1496 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1497 SNDRV_PCM_HW_PARAM_CHANNELS,
1498 twl4030->channels,
1499 twl4030->channels);
1500}
1501
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001502/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1503 * capture has to be enabled/disabled. */
1504static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1505 int enable)
1506{
1507 u8 reg, mask;
1508
1509 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1510
1511 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1512 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1513 else
1514 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1515
1516 if (enable)
1517 reg |= mask;
1518 else
1519 reg &= ~mask;
1520
1521 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1522}
1523
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001524static int twl4030_startup(struct snd_pcm_substream *substream,
1525 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001526{
1527 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1528 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001529 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001530 struct twl4030_priv *twl4030 = codec->private_data;
1531
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001532 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001533 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001534 /* The DAI has one configuration for playback and capture, so
1535 * if the DAI has been already configured then constrain this
1536 * substream to match it. */
1537 if (twl4030->configured)
1538 twl4030_constraints(twl4030, twl4030->master_substream);
1539 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001540 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1541 TWL4030_OPTION_1)) {
1542 /* In option2 4 channel is not supported, set the
1543 * constraint for the first stream for channels, the
1544 * second stream will 'inherit' this cosntraint */
1545 snd_pcm_hw_constraint_minmax(substream->runtime,
1546 SNDRV_PCM_HW_PARAM_CHANNELS,
1547 2, 2);
1548 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001549 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001550 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001551
1552 return 0;
1553}
1554
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001555static void twl4030_shutdown(struct snd_pcm_substream *substream,
1556 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001557{
1558 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1559 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001560 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001561 struct twl4030_priv *twl4030 = codec->private_data;
1562
1563 if (twl4030->master_substream == substream)
1564 twl4030->master_substream = twl4030->slave_substream;
1565
1566 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001567
1568 /* If all streams are closed, or the remaining stream has not yet
1569 * been configured than set the DAI as not configured. */
1570 if (!twl4030->master_substream)
1571 twl4030->configured = 0;
1572 else if (!twl4030->master_substream->runtime->channels)
1573 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001574
1575 /* If the closing substream had 4 channel, do the necessary cleanup */
1576 if (substream->runtime->channels == 4)
1577 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001578}
1579
Steve Sakomancc175572008-10-30 21:35:26 -07001580static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001581 struct snd_pcm_hw_params *params,
1582 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001583{
1584 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1585 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001586 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001587 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07001588 u8 mode, old_mode, format, old_format;
1589
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001590 /* If the substream has 4 channel, do the necessary setup */
1591 if (params_channels(params) == 4) {
1592 /* Safety check: are we in the correct operating mode? */
1593 if ((twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1594 TWL4030_OPTION_1))
1595 twl4030_tdm_enable(codec, substream->stream, 1);
1596 else
1597 return -EINVAL;
1598 }
1599
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001600 if (twl4030->configured)
1601 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001602 return 0;
1603
Steve Sakomancc175572008-10-30 21:35:26 -07001604 /* bit rate */
1605 old_mode = twl4030_read_reg_cache(codec,
1606 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1607 mode = old_mode & ~TWL4030_APLL_RATE;
1608
1609 switch (params_rate(params)) {
1610 case 8000:
1611 mode |= TWL4030_APLL_RATE_8000;
1612 break;
1613 case 11025:
1614 mode |= TWL4030_APLL_RATE_11025;
1615 break;
1616 case 12000:
1617 mode |= TWL4030_APLL_RATE_12000;
1618 break;
1619 case 16000:
1620 mode |= TWL4030_APLL_RATE_16000;
1621 break;
1622 case 22050:
1623 mode |= TWL4030_APLL_RATE_22050;
1624 break;
1625 case 24000:
1626 mode |= TWL4030_APLL_RATE_24000;
1627 break;
1628 case 32000:
1629 mode |= TWL4030_APLL_RATE_32000;
1630 break;
1631 case 44100:
1632 mode |= TWL4030_APLL_RATE_44100;
1633 break;
1634 case 48000:
1635 mode |= TWL4030_APLL_RATE_48000;
1636 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001637 case 96000:
1638 mode |= TWL4030_APLL_RATE_96000;
1639 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001640 default:
1641 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1642 params_rate(params));
1643 return -EINVAL;
1644 }
1645
1646 if (mode != old_mode) {
1647 /* change rate and set CODECPDZ */
Peter Ujfalusi73939582009-01-29 14:57:50 +02001648 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001649 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001650 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001651 }
1652
1653 /* sample size */
1654 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1655 format = old_format;
1656 format &= ~TWL4030_DATA_WIDTH;
1657 switch (params_format(params)) {
1658 case SNDRV_PCM_FORMAT_S16_LE:
1659 format |= TWL4030_DATA_WIDTH_16S_16W;
1660 break;
1661 case SNDRV_PCM_FORMAT_S24_LE:
1662 format |= TWL4030_DATA_WIDTH_32S_24W;
1663 break;
1664 default:
1665 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1666 params_format(params));
1667 return -EINVAL;
1668 }
1669
1670 if (format != old_format) {
1671
1672 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001673 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001674
1675 /* change format */
1676 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1677
1678 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001679 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001680 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001681
1682 /* Store the important parameters for the DAI configuration and set
1683 * the DAI as configured */
1684 twl4030->configured = 1;
1685 twl4030->rate = params_rate(params);
1686 twl4030->sample_bits = hw_param_interval(params,
1687 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1688 twl4030->channels = params_channels(params);
1689
1690 /* If both playback and capture streams are open, and one of them
1691 * is setting the hw parameters right now (since we are here), set
1692 * constraints to the other stream to match the current one. */
1693 if (twl4030->slave_substream)
1694 twl4030_constraints(twl4030, substream);
1695
Steve Sakomancc175572008-10-30 21:35:26 -07001696 return 0;
1697}
1698
1699static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1700 int clk_id, unsigned int freq, int dir)
1701{
1702 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001703 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07001704 u8 infreq;
1705
1706 switch (freq) {
1707 case 19200000:
1708 infreq = TWL4030_APLL_INFREQ_19200KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001709 twl4030->sysclk = 19200;
Steve Sakomancc175572008-10-30 21:35:26 -07001710 break;
1711 case 26000000:
1712 infreq = TWL4030_APLL_INFREQ_26000KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001713 twl4030->sysclk = 26000;
Steve Sakomancc175572008-10-30 21:35:26 -07001714 break;
1715 case 38400000:
1716 infreq = TWL4030_APLL_INFREQ_38400KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001717 twl4030->sysclk = 38400;
Steve Sakomancc175572008-10-30 21:35:26 -07001718 break;
1719 default:
1720 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
1721 freq);
1722 return -EINVAL;
1723 }
1724
1725 infreq |= TWL4030_APLL_EN;
1726 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
1727
1728 return 0;
1729}
1730
1731static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1732 unsigned int fmt)
1733{
1734 struct snd_soc_codec *codec = codec_dai->codec;
1735 u8 old_format, format;
1736
1737 /* get format */
1738 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1739 format = old_format;
1740
1741 /* set master/slave audio interface */
1742 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1743 case SND_SOC_DAIFMT_CBM_CFM:
1744 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001745 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001746 break;
1747 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001748 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001749 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001750 break;
1751 default:
1752 return -EINVAL;
1753 }
1754
1755 /* interface format */
1756 format &= ~TWL4030_AIF_FORMAT;
1757 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1758 case SND_SOC_DAIFMT_I2S:
1759 format |= TWL4030_AIF_FORMAT_CODEC;
1760 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001761 case SND_SOC_DAIFMT_DSP_A:
1762 format |= TWL4030_AIF_FORMAT_TDM;
1763 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001764 default:
1765 return -EINVAL;
1766 }
1767
1768 if (format != old_format) {
1769
1770 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001771 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001772
1773 /* change format */
1774 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1775
1776 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001777 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001778 }
1779
1780 return 0;
1781}
1782
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001783/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1784 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1785static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1786 int enable)
1787{
1788 u8 reg, mask;
1789
1790 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1791
1792 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1793 mask = TWL4030_ARXL1_VRX_EN;
1794 else
1795 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1796
1797 if (enable)
1798 reg |= mask;
1799 else
1800 reg &= ~mask;
1801
1802 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1803}
1804
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001805static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1806 struct snd_soc_dai *dai)
1807{
1808 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1809 struct snd_soc_device *socdev = rtd->socdev;
1810 struct snd_soc_codec *codec = socdev->card->codec;
1811 u8 infreq;
1812 u8 mode;
1813
1814 /* If the system master clock is not 26MHz, the voice PCM interface is
1815 * not avilable.
1816 */
1817 infreq = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL)
1818 & TWL4030_APLL_INFREQ;
1819
1820 if (infreq != TWL4030_APLL_INFREQ_26000KHZ) {
1821 printk(KERN_ERR "TWL4030 voice startup: "
1822 "MCLK is not 26MHz, call set_sysclk() on init\n");
1823 return -EINVAL;
1824 }
1825
1826 /* If the codec mode is not option2, the voice PCM interface is not
1827 * avilable.
1828 */
1829 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1830 & TWL4030_OPT_MODE;
1831
1832 if (mode != TWL4030_OPTION_2) {
1833 printk(KERN_ERR "TWL4030 voice startup: "
1834 "the codec mode is not option2\n");
1835 return -EINVAL;
1836 }
1837
1838 return 0;
1839}
1840
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001841static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1842 struct snd_soc_dai *dai)
1843{
1844 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1845 struct snd_soc_device *socdev = rtd->socdev;
1846 struct snd_soc_codec *codec = socdev->card->codec;
1847
1848 /* Enable voice digital filters */
1849 twl4030_voice_enable(codec, substream->stream, 0);
1850}
1851
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001852static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1853 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1854{
1855 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1856 struct snd_soc_device *socdev = rtd->socdev;
1857 struct snd_soc_codec *codec = socdev->card->codec;
1858 u8 old_mode, mode;
1859
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001860 /* Enable voice digital filters */
1861 twl4030_voice_enable(codec, substream->stream, 1);
1862
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001863 /* bit rate */
1864 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1865 & ~(TWL4030_CODECPDZ);
1866 mode = old_mode;
1867
1868 switch (params_rate(params)) {
1869 case 8000:
1870 mode &= ~(TWL4030_SEL_16K);
1871 break;
1872 case 16000:
1873 mode |= TWL4030_SEL_16K;
1874 break;
1875 default:
1876 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
1877 params_rate(params));
1878 return -EINVAL;
1879 }
1880
1881 if (mode != old_mode) {
1882 /* change rate and set CODECPDZ */
1883 twl4030_codec_enable(codec, 0);
1884 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1885 twl4030_codec_enable(codec, 1);
1886 }
1887
1888 return 0;
1889}
1890
1891static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1892 int clk_id, unsigned int freq, int dir)
1893{
1894 struct snd_soc_codec *codec = codec_dai->codec;
1895 u8 infreq;
1896
1897 switch (freq) {
1898 case 26000000:
1899 infreq = TWL4030_APLL_INFREQ_26000KHZ;
1900 break;
1901 default:
1902 printk(KERN_ERR "TWL4030 voice set sysclk: unknown rate %d\n",
1903 freq);
1904 return -EINVAL;
1905 }
1906
1907 infreq |= TWL4030_APLL_EN;
1908 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
1909
1910 return 0;
1911}
1912
1913static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1914 unsigned int fmt)
1915{
1916 struct snd_soc_codec *codec = codec_dai->codec;
1917 u8 old_format, format;
1918
1919 /* get format */
1920 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
1921 format = old_format;
1922
1923 /* set master/slave audio interface */
1924 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1925 case SND_SOC_DAIFMT_CBS_CFM:
1926 format &= ~(TWL4030_VIF_SLAVE_EN);
1927 break;
1928 case SND_SOC_DAIFMT_CBS_CFS:
1929 format |= TWL4030_VIF_SLAVE_EN;
1930 break;
1931 default:
1932 return -EINVAL;
1933 }
1934
1935 /* clock inversion */
1936 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1937 case SND_SOC_DAIFMT_IB_NF:
1938 format &= ~(TWL4030_VIF_FORMAT);
1939 break;
1940 case SND_SOC_DAIFMT_NB_IF:
1941 format |= TWL4030_VIF_FORMAT;
1942 break;
1943 default:
1944 return -EINVAL;
1945 }
1946
1947 if (format != old_format) {
1948 /* change format and set CODECPDZ */
1949 twl4030_codec_enable(codec, 0);
1950 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
1951 twl4030_codec_enable(codec, 1);
1952 }
1953
1954 return 0;
1955}
1956
Jarkko Nikulabbba9442008-11-12 17:05:41 +02001957#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07001958#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1959
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001960static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001961 .startup = twl4030_startup,
1962 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001963 .hw_params = twl4030_hw_params,
1964 .set_sysclk = twl4030_set_dai_sysclk,
1965 .set_fmt = twl4030_set_dai_fmt,
1966};
1967
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001968static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
1969 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001970 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001971 .hw_params = twl4030_voice_hw_params,
1972 .set_sysclk = twl4030_voice_set_dai_sysclk,
1973 .set_fmt = twl4030_voice_set_dai_fmt,
1974};
1975
1976struct snd_soc_dai twl4030_dai[] = {
1977{
Steve Sakomancc175572008-10-30 21:35:26 -07001978 .name = "twl4030",
1979 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001980 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07001981 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001982 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02001983 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07001984 .formats = TWL4030_FORMATS,},
1985 .capture = {
1986 .stream_name = "Capture",
1987 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001988 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07001989 .rates = TWL4030_RATES,
1990 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001991 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001992},
1993{
1994 .name = "twl4030 Voice",
1995 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001996 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001997 .channels_min = 1,
1998 .channels_max = 1,
1999 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2000 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2001 .capture = {
2002 .stream_name = "Capture",
2003 .channels_min = 1,
2004 .channels_max = 2,
2005 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2006 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2007 .ops = &twl4030_dai_voice_ops,
2008},
Steve Sakomancc175572008-10-30 21:35:26 -07002009};
2010EXPORT_SYMBOL_GPL(twl4030_dai);
2011
2012static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
2013{
2014 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002015 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002016
2017 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2018
2019 return 0;
2020}
2021
2022static int twl4030_resume(struct platform_device *pdev)
2023{
2024 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002025 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002026
2027 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2028 twl4030_set_bias_level(codec, codec->suspend_bias_level);
2029 return 0;
2030}
2031
2032/*
2033 * initialize the driver
2034 * register the mixer and dsp interfaces with the kernel
2035 */
2036
2037static int twl4030_init(struct snd_soc_device *socdev)
2038{
Mark Brown6627a652009-01-23 22:55:23 +00002039 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002040 struct twl4030_setup_data *setup = socdev->codec_data;
2041 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07002042 int ret = 0;
2043
2044 printk(KERN_INFO "TWL4030 Audio Codec init \n");
2045
2046 codec->name = "twl4030";
2047 codec->owner = THIS_MODULE;
2048 codec->read = twl4030_read_reg_cache;
2049 codec->write = twl4030_write;
2050 codec->set_bias_level = twl4030_set_bias_level;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002051 codec->dai = twl4030_dai;
2052 codec->num_dai = ARRAY_SIZE(twl4030_dai),
Steve Sakomancc175572008-10-30 21:35:26 -07002053 codec->reg_cache_size = sizeof(twl4030_reg);
2054 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2055 GFP_KERNEL);
2056 if (codec->reg_cache == NULL)
2057 return -ENOMEM;
2058
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002059 /* Configuration for headset ramp delay from setup data */
2060 if (setup) {
2061 unsigned char hs_pop;
2062
2063 if (setup->sysclk)
2064 twl4030->sysclk = setup->sysclk;
2065 else
2066 twl4030->sysclk = 26000;
2067
2068 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
2069 hs_pop &= ~TWL4030_RAMP_DELAY;
2070 hs_pop |= (setup->ramp_delay_value << 2);
2071 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
2072 } else {
2073 twl4030->sysclk = 26000;
2074 }
2075
Steve Sakomancc175572008-10-30 21:35:26 -07002076 /* register pcms */
2077 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2078 if (ret < 0) {
2079 printk(KERN_ERR "twl4030: failed to create pcms\n");
2080 goto pcm_err;
2081 }
2082
2083 twl4030_init_chip(codec);
2084
2085 /* power on device */
2086 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2087
Ian Molton3e8e1952009-01-09 00:23:21 +00002088 snd_soc_add_controls(codec, twl4030_snd_controls,
2089 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002090 twl4030_add_widgets(codec);
2091
Mark Brown968a6022008-11-28 11:49:07 +00002092 ret = snd_soc_init_card(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002093 if (ret < 0) {
2094 printk(KERN_ERR "twl4030: failed to register card\n");
2095 goto card_err;
2096 }
2097
2098 return ret;
2099
2100card_err:
2101 snd_soc_free_pcms(socdev);
2102 snd_soc_dapm_free(socdev);
2103pcm_err:
2104 kfree(codec->reg_cache);
2105 return ret;
2106}
2107
2108static struct snd_soc_device *twl4030_socdev;
2109
2110static int twl4030_probe(struct platform_device *pdev)
2111{
2112 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2113 struct snd_soc_codec *codec;
Peter Ujfalusi73939582009-01-29 14:57:50 +02002114 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002115
2116 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
2117 if (codec == NULL)
2118 return -ENOMEM;
2119
Peter Ujfalusi73939582009-01-29 14:57:50 +02002120 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2121 if (twl4030 == NULL) {
2122 kfree(codec);
2123 return -ENOMEM;
2124 }
2125
2126 codec->private_data = twl4030;
Mark Brown6627a652009-01-23 22:55:23 +00002127 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002128 mutex_init(&codec->mutex);
2129 INIT_LIST_HEAD(&codec->dapm_widgets);
2130 INIT_LIST_HEAD(&codec->dapm_paths);
2131
2132 twl4030_socdev = socdev;
2133 twl4030_init(socdev);
2134
2135 return 0;
2136}
2137
2138static int twl4030_remove(struct platform_device *pdev)
2139{
2140 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002141 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002142
2143 printk(KERN_INFO "TWL4030 Audio Codec remove\n");
Peter Ujfalusi73939582009-01-29 14:57:50 +02002144 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002145 snd_soc_free_pcms(socdev);
2146 snd_soc_dapm_free(socdev);
Peter Ujfalusi73939582009-01-29 14:57:50 +02002147 kfree(codec->private_data);
Steve Sakomancc175572008-10-30 21:35:26 -07002148 kfree(codec);
2149
2150 return 0;
2151}
2152
2153struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2154 .probe = twl4030_probe,
2155 .remove = twl4030_remove,
2156 .suspend = twl4030_suspend,
2157 .resume = twl4030_resume,
2158};
2159EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2160
Takashi Iwai24e07db2008-12-10 07:40:24 +01002161static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002162{
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002163 return snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
Mark Brown64089b82008-12-08 19:17:58 +00002164}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002165module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002166
2167static void __exit twl4030_exit(void)
2168{
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002169 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
Mark Brown64089b82008-12-08 19:17:58 +00002170}
2171module_exit(twl4030_exit);
2172
Steve Sakomancc175572008-10-30 21:35:26 -07002173MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2174MODULE_AUTHOR("Steve Sakoman");
2175MODULE_LICENSE("GPL");