Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 1 | /* |
Miquel Raynal | a9d58a1 | 2017-12-22 17:14:10 +0100 | [diff] [blame] | 2 | * Marvell EBU Armada SoCs thermal sensor driver |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2013 Marvell |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/of_device.h> |
| 25 | #include <linux/thermal.h> |
Miquel Raynal | 6416368 | 2017-12-22 17:14:12 +0100 | [diff] [blame] | 26 | #include <linux/iopoll.h> |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 27 | |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 28 | /* Thermal Manager Control and Status Register */ |
| 29 | #define PMU_TDC0_SW_RST_MASK (0x1 << 1) |
| 30 | #define PMU_TM_DISABLE_OFFS 0 |
| 31 | #define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS) |
| 32 | #define PMU_TDC0_REF_CAL_CNT_OFFS 11 |
| 33 | #define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS) |
| 34 | #define PMU_TDC0_OTF_CAL_MASK (0x1 << 30) |
| 35 | #define PMU_TDC0_START_CAL_MASK (0x1 << 25) |
| 36 | |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 37 | #define A375_UNIT_CONTROL_SHIFT 27 |
| 38 | #define A375_UNIT_CONTROL_MASK 0x7 |
| 39 | #define A375_READOUT_INVERT BIT(15) |
| 40 | #define A375_HW_RESETn BIT(8) |
| 41 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 42 | /* Legacy bindings */ |
| 43 | #define LEGACY_CONTROL_MEM_LEN 0x4 |
| 44 | |
| 45 | /* Current bindings with the 2 control registers under the same memory area */ |
| 46 | #define LEGACY_CONTROL1_OFFSET 0x0 |
| 47 | #define CONTROL0_OFFSET 0x0 |
| 48 | #define CONTROL1_OFFSET 0x4 |
| 49 | |
Miquel Raynal | 8c0b888 | 2017-12-22 17:14:11 +0100 | [diff] [blame] | 50 | /* Errata fields */ |
| 51 | #define CONTROL0_TSEN_TC_TRIM_MASK 0x7 |
| 52 | #define CONTROL0_TSEN_TC_TRIM_VAL 0x3 |
| 53 | |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 54 | #define CONTROL0_TSEN_START BIT(0) |
| 55 | #define CONTROL0_TSEN_RESET BIT(1) |
| 56 | #define CONTROL0_TSEN_ENABLE BIT(2) |
| 57 | |
Baruch Siach | ccf8f52 | 2017-12-22 17:14:09 +0100 | [diff] [blame] | 58 | #define CONTROL1_EXT_TSEN_SW_RESET BIT(7) |
| 59 | #define CONTROL1_EXT_TSEN_HW_RESETn BIT(8) |
| 60 | |
Miquel Raynal | 6416368 | 2017-12-22 17:14:12 +0100 | [diff] [blame] | 61 | #define STATUS_POLL_PERIOD_US 1000 |
| 62 | #define STATUS_POLL_TIMEOUT_US 100000 |
| 63 | |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 64 | struct armada_thermal_data; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 65 | |
| 66 | /* Marvell EBU Thermal Sensor Dev Structure */ |
| 67 | struct armada_thermal_priv { |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 68 | void __iomem *status; |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 69 | void __iomem *control0; |
| 70 | void __iomem *control1; |
Miquel Raynal | 8d98761 | 2018-07-16 16:41:44 +0200 | [diff] [blame] | 71 | char zone_name[THERMAL_NAME_LENGTH]; |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 72 | struct armada_thermal_data *data; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 73 | }; |
| 74 | |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 75 | struct armada_thermal_data { |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 76 | /* Initialize the thermal IC */ |
| 77 | void (*init)(struct platform_device *pdev, |
| 78 | struct armada_thermal_priv *priv); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 79 | |
| 80 | /* Test for a valid sensor value (optional) */ |
| 81 | bool (*is_valid)(struct armada_thermal_priv *); |
Ezequiel Garcia | 9484bc6 | 2014-05-06 13:59:46 -0300 | [diff] [blame] | 82 | |
Baruch Siach | 0cf3a1a | 2017-09-14 18:06:57 +0300 | [diff] [blame] | 83 | /* Formula coeficients: temp = (b - m * reg) / div */ |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 84 | s64 coef_b; |
| 85 | s64 coef_m; |
| 86 | u32 coef_div; |
Ezequiel Garcia | fd2c94d | 2014-05-06 13:59:49 -0300 | [diff] [blame] | 87 | bool inverted; |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 88 | bool signed_sample; |
Ezequiel Garcia | 1fcacca | 2014-05-06 13:59:47 -0300 | [diff] [blame] | 89 | |
| 90 | /* Register shift and mask to access the sensor temperature */ |
| 91 | unsigned int temp_shift; |
| 92 | unsigned int temp_mask; |
Miquel Raynal | 27d92f2 | 2017-12-22 17:14:05 +0100 | [diff] [blame] | 93 | u32 is_valid_bit; |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 94 | bool needs_control0; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 95 | }; |
| 96 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 97 | static void armadaxp_init(struct platform_device *pdev, |
| 98 | struct armada_thermal_priv *priv) |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 99 | { |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 100 | u32 reg; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 101 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 102 | reg = readl_relaxed(priv->control1); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 103 | reg |= PMU_TDC0_OTF_CAL_MASK; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 104 | |
| 105 | /* Reference calibration value */ |
| 106 | reg &= ~PMU_TDC0_REF_CAL_CNT_MASK; |
| 107 | reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 108 | |
| 109 | /* Reset the sensor */ |
Miquel Raynal | 931d3c5 | 2018-07-16 16:41:45 +0200 | [diff] [blame] | 110 | reg |= PMU_TDC0_SW_RST_MASK; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 111 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 112 | writel(reg, priv->control1); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 113 | |
| 114 | /* Enable the sensor */ |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 115 | reg = readl_relaxed(priv->status); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 116 | reg &= ~PMU_TM_DISABLE_MASK; |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 117 | writel(reg, priv->status); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 118 | } |
| 119 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 120 | static void armada370_init(struct platform_device *pdev, |
| 121 | struct armada_thermal_priv *priv) |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 122 | { |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 123 | u32 reg; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 124 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 125 | reg = readl_relaxed(priv->control1); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 126 | reg |= PMU_TDC0_OTF_CAL_MASK; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 127 | |
| 128 | /* Reference calibration value */ |
| 129 | reg &= ~PMU_TDC0_REF_CAL_CNT_MASK; |
| 130 | reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 131 | |
| 132 | reg &= ~PMU_TDC0_START_CAL_MASK; |
Miquel Raynal | 931d3c5 | 2018-07-16 16:41:45 +0200 | [diff] [blame] | 133 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 134 | writel(reg, priv->control1); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 135 | |
Baruch Siach | 7f3be01 | 2017-12-22 17:14:04 +0100 | [diff] [blame] | 136 | msleep(10); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 137 | } |
| 138 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 139 | static void armada375_init(struct platform_device *pdev, |
| 140 | struct armada_thermal_priv *priv) |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 141 | { |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 142 | u32 reg; |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 143 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 144 | reg = readl(priv->control1); |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 145 | reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT); |
| 146 | reg &= ~A375_READOUT_INVERT; |
| 147 | reg &= ~A375_HW_RESETn; |
| 148 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 149 | writel(reg, priv->control1); |
Baruch Siach | 7f3be01 | 2017-12-22 17:14:04 +0100 | [diff] [blame] | 150 | msleep(20); |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 151 | |
| 152 | reg |= A375_HW_RESETn; |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 153 | writel(reg, priv->control1); |
Baruch Siach | 7f3be01 | 2017-12-22 17:14:04 +0100 | [diff] [blame] | 154 | msleep(50); |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 155 | } |
| 156 | |
Miquel Raynal | 6416368 | 2017-12-22 17:14:12 +0100 | [diff] [blame] | 157 | static void armada_wait_sensor_validity(struct armada_thermal_priv *priv) |
| 158 | { |
| 159 | u32 reg; |
| 160 | |
| 161 | readl_relaxed_poll_timeout(priv->status, reg, |
| 162 | reg & priv->data->is_valid_bit, |
| 163 | STATUS_POLL_PERIOD_US, |
| 164 | STATUS_POLL_TIMEOUT_US); |
| 165 | } |
| 166 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 167 | static void armada380_init(struct platform_device *pdev, |
| 168 | struct armada_thermal_priv *priv) |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 169 | { |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 170 | u32 reg = readl_relaxed(priv->control1); |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 171 | |
Baruch Siach | ccf8f52 | 2017-12-22 17:14:09 +0100 | [diff] [blame] | 172 | /* Disable the HW/SW reset */ |
| 173 | reg |= CONTROL1_EXT_TSEN_HW_RESETn; |
| 174 | reg &= ~CONTROL1_EXT_TSEN_SW_RESET; |
| 175 | writel(reg, priv->control1); |
Miquel Raynal | 8c0b888 | 2017-12-22 17:14:11 +0100 | [diff] [blame] | 176 | |
| 177 | /* Set Tsen Tc Trim to correct default value (errata #132698) */ |
| 178 | if (priv->control0) { |
| 179 | reg = readl_relaxed(priv->control0); |
| 180 | reg &= ~CONTROL0_TSEN_TC_TRIM_MASK; |
| 181 | reg |= CONTROL0_TSEN_TC_TRIM_VAL; |
| 182 | writel(reg, priv->control0); |
Miquel Raynal | 8c0b888 | 2017-12-22 17:14:11 +0100 | [diff] [blame] | 183 | } |
Miquel Raynal | 6416368 | 2017-12-22 17:14:12 +0100 | [diff] [blame] | 184 | |
| 185 | /* Wait the sensors to be valid or the core will warn the user */ |
| 186 | armada_wait_sensor_validity(priv); |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 187 | } |
| 188 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 189 | static void armada_ap806_init(struct platform_device *pdev, |
| 190 | struct armada_thermal_priv *priv) |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 191 | { |
| 192 | u32 reg; |
| 193 | |
| 194 | reg = readl_relaxed(priv->control0); |
| 195 | reg &= ~CONTROL0_TSEN_RESET; |
| 196 | reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE; |
| 197 | writel(reg, priv->control0); |
Miquel Raynal | 6416368 | 2017-12-22 17:14:12 +0100 | [diff] [blame] | 198 | |
| 199 | /* Wait the sensors to be valid or the core will warn the user */ |
| 200 | armada_wait_sensor_validity(priv); |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 201 | } |
| 202 | |
Miquel Raynal | 5b5e17a | 2018-07-16 16:41:48 +0200 | [diff] [blame^] | 203 | static void armada_cp110_init(struct platform_device *pdev, |
| 204 | struct armada_thermal_priv *priv) |
| 205 | { |
| 206 | armada380_init(pdev, priv); |
| 207 | } |
| 208 | |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 209 | static bool armada_is_valid(struct armada_thermal_priv *priv) |
| 210 | { |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 211 | u32 reg = readl_relaxed(priv->status); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 212 | |
Miquel Raynal | 27d92f2 | 2017-12-22 17:14:05 +0100 | [diff] [blame] | 213 | return reg & priv->data->is_valid_bit; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | static int armada_get_temp(struct thermal_zone_device *thermal, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 217 | int *temp) |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 218 | { |
| 219 | struct armada_thermal_priv *priv = thermal->devdata; |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 220 | u32 reg, div; |
| 221 | s64 sample, b, m; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 222 | |
| 223 | /* Valid check */ |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 224 | if (priv->data->is_valid && !priv->data->is_valid(priv)) { |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 225 | dev_err(&thermal->device, |
| 226 | "Temperature sensor reading not valid\n"); |
| 227 | return -EIO; |
| 228 | } |
| 229 | |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 230 | reg = readl_relaxed(priv->status); |
Ezequiel Garcia | 1fcacca | 2014-05-06 13:59:47 -0300 | [diff] [blame] | 231 | reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask; |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 232 | if (priv->data->signed_sample) |
| 233 | /* The most significant bit is the sign bit */ |
| 234 | sample = sign_extend32(reg, fls(priv->data->temp_mask) - 1); |
| 235 | else |
| 236 | sample = reg; |
Ezequiel Garcia | 9484bc6 | 2014-05-06 13:59:46 -0300 | [diff] [blame] | 237 | |
| 238 | /* Get formula coeficients */ |
| 239 | b = priv->data->coef_b; |
| 240 | m = priv->data->coef_m; |
| 241 | div = priv->data->coef_div; |
| 242 | |
Ezequiel Garcia | fd2c94d | 2014-05-06 13:59:49 -0300 | [diff] [blame] | 243 | if (priv->data->inverted) |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 244 | *temp = div_s64((m * sample) - b, div); |
Ezequiel Garcia | fd2c94d | 2014-05-06 13:59:49 -0300 | [diff] [blame] | 245 | else |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 246 | *temp = div_s64(b - (m * sample), div); |
| 247 | |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 248 | return 0; |
| 249 | } |
| 250 | |
| 251 | static struct thermal_zone_device_ops ops = { |
| 252 | .get_temp = armada_get_temp, |
| 253 | }; |
| 254 | |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 255 | static const struct armada_thermal_data armadaxp_data = { |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 256 | .init = armadaxp_init, |
Ezequiel Garcia | 1fcacca | 2014-05-06 13:59:47 -0300 | [diff] [blame] | 257 | .temp_shift = 10, |
| 258 | .temp_mask = 0x1ff, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 259 | .coef_b = 3153000000ULL, |
| 260 | .coef_m = 10000000ULL, |
Ezequiel Garcia | 9484bc6 | 2014-05-06 13:59:46 -0300 | [diff] [blame] | 261 | .coef_div = 13825, |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 262 | }; |
| 263 | |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 264 | static const struct armada_thermal_data armada370_data = { |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 265 | .is_valid = armada_is_valid, |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 266 | .init = armada370_init, |
Miquel Raynal | 27d92f2 | 2017-12-22 17:14:05 +0100 | [diff] [blame] | 267 | .is_valid_bit = BIT(9), |
Ezequiel Garcia | 1fcacca | 2014-05-06 13:59:47 -0300 | [diff] [blame] | 268 | .temp_shift = 10, |
| 269 | .temp_mask = 0x1ff, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 270 | .coef_b = 3153000000ULL, |
| 271 | .coef_m = 10000000ULL, |
Ezequiel Garcia | 9484bc6 | 2014-05-06 13:59:46 -0300 | [diff] [blame] | 272 | .coef_div = 13825, |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 273 | }; |
| 274 | |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 275 | static const struct armada_thermal_data armada375_data = { |
| 276 | .is_valid = armada_is_valid, |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 277 | .init = armada375_init, |
Miquel Raynal | 27d92f2 | 2017-12-22 17:14:05 +0100 | [diff] [blame] | 278 | .is_valid_bit = BIT(10), |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 279 | .temp_shift = 0, |
| 280 | .temp_mask = 0x1ff, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 281 | .coef_b = 3171900000ULL, |
| 282 | .coef_m = 10000000ULL, |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 283 | .coef_div = 13616, |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 284 | .needs_control0 = true, |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 285 | }; |
| 286 | |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 287 | static const struct armada_thermal_data armada380_data = { |
| 288 | .is_valid = armada_is_valid, |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 289 | .init = armada380_init, |
Miquel Raynal | 27d92f2 | 2017-12-22 17:14:05 +0100 | [diff] [blame] | 290 | .is_valid_bit = BIT(10), |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 291 | .temp_shift = 0, |
| 292 | .temp_mask = 0x3ff, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 293 | .coef_b = 1172499100ULL, |
| 294 | .coef_m = 2000096ULL, |
Nadav Haklai | b56100d | 2015-08-06 18:03:49 +0200 | [diff] [blame] | 295 | .coef_div = 4201, |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 296 | .inverted = true, |
| 297 | }; |
| 298 | |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 299 | static const struct armada_thermal_data armada_ap806_data = { |
| 300 | .is_valid = armada_is_valid, |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 301 | .init = armada_ap806_init, |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 302 | .is_valid_bit = BIT(16), |
| 303 | .temp_shift = 0, |
| 304 | .temp_mask = 0x3ff, |
| 305 | .coef_b = -150000LL, |
| 306 | .coef_m = 423ULL, |
| 307 | .coef_div = 1, |
| 308 | .inverted = true, |
| 309 | .signed_sample = true, |
| 310 | .needs_control0 = true, |
| 311 | }; |
| 312 | |
Baruch Siach | ccf8f52 | 2017-12-22 17:14:09 +0100 | [diff] [blame] | 313 | static const struct armada_thermal_data armada_cp110_data = { |
| 314 | .is_valid = armada_is_valid, |
Miquel Raynal | 5b5e17a | 2018-07-16 16:41:48 +0200 | [diff] [blame^] | 315 | .init = armada_cp110_init, |
Baruch Siach | ccf8f52 | 2017-12-22 17:14:09 +0100 | [diff] [blame] | 316 | .is_valid_bit = BIT(10), |
| 317 | .temp_shift = 0, |
| 318 | .temp_mask = 0x3ff, |
| 319 | .coef_b = 1172499100ULL, |
| 320 | .coef_m = 2000096ULL, |
| 321 | .coef_div = 4201, |
| 322 | .inverted = true, |
| 323 | .needs_control0 = true, |
| 324 | }; |
| 325 | |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 326 | static const struct of_device_id armada_thermal_id_table[] = { |
| 327 | { |
| 328 | .compatible = "marvell,armadaxp-thermal", |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 329 | .data = &armadaxp_data, |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 330 | }, |
| 331 | { |
| 332 | .compatible = "marvell,armada370-thermal", |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 333 | .data = &armada370_data, |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 334 | }, |
| 335 | { |
Ezequiel Garcia | e2d5f05 | 2014-05-06 13:59:50 -0300 | [diff] [blame] | 336 | .compatible = "marvell,armada375-thermal", |
| 337 | .data = &armada375_data, |
| 338 | }, |
| 339 | { |
Ezequiel Garcia | e6e0a68 | 2014-05-06 13:59:51 -0300 | [diff] [blame] | 340 | .compatible = "marvell,armada380-thermal", |
| 341 | .data = &armada380_data, |
| 342 | }, |
| 343 | { |
Baruch Siach | 2ff1279 | 2017-12-22 17:14:08 +0100 | [diff] [blame] | 344 | .compatible = "marvell,armada-ap806-thermal", |
| 345 | .data = &armada_ap806_data, |
| 346 | }, |
| 347 | { |
Baruch Siach | ccf8f52 | 2017-12-22 17:14:09 +0100 | [diff] [blame] | 348 | .compatible = "marvell,armada-cp110-thermal", |
| 349 | .data = &armada_cp110_data, |
| 350 | }, |
| 351 | { |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 352 | /* sentinel */ |
| 353 | }, |
| 354 | }; |
| 355 | MODULE_DEVICE_TABLE(of, armada_thermal_id_table); |
| 356 | |
Miquel Raynal | 8d98761 | 2018-07-16 16:41:44 +0200 | [diff] [blame] | 357 | static void armada_set_sane_name(struct platform_device *pdev, |
| 358 | struct armada_thermal_priv *priv) |
| 359 | { |
| 360 | const char *name = dev_name(&pdev->dev); |
| 361 | char *insane_char; |
| 362 | |
| 363 | if (strlen(name) > THERMAL_NAME_LENGTH) { |
| 364 | /* |
| 365 | * When inside a system controller, the device name has the |
| 366 | * form: f06f8000.system-controller:ap-thermal so stripping |
| 367 | * after the ':' should give us a shorter but meaningful name. |
| 368 | */ |
| 369 | name = strrchr(name, ':'); |
| 370 | if (!name) |
| 371 | name = "armada_thermal"; |
| 372 | else |
| 373 | name++; |
| 374 | } |
| 375 | |
| 376 | /* Save the name locally */ |
| 377 | strncpy(priv->zone_name, name, THERMAL_NAME_LENGTH - 1); |
| 378 | priv->zone_name[THERMAL_NAME_LENGTH - 1] = '\0'; |
| 379 | |
| 380 | /* Then check there are no '-' or hwmon core will complain */ |
| 381 | do { |
| 382 | insane_char = strpbrk(priv->zone_name, "-"); |
| 383 | if (insane_char) |
| 384 | *insane_char = '_'; |
| 385 | } while (insane_char); |
| 386 | } |
| 387 | |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 388 | static int armada_thermal_probe(struct platform_device *pdev) |
| 389 | { |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 390 | void __iomem *control = NULL; |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 391 | struct thermal_zone_device *thermal; |
| 392 | const struct of_device_id *match; |
| 393 | struct armada_thermal_priv *priv; |
| 394 | struct resource *res; |
| 395 | |
| 396 | match = of_match_device(armada_thermal_id_table, &pdev->dev); |
| 397 | if (!match) |
| 398 | return -ENODEV; |
| 399 | |
| 400 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
| 401 | if (!priv) |
| 402 | return -ENOMEM; |
| 403 | |
| 404 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Miquel Raynal | 8371b8a | 2017-12-22 17:14:07 +0100 | [diff] [blame] | 405 | priv->status = devm_ioremap_resource(&pdev->dev, res); |
| 406 | if (IS_ERR(priv->status)) |
| 407 | return PTR_ERR(priv->status); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 408 | |
| 409 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 410 | control = devm_ioremap_resource(&pdev->dev, res); |
| 411 | if (IS_ERR(control)) |
| 412 | return PTR_ERR(control); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 413 | |
Ezequiel Garcia | 66fdb7b | 2014-05-06 13:59:45 -0300 | [diff] [blame] | 414 | priv->data = (struct armada_thermal_data *)match->data; |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 415 | |
Miquel Raynal | 8d98761 | 2018-07-16 16:41:44 +0200 | [diff] [blame] | 416 | /* Ensure device name is correct for the thermal core */ |
| 417 | armada_set_sane_name(pdev, priv); |
| 418 | |
Miquel Raynal | 2f28e4c | 2017-12-22 17:14:06 +0100 | [diff] [blame] | 419 | /* |
| 420 | * Legacy DT bindings only described "control1" register (also referred |
| 421 | * as "control MSB" on old documentation). New bindings cover |
| 422 | * "control0/control LSB" and "control1/control MSB" registers within |
| 423 | * the same resource, which is then of size 8 instead of 4. |
| 424 | */ |
| 425 | if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) { |
| 426 | /* ->control0 unavailable in this configuration */ |
| 427 | if (priv->data->needs_control0) { |
| 428 | dev_err(&pdev->dev, "No access to control0 register\n"); |
| 429 | return -EINVAL; |
| 430 | } |
| 431 | |
| 432 | priv->control1 = control + LEGACY_CONTROL1_OFFSET; |
| 433 | } else { |
| 434 | priv->control0 = control + CONTROL0_OFFSET; |
| 435 | priv->control1 = control + CONTROL1_OFFSET; |
| 436 | } |
| 437 | |
Miquel Raynal | 8b4c271 | 2018-07-16 16:41:47 +0200 | [diff] [blame] | 438 | priv->data->init(pdev, priv); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 439 | |
Miquel Raynal | 8d98761 | 2018-07-16 16:41:44 +0200 | [diff] [blame] | 440 | thermal = thermal_zone_device_register(priv->zone_name, 0, 0, priv, |
Miquel Raynal | f80ee03 | 2017-12-22 17:14:13 +0100 | [diff] [blame] | 441 | &ops, NULL, 0, 0); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 442 | if (IS_ERR(thermal)) { |
| 443 | dev_err(&pdev->dev, |
| 444 | "Failed to register thermal zone device\n"); |
| 445 | return PTR_ERR(thermal); |
| 446 | } |
| 447 | |
| 448 | platform_set_drvdata(pdev, thermal); |
| 449 | |
| 450 | return 0; |
| 451 | } |
| 452 | |
| 453 | static int armada_thermal_exit(struct platform_device *pdev) |
| 454 | { |
| 455 | struct thermal_zone_device *armada_thermal = |
| 456 | platform_get_drvdata(pdev); |
| 457 | |
| 458 | thermal_zone_device_unregister(armada_thermal); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 459 | |
| 460 | return 0; |
| 461 | } |
| 462 | |
| 463 | static struct platform_driver armada_thermal_driver = { |
| 464 | .probe = armada_thermal_probe, |
| 465 | .remove = armada_thermal_exit, |
| 466 | .driver = { |
| 467 | .name = "armada_thermal", |
Sachin Kamat | 1d089e0 | 2013-05-16 10:28:08 +0000 | [diff] [blame] | 468 | .of_match_table = armada_thermal_id_table, |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 469 | }, |
| 470 | }; |
| 471 | |
| 472 | module_platform_driver(armada_thermal_driver); |
| 473 | |
| 474 | MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>"); |
Miquel Raynal | a9d58a1 | 2017-12-22 17:14:10 +0100 | [diff] [blame] | 475 | MODULE_DESCRIPTION("Marvell EBU Armada SoCs thermal driver"); |
Ezequiel Garcia | fa0d654 | 2013-04-02 01:37:41 +0000 | [diff] [blame] | 476 | MODULE_LICENSE("GPL v2"); |