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Alexander Duyckb3890e32014-09-20 19:46:05 -04001/* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2014 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_H_
22#define _FM10K_H_
23
24#include <linux/types.h>
25#include <linux/etherdevice.h>
26#include <linux/rtnetlink.h>
27#include <linux/if_vlan.h>
28#include <linux/pci.h>
29
Alexander Duyck0e7b3642014-09-20 19:48:10 -040030#include "fm10k_pf.h"
31
32#define FM10K_MAX_JUMBO_FRAME_SIZE 15358 /* Maximum supported size 15K */
33
Alexander Duycke27ef592014-09-20 19:49:03 -040034#define MAX_QUEUES FM10K_MAX_QUEUES_PF
35
36#define FM10K_MIN_RXD 128
37#define FM10K_MAX_RXD 4096
38#define FM10K_DEFAULT_RXD 256
39
40#define FM10K_MIN_TXD 128
41#define FM10K_MAX_TXD 4096
42#define FM10K_DEFAULT_TXD 256
43#define FM10K_DEFAULT_TX_WORK 256
44
45#define FM10K_RXBUFFER_256 256
46#define FM10K_RXBUFFER_16384 16384
47#define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
48#if PAGE_SIZE <= FM10K_RXBUFFER_16384
49#define FM10K_RX_BUFSZ (PAGE_SIZE / 2)
50#else
51#define FM10K_RX_BUFSZ FM10K_RXBUFFER_16384
52#endif
53
54/* How many Rx Buffers do we bundle into one write to the hardware ? */
55#define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
56
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -040057#define FM10K_MAX_STATIONS 63
58struct fm10k_l2_accel {
59 int size;
60 u16 count;
61 u16 dglort;
62 struct rcu_head rcu;
63 struct net_device *macvlan[0];
64};
65
Alexander Duycke27ef592014-09-20 19:49:03 -040066enum fm10k_ring_state_t {
67 __FM10K_TX_DETECT_HANG,
68 __FM10K_HANG_CHECK_ARMED,
69};
70
71#define check_for_tx_hang(ring) \
72 test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
73#define set_check_for_tx_hang(ring) \
74 set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
75#define clear_check_for_tx_hang(ring) \
76 clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
77
78struct fm10k_tx_buffer {
79 struct fm10k_tx_desc *next_to_watch;
80 struct sk_buff *skb;
81 unsigned int bytecount;
82 u16 gso_segs;
83 u16 tx_flags;
84 DEFINE_DMA_UNMAP_ADDR(dma);
85 DEFINE_DMA_UNMAP_LEN(len);
86};
87
88struct fm10k_rx_buffer {
89 dma_addr_t dma;
90 struct page *page;
91 u32 page_offset;
92};
93
94struct fm10k_queue_stats {
95 u64 packets;
96 u64 bytes;
97};
98
99struct fm10k_tx_queue_stats {
100 u64 restart_queue;
101 u64 csum_err;
102 u64 tx_busy;
103 u64 tx_done_old;
104};
105
106struct fm10k_rx_queue_stats {
107 u64 alloc_failed;
108 u64 csum_err;
109 u64 errors;
110};
111
112struct fm10k_ring {
113 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
114 struct net_device *netdev; /* netdev ring belongs to */
115 struct device *dev; /* device for DMA mapping */
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400116 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */
Alexander Duycke27ef592014-09-20 19:49:03 -0400117 void *desc; /* descriptor ring memory */
118 union {
119 struct fm10k_tx_buffer *tx_buffer;
120 struct fm10k_rx_buffer *rx_buffer;
121 };
122 u32 __iomem *tail;
123 unsigned long state;
124 dma_addr_t dma; /* phys. address of descriptor ring */
125 unsigned int size; /* length in bytes */
126
127 u8 queue_index; /* needed for queue management */
128 u8 reg_idx; /* holds the special value that gets
129 * the hardware register offset
130 * associated with this ring, which is
131 * different for DCB and RSS modes
132 */
133 u8 qos_pc; /* priority class of queue */
134 u16 vid; /* default vlan ID of queue */
135 u16 count; /* amount of descriptors */
136
137 u16 next_to_alloc;
138 u16 next_to_use;
139 u16 next_to_clean;
140
141 struct fm10k_queue_stats stats;
142 struct u64_stats_sync syncp;
143 union {
144 /* Tx */
145 struct fm10k_tx_queue_stats tx_stats;
146 /* Rx */
147 struct {
148 struct fm10k_rx_queue_stats rx_stats;
149 struct sk_buff *skb;
150 };
151 };
152} ____cacheline_internodealigned_in_smp;
153
Alexander Duyck18283ca2014-09-20 19:48:51 -0400154struct fm10k_ring_container {
Alexander Duycke27ef592014-09-20 19:49:03 -0400155 struct fm10k_ring *ring; /* pointer to linked list of rings */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400156 unsigned int total_bytes; /* total bytes processed this int */
157 unsigned int total_packets; /* total packets processed this int */
158 u16 work_limit; /* total work allowed per interrupt */
159 u16 itr; /* interrupt throttle rate value */
160 u8 count; /* total number of rings in vector */
161};
162
163#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
164#define FM10K_ITR_10K 100 /* 100us */
165#define FM10K_ITR_20K 50 /* 50us */
166#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
167
168#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
169
Alexander Duycke27ef592014-09-20 19:49:03 -0400170static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
171{
172 return &ring->netdev->_tx[ring->queue_index];
173}
174
175/* iterator for handling rings in ring container */
176#define fm10k_for_each_ring(pos, head) \
177 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
178
Alexander Duyck18283ca2014-09-20 19:48:51 -0400179#define MAX_Q_VECTORS 256
180#define MIN_Q_VECTORS 1
181enum fm10k_non_q_vectors {
182 FM10K_MBX_VECTOR,
183 NON_Q_VECTORS_PF
184};
185
186#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
187 NON_Q_VECTORS_PF : \
188 0)
189#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
190
191struct fm10k_q_vector {
192 struct fm10k_intfc *interface;
193 u32 __iomem *itr; /* pointer to ITR register for this vector */
194 u16 v_idx; /* index of q_vector within interface array */
195 struct fm10k_ring_container rx, tx;
196
197 struct napi_struct napi;
198 char name[IFNAMSIZ + 9];
199
200 struct rcu_head rcu; /* to avoid race with update stats on free */
Alexander Duycke27ef592014-09-20 19:49:03 -0400201
202 /* for dynamic allocation of rings associated with this q_vector */
203 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400204};
205
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400206enum fm10k_ring_f_enum {
207 RING_F_RSS,
208 RING_F_QOS,
209 RING_F_ARRAY_SIZE /* must be last in enum set */
210};
211
212struct fm10k_ring_feature {
213 u16 limit; /* upper limit on feature indices */
214 u16 indices; /* current value of indices */
215 u16 mask; /* Mask used for feature to ring mapping */
216 u16 offset; /* offset to start of feature */
217};
218
219#define fm10k_vxlan_port_for_each(vp, intfc) \
220 list_for_each_entry(vp, &(intfc)->vxlan_port, list)
221struct fm10k_vxlan_port {
222 struct list_head list;
223 sa_family_t sa_family;
224 __be16 port;
225};
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400226
227struct fm10k_intfc {
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400228 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
229 struct net_device *netdev;
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400230 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400231 struct pci_dev *pdev;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400232 unsigned long state;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400233
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400234 u32 flags;
235#define FM10K_FLAG_RESET_REQUESTED (u32)(1 << 0)
236#define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(1 << 1)
237#define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(1 << 2)
238#define FM10K_FLAG_RX_TS_ENABLED (u32)(1 << 3)
239#define FM10K_FLAG_SWPRI_CONFIG (u32)(1 << 4)
240 int xcast_mode;
241
Alexander Duyck18283ca2014-09-20 19:48:51 -0400242 /* Tx fast path data */
243 int num_tx_queues;
244 u16 tx_itr;
245
246 /* Rx fast path data */
247 int num_rx_queues;
248 u16 rx_itr;
249
Alexander Duycke27ef592014-09-20 19:49:03 -0400250 /* TX */
251 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
252
Alexander Duyckb7d85142014-09-20 19:49:25 -0400253 u64 restart_queue;
254 u64 tx_busy;
255 u64 tx_csum_errors;
256 u64 alloc_failed;
257 u64 rx_csum_errors;
258 u64 rx_errors;
259
260 u64 tx_bytes_nic;
261 u64 tx_packets_nic;
262 u64 rx_bytes_nic;
263 u64 rx_packets_nic;
264 u64 rx_drops_nic;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400265 u64 rx_overrun_pf;
266 u64 rx_overrun_vf;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400267 u32 tx_timeout_count;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400268
Alexander Duycke27ef592014-09-20 19:49:03 -0400269 /* RX */
270 struct fm10k_ring *rx_ring[MAX_QUEUES];
271
Alexander Duyck18283ca2014-09-20 19:48:51 -0400272 /* Queueing vectors */
273 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
274 struct msix_entry *msix_entries;
275 int num_q_vectors; /* current number of q_vectors for device */
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400276 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
277
278 struct fm10k_hw_stats stats;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400279 struct fm10k_hw hw;
280 u32 __iomem *uc_addr;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400281 u16 msg_enable;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400282 u16 tx_ring_count;
283 u16 rx_ring_count;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400284 struct timer_list service_timer;
285 struct work_struct service_task;
286 unsigned long next_stats_update;
287 unsigned long next_tx_hang_check;
288 unsigned long last_reset;
289 unsigned long link_down_event;
290 bool host_ready;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400291
292 u32 reta[FM10K_RETA_SIZE];
293 u32 rssrk[FM10K_RSSRK_SIZE];
294
295 /* VXLAN port tracking information */
296 struct list_head vxlan_port;
297
298#if defined(HAVE_DCBNL_IEEE) && defined(CONFIG_DCB)
299 u8 pfc_en;
300#endif
301 u8 rx_pause;
302
303 /* GLORT resources in use by PF */
304 u16 glort;
305 u16 glort_count;
306
307 /* VLAN ID for updating multicast/unicast lists */
308 u16 vid;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400309};
Alexander Duyckb3890e32014-09-20 19:46:05 -0400310
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400311enum fm10k_state_t {
312 __FM10K_RESETTING,
313 __FM10K_DOWN,
Alexander Duyckb7d85142014-09-20 19:49:25 -0400314 __FM10K_SERVICE_SCHED,
315 __FM10K_SERVICE_DISABLE,
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400316 __FM10K_MBX_LOCK,
317 __FM10K_LINK_DOWN,
318};
319
320static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
321{
322 /* busy loop if we cannot obtain the lock as some calls
323 * such as ndo_set_rx_mode may be made in atomic context
324 */
325 while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
326 udelay(20);
327}
328
329static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
330{
331 /* flush memory to make sure state is correct */
332 smp_mb__before_atomic();
333 clear_bit(__FM10K_MBX_LOCK, &interface->state);
334}
335
336static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
337{
338 return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
339}
340
Alexander Duycke27ef592014-09-20 19:49:03 -0400341/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
342static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
343 const u32 stat_err_bits)
344{
345 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
346}
347
348/* fm10k_desc_unused - calculate if we have unused descriptors */
349static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
350{
351 s16 unused = ring->next_to_clean - ring->next_to_use - 1;
352
353 return likely(unused < 0) ? unused + ring->count : unused;
354}
355
356#define FM10K_TX_DESC(R, i) \
357 (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
358#define FM10K_RX_DESC(R, i) \
359 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
360
361#define FM10K_MAX_TXD_PWR 14
362#define FM10K_MAX_DATA_PER_TXD (1 << FM10K_MAX_TXD_PWR)
363
364/* Tx Descriptors needed, worst case */
365#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
366#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
367
368enum fm10k_tx_flags {
369 /* Tx offload flags */
370 FM10K_TX_FLAGS_CSUM = 0x01,
371};
372
373/* This structure is stored as little endian values as that is the native
374 * format of the Rx descriptor. The ordering of these fields is reversed
375 * from the actual ftag header to allow for a single bswap to take care
376 * of placing all of the values in network order
377 */
378union fm10k_ftag_info {
379 __le64 ftag;
380 struct {
381 /* dglort and sglort combined into a single 32bit desc read */
382 __le32 glort;
383 /* upper 16 bits of vlan are reserved 0 for swpri_type_user */
384 __le32 vlan;
385 } d;
386 struct {
387 __le16 dglort;
388 __le16 sglort;
389 __le16 vlan;
390 __le16 swpri_type_user;
391 } w;
392};
393
394struct fm10k_cb {
395 union fm10k_ftag_info fi;
396};
397
398#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
399
Alexander Duyckb3890e32014-09-20 19:46:05 -0400400/* main */
401extern char fm10k_driver_name[];
402extern const char fm10k_driver_version[];
Alexander Duyck18283ca2014-09-20 19:48:51 -0400403int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
404void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
Alexander Duyckb101c962014-09-20 19:50:03 -0400405netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
406 struct fm10k_ring *tx_ring);
407void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
408bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
409void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400410
411/* PCI */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400412void fm10k_mbx_free_irq(struct fm10k_intfc *);
413int fm10k_mbx_request_irq(struct fm10k_intfc *);
414void fm10k_qv_free_irq(struct fm10k_intfc *interface);
415int fm10k_qv_request_irq(struct fm10k_intfc *interface);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400416int fm10k_register_pci_driver(void);
417void fm10k_unregister_pci_driver(void);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400418void fm10k_up(struct fm10k_intfc *interface);
419void fm10k_down(struct fm10k_intfc *interface);
Alexander Duyckb7d85142014-09-20 19:49:25 -0400420void fm10k_update_stats(struct fm10k_intfc *interface);
421void fm10k_service_event_schedule(struct fm10k_intfc *interface);
422void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400423
424/* Netdev */
425struct net_device *fm10k_alloc_netdev(void);
Alexander Duyck3abaae42014-09-20 19:49:43 -0400426int fm10k_setup_rx_resources(struct fm10k_ring *);
427int fm10k_setup_tx_resources(struct fm10k_ring *);
428void fm10k_free_rx_resources(struct fm10k_ring *);
429void fm10k_free_tx_resources(struct fm10k_ring *);
430void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
431void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
432void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
433 struct fm10k_tx_buffer *);
Alexander Duyck8f5e20d2014-09-20 19:48:20 -0400434void fm10k_restore_rx_state(struct fm10k_intfc *);
435void fm10k_reset_rx_state(struct fm10k_intfc *);
Alexander Duyckaa3ac822014-09-20 19:50:42 -0400436int fm10k_setup_tc(struct net_device *dev, u8 tc);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400437int fm10k_open(struct net_device *netdev);
438int fm10k_close(struct net_device *netdev);
Alexander Duyck82dd0f72014-09-20 19:50:15 -0400439
440/* Ethtool */
441void fm10k_set_ethtool_ops(struct net_device *dev);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400442#endif /* _FM10K_H_ */