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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Waiman Longd73a3392015-04-24 14:56:31 -04002#ifndef _ASM_X86_QSPINLOCK_H
3#define _ASM_X86_QSPINLOCK_H
4
Juergen Gross90434422017-09-06 19:36:24 +02005#include <linux/jump_label.h>
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -04006#include <asm/cpufeature.h>
Waiman Longd73a3392015-04-24 14:56:31 -04007#include <asm-generic/qspinlock_types.h>
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -04008#include <asm/paravirt.h>
Waiman Longd73a3392015-04-24 14:56:31 -04009
10#define queued_spin_unlock queued_spin_unlock
11/**
12 * queued_spin_unlock - release a queued spinlock
13 * @lock : Pointer to queued spinlock structure
14 *
15 * A smp_store_release() on the least-significant byte.
16 */
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040017static inline void native_queued_spin_unlock(struct qspinlock *lock)
Waiman Longd73a3392015-04-24 14:56:31 -040018{
Will Deacon625e88b2018-04-26 11:34:16 +010019 smp_store_release(&lock->locked, 0);
Waiman Longd73a3392015-04-24 14:56:31 -040020}
21
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040022#ifdef CONFIG_PARAVIRT_SPINLOCKS
23extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
24extern void __pv_init_lock_hash(void);
25extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
26extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
27
28static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
29{
30 pv_queued_spin_lock_slowpath(lock, val);
31}
32
33static inline void queued_spin_unlock(struct qspinlock *lock)
34{
35 pv_queued_spin_unlock(lock);
36}
Peter Zijlstra3cded412016-11-15 16:47:06 +010037
38#define vcpu_is_preempted vcpu_is_preempted
Waiman Long6c629852017-02-20 13:36:03 -050039static inline bool vcpu_is_preempted(long cpu)
Peter Zijlstra3cded412016-11-15 16:47:06 +010040{
41 return pv_vcpu_is_preempted(cpu);
42}
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040043#else
44static inline void queued_spin_unlock(struct qspinlock *lock)
45{
46 native_queued_spin_unlock(lock);
47}
48#endif
49
Peter Zijlstraa6b27782015-09-05 16:55:05 +020050#ifdef CONFIG_PARAVIRT
Juergen Gross90434422017-09-06 19:36:24 +020051DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key);
52
53void native_pv_lock_init(void) __init;
54
Peter Zijlstra43b3f022015-09-04 17:25:23 +020055#define virt_spin_lock virt_spin_lock
Peter Zijlstra43b3f022015-09-04 17:25:23 +020056static inline bool virt_spin_lock(struct qspinlock *lock)
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040057{
Juergen Gross90434422017-09-06 19:36:24 +020058 if (!static_branch_likely(&virt_spin_lock_key))
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040059 return false;
60
Peter Zijlstra43b3f022015-09-04 17:25:23 +020061 /*
62 * On hypervisors without PARAVIRT_SPINLOCKS support we fall
63 * back to a Test-and-Set spinlock, because fair locks have
64 * horrible lock 'holder' preemption issues.
65 */
66
67 do {
68 while (atomic_read(&lock->val) != 0)
69 cpu_relax();
70 } while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0);
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040071
72 return true;
73}
Juergen Gross90434422017-09-06 19:36:24 +020074#else
75static inline void native_pv_lock_init(void)
76{
77}
Peter Zijlstraa6b27782015-09-05 16:55:05 +020078#endif /* CONFIG_PARAVIRT */
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040079
Waiman Longd73a3392015-04-24 14:56:31 -040080#include <asm-generic/qspinlock.h>
81
82#endif /* _ASM_X86_QSPINLOCK_H */