Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Reinette Chatre | 1f44780 | 2010-01-15 13:43:41 -0800 | [diff] [blame] | 3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 4 | * |
| 5 | * Portions of this file are derived from the ipw3945 project, as well |
| 6 | * as portions of the ieee80211 subsystem header files. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of version 2 of the GNU General Public License as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along with |
| 18 | * this program; if not, write to the Free Software Foundation, Inc., |
| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 20 | * |
| 21 | * The full GNU General Public License is included in this distribution in the |
| 22 | * file called LICENSE. |
| 23 | * |
| 24 | * Contact Information: |
Winkler, Tomas | 759ef89 | 2008-12-09 11:28:58 -0800 | [diff] [blame] | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 27 | * |
| 28 | *****************************************************************************/ |
| 29 | |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 30 | #include <linux/etherdevice.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 31 | #include <linux/slab.h> |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 32 | #include <net/mac80211.h> |
Tomas Winkler | a05ffd3 | 2008-07-10 14:28:42 +0300 | [diff] [blame] | 33 | #include <asm/unaligned.h> |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 34 | #include "iwl-eeprom.h" |
| 35 | #include "iwl-dev.h" |
| 36 | #include "iwl-core.h" |
| 37 | #include "iwl-sta.h" |
| 38 | #include "iwl-io.h" |
| 39 | #include "iwl-helpers.h" |
Stanislaw Gruszka | 6728994 | 2011-02-28 14:33:17 +0100 | [diff] [blame^] | 40 | #include "iwl-agn-calib.h" |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 41 | /************************** RX-FUNCTIONS ****************************/ |
| 42 | /* |
| 43 | * Rx theory of operation |
| 44 | * |
| 45 | * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs), |
| 46 | * each of which point to Receive Buffers to be filled by the NIC. These get |
| 47 | * used not only for Rx frames, but for any command response or notification |
| 48 | * from the NIC. The driver and NIC manage the Rx buffers by means |
| 49 | * of indexes into the circular buffer. |
| 50 | * |
| 51 | * Rx Queue Indexes |
| 52 | * The host/firmware share two index registers for managing the Rx buffers. |
| 53 | * |
| 54 | * The READ index maps to the first position that the firmware may be writing |
| 55 | * to -- the driver can read up to (but not including) this position and get |
| 56 | * good data. |
| 57 | * The READ index is managed by the firmware once the card is enabled. |
| 58 | * |
| 59 | * The WRITE index maps to the last position the driver has read from -- the |
| 60 | * position preceding WRITE is the last slot the firmware can place a packet. |
| 61 | * |
| 62 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if |
| 63 | * WRITE = READ. |
| 64 | * |
| 65 | * During initialization, the host sets up the READ queue position to the first |
| 66 | * INDEX position, and WRITE to the last (READ - 1 wrapped) |
| 67 | * |
| 68 | * When the firmware places a packet in a buffer, it will advance the READ index |
| 69 | * and fire the RX interrupt. The driver can then query the READ index and |
| 70 | * process as many packets as possible, moving the WRITE index forward as it |
| 71 | * resets the Rx queue buffers with new memory. |
| 72 | * |
| 73 | * The management in the driver is as follows: |
| 74 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When |
| 75 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled |
| 76 | * to replenish the iwl->rxq->rx_free. |
| 77 | * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the |
| 78 | * iwl->rxq is replenished and the READ INDEX is updated (updating the |
| 79 | * 'processed' and 'read' driver indexes as well) |
| 80 | * + A received packet is processed and handed to the kernel network stack, |
| 81 | * detached from the iwl->rxq. The driver 'processed' index is updated. |
| 82 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free |
| 83 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ |
| 84 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there |
| 85 | * were enough free buffers and RX_STALLED is set it is cleared. |
| 86 | * |
| 87 | * |
| 88 | * Driver sequence: |
| 89 | * |
| 90 | * iwl_rx_queue_alloc() Allocates rx_free |
| 91 | * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls |
| 92 | * iwl_rx_queue_restock |
| 93 | * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx |
| 94 | * queue, updates firmware pointers, and updates |
| 95 | * the WRITE index. If insufficient rx_free buffers |
| 96 | * are available, schedules iwl_rx_replenish |
| 97 | * |
| 98 | * -- enable interrupts -- |
| 99 | * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the |
| 100 | * READ INDEX, detaching the SKB from the pool. |
| 101 | * Moves the packet buffer from queue to rx_used. |
| 102 | * Calls iwl_rx_queue_restock to refill any empty |
| 103 | * slots. |
| 104 | * ... |
| 105 | * |
| 106 | */ |
| 107 | |
| 108 | /** |
| 109 | * iwl_rx_queue_space - Return number of free slots available in queue. |
| 110 | */ |
| 111 | int iwl_rx_queue_space(const struct iwl_rx_queue *q) |
| 112 | { |
| 113 | int s = q->read - q->write; |
| 114 | if (s <= 0) |
| 115 | s += RX_QUEUE_SIZE; |
| 116 | /* keep some buffer to not confuse full and empty queue */ |
| 117 | s -= 2; |
| 118 | if (s < 0) |
| 119 | s = 0; |
| 120 | return s; |
| 121 | } |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 122 | |
| 123 | /** |
| 124 | * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue |
| 125 | */ |
Abhijeet Kolekar | 7bfedc5 | 2010-02-03 13:47:56 -0800 | [diff] [blame] | 126 | void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q) |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 127 | { |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 128 | unsigned long flags; |
Winkler, Tomas | 141c43a | 2009-01-08 10:19:53 -0800 | [diff] [blame] | 129 | u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg; |
| 130 | u32 reg; |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 131 | |
| 132 | spin_lock_irqsave(&q->lock, flags); |
| 133 | |
| 134 | if (q->need_update == 0) |
| 135 | goto exit_unlock; |
| 136 | |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 137 | if (priv->cfg->base_params->shadow_reg_enable) { |
| 138 | /* shadow register enabled */ |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 139 | /* Device expects a multiple of 8 */ |
Mohamed Abbas | 4752c93 | 2009-05-22 11:01:51 -0700 | [diff] [blame] | 140 | q->write_actual = (q->write & ~0x7); |
Winkler, Tomas | fd11743 | 2010-11-10 09:56:42 -0800 | [diff] [blame] | 141 | iwl_write32(priv, rx_wrt_ptr_reg, q->write_actual); |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 142 | } else { |
| 143 | /* If power-saving is in use, make sure device is awake */ |
| 144 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { |
| 145 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 146 | |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 147 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { |
| 148 | IWL_DEBUG_INFO(priv, |
| 149 | "Rx queue requesting wakeup," |
| 150 | " GP1 = 0x%x\n", reg); |
| 151 | iwl_set_bit(priv, CSR_GP_CNTRL, |
| 152 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
| 153 | goto exit_unlock; |
| 154 | } |
| 155 | |
| 156 | q->write_actual = (q->write & ~0x7); |
| 157 | iwl_write_direct32(priv, rx_wrt_ptr_reg, |
| 158 | q->write_actual); |
| 159 | |
| 160 | /* Else device is assumed to be awake */ |
| 161 | } else { |
| 162 | /* Device expects a multiple of 8 */ |
| 163 | q->write_actual = (q->write & ~0x7); |
| 164 | iwl_write_direct32(priv, rx_wrt_ptr_reg, |
| 165 | q->write_actual); |
| 166 | } |
| 167 | } |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 168 | q->need_update = 0; |
| 169 | |
| 170 | exit_unlock: |
| 171 | spin_unlock_irqrestore(&q->lock, flags); |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 172 | } |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 173 | |
| 174 | int iwl_rx_queue_alloc(struct iwl_priv *priv) |
| 175 | { |
| 176 | struct iwl_rx_queue *rxq = &priv->rxq; |
Stanislaw Gruszka | f36d04a | 2010-02-10 05:07:45 -0800 | [diff] [blame] | 177 | struct device *dev = &priv->pci_dev->dev; |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 178 | int i; |
| 179 | |
| 180 | spin_lock_init(&rxq->lock); |
| 181 | INIT_LIST_HEAD(&rxq->rx_free); |
| 182 | INIT_LIST_HEAD(&rxq->rx_used); |
| 183 | |
| 184 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ |
Emmanuel Grumbach | d5b25c9 | 2010-06-07 13:21:46 -0700 | [diff] [blame] | 185 | rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma, |
Stanislaw Gruszka | f36d04a | 2010-02-10 05:07:45 -0800 | [diff] [blame] | 186 | GFP_KERNEL); |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 187 | if (!rxq->bd) |
Winkler, Tomas | 8d86422 | 2008-11-07 09:58:39 -0800 | [diff] [blame] | 188 | goto err_bd; |
| 189 | |
Stanislaw Gruszka | f36d04a | 2010-02-10 05:07:45 -0800 | [diff] [blame] | 190 | rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status), |
| 191 | &rxq->rb_stts_dma, GFP_KERNEL); |
Winkler, Tomas | 8d86422 | 2008-11-07 09:58:39 -0800 | [diff] [blame] | 192 | if (!rxq->rb_stts) |
| 193 | goto err_rb; |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 194 | |
| 195 | /* Fill the rx_used queue with _all_ of the Rx buffers */ |
| 196 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) |
| 197 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); |
| 198 | |
| 199 | /* Set us so that we have processed and used all buffers, but have |
| 200 | * not restocked the Rx queue with fresh buffers */ |
| 201 | rxq->read = rxq->write = 0; |
Mohamed Abbas | 4752c93 | 2009-05-22 11:01:51 -0700 | [diff] [blame] | 202 | rxq->write_actual = 0; |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 203 | rxq->free_count = 0; |
| 204 | rxq->need_update = 0; |
| 205 | return 0; |
Winkler, Tomas | 8d86422 | 2008-11-07 09:58:39 -0800 | [diff] [blame] | 206 | |
| 207 | err_rb: |
Stanislaw Gruszka | f36d04a | 2010-02-10 05:07:45 -0800 | [diff] [blame] | 208 | dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, |
Emmanuel Grumbach | d5b25c9 | 2010-06-07 13:21:46 -0700 | [diff] [blame] | 209 | rxq->bd_dma); |
Winkler, Tomas | 8d86422 | 2008-11-07 09:58:39 -0800 | [diff] [blame] | 210 | err_bd: |
| 211 | return -ENOMEM; |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 212 | } |
Tomas Winkler | a55360e | 2008-05-05 10:22:28 +0800 | [diff] [blame] | 213 | |
Reinette Chatre | 81963d6 | 2010-01-22 14:22:57 -0800 | [diff] [blame] | 214 | void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv, |
| 215 | struct iwl_rx_mem_buffer *rxb) |
| 216 | { |
| 217 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
| 218 | struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif); |
| 219 | |
| 220 | if (!report->state) { |
| 221 | IWL_DEBUG_11H(priv, |
| 222 | "Spectrum Measure Notification: Start\n"); |
| 223 | return; |
| 224 | } |
| 225 | |
| 226 | memcpy(&priv->measure_report, report, sizeof(*report)); |
| 227 | priv->measurement_status |= MEASUREMENT_READY; |
| 228 | } |
Reinette Chatre | 81963d6 | 2010-01-22 14:22:57 -0800 | [diff] [blame] | 229 | |
Stanislaw Gruszka | ad6e82a | 2011-02-28 14:33:16 +0100 | [diff] [blame] | 230 | /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */ |
| 231 | #define ACK_CNT_RATIO (50) |
| 232 | #define BA_TIMEOUT_CNT (5) |
| 233 | #define BA_TIMEOUT_MAX (16) |
| 234 | |
| 235 | /** |
| 236 | * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries. |
| 237 | * |
| 238 | * When the ACK count ratio is low and aggregated BA timeout retries exceeding |
| 239 | * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal |
| 240 | * operation state. |
| 241 | */ |
| 242 | static bool iwl_good_ack_health(struct iwl_priv *priv, struct iwl_rx_packet *pkt) |
| 243 | { |
| 244 | int actual_delta, expected_delta, ba_timeout_delta; |
| 245 | struct statistics_tx *cur, *old; |
| 246 | |
| 247 | if (priv->_agn.agg_tids_count) |
| 248 | return true; |
| 249 | |
| 250 | if (iwl_bt_statistics(priv)) { |
| 251 | cur = &pkt->u.stats_bt.tx; |
| 252 | old = &priv->_agn.statistics_bt.tx; |
| 253 | } else { |
| 254 | cur = &pkt->u.stats.tx; |
| 255 | old = &priv->_agn.statistics.tx; |
| 256 | } |
| 257 | |
| 258 | actual_delta = le32_to_cpu(cur->actual_ack_cnt) - |
| 259 | le32_to_cpu(old->actual_ack_cnt); |
| 260 | expected_delta = le32_to_cpu(cur->expected_ack_cnt) - |
| 261 | le32_to_cpu(old->expected_ack_cnt); |
| 262 | |
| 263 | /* Values should not be negative, but we do not trust the firmware */ |
| 264 | if (actual_delta <= 0 || expected_delta <= 0) |
| 265 | return true; |
| 266 | |
| 267 | ba_timeout_delta = le32_to_cpu(cur->agg.ba_timeout) - |
| 268 | le32_to_cpu(old->agg.ba_timeout); |
| 269 | |
| 270 | if ((actual_delta * 100 / expected_delta) < ACK_CNT_RATIO && |
| 271 | ba_timeout_delta > BA_TIMEOUT_CNT) { |
| 272 | IWL_DEBUG_RADIO(priv, "deltas: actual %d expected %d ba_timeout %d\n", |
| 273 | actual_delta, expected_delta, ba_timeout_delta); |
| 274 | |
| 275 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 276 | /* |
| 277 | * This is ifdef'ed on DEBUGFS because otherwise the |
| 278 | * statistics aren't available. If DEBUGFS is set but |
| 279 | * DEBUG is not, these will just compile out. |
| 280 | */ |
| 281 | IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta %d\n", |
| 282 | priv->_agn.delta_statistics.tx.rx_detected_cnt); |
| 283 | IWL_DEBUG_RADIO(priv, |
| 284 | "ack_or_ba_timeout_collision delta %d\n", |
| 285 | priv->_agn.delta_statistics.tx.ack_or_ba_timeout_collision); |
| 286 | #endif |
| 287 | |
| 288 | if (ba_timeout_delta >= BA_TIMEOUT_MAX) |
| 289 | return false; |
| 290 | } |
| 291 | |
| 292 | return true; |
| 293 | } |
| 294 | |
| 295 | /** |
| 296 | * iwl_good_plcp_health - checks for plcp error. |
| 297 | * |
| 298 | * When the plcp error is exceeding the thresholds, reset the radio |
| 299 | * to improve the throughput. |
| 300 | */ |
| 301 | static bool iwl_good_plcp_health(struct iwl_priv *priv, struct iwl_rx_packet *pkt) |
| 302 | { |
| 303 | bool rc = true; |
| 304 | int combined_plcp_delta; |
| 305 | unsigned int plcp_msec; |
| 306 | unsigned long plcp_received_jiffies; |
| 307 | |
| 308 | if (priv->cfg->base_params->plcp_delta_threshold == |
| 309 | IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE) { |
| 310 | IWL_DEBUG_RADIO(priv, "plcp_err check disabled\n"); |
| 311 | return rc; |
| 312 | } |
| 313 | |
| 314 | /* |
| 315 | * check for plcp_err and trigger radio reset if it exceeds |
| 316 | * the plcp error threshold plcp_delta. |
| 317 | */ |
| 318 | plcp_received_jiffies = jiffies; |
| 319 | plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies - |
| 320 | (long) priv->plcp_jiffies); |
| 321 | priv->plcp_jiffies = plcp_received_jiffies; |
| 322 | /* |
| 323 | * check to make sure plcp_msec is not 0 to prevent division |
| 324 | * by zero. |
| 325 | */ |
| 326 | if (plcp_msec) { |
| 327 | struct statistics_rx_phy *ofdm; |
| 328 | struct statistics_rx_ht_phy *ofdm_ht; |
| 329 | |
| 330 | if (iwl_bt_statistics(priv)) { |
| 331 | ofdm = &pkt->u.stats_bt.rx.ofdm; |
| 332 | ofdm_ht = &pkt->u.stats_bt.rx.ofdm_ht; |
| 333 | combined_plcp_delta = |
| 334 | (le32_to_cpu(ofdm->plcp_err) - |
| 335 | le32_to_cpu(priv->_agn.statistics_bt. |
| 336 | rx.ofdm.plcp_err)) + |
| 337 | (le32_to_cpu(ofdm_ht->plcp_err) - |
| 338 | le32_to_cpu(priv->_agn.statistics_bt. |
| 339 | rx.ofdm_ht.plcp_err)); |
| 340 | } else { |
| 341 | ofdm = &pkt->u.stats.rx.ofdm; |
| 342 | ofdm_ht = &pkt->u.stats.rx.ofdm_ht; |
| 343 | combined_plcp_delta = |
| 344 | (le32_to_cpu(ofdm->plcp_err) - |
| 345 | le32_to_cpu(priv->_agn.statistics. |
| 346 | rx.ofdm.plcp_err)) + |
| 347 | (le32_to_cpu(ofdm_ht->plcp_err) - |
| 348 | le32_to_cpu(priv->_agn.statistics. |
| 349 | rx.ofdm_ht.plcp_err)); |
| 350 | } |
| 351 | |
| 352 | if ((combined_plcp_delta > 0) && |
| 353 | ((combined_plcp_delta * 100) / plcp_msec) > |
| 354 | priv->cfg->base_params->plcp_delta_threshold) { |
| 355 | /* |
| 356 | * if plcp_err exceed the threshold, |
| 357 | * the following data is printed in csv format: |
| 358 | * Text: plcp_err exceeded %d, |
| 359 | * Received ofdm.plcp_err, |
| 360 | * Current ofdm.plcp_err, |
| 361 | * Received ofdm_ht.plcp_err, |
| 362 | * Current ofdm_ht.plcp_err, |
| 363 | * combined_plcp_delta, |
| 364 | * plcp_msec |
| 365 | */ |
| 366 | IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, " |
| 367 | "%u, %u, %u, %u, %d, %u mSecs\n", |
| 368 | priv->cfg->base_params->plcp_delta_threshold, |
| 369 | le32_to_cpu(ofdm->plcp_err), |
| 370 | le32_to_cpu(ofdm->plcp_err), |
| 371 | le32_to_cpu(ofdm_ht->plcp_err), |
| 372 | le32_to_cpu(ofdm_ht->plcp_err), |
| 373 | combined_plcp_delta, plcp_msec); |
| 374 | |
| 375 | rc = false; |
| 376 | } |
| 377 | } |
| 378 | return rc; |
| 379 | } |
| 380 | |
Stanislaw Gruszka | 6728994 | 2011-02-28 14:33:17 +0100 | [diff] [blame^] | 381 | static void iwl_recover_from_statistics(struct iwl_priv *priv, struct iwl_rx_packet *pkt) |
Wey-Yi Guy | fa8f130c | 2010-03-05 14:22:46 -0800 | [diff] [blame] | 382 | { |
Stanislaw Gruszka | b7977ff | 2011-02-28 14:33:15 +0100 | [diff] [blame] | 383 | const struct iwl_mod_params *mod_params = priv->cfg->mod_params; |
| 384 | |
Stanislaw Gruszka | ca3d938 | 2011-02-08 09:31:55 +0100 | [diff] [blame] | 385 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
| 386 | !iwl_is_any_associated(priv)) |
Wey-Yi Guy | fa8f130c | 2010-03-05 14:22:46 -0800 | [diff] [blame] | 387 | return; |
Stanislaw Gruszka | ca3d938 | 2011-02-08 09:31:55 +0100 | [diff] [blame] | 388 | |
Stanislaw Gruszka | ad6e82a | 2011-02-28 14:33:16 +0100 | [diff] [blame] | 389 | if (mod_params->ack_check && !iwl_good_ack_health(priv, pkt)) { |
Stanislaw Gruszka | ca3d938 | 2011-02-08 09:31:55 +0100 | [diff] [blame] | 390 | IWL_ERR(priv, "low ack count detected, restart firmware\n"); |
| 391 | if (!iwl_force_reset(priv, IWL_FW_RESET, false)) |
| 392 | return; |
Trieu 'Andrew' Nguyen | 3e4fb5f | 2010-01-22 14:22:46 -0800 | [diff] [blame] | 393 | } |
Stanislaw Gruszka | ca3d938 | 2011-02-08 09:31:55 +0100 | [diff] [blame] | 394 | |
Stanislaw Gruszka | ad6e82a | 2011-02-28 14:33:16 +0100 | [diff] [blame] | 395 | if (mod_params->plcp_check && !iwl_good_plcp_health(priv, pkt)) |
Stanislaw Gruszka | ca3d938 | 2011-02-08 09:31:55 +0100 | [diff] [blame] | 396 | iwl_force_reset(priv, IWL_RF_RESET, false); |
Wey-Yi Guy | beac549 | 2010-03-04 13:38:58 -0800 | [diff] [blame] | 397 | } |
Wey-Yi Guy | beac549 | 2010-03-04 13:38:58 -0800 | [diff] [blame] | 398 | |
Stanislaw Gruszka | 6728994 | 2011-02-28 14:33:17 +0100 | [diff] [blame^] | 399 | /* Calculate noise level, based on measurements during network silence just |
| 400 | * before arriving beacon. This measurement can be done only if we know |
| 401 | * exactly when to expect beacons, therefore only when we're associated. */ |
| 402 | static void iwl_rx_calc_noise(struct iwl_priv *priv) |
| 403 | { |
| 404 | struct statistics_rx_non_phy *rx_info; |
| 405 | int num_active_rx = 0; |
| 406 | int total_silence = 0; |
| 407 | int bcn_silence_a, bcn_silence_b, bcn_silence_c; |
| 408 | int last_rx_noise; |
| 409 | |
| 410 | if (iwl_bt_statistics(priv)) |
| 411 | rx_info = &(priv->_agn.statistics_bt.rx.general.common); |
| 412 | else |
| 413 | rx_info = &(priv->_agn.statistics.rx.general); |
| 414 | bcn_silence_a = |
| 415 | le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; |
| 416 | bcn_silence_b = |
| 417 | le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; |
| 418 | bcn_silence_c = |
| 419 | le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; |
| 420 | |
| 421 | if (bcn_silence_a) { |
| 422 | total_silence += bcn_silence_a; |
| 423 | num_active_rx++; |
| 424 | } |
| 425 | if (bcn_silence_b) { |
| 426 | total_silence += bcn_silence_b; |
| 427 | num_active_rx++; |
| 428 | } |
| 429 | if (bcn_silence_c) { |
| 430 | total_silence += bcn_silence_c; |
| 431 | num_active_rx++; |
| 432 | } |
| 433 | |
| 434 | /* Average among active antennas */ |
| 435 | if (num_active_rx) |
| 436 | last_rx_noise = (total_silence / num_active_rx) - 107; |
| 437 | else |
| 438 | last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE; |
| 439 | |
| 440 | IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n", |
| 441 | bcn_silence_a, bcn_silence_b, bcn_silence_c, |
| 442 | last_rx_noise); |
| 443 | } |
| 444 | |
| 445 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 446 | /* |
| 447 | * based on the assumption of all statistics counter are in DWORD |
| 448 | * FIXME: This function is for debugging, do not deal with |
| 449 | * the case of counters roll-over. |
| 450 | */ |
| 451 | static void iwl_accumulative_statistics(struct iwl_priv *priv, |
| 452 | __le32 *stats) |
| 453 | { |
| 454 | int i, size; |
| 455 | __le32 *prev_stats; |
| 456 | u32 *accum_stats; |
| 457 | u32 *delta, *max_delta; |
| 458 | struct statistics_general_common *general, *accum_general; |
| 459 | struct statistics_tx *tx, *accum_tx; |
| 460 | |
| 461 | if (iwl_bt_statistics(priv)) { |
| 462 | prev_stats = (__le32 *)&priv->_agn.statistics_bt; |
| 463 | accum_stats = (u32 *)&priv->_agn.accum_statistics_bt; |
| 464 | size = sizeof(struct iwl_bt_notif_statistics); |
| 465 | general = &priv->_agn.statistics_bt.general.common; |
| 466 | accum_general = &priv->_agn.accum_statistics_bt.general.common; |
| 467 | tx = &priv->_agn.statistics_bt.tx; |
| 468 | accum_tx = &priv->_agn.accum_statistics_bt.tx; |
| 469 | delta = (u32 *)&priv->_agn.delta_statistics_bt; |
| 470 | max_delta = (u32 *)&priv->_agn.max_delta_bt; |
| 471 | } else { |
| 472 | prev_stats = (__le32 *)&priv->_agn.statistics; |
| 473 | accum_stats = (u32 *)&priv->_agn.accum_statistics; |
| 474 | size = sizeof(struct iwl_notif_statistics); |
| 475 | general = &priv->_agn.statistics.general.common; |
| 476 | accum_general = &priv->_agn.accum_statistics.general.common; |
| 477 | tx = &priv->_agn.statistics.tx; |
| 478 | accum_tx = &priv->_agn.accum_statistics.tx; |
| 479 | delta = (u32 *)&priv->_agn.delta_statistics; |
| 480 | max_delta = (u32 *)&priv->_agn.max_delta; |
| 481 | } |
| 482 | for (i = sizeof(__le32); i < size; |
| 483 | i += sizeof(__le32), stats++, prev_stats++, delta++, |
| 484 | max_delta++, accum_stats++) { |
| 485 | if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { |
| 486 | *delta = (le32_to_cpu(*stats) - |
| 487 | le32_to_cpu(*prev_stats)); |
| 488 | *accum_stats += *delta; |
| 489 | if (*delta > *max_delta) |
| 490 | *max_delta = *delta; |
| 491 | } |
| 492 | } |
| 493 | |
| 494 | /* reset accumulative statistics for "no-counter" type statistics */ |
| 495 | accum_general->temperature = general->temperature; |
| 496 | accum_general->temperature_m = general->temperature_m; |
| 497 | accum_general->ttl_timestamp = general->ttl_timestamp; |
| 498 | accum_tx->tx_power.ant_a = tx->tx_power.ant_a; |
| 499 | accum_tx->tx_power.ant_b = tx->tx_power.ant_b; |
| 500 | accum_tx->tx_power.ant_c = tx->tx_power.ant_c; |
| 501 | } |
| 502 | #endif |
| 503 | |
| 504 | #define REG_RECALIB_PERIOD (60) |
| 505 | |
| 506 | void iwl_rx_statistics(struct iwl_priv *priv, |
| 507 | struct iwl_rx_mem_buffer *rxb) |
| 508 | { |
| 509 | int change; |
| 510 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
| 511 | |
| 512 | if (iwl_bt_statistics(priv)) { |
| 513 | IWL_DEBUG_RX(priv, |
| 514 | "Statistics notification received (%d vs %d).\n", |
| 515 | (int)sizeof(struct iwl_bt_notif_statistics), |
| 516 | le32_to_cpu(pkt->len_n_flags) & |
| 517 | FH_RSCSR_FRAME_SIZE_MSK); |
| 518 | |
| 519 | change = ((priv->_agn.statistics_bt.general.common.temperature != |
| 520 | pkt->u.stats_bt.general.common.temperature) || |
| 521 | ((priv->_agn.statistics_bt.flag & |
| 522 | STATISTICS_REPLY_FLG_HT40_MODE_MSK) != |
| 523 | (pkt->u.stats_bt.flag & |
| 524 | STATISTICS_REPLY_FLG_HT40_MODE_MSK))); |
| 525 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 526 | iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats_bt); |
| 527 | #endif |
| 528 | |
| 529 | } else { |
| 530 | IWL_DEBUG_RX(priv, |
| 531 | "Statistics notification received (%d vs %d).\n", |
| 532 | (int)sizeof(struct iwl_notif_statistics), |
| 533 | le32_to_cpu(pkt->len_n_flags) & |
| 534 | FH_RSCSR_FRAME_SIZE_MSK); |
| 535 | |
| 536 | change = ((priv->_agn.statistics.general.common.temperature != |
| 537 | pkt->u.stats.general.common.temperature) || |
| 538 | ((priv->_agn.statistics.flag & |
| 539 | STATISTICS_REPLY_FLG_HT40_MODE_MSK) != |
| 540 | (pkt->u.stats.flag & |
| 541 | STATISTICS_REPLY_FLG_HT40_MODE_MSK))); |
| 542 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 543 | iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats); |
| 544 | #endif |
| 545 | |
| 546 | } |
| 547 | |
| 548 | iwl_recover_from_statistics(priv, pkt); |
| 549 | |
| 550 | if (iwl_bt_statistics(priv)) |
| 551 | memcpy(&priv->_agn.statistics_bt, &pkt->u.stats_bt, |
| 552 | sizeof(priv->_agn.statistics_bt)); |
| 553 | else |
| 554 | memcpy(&priv->_agn.statistics, &pkt->u.stats, |
| 555 | sizeof(priv->_agn.statistics)); |
| 556 | |
| 557 | set_bit(STATUS_STATISTICS, &priv->status); |
| 558 | |
| 559 | /* Reschedule the statistics timer to occur in |
| 560 | * REG_RECALIB_PERIOD seconds to ensure we get a |
| 561 | * thermal update even if the uCode doesn't give |
| 562 | * us one */ |
| 563 | mod_timer(&priv->statistics_periodic, jiffies + |
| 564 | msecs_to_jiffies(REG_RECALIB_PERIOD * 1000)); |
| 565 | |
| 566 | if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) && |
| 567 | (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) { |
| 568 | iwl_rx_calc_noise(priv); |
| 569 | queue_work(priv->workqueue, &priv->run_time_calib_work); |
| 570 | } |
| 571 | if (priv->cfg->ops->lib->temp_ops.temperature && change) |
| 572 | priv->cfg->ops->lib->temp_ops.temperature(priv); |
| 573 | } |
| 574 | |
| 575 | void iwl_reply_statistics(struct iwl_priv *priv, |
| 576 | struct iwl_rx_mem_buffer *rxb) |
| 577 | { |
| 578 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
| 579 | |
| 580 | if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) { |
| 581 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 582 | memset(&priv->_agn.accum_statistics, 0, |
| 583 | sizeof(struct iwl_notif_statistics)); |
| 584 | memset(&priv->_agn.delta_statistics, 0, |
| 585 | sizeof(struct iwl_notif_statistics)); |
| 586 | memset(&priv->_agn.max_delta, 0, |
| 587 | sizeof(struct iwl_notif_statistics)); |
| 588 | memset(&priv->_agn.accum_statistics_bt, 0, |
| 589 | sizeof(struct iwl_bt_notif_statistics)); |
| 590 | memset(&priv->_agn.delta_statistics_bt, 0, |
| 591 | sizeof(struct iwl_bt_notif_statistics)); |
| 592 | memset(&priv->_agn.max_delta_bt, 0, |
| 593 | sizeof(struct iwl_bt_notif_statistics)); |
| 594 | #endif |
| 595 | IWL_DEBUG_RX(priv, "Statistics have been cleared\n"); |
| 596 | } |
| 597 | iwl_rx_statistics(priv, rxb); |
| 598 | } |
| 599 | |
| 600 | void iwl_rx_missed_beacon_notif(struct iwl_priv *priv, |
| 601 | struct iwl_rx_mem_buffer *rxb) |
| 602 | |
| 603 | { |
| 604 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
| 605 | struct iwl_missed_beacon_notif *missed_beacon; |
| 606 | |
| 607 | missed_beacon = &pkt->u.missed_beacon; |
| 608 | if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) > |
| 609 | priv->missed_beacon_threshold) { |
| 610 | IWL_DEBUG_CALIB(priv, |
| 611 | "missed bcn cnsq %d totl %d rcd %d expctd %d\n", |
| 612 | le32_to_cpu(missed_beacon->consecutive_missed_beacons), |
| 613 | le32_to_cpu(missed_beacon->total_missed_becons), |
| 614 | le32_to_cpu(missed_beacon->num_recvd_beacons), |
| 615 | le32_to_cpu(missed_beacon->num_expected_beacons)); |
| 616 | if (!test_bit(STATUS_SCANNING, &priv->status)) |
| 617 | iwl_init_sensitivity(priv); |
| 618 | } |
| 619 | } |
| 620 | |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 621 | /* |
| 622 | * returns non-zero if packet should be dropped |
| 623 | */ |
Samuel Ortiz | 8ccde88 | 2009-01-27 14:27:52 -0800 | [diff] [blame] | 624 | int iwl_set_decrypted_flag(struct iwl_priv *priv, |
| 625 | struct ieee80211_hdr *hdr, |
| 626 | u32 decrypt_res, |
| 627 | struct ieee80211_rx_status *stats) |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 628 | { |
| 629 | u16 fc = le16_to_cpu(hdr->frame_control); |
| 630 | |
Johannes Berg | 246ed35 | 2010-08-23 10:46:32 +0200 | [diff] [blame] | 631 | /* |
| 632 | * All contexts have the same setting here due to it being |
| 633 | * a module parameter, so OK to check any context. |
| 634 | */ |
| 635 | if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags & |
| 636 | RXON_FILTER_DIS_DECRYPT_MSK) |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 637 | return 0; |
| 638 | |
| 639 | if (!(fc & IEEE80211_FCTL_PROTECTED)) |
| 640 | return 0; |
| 641 | |
Tomas Winkler | e162344 | 2009-01-27 14:27:56 -0800 | [diff] [blame] | 642 | IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res); |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 643 | switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) { |
| 644 | case RX_RES_STATUS_SEC_TYPE_TKIP: |
| 645 | /* The uCode has got a bad phase 1 Key, pushes the packet. |
| 646 | * Decryption will be done in SW. */ |
| 647 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 648 | RX_RES_STATUS_BAD_KEY_TTAK) |
| 649 | break; |
| 650 | |
| 651 | case RX_RES_STATUS_SEC_TYPE_WEP: |
| 652 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 653 | RX_RES_STATUS_BAD_ICV_MIC) { |
| 654 | /* bad ICV, the packet is destroyed since the |
| 655 | * decryption is inplace, drop it */ |
Tomas Winkler | e162344 | 2009-01-27 14:27:56 -0800 | [diff] [blame] | 656 | IWL_DEBUG_RX(priv, "Packet destroyed\n"); |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 657 | return -1; |
| 658 | } |
| 659 | case RX_RES_STATUS_SEC_TYPE_CCMP: |
| 660 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 661 | RX_RES_STATUS_DECRYPT_OK) { |
Tomas Winkler | e162344 | 2009-01-27 14:27:56 -0800 | [diff] [blame] | 662 | IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n"); |
Emmanuel Grumbach | 1781a07 | 2008-06-30 17:23:09 +0800 | [diff] [blame] | 663 | stats->flag |= RX_FLAG_DECRYPTED; |
| 664 | } |
| 665 | break; |
| 666 | |
| 667 | default: |
| 668 | break; |
| 669 | } |
| 670 | return 0; |
| 671 | } |