Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 1 | /* |
Rob Clark | 8bb0daf | 2013-02-11 12:43:09 -0500 | [diff] [blame] | 2 | * drivers/gpu/drm/omapdrm/omap_crtc.c |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments |
| 5 | * Author: Rob Clark <rob@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published by |
| 9 | * the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 20 | #include <linux/completion.h> |
| 21 | |
Laurent Pinchart | 69a1226 | 2015-03-05 21:38:16 +0200 | [diff] [blame] | 22 | #include <drm/drm_atomic.h> |
| 23 | #include <drm/drm_atomic_helper.h> |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 24 | #include <drm/drm_crtc.h> |
| 25 | #include <drm/drm_crtc_helper.h> |
Andy Gross | b9ed9f0 | 2012-10-16 00:17:40 -0500 | [diff] [blame] | 26 | #include <drm/drm_mode.h> |
Daniel Vetter | 3cb9ae4 | 2014-10-29 10:03:57 +0100 | [diff] [blame] | 27 | #include <drm/drm_plane_helper.h> |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 28 | |
| 29 | #include "omap_drv.h" |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 30 | |
| 31 | #define to_omap_crtc(x) container_of(x, struct omap_crtc, base) |
| 32 | |
| 33 | struct omap_crtc { |
| 34 | struct drm_crtc base; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 35 | |
Rob Clark | bb5c2d9 | 2012-01-16 12:51:16 -0600 | [diff] [blame] | 36 | const char *name; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 37 | enum omap_channel channel; |
Tomi Valkeinen | c7aef12 | 2014-04-03 16:30:03 +0300 | [diff] [blame] | 38 | struct drm_encoder *current_encoder; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * Temporary: eventually this will go away, but it is needed |
| 42 | * for now to keep the output's happy. (They only need |
| 43 | * mgr->id.) Eventually this will be replaced w/ something |
| 44 | * more common-panel-framework-y |
| 45 | */ |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 46 | struct omap_overlay_manager *mgr; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 47 | |
| 48 | struct omap_video_timings timings; |
| 49 | bool enabled; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 50 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 51 | struct omap_drm_irq vblank_irq; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 52 | struct omap_drm_irq error_irq; |
| 53 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 54 | /* pending event */ |
| 55 | struct drm_pending_vblank_event *event; |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 56 | wait_queue_head_t flip_wait; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 57 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 58 | struct completion completion; |
| 59 | |
Tomi Valkeinen | a36af73 | 2015-02-26 15:20:24 +0200 | [diff] [blame] | 60 | bool ignore_digit_sync_lost; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 61 | }; |
| 62 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 63 | /* ----------------------------------------------------------------------------- |
| 64 | * Helper Functions |
| 65 | */ |
| 66 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 67 | uint32_t pipe2vbl(struct drm_crtc *crtc) |
| 68 | { |
| 69 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 70 | |
| 71 | return dispc_mgr_get_vsync_irq(omap_crtc->channel); |
| 72 | } |
| 73 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 74 | const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc) |
| 75 | { |
| 76 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 77 | return &omap_crtc->timings; |
| 78 | } |
| 79 | |
| 80 | enum omap_channel omap_crtc_channel(struct drm_crtc *crtc) |
| 81 | { |
| 82 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 83 | return omap_crtc->channel; |
| 84 | } |
| 85 | |
| 86 | /* ----------------------------------------------------------------------------- |
| 87 | * DSS Manager Functions |
| 88 | */ |
| 89 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 90 | /* |
| 91 | * Manager-ops, callbacks from output when they need to configure |
| 92 | * the upstream part of the video pipe. |
| 93 | * |
| 94 | * Most of these we can ignore until we add support for command-mode |
| 95 | * panels.. for video-mode the crtc-helpers already do an adequate |
| 96 | * job of sequencing the setup of the video pipe in the proper order |
| 97 | */ |
| 98 | |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 99 | /* ovl-mgr-id -> crtc */ |
| 100 | static struct omap_crtc *omap_crtcs[8]; |
| 101 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 102 | /* we can probably ignore these until we support command-mode panels: */ |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 103 | static int omap_crtc_dss_connect(struct omap_overlay_manager *mgr, |
Tomi Valkeinen | 1f68d9c | 2013-04-19 15:09:34 +0300 | [diff] [blame] | 104 | struct omap_dss_device *dst) |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 105 | { |
| 106 | if (mgr->output) |
| 107 | return -EINVAL; |
| 108 | |
| 109 | if ((mgr->supported_outputs & dst->id) == 0) |
| 110 | return -EINVAL; |
| 111 | |
| 112 | dst->manager = mgr; |
| 113 | mgr->output = dst; |
| 114 | |
| 115 | return 0; |
| 116 | } |
| 117 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 118 | static void omap_crtc_dss_disconnect(struct omap_overlay_manager *mgr, |
Tomi Valkeinen | 1f68d9c | 2013-04-19 15:09:34 +0300 | [diff] [blame] | 119 | struct omap_dss_device *dst) |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 120 | { |
| 121 | mgr->output->manager = NULL; |
| 122 | mgr->output = NULL; |
| 123 | } |
| 124 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 125 | static void omap_crtc_dss_start_update(struct omap_overlay_manager *mgr) |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 126 | { |
| 127 | } |
| 128 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 129 | /* Called only from omap_crtc_setup and suspend/resume handlers. */ |
Laurent Pinchart | 8472b57 | 2015-01-15 00:45:17 +0200 | [diff] [blame] | 130 | static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) |
| 131 | { |
| 132 | struct drm_device *dev = crtc->dev; |
| 133 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 134 | enum omap_channel channel = omap_crtc->channel; |
| 135 | struct omap_irq_wait *wait; |
| 136 | u32 framedone_irq, vsync_irq; |
| 137 | int ret; |
| 138 | |
| 139 | if (dispc_mgr_is_enabled(channel) == enable) |
| 140 | return; |
| 141 | |
Tomi Valkeinen | ef42228 | 2015-02-26 15:20:25 +0200 | [diff] [blame] | 142 | if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) { |
| 143 | /* |
| 144 | * Digit output produces some sync lost interrupts during the |
| 145 | * first frame when enabling, so we need to ignore those. |
| 146 | */ |
| 147 | omap_crtc->ignore_digit_sync_lost = true; |
| 148 | } |
Laurent Pinchart | 8472b57 | 2015-01-15 00:45:17 +0200 | [diff] [blame] | 149 | |
| 150 | framedone_irq = dispc_mgr_get_framedone_irq(channel); |
| 151 | vsync_irq = dispc_mgr_get_vsync_irq(channel); |
| 152 | |
| 153 | if (enable) { |
| 154 | wait = omap_irq_wait_init(dev, vsync_irq, 1); |
| 155 | } else { |
| 156 | /* |
| 157 | * When we disable the digit output, we need to wait for |
| 158 | * FRAMEDONE to know that DISPC has finished with the output. |
| 159 | * |
| 160 | * OMAP2/3 does not have FRAMEDONE irq for digit output, and in |
| 161 | * that case we need to use vsync interrupt, and wait for both |
| 162 | * even and odd frames. |
| 163 | */ |
| 164 | |
| 165 | if (framedone_irq) |
| 166 | wait = omap_irq_wait_init(dev, framedone_irq, 1); |
| 167 | else |
| 168 | wait = omap_irq_wait_init(dev, vsync_irq, 2); |
| 169 | } |
| 170 | |
| 171 | dispc_mgr_enable(channel, enable); |
| 172 | |
| 173 | ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); |
| 174 | if (ret) { |
| 175 | dev_err(dev->dev, "%s: timeout waiting for %s\n", |
| 176 | omap_crtc->name, enable ? "enable" : "disable"); |
| 177 | } |
| 178 | |
Tomi Valkeinen | ef42228 | 2015-02-26 15:20:25 +0200 | [diff] [blame] | 179 | if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) { |
| 180 | omap_crtc->ignore_digit_sync_lost = false; |
| 181 | /* make sure the irq handler sees the value above */ |
| 182 | mb(); |
| 183 | } |
Laurent Pinchart | 8472b57 | 2015-01-15 00:45:17 +0200 | [diff] [blame] | 184 | } |
| 185 | |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 186 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 187 | static int omap_crtc_dss_enable(struct omap_overlay_manager *mgr) |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 188 | { |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 189 | struct omap_crtc *omap_crtc = omap_crtcs[mgr->id]; |
Laurent Pinchart | dee8260 | 2015-03-06 19:00:18 +0200 | [diff] [blame^] | 190 | struct omap_overlay_manager_info info; |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 191 | |
Laurent Pinchart | dee8260 | 2015-03-06 19:00:18 +0200 | [diff] [blame^] | 192 | memset(&info, 0, sizeof(info)); |
| 193 | info.default_color = 0x00000000; |
| 194 | info.trans_key = 0x00000000; |
| 195 | info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST; |
| 196 | info.trans_enabled = false; |
| 197 | |
| 198 | dispc_mgr_setup(omap_crtc->channel, &info); |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 199 | dispc_mgr_set_timings(omap_crtc->channel, |
| 200 | &omap_crtc->timings); |
Laurent Pinchart | 8472b57 | 2015-01-15 00:45:17 +0200 | [diff] [blame] | 201 | omap_crtc_set_enabled(&omap_crtc->base, true); |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 202 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 203 | return 0; |
| 204 | } |
| 205 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 206 | static void omap_crtc_dss_disable(struct omap_overlay_manager *mgr) |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 207 | { |
Tomi Valkeinen | 506096a | 2014-04-03 13:11:54 +0300 | [diff] [blame] | 208 | struct omap_crtc *omap_crtc = omap_crtcs[mgr->id]; |
| 209 | |
Laurent Pinchart | 8472b57 | 2015-01-15 00:45:17 +0200 | [diff] [blame] | 210 | omap_crtc_set_enabled(&omap_crtc->base, false); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 211 | } |
| 212 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 213 | static void omap_crtc_dss_set_timings(struct omap_overlay_manager *mgr, |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 214 | const struct omap_video_timings *timings) |
| 215 | { |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 216 | struct omap_crtc *omap_crtc = omap_crtcs[mgr->id]; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 217 | DBG("%s", omap_crtc->name); |
| 218 | omap_crtc->timings = *timings; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 219 | } |
| 220 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 221 | static void omap_crtc_dss_set_lcd_config(struct omap_overlay_manager *mgr, |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 222 | const struct dss_lcd_mgr_config *config) |
| 223 | { |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 224 | struct omap_crtc *omap_crtc = omap_crtcs[mgr->id]; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 225 | DBG("%s", omap_crtc->name); |
| 226 | dispc_mgr_set_lcd_config(omap_crtc->channel, config); |
| 227 | } |
| 228 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 229 | static int omap_crtc_dss_register_framedone( |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 230 | struct omap_overlay_manager *mgr, |
| 231 | void (*handler)(void *), void *data) |
| 232 | { |
| 233 | return 0; |
| 234 | } |
| 235 | |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 236 | static void omap_crtc_dss_unregister_framedone( |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 237 | struct omap_overlay_manager *mgr, |
| 238 | void (*handler)(void *), void *data) |
| 239 | { |
| 240 | } |
| 241 | |
| 242 | static const struct dss_mgr_ops mgr_ops = { |
Laurent Pinchart | 4343f0f | 2015-03-05 22:01:02 +0200 | [diff] [blame] | 243 | .connect = omap_crtc_dss_connect, |
| 244 | .disconnect = omap_crtc_dss_disconnect, |
| 245 | .start_update = omap_crtc_dss_start_update, |
| 246 | .enable = omap_crtc_dss_enable, |
| 247 | .disable = omap_crtc_dss_disable, |
| 248 | .set_timings = omap_crtc_dss_set_timings, |
| 249 | .set_lcd_config = omap_crtc_dss_set_lcd_config, |
| 250 | .register_framedone_handler = omap_crtc_dss_register_framedone, |
| 251 | .unregister_framedone_handler = omap_crtc_dss_unregister_framedone, |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 252 | }; |
| 253 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 254 | /* ----------------------------------------------------------------------------- |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 255 | * Setup, Flush and Page Flip |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 256 | */ |
| 257 | |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 258 | void omap_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file) |
| 259 | { |
| 260 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 261 | struct drm_pending_vblank_event *event; |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 262 | struct drm_device *dev = crtc->dev; |
| 263 | unsigned long flags; |
| 264 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 265 | /* Destroy the pending vertical blanking event associated with the |
| 266 | * pending page flip, if any, and disable vertical blanking interrupts. |
| 267 | */ |
| 268 | |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 269 | spin_lock_irqsave(&dev->event_lock, flags); |
| 270 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 271 | event = omap_crtc->event; |
| 272 | omap_crtc->event = NULL; |
| 273 | |
| 274 | if (event && event->base.file_priv == file) { |
| 275 | event->base.destroy(&event->base); |
| 276 | drm_crtc_vblank_put(crtc); |
Laurent Pinchart | 1d5e5ea | 2015-01-18 16:57:36 +0200 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 280 | } |
| 281 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 282 | static void omap_crtc_complete_page_flip(struct drm_crtc *crtc) |
Laurent Pinchart | 15d02e9 | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 283 | { |
| 284 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 285 | struct drm_pending_vblank_event *event; |
Laurent Pinchart | 15d02e9 | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 286 | struct drm_device *dev = crtc->dev; |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 287 | unsigned long flags; |
Laurent Pinchart | 15d02e9 | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 288 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 289 | spin_lock_irqsave(&dev->event_lock, flags); |
| 290 | |
| 291 | event = omap_crtc->event; |
| 292 | omap_crtc->event = NULL; |
| 293 | |
| 294 | if (event) { |
| 295 | drm_crtc_send_vblank_event(crtc, event); |
| 296 | wake_up(&omap_crtc->flip_wait); |
| 297 | drm_crtc_vblank_put(crtc); |
Laurent Pinchart | 15d02e9 | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 298 | } |
| 299 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 300 | spin_unlock_irqrestore(&dev->event_lock, flags); |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | static bool omap_crtc_page_flip_pending(struct drm_crtc *crtc) |
| 304 | { |
| 305 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 306 | struct drm_device *dev = crtc->dev; |
| 307 | unsigned long flags; |
| 308 | bool pending; |
| 309 | |
| 310 | spin_lock_irqsave(&dev->event_lock, flags); |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 311 | pending = omap_crtc->event != NULL; |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 312 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 313 | |
| 314 | return pending; |
| 315 | } |
| 316 | |
| 317 | static void omap_crtc_wait_page_flip(struct drm_crtc *crtc) |
| 318 | { |
| 319 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 320 | |
| 321 | if (wait_event_timeout(omap_crtc->flip_wait, |
| 322 | !omap_crtc_page_flip_pending(crtc), |
| 323 | msecs_to_jiffies(50))) |
| 324 | return; |
| 325 | |
| 326 | dev_warn(crtc->dev->dev, "page flip timeout!\n"); |
| 327 | |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 328 | omap_crtc_complete_page_flip(crtc); |
Laurent Pinchart | 15d02e9 | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 329 | } |
| 330 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 331 | static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus) |
| 332 | { |
| 333 | struct omap_crtc *omap_crtc = |
| 334 | container_of(irq, struct omap_crtc, error_irq); |
Tomi Valkeinen | a36af73 | 2015-02-26 15:20:24 +0200 | [diff] [blame] | 335 | |
| 336 | if (omap_crtc->ignore_digit_sync_lost) { |
| 337 | irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT; |
| 338 | if (!irqstatus) |
| 339 | return; |
| 340 | } |
| 341 | |
Tomi Valkeinen | 3b143fc | 2014-11-19 12:50:13 +0200 | [diff] [blame] | 342 | DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 343 | } |
| 344 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 345 | static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus) |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 346 | { |
| 347 | struct omap_crtc *omap_crtc = |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 348 | container_of(irq, struct omap_crtc, vblank_irq); |
| 349 | struct drm_device *dev = omap_crtc->base.dev; |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 350 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 351 | if (dispc_mgr_go_busy(omap_crtc->channel)) |
| 352 | return; |
| 353 | |
| 354 | DBG("%s: apply done", omap_crtc->name); |
| 355 | __omap_irq_unregister(dev, &omap_crtc->vblank_irq); |
| 356 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 357 | /* wakeup userspace */ |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 358 | omap_crtc_complete_page_flip(&omap_crtc->base); |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 359 | |
| 360 | complete(&omap_crtc->completion); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 361 | } |
| 362 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 363 | int omap_crtc_flush(struct drm_crtc *crtc) |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 364 | { |
| 365 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 366 | |
| 367 | DBG("%s: GO", omap_crtc->name); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 368 | |
| 369 | WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 370 | WARN_ON(omap_crtc->vblank_irq.registered); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 371 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 372 | dispc_runtime_get(); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 373 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 374 | if (dispc_mgr_is_enabled(omap_crtc->channel)) { |
| 375 | dispc_mgr_go(omap_crtc->channel); |
| 376 | omap_irq_register(crtc->dev, &omap_crtc->vblank_irq); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 377 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 378 | WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion, |
| 379 | msecs_to_jiffies(100))); |
| 380 | reinit_completion(&omap_crtc->completion); |
| 381 | } |
| 382 | |
| 383 | dispc_runtime_put(); |
| 384 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 385 | return 0; |
| 386 | } |
| 387 | |
| 388 | static void omap_crtc_setup(struct drm_crtc *crtc) |
| 389 | { |
| 390 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 391 | struct omap_drm_private *priv = crtc->dev->dev_private; |
| 392 | struct drm_encoder *encoder = NULL; |
| 393 | unsigned int i; |
| 394 | |
| 395 | DBG("%s: enabled=%d", omap_crtc->name, omap_crtc->enabled); |
| 396 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 397 | dispc_runtime_get(); |
| 398 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 399 | for (i = 0; i < priv->num_encoders; i++) { |
| 400 | if (priv->encoders[i]->crtc == crtc) { |
| 401 | encoder = priv->encoders[i]; |
| 402 | break; |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder) |
| 407 | omap_encoder_set_enabled(omap_crtc->current_encoder, false); |
| 408 | |
| 409 | omap_crtc->current_encoder = encoder; |
| 410 | |
| 411 | if (!omap_crtc->enabled) { |
| 412 | if (encoder) |
| 413 | omap_encoder_set_enabled(encoder, false); |
| 414 | } else { |
| 415 | if (encoder) { |
| 416 | omap_encoder_set_enabled(encoder, false); |
| 417 | omap_encoder_update(encoder, omap_crtc->mgr, |
| 418 | &omap_crtc->timings); |
| 419 | omap_encoder_set_enabled(encoder, true); |
| 420 | } |
| 421 | } |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 422 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 423 | dispc_runtime_put(); |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | /* ----------------------------------------------------------------------------- |
| 427 | * CRTC Functions |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 428 | */ |
| 429 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 430 | static void omap_crtc_destroy(struct drm_crtc *crtc) |
| 431 | { |
| 432 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 433 | |
| 434 | DBG("%s", omap_crtc->name); |
| 435 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 436 | WARN_ON(omap_crtc->vblank_irq.registered); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 437 | omap_irq_unregister(crtc->dev, &omap_crtc->error_irq); |
| 438 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 439 | drm_crtc_cleanup(crtc); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 440 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 441 | kfree(omap_crtc); |
| 442 | } |
| 443 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 444 | static bool omap_crtc_mode_fixup(struct drm_crtc *crtc, |
Laurent Pinchart | e811f5a | 2012-07-17 17:56:50 +0200 | [diff] [blame] | 445 | const struct drm_display_mode *mode, |
Rob Clark | bb5c2d9 | 2012-01-16 12:51:16 -0600 | [diff] [blame] | 446 | struct drm_display_mode *adjusted_mode) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 447 | { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 448 | return true; |
| 449 | } |
| 450 | |
Laurent Pinchart | f1d57fb | 2015-03-05 22:13:22 +0200 | [diff] [blame] | 451 | static void omap_crtc_enable(struct drm_crtc *crtc) |
| 452 | { |
| 453 | struct omap_drm_private *priv = crtc->dev->dev_private; |
| 454 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 455 | unsigned int i; |
| 456 | |
| 457 | DBG("%s", omap_crtc->name); |
| 458 | |
| 459 | if (omap_crtc->enabled) |
| 460 | return; |
| 461 | |
| 462 | /* Enable all planes associated with the CRTC. */ |
| 463 | for (i = 0; i < priv->num_planes; i++) { |
| 464 | struct drm_plane *plane = priv->planes[i]; |
| 465 | |
| 466 | if (plane->crtc == crtc) |
| 467 | WARN_ON(omap_plane_set_enable(plane, true)); |
| 468 | } |
| 469 | |
| 470 | omap_crtc->enabled = true; |
| 471 | |
| 472 | omap_crtc_setup(crtc); |
| 473 | omap_crtc_flush(crtc); |
| 474 | |
| 475 | dispc_runtime_get(); |
| 476 | drm_crtc_vblank_on(crtc); |
| 477 | dispc_runtime_put(); |
| 478 | } |
| 479 | |
| 480 | static void omap_crtc_disable(struct drm_crtc *crtc) |
| 481 | { |
| 482 | struct omap_drm_private *priv = crtc->dev->dev_private; |
| 483 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 484 | unsigned int i; |
| 485 | |
| 486 | DBG("%s", omap_crtc->name); |
| 487 | |
| 488 | if (!omap_crtc->enabled) |
| 489 | return; |
| 490 | |
| 491 | omap_crtc_wait_page_flip(crtc); |
| 492 | dispc_runtime_get(); |
| 493 | drm_crtc_vblank_off(crtc); |
| 494 | dispc_runtime_put(); |
| 495 | |
| 496 | /* Disable all planes associated with the CRTC. */ |
| 497 | for (i = 0; i < priv->num_planes; i++) { |
| 498 | struct drm_plane *plane = priv->planes[i]; |
| 499 | |
| 500 | if (plane->crtc == crtc) |
| 501 | WARN_ON(omap_plane_set_enable(plane, false)); |
| 502 | } |
| 503 | |
| 504 | omap_crtc->enabled = false; |
| 505 | |
| 506 | omap_crtc_setup(crtc); |
| 507 | omap_crtc_flush(crtc); |
| 508 | } |
| 509 | |
Laurent Pinchart | f7a73b6 | 2015-03-05 13:45:14 +0200 | [diff] [blame] | 510 | static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 511 | { |
| 512 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
Laurent Pinchart | f7a73b6 | 2015-03-05 13:45:14 +0200 | [diff] [blame] | 513 | struct drm_display_mode *mode = &crtc->state->adjusted_mode; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 514 | |
| 515 | DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", |
Laurent Pinchart | f7a73b6 | 2015-03-05 13:45:14 +0200 | [diff] [blame] | 516 | omap_crtc->name, mode->base.id, mode->name, |
| 517 | mode->vrefresh, mode->clock, |
| 518 | mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, |
| 519 | mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal, |
| 520 | mode->type, mode->flags); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 521 | |
| 522 | copy_timings_drm_to_omap(&omap_crtc->timings, mode); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 523 | } |
| 524 | |
Laurent Pinchart | de8e410 | 2015-03-05 13:39:56 +0200 | [diff] [blame] | 525 | static void omap_crtc_atomic_begin(struct drm_crtc *crtc) |
| 526 | { |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 527 | struct drm_pending_vblank_event *event = crtc->state->event; |
| 528 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 529 | struct drm_device *dev = crtc->dev; |
| 530 | unsigned long flags; |
| 531 | |
Laurent Pinchart | de8e410 | 2015-03-05 13:39:56 +0200 | [diff] [blame] | 532 | dispc_runtime_get(); |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 533 | |
| 534 | if (event) { |
| 535 | WARN_ON(omap_crtc->event); |
| 536 | WARN_ON(drm_crtc_vblank_get(crtc) != 0); |
| 537 | |
| 538 | spin_lock_irqsave(&dev->event_lock, flags); |
| 539 | omap_crtc->event = event; |
| 540 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 541 | } |
Laurent Pinchart | de8e410 | 2015-03-05 13:39:56 +0200 | [diff] [blame] | 542 | } |
| 543 | |
| 544 | static void omap_crtc_atomic_flush(struct drm_crtc *crtc) |
| 545 | { |
| 546 | omap_crtc_flush(crtc); |
| 547 | |
| 548 | dispc_runtime_put(); |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 549 | |
| 550 | crtc->invert_dimensions = !!(crtc->primary->state->rotation & |
| 551 | (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))); |
Laurent Pinchart | de8e410 | 2015-03-05 13:39:56 +0200 | [diff] [blame] | 552 | } |
| 553 | |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 554 | static int omap_crtc_atomic_set_property(struct drm_crtc *crtc, |
| 555 | struct drm_crtc_state *state, |
| 556 | struct drm_property *property, |
| 557 | uint64_t val) |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 558 | { |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 559 | struct drm_plane_state *plane_state; |
| 560 | struct drm_plane *plane = crtc->primary; |
Rob Clark | 1e0fdfc | 2012-09-04 11:36:20 -0500 | [diff] [blame] | 561 | |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 562 | /* |
| 563 | * Delegate property set to the primary plane. Get the plane state and |
| 564 | * set the property directly. |
| 565 | */ |
| 566 | |
| 567 | plane_state = drm_atomic_get_plane_state(state->state, plane); |
| 568 | if (!plane_state) |
| 569 | return -EINVAL; |
| 570 | |
| 571 | return drm_atomic_plane_set_property(plane, plane_state, property, val); |
| 572 | } |
| 573 | |
| 574 | static int omap_crtc_atomic_get_property(struct drm_crtc *crtc, |
| 575 | const struct drm_crtc_state *state, |
| 576 | struct drm_property *property, |
| 577 | uint64_t *val) |
| 578 | { |
| 579 | /* |
| 580 | * Delegate property get to the primary plane. The |
| 581 | * drm_atomic_plane_get_property() function isn't exported, but can be |
| 582 | * called through drm_object_property_get_value() as that will call |
| 583 | * drm_atomic_get_property() for atomic drivers. |
| 584 | */ |
| 585 | return drm_object_property_get_value(&crtc->primary->base, property, |
| 586 | val); |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 587 | } |
| 588 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 589 | static const struct drm_crtc_funcs omap_crtc_funcs = { |
Laurent Pinchart | 69a1226 | 2015-03-05 21:38:16 +0200 | [diff] [blame] | 590 | .reset = drm_atomic_helper_crtc_reset, |
Laurent Pinchart | 9416c9d | 2015-03-05 21:54:54 +0200 | [diff] [blame] | 591 | .set_config = drm_atomic_helper_set_config, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 592 | .destroy = omap_crtc_destroy, |
Laurent Pinchart | fa16d26 | 2015-03-06 16:01:53 +0200 | [diff] [blame] | 593 | .page_flip = drm_atomic_helper_page_flip, |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 594 | .set_property = drm_atomic_helper_crtc_set_property, |
Laurent Pinchart | 69a1226 | 2015-03-05 21:38:16 +0200 | [diff] [blame] | 595 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, |
| 596 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, |
Laurent Pinchart | afc3493 | 2015-03-06 18:35:16 +0200 | [diff] [blame] | 597 | .atomic_set_property = omap_crtc_atomic_set_property, |
| 598 | .atomic_get_property = omap_crtc_atomic_get_property, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 599 | }; |
| 600 | |
| 601 | static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 602 | .mode_fixup = omap_crtc_mode_fixup, |
Laurent Pinchart | f7a73b6 | 2015-03-05 13:45:14 +0200 | [diff] [blame] | 603 | .mode_set_nofb = omap_crtc_mode_set_nofb, |
Laurent Pinchart | f1d57fb | 2015-03-05 22:13:22 +0200 | [diff] [blame] | 604 | .disable = omap_crtc_disable, |
| 605 | .enable = omap_crtc_enable, |
Laurent Pinchart | de8e410 | 2015-03-05 13:39:56 +0200 | [diff] [blame] | 606 | .atomic_begin = omap_crtc_atomic_begin, |
| 607 | .atomic_flush = omap_crtc_atomic_flush, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 608 | }; |
| 609 | |
Laurent Pinchart | 971fb3e | 2015-01-18 01:12:59 +0200 | [diff] [blame] | 610 | /* ----------------------------------------------------------------------------- |
| 611 | * Init and Cleanup |
| 612 | */ |
Tomi Valkeinen | e2f8fd7 | 2014-04-02 14:31:57 +0300 | [diff] [blame] | 613 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 614 | static const char *channel_names[] = { |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 615 | [OMAP_DSS_CHANNEL_LCD] = "lcd", |
| 616 | [OMAP_DSS_CHANNEL_DIGIT] = "tv", |
| 617 | [OMAP_DSS_CHANNEL_LCD2] = "lcd2", |
| 618 | [OMAP_DSS_CHANNEL_LCD3] = "lcd3", |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 619 | }; |
| 620 | |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 621 | void omap_crtc_pre_init(void) |
| 622 | { |
| 623 | dss_install_mgr_ops(&mgr_ops); |
| 624 | } |
| 625 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 626 | void omap_crtc_pre_uninit(void) |
| 627 | { |
| 628 | dss_uninstall_mgr_ops(); |
| 629 | } |
| 630 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 631 | /* initialize crtc */ |
| 632 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 633 | struct drm_plane *plane, enum omap_channel channel, int id) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 634 | { |
| 635 | struct drm_crtc *crtc = NULL; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 636 | struct omap_crtc *omap_crtc; |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 637 | int ret; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 638 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 639 | DBG("%s", channel_names[channel]); |
| 640 | |
| 641 | omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL); |
Joe Perches | 78110bb | 2013-02-11 09:41:29 -0800 | [diff] [blame] | 642 | if (!omap_crtc) |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 643 | return NULL; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 644 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 645 | crtc = &omap_crtc->base; |
Rob Clark | bb5c2d9 | 2012-01-16 12:51:16 -0600 | [diff] [blame] | 646 | |
Laurent Pinchart | c397cfd | 2015-01-25 22:42:30 +0200 | [diff] [blame] | 647 | init_waitqueue_head(&omap_crtc->flip_wait); |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 648 | init_completion(&omap_crtc->completion); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 649 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 650 | omap_crtc->channel = channel; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 651 | omap_crtc->name = channel_names[channel]; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 652 | |
Laurent Pinchart | a42133a | 2015-01-17 19:09:26 +0200 | [diff] [blame] | 653 | omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc); |
| 654 | omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 655 | |
| 656 | omap_crtc->error_irq.irqmask = |
| 657 | dispc_mgr_get_sync_lost_irq(channel); |
| 658 | omap_crtc->error_irq.irq = omap_crtc_error_irq; |
| 659 | omap_irq_register(dev, &omap_crtc->error_irq); |
| 660 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 661 | /* temporary: */ |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 662 | omap_crtc->mgr = omap_dss_get_overlay_manager(channel); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 663 | |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 664 | ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, |
| 665 | &omap_crtc_funcs); |
| 666 | if (ret < 0) { |
| 667 | kfree(omap_crtc); |
| 668 | return NULL; |
| 669 | } |
| 670 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 671 | drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs); |
| 672 | |
Laurent Pinchart | ef6b0e0 | 2015-01-11 00:11:18 +0200 | [diff] [blame] | 673 | omap_plane_install_properties(crtc->primary, &crtc->base); |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 674 | |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 675 | omap_crtcs[channel] = omap_crtc; |
| 676 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 677 | return crtc; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 678 | } |