blob: bf52ae1fdffff63f21b80ac4cd9062b2cf0e1ce8 [file] [log] [blame]
Sujithf1dc5602008-10-29 10:16:30 +05301/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Sujithf1dc5602008-10-29 10:16:30 +05303 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -070017#include "hw.h"
Sujithf1dc5602008-10-29 10:16:30 +053018
Sujith79d7f4b2010-06-01 15:14:06 +053019void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)
20{
21 REG_WRITE(ah, reg, val);
22
23 if (ah->config.analog_shiftreg)
24 udelay(100);
25}
26
Sujithb5aec952009-08-07 09:45:15 +053027void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
28 u32 shift, u32 val)
Sujithf1dc5602008-10-29 10:16:30 +053029{
30 u32 regVal;
31
32 regVal = REG_READ(ah, reg) & ~mask;
33 regVal |= (val << shift) & mask;
34
35 REG_WRITE(ah, reg, regVal);
36
Sujith2660b812009-02-09 13:27:26 +053037 if (ah->config.analog_shiftreg)
Sujithf1dc5602008-10-29 10:16:30 +053038 udelay(100);
Sujithf1dc5602008-10-29 10:16:30 +053039}
40
Sujithb5aec952009-08-07 09:45:15 +053041int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
42 int16_t targetLeft, int16_t targetRight)
Sujithf1dc5602008-10-29 10:16:30 +053043{
44 int16_t rv;
45
46 if (srcRight == srcLeft) {
47 rv = targetLeft;
48 } else {
49 rv = (int16_t) (((target - srcLeft) * targetRight +
50 (srcRight - target) * targetLeft) /
51 (srcRight - srcLeft));
52 }
53 return rv;
54}
55
Sujithb5aec952009-08-07 09:45:15 +053056bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
57 u16 *indexL, u16 *indexR)
Sujithf1dc5602008-10-29 10:16:30 +053058{
59 u16 i;
60
61 if (target <= pList[0]) {
62 *indexL = *indexR = 0;
63 return true;
64 }
65 if (target >= pList[listSize - 1]) {
66 *indexL = *indexR = (u16) (listSize - 1);
67 return true;
68 }
69
70 for (i = 0; i < listSize - 1; i++) {
71 if (pList[i] == target) {
72 *indexL = *indexR = i;
73 return true;
74 }
75 if (target < pList[i + 1]) {
76 *indexL = i;
77 *indexR = (u16) (i + 1);
78 return false;
79 }
80 }
81 return false;
82}
83
Sujith Manoharan04cf53f2011-01-04 13:17:28 +053084void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
85 int eep_start_loc, int size)
86{
87 int i = 0, j, addr;
88 u32 addrdata[8];
89 u32 data[8];
90
91 for (addr = 0; addr < size; addr++) {
92 addrdata[i] = AR5416_EEPROM_OFFSET +
93 ((addr + eep_start_loc) << AR5416_EEPROM_S);
94 i++;
95 if (i == 8) {
96 REG_READ_MULTI(ah, addrdata, data, i);
97
98 for (j = 0; j < i; j++) {
99 *eep_data = data[j];
100 eep_data++;
101 }
102 i = 0;
103 }
104 }
105
106 if (i != 0) {
107 REG_READ_MULTI(ah, addrdata, data, i);
108
109 for (j = 0; j < i; j++) {
110 *eep_data = data[j];
111 eep_data++;
112 }
113 }
114}
115
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -0700116bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
Sujithf1dc5602008-10-29 10:16:30 +0530117{
Gabor Juhos2fd2cdf2012-12-10 15:30:25 +0100118 bool ret;
119
120 ret = common->bus_ops->eeprom_read(common, off, data);
121 if (!ret)
Gabor Juhos7177d8f2012-12-10 15:30:26 +0100122 ath_dbg(common, EEPROM,
123 "unable to read eeprom region at offset %u\n", off);
Gabor Juhos2fd2cdf2012-12-10 15:30:25 +0100124
125 return ret;
Sujithf1dc5602008-10-29 10:16:30 +0530126}
127
Sujithb5aec952009-08-07 09:45:15 +0530128void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
129 u8 *pVpdList, u16 numIntercepts,
130 u8 *pRetVpdList)
Sujithf74df6f2009-02-09 13:27:24 +0530131{
132 u16 i, k;
133 u8 currPwr = pwrMin;
134 u16 idxL = 0, idxR = 0;
135
136 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
137 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
138 numIntercepts, &(idxL),
139 &(idxR));
140 if (idxR < 1)
141 idxR = 1;
142 if (idxL == numIntercepts - 1)
143 idxL = (u16) (numIntercepts - 2);
144 if (pPwrList[idxL] == pPwrList[idxR])
145 k = pVpdList[idxL];
146 else
147 k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
148 (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
149 (pPwrList[idxR] - pPwrList[idxL]));
150 pRetVpdList[i] = (u8) k;
151 currPwr += 2;
152 }
Sujithf74df6f2009-02-09 13:27:24 +0530153}
154
Sujithb5aec952009-08-07 09:45:15 +0530155void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
156 struct ath9k_channel *chan,
157 struct cal_target_power_leg *powInfo,
158 u16 numChannels,
159 struct cal_target_power_leg *pNewPower,
160 u16 numRates, bool isExtTarget)
Sujithf74df6f2009-02-09 13:27:24 +0530161{
162 struct chan_centers centers;
163 u16 clo, chi;
164 int i;
165 int matchIndex = -1, lowIndex = -1;
166 u16 freq;
167
168 ath9k_hw_get_channel_centers(ah, chan, &centers);
169 freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
170
171 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
172 IS_CHAN_2GHZ(chan))) {
173 matchIndex = 0;
174 } else {
175 for (i = 0; (i < numChannels) &&
176 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
177 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
178 IS_CHAN_2GHZ(chan))) {
179 matchIndex = i;
180 break;
Roel Kluin73f57f82009-08-07 23:50:00 +0200181 } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
182 IS_CHAN_2GHZ(chan)) && i > 0 &&
183 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
184 IS_CHAN_2GHZ(chan))) {
Sujithf74df6f2009-02-09 13:27:24 +0530185 lowIndex = i - 1;
186 break;
187 }
188 }
189 if ((matchIndex == -1) && (lowIndex == -1))
190 matchIndex = i - 1;
191 }
192
193 if (matchIndex != -1) {
194 *pNewPower = powInfo[matchIndex];
195 } else {
196 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
197 IS_CHAN_2GHZ(chan));
198 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
199 IS_CHAN_2GHZ(chan));
200
201 for (i = 0; i < numRates; i++) {
202 pNewPower->tPow2x[i] =
203 (u8)ath9k_hw_interpolate(freq, clo, chi,
204 powInfo[lowIndex].tPow2x[i],
205 powInfo[lowIndex + 1].tPow2x[i]);
206 }
207 }
208}
209
Sujithb5aec952009-08-07 09:45:15 +0530210void ath9k_hw_get_target_powers(struct ath_hw *ah,
211 struct ath9k_channel *chan,
212 struct cal_target_power_ht *powInfo,
213 u16 numChannels,
214 struct cal_target_power_ht *pNewPower,
215 u16 numRates, bool isHt40Target)
Sujithf74df6f2009-02-09 13:27:24 +0530216{
217 struct chan_centers centers;
218 u16 clo, chi;
219 int i;
220 int matchIndex = -1, lowIndex = -1;
221 u16 freq;
222
223 ath9k_hw_get_channel_centers(ah, chan, &centers);
224 freq = isHt40Target ? centers.synth_center : centers.ctl_center;
225
226 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
227 matchIndex = 0;
228 } else {
229 for (i = 0; (i < numChannels) &&
230 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
231 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
232 IS_CHAN_2GHZ(chan))) {
233 matchIndex = i;
234 break;
235 } else
Roel Kluin73f57f82009-08-07 23:50:00 +0200236 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
237 IS_CHAN_2GHZ(chan)) && i > 0 &&
238 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
239 IS_CHAN_2GHZ(chan))) {
Sujithf74df6f2009-02-09 13:27:24 +0530240 lowIndex = i - 1;
241 break;
242 }
243 }
244 if ((matchIndex == -1) && (lowIndex == -1))
245 matchIndex = i - 1;
246 }
247
248 if (matchIndex != -1) {
249 *pNewPower = powInfo[matchIndex];
250 } else {
251 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
252 IS_CHAN_2GHZ(chan));
253 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
254 IS_CHAN_2GHZ(chan));
255
256 for (i = 0; i < numRates; i++) {
257 pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
258 clo, chi,
259 powInfo[lowIndex].tPow2x[i],
260 powInfo[lowIndex + 1].tPow2x[i]);
261 }
262 }
263}
264
Sujithb5aec952009-08-07 09:45:15 +0530265u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
266 bool is2GHz, int num_band_edges)
Sujithf74df6f2009-02-09 13:27:24 +0530267{
Felix Fietkau4ddfcd72010-12-12 00:51:08 +0100268 u16 twiceMaxEdgePower = MAX_RATE_POWER;
Sujithf74df6f2009-02-09 13:27:24 +0530269 int i;
270
271 for (i = 0; (i < num_band_edges) &&
272 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
273 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
Felix Fietkaue702ba12010-12-01 19:07:46 +0100274 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
Sujithf74df6f2009-02-09 13:27:24 +0530275 break;
276 } else if ((i > 0) &&
277 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
278 is2GHz))) {
279 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
280 is2GHz) < freq &&
Felix Fietkaue702ba12010-12-01 19:07:46 +0100281 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
Sujithf74df6f2009-02-09 13:27:24 +0530282 twiceMaxEdgePower =
Felix Fietkaue702ba12010-12-01 19:07:46 +0100283 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
Sujithf74df6f2009-02-09 13:27:24 +0530284 }
285 break;
286 }
287 }
288
289 return twiceMaxEdgePower;
290}
291
Gabor Juhosea6f7922012-04-14 22:01:58 +0200292u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,
293 u8 antenna_reduction)
294{
Gabor Juhos8f942b92012-04-14 22:01:59 +0200295 u16 reduction = antenna_reduction;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200296
297 /*
298 * Reduce scaled Power by number of chains active
299 * to get the per chain tx power level.
300 */
301 switch (ar5416_get_ntxchains(ah->txchainmask)) {
302 case 1:
303 break;
304 case 2:
Gabor Juhos6010e722012-04-16 22:22:49 +0200305 reduction += POWER_CORRECTION_FOR_TWO_CHAIN;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200306 break;
307 case 3:
Gabor Juhos6010e722012-04-16 22:22:49 +0200308 reduction += POWER_CORRECTION_FOR_THREE_CHAIN;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200309 break;
310 }
311
Gabor Juhos8f942b92012-04-14 22:01:59 +0200312 if (power_limit > reduction)
313 power_limit -= reduction;
314 else
315 power_limit = 0;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200316
Gabor Juhos8f942b92012-04-14 22:01:59 +0200317 return power_limit;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200318}
319
Sujitha55f8582010-06-01 15:14:07 +0530320void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
321{
322 struct ath_common *common = ath9k_hw_common(ah);
323 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
324
325 switch (ar5416_get_ntxchains(ah->txchainmask)) {
326 case 1:
327 break;
328 case 2:
Gabor Juhos6010e722012-04-16 22:22:49 +0200329 regulatory->max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN;
Sujitha55f8582010-06-01 15:14:07 +0530330 break;
331 case 3:
Gabor Juhos6010e722012-04-16 22:22:49 +0200332 regulatory->max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN;
Sujitha55f8582010-06-01 15:14:07 +0530333 break;
334 default:
Joe Perchesd2182b62011-12-15 14:55:53 -0800335 ath_dbg(common, EEPROM, "Invalid chainmask configuration\n");
Sujitha55f8582010-06-01 15:14:07 +0530336 break;
337 }
338}
339
Felix Fietkau115277a2010-12-12 00:51:09 +0100340void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
341 struct ath9k_channel *chan,
342 void *pRawDataSet,
343 u8 *bChans, u16 availPiers,
344 u16 tPdGainOverlap,
345 u16 *pPdGainBoundaries, u8 *pPDADCValues,
346 u16 numXpdGains)
347{
348 int i, j, k;
349 int16_t ss;
350 u16 idxL = 0, idxR = 0, numPiers;
351 static u8 vpdTableL[AR5416_NUM_PD_GAINS]
352 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
353 static u8 vpdTableR[AR5416_NUM_PD_GAINS]
354 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
355 static u8 vpdTableI[AR5416_NUM_PD_GAINS]
356 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
357
358 u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
359 u8 minPwrT4[AR5416_NUM_PD_GAINS];
360 u8 maxPwrT4[AR5416_NUM_PD_GAINS];
361 int16_t vpdStep;
362 int16_t tmpVal;
363 u16 sizeCurrVpdTable, maxIndex, tgtIndex;
364 bool match;
365 int16_t minDelta = 0;
366 struct chan_centers centers;
367 int pdgain_boundary_default;
368 struct cal_data_per_freq *data_def = pRawDataSet;
369 struct cal_data_per_freq_4k *data_4k = pRawDataSet;
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100370 struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
Felix Fietkau115277a2010-12-12 00:51:09 +0100371 bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100372 int intercepts;
373
374 if (AR_SREV_9287(ah))
375 intercepts = AR9287_PD_GAIN_ICEPTS;
376 else
377 intercepts = AR5416_PD_GAIN_ICEPTS;
Felix Fietkau115277a2010-12-12 00:51:09 +0100378
379 memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
380 ath9k_hw_get_channel_centers(ah, chan, &centers);
381
382 for (numPiers = 0; numPiers < availPiers; numPiers++) {
383 if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
384 break;
385 }
386
387 match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
388 IS_CHAN_2GHZ(chan)),
389 bChans, numPiers, &idxL, &idxR);
390
391 if (match) {
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100392 if (AR_SREV_9287(ah)) {
393 /* FIXME: array overrun? */
394 for (i = 0; i < numXpdGains; i++) {
395 minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
396 maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4];
397 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
398 data_9287[idxL].pwrPdg[i],
399 data_9287[idxL].vpdPdg[i],
400 intercepts,
401 vpdTableI[i]);
402 }
403 } else if (eeprom_4k) {
Felix Fietkau115277a2010-12-12 00:51:09 +0100404 for (i = 0; i < numXpdGains; i++) {
405 minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
406 maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4];
407 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
408 data_4k[idxL].pwrPdg[i],
409 data_4k[idxL].vpdPdg[i],
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100410 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100411 vpdTableI[i]);
412 }
413 } else {
414 for (i = 0; i < numXpdGains; i++) {
415 minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
416 maxPwrT4[i] = data_def[idxL].pwrPdg[i][4];
417 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
418 data_def[idxL].pwrPdg[i],
419 data_def[idxL].vpdPdg[i],
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100420 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100421 vpdTableI[i]);
422 }
423 }
424 } else {
425 for (i = 0; i < numXpdGains; i++) {
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100426 if (AR_SREV_9287(ah)) {
427 pVpdL = data_9287[idxL].vpdPdg[i];
428 pPwrL = data_9287[idxL].pwrPdg[i];
429 pVpdR = data_9287[idxR].vpdPdg[i];
430 pPwrR = data_9287[idxR].pwrPdg[i];
431 } else if (eeprom_4k) {
Felix Fietkau115277a2010-12-12 00:51:09 +0100432 pVpdL = data_4k[idxL].vpdPdg[i];
433 pPwrL = data_4k[idxL].pwrPdg[i];
434 pVpdR = data_4k[idxR].vpdPdg[i];
435 pPwrR = data_4k[idxR].pwrPdg[i];
436 } else {
437 pVpdL = data_def[idxL].vpdPdg[i];
438 pPwrL = data_def[idxL].pwrPdg[i];
439 pVpdR = data_def[idxR].vpdPdg[i];
440 pPwrR = data_def[idxR].pwrPdg[i];
441 }
442
443 minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
444
445 maxPwrT4[i] =
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100446 min(pPwrL[intercepts - 1],
447 pPwrR[intercepts - 1]);
Felix Fietkau115277a2010-12-12 00:51:09 +0100448
449
450 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
451 pPwrL, pVpdL,
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100452 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100453 vpdTableL[i]);
454 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
455 pPwrR, pVpdR,
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100456 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100457 vpdTableR[i]);
458
459 for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
460 vpdTableI[i][j] =
461 (u8)(ath9k_hw_interpolate((u16)
462 FREQ2FBIN(centers.
463 synth_center,
464 IS_CHAN_2GHZ
465 (chan)),
466 bChans[idxL], bChans[idxR],
467 vpdTableL[i][j], vpdTableR[i][j]));
468 }
469 }
470 }
471
472 k = 0;
473
474 for (i = 0; i < numXpdGains; i++) {
475 if (i == (numXpdGains - 1))
476 pPdGainBoundaries[i] =
477 (u16)(maxPwrT4[i] / 2);
478 else
479 pPdGainBoundaries[i] =
480 (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
481
482 pPdGainBoundaries[i] =
483 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
484
Felix Fietkau1b8714f2011-09-15 14:25:35 +0200485 minDelta = 0;
Felix Fietkau115277a2010-12-12 00:51:09 +0100486
487 if (i == 0) {
488 if (AR_SREV_9280_20_OR_LATER(ah))
489 ss = (int16_t)(0 - (minPwrT4[i] / 2));
490 else
491 ss = 0;
492 } else {
493 ss = (int16_t)((pPdGainBoundaries[i - 1] -
494 (minPwrT4[i] / 2)) -
495 tPdGainOverlap + 1 + minDelta);
496 }
497 vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
498 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
499
500 while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
501 tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
502 pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
503 ss++;
504 }
505
506 sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
507 tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
508 (minPwrT4[i] / 2));
509 maxIndex = (tgtIndex < sizeCurrVpdTable) ?
510 tgtIndex : sizeCurrVpdTable;
511
512 while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
513 pPDADCValues[k++] = vpdTableI[i][ss++];
514 }
515
516 vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
517 vpdTableI[i][sizeCurrVpdTable - 2]);
518 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
519
520 if (tgtIndex >= maxIndex) {
521 while ((ss <= tgtIndex) &&
522 (k < (AR5416_NUM_PDADC_VALUES - 1))) {
523 tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
524 (ss - maxIndex + 1) * vpdStep));
525 pPDADCValues[k++] = (u8)((tmpVal > 255) ?
526 255 : tmpVal);
527 ss++;
528 }
529 }
530 }
531
532 if (eeprom_4k)
533 pdgain_boundary_default = 58;
534 else
535 pdgain_boundary_default = pPdGainBoundaries[i - 1];
536
537 while (i < AR5416_PD_GAINS_IN_MASK) {
538 pPdGainBoundaries[i] = pdgain_boundary_default;
539 i++;
540 }
541
542 while (k < AR5416_NUM_PDADC_VALUES) {
543 pPDADCValues[k] = pPDADCValues[k - 1];
544 k++;
545 }
546}
547
Luis R. Rodriguezf637cfd2009-08-03 12:24:46 -0700548int ath9k_hw_eeprom_init(struct ath_hw *ah)
Sujithf1dc5602008-10-29 10:16:30 +0530549{
550 int status;
Sujithc16c9d02009-08-07 09:45:11 +0530551
Senthil Balasubramanian15c9ee72010-04-15 17:39:14 -0400552 if (AR_SREV_9300_20_OR_LATER(ah))
553 ah->eep_ops = &eep_ar9300_ops;
554 else if (AR_SREV_9287(ah)) {
Luis R. Rodriguez0b8f6f2b12010-04-15 17:39:12 -0400555 ah->eep_ops = &eep_ar9287_ops;
Luis R. Rodriguezd7e7d222009-08-03 23:14:12 -0400556 } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
Sujithf74df6f2009-02-09 13:27:24 +0530557 ah->eep_ops = &eep_4k_ops;
558 } else {
Sujithf74df6f2009-02-09 13:27:24 +0530559 ah->eep_ops = &eep_def_ops;
560 }
Senthil Balasubramaniane7594072008-12-08 19:43:48 +0530561
Sujithf74df6f2009-02-09 13:27:24 +0530562 if (!ah->eep_ops->fill_eeprom(ah))
Sujithf1dc5602008-10-29 10:16:30 +0530563 return -EIO;
564
Sujithf74df6f2009-02-09 13:27:24 +0530565 status = ah->eep_ops->check_eeprom(ah);
Sujithf1dc5602008-10-29 10:16:30 +0530566
567 return status;
568}