blob: 742f15eb333113fe7f4131c6d31c8043df658487 [file] [log] [blame]
Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
43#define INTEL_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang54a25f82009-10-30 11:44:26 +010046static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
47 "INTEL HDMI 0",
48 "INTEL HDMI 1",
49};
Wu, Fengguang91504872008-11-05 11:16:56 +080050
Wu, Fengguang91504872008-11-05 11:16:56 +080051struct intel_hdmi_spec {
Wu Fengguang54a25f82009-10-30 11:44:26 +010052 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
Wu Fengguang54a25f82009-10-30 11:44:26 +010065 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
66
67 /*
68 * export one pcm per pipe
69 */
70 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
Wu, Fengguang91504872008-11-05 11:16:56 +080071};
72
Wu, Fengguang91504872008-11-05 11:16:56 +080073struct hdmi_audio_infoframe {
74 u8 type; /* 0x84 */
75 u8 ver; /* 0x01 */
76 u8 len; /* 0x0a */
77
78 u8 checksum; /* PB0 */
79 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
80 u8 SS01_SF24;
81 u8 CXT04;
82 u8 CA;
83 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang4e19c582008-11-19 15:13:59 +080084 u8 reserved[5]; /* PB6 - PB10 */
Wu, Fengguang91504872008-11-05 11:16:56 +080085};
86
87/*
Wu Fengguang698544d2008-11-19 08:56:17 +080088 * CEA speaker placement:
89 *
90 * FLH FCH FRH
91 * FLW FL FLC FC FRC FR FRW
92 *
93 * LFE
94 * TC
95 *
96 * RL RLC RC RRC RR
97 *
98 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
99 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
100 */
101enum cea_speaker_placement {
102 FL = (1 << 0), /* Front Left */
103 FC = (1 << 1), /* Front Center */
104 FR = (1 << 2), /* Front Right */
105 FLC = (1 << 3), /* Front Left Center */
106 FRC = (1 << 4), /* Front Right Center */
107 RL = (1 << 5), /* Rear Left */
108 RC = (1 << 6), /* Rear Center */
109 RR = (1 << 7), /* Rear Right */
110 RLC = (1 << 8), /* Rear Left Center */
111 RRC = (1 << 9), /* Rear Right Center */
112 LFE = (1 << 10), /* Low Frequency Effect */
113 FLW = (1 << 11), /* Front Left Wide */
114 FRW = (1 << 12), /* Front Right Wide */
115 FLH = (1 << 13), /* Front Left High */
116 FCH = (1 << 14), /* Front Center High */
117 FRH = (1 << 15), /* Front Right High */
118 TC = (1 << 16), /* Top Center */
119};
120
121/*
122 * ELD SA bits in the CEA Speaker Allocation data block
123 */
124static int eld_speaker_allocation_bits[] = {
125 [0] = FL | FR,
126 [1] = LFE,
127 [2] = FC,
128 [3] = RL | RR,
129 [4] = RC,
130 [5] = FLC | FRC,
131 [6] = RLC | RRC,
132 /* the following are not defined in ELD yet */
133 [7] = FLW | FRW,
134 [8] = FLH | FRH,
135 [9] = TC,
136 [10] = FCH,
137};
138
139struct cea_channel_speaker_allocation {
140 int ca_index;
141 int speakers[8];
142
143 /* derived values, just for convenience */
144 int channels;
145 int spk_mask;
146};
147
148/*
149 * This is an ordered list!
150 *
151 * The preceding ones have better chances to be selected by
152 * hdmi_setup_channel_allocation().
153 */
154static struct cea_channel_speaker_allocation channel_allocations[] = {
155/* channel: 8 7 6 5 4 3 2 1 */
156{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
157 /* 2.1 */
158{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
Wu Fengguang4e19c582008-11-19 15:13:59 +0800159 /* Dolby Surround */
Wu Fengguang698544d2008-11-19 08:56:17 +0800160{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
161{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
162{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
163{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
164{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
165{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
166{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
167{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
168{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
169 /* 5.1 */
170{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
171{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
172{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
173{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
174 /* 6.1 */
175{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
176{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
177{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
178{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
179 /* 7.1 */
180{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
181{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
182{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
183{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
184{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
185{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
186{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
187{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
188{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
189{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
190{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
191{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
192{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
193{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
194{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
195{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
196{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
197{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
198{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
199{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
200{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
201{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
202{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
203{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
204{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
205{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
206{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
207{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
208{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
209{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
210{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
211};
212
Wu Fengguang54a25f82009-10-30 11:44:26 +0100213
Wu Fengguangf4243672009-10-30 11:45:35 +0100214/*
215 * HDA/HDMI auto parsing
216 */
217
Wu Fengguang54a25f82009-10-30 11:44:26 +0100218static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
219{
220 int i;
221
222 for (i = 0; nids[i]; i++)
223 if (nids[i] == nid)
224 return i;
225
226 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
227 return -EINVAL;
228}
229
Wu Fengguangf4243672009-10-30 11:45:35 +0100230static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
231{
232 struct intel_hdmi_spec *spec = codec->spec;
233 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
234 int conn_len, curr;
235 int index;
236
237 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
238 snd_printk(KERN_WARNING
239 "HDMI: pin %d wcaps %#x "
240 "does not support connection list\n",
241 pin_nid, get_wcaps(codec, pin_nid));
242 return -EINVAL;
243 }
244
245 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
246 HDA_MAX_CONNECTIONS);
247 if (conn_len > 1)
248 curr = snd_hda_codec_read(codec, pin_nid, 0,
249 AC_VERB_GET_CONNECT_SEL, 0);
250 else
251 curr = 0;
252
253 index = hda_node_index(spec->pin, pin_nid);
254 if (index < 0)
255 return -EINVAL;
256
257 spec->pin_cvt[index] = conn_list[curr];
258
259 return 0;
260}
261
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800262static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
263 struct hdmi_eld *eld)
264{
265 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
266 snd_hdmi_show_eld(eld);
267}
268
269static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
270 struct hdmi_eld *eld)
271{
272 int present = snd_hda_pin_sense(codec, pin_nid);
273
274 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
275 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
276
277 if (present & AC_PINSENSE_ELDV)
278 hdmi_get_show_eld(codec, pin_nid, eld);
279}
280
Wu Fengguangf4243672009-10-30 11:45:35 +0100281static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
282{
283 struct intel_hdmi_spec *spec = codec->spec;
284
285 if (spec->num_pins >= INTEL_HDMI_PINS) {
286 snd_printk(KERN_WARNING
287 "HDMI: no space for pin %d \n", pin_nid);
288 return -EINVAL;
289 }
290
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800291 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
292
Wu Fengguangf4243672009-10-30 11:45:35 +0100293 spec->pin[spec->num_pins] = pin_nid;
294 spec->num_pins++;
295
296 /*
297 * It is assumed that converter nodes come first in the node list and
298 * hence have been registered and usable now.
299 */
300 return intel_hdmi_read_pin_conn(codec, pin_nid);
301}
302
303static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
304{
305 struct intel_hdmi_spec *spec = codec->spec;
306
307 if (spec->num_cvts >= INTEL_HDMI_CVTS) {
308 snd_printk(KERN_WARNING
309 "HDMI: no space for converter %d \n", nid);
310 return -EINVAL;
311 }
312
313 spec->cvt[spec->num_cvts] = nid;
314 spec->num_cvts++;
315
316 return 0;
317}
318
319static int intel_hdmi_parse_codec(struct hda_codec *codec)
320{
321 hda_nid_t nid;
322 int i, nodes;
323
324 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
325 if (!nid || nodes < 0) {
326 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
327 return -EINVAL;
328 }
329
330 for (i = 0; i < nodes; i++, nid++) {
331 unsigned int caps;
332 unsigned int type;
333
334 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
335 type = get_wcaps_type(caps);
336
337 if (!(caps & AC_WCAP_DIGITAL))
338 continue;
339
340 switch (type) {
341 case AC_WID_AUD_OUT:
342 if (intel_hdmi_add_cvt(codec, nid) < 0)
343 return -EINVAL;
344 break;
345 case AC_WID_PIN:
346 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
Wu Fengguang728765b2009-12-11 12:28:34 +0800347 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
Wu Fengguangf4243672009-10-30 11:45:35 +0100348 continue;
349 if (intel_hdmi_add_pin(codec, nid) < 0)
350 return -EINVAL;
351 break;
352 }
353 }
354
355 return 0;
356}
357
Wu Fengguang698544d2008-11-19 08:56:17 +0800358/*
Wu, Fengguang91504872008-11-05 11:16:56 +0800359 * HDMI routines
360 */
361
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100362#ifdef BE_PARANOID
Wu Fengguang6797cf22009-10-30 11:40:40 +0100363static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800364 int *packet_index, int *byte_index)
365{
366 int val;
367
Wu Fengguang6797cf22009-10-30 11:40:40 +0100368 val = snd_hda_codec_read(codec, pin_nid, 0,
369 AC_VERB_GET_HDMI_DIP_INDEX, 0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800370
371 *packet_index = val >> 5;
372 *byte_index = val & 0x1f;
373}
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100374#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800375
Wu Fengguang6797cf22009-10-30 11:40:40 +0100376static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800377 int packet_index, int byte_index)
378{
379 int val;
380
381 val = (packet_index << 5) | (byte_index & 0x1f);
382
Wu Fengguang6797cf22009-10-30 11:40:40 +0100383 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800384}
385
Wu Fengguang6797cf22009-10-30 11:40:40 +0100386static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800387 unsigned char val)
388{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100389 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800390}
391
Wu Fengguang6797cf22009-10-30 11:40:40 +0100392static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800393{
Wu Fengguang796359d2008-11-17 16:57:33 +0800394 /* Unmute */
Wu Fengguang559059b2009-08-02 16:48:55 +0800395 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
396 snd_hda_codec_write(codec, pin_nid, 0,
Wu Fengguang796359d2008-11-17 16:57:33 +0800397 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
398 /* Enable pin out */
Wu Fengguang559059b2009-08-02 16:48:55 +0800399 snd_hda_codec_write(codec, pin_nid, 0,
400 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
Wu, Fengguang91504872008-11-05 11:16:56 +0800401}
402
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800403/*
404 * Enable Audio InfoFrame Transmission
405 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100406static void hdmi_start_infoframe_trans(struct hda_codec *codec,
407 hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800408{
Wu Fengguang559059b2009-08-02 16:48:55 +0800409 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
410 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800411 AC_DIPXMIT_BEST);
412}
Wu, Fengguang91504872008-11-05 11:16:56 +0800413
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800414/*
415 * Disable Audio InfoFrame Transmission
416 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100417static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
418 hda_nid_t pin_nid)
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800419{
Wu Fengguang559059b2009-08-02 16:48:55 +0800420 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
421 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800422 AC_DIPXMIT_DISABLE);
Wu, Fengguang91504872008-11-05 11:16:56 +0800423}
424
Wu Fengguang6797cf22009-10-30 11:40:40 +0100425static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800426{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100427 return 1 + snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800428 AC_VERB_GET_CVT_CHAN_COUNT, 0);
429}
430
Wu Fengguang6797cf22009-10-30 11:40:40 +0100431static void hdmi_set_channel_count(struct hda_codec *codec,
432 hda_nid_t nid, int chs)
Wu, Fengguang91504872008-11-05 11:16:56 +0800433{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100434 if (chs != hdmi_get_channel_count(codec, nid))
Wu Fengguang81bf31e2009-11-18 12:38:07 +0800435 snd_hda_codec_write(codec, nid, 0,
436 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
Wu, Fengguang91504872008-11-05 11:16:56 +0800437}
438
Wu Fengguang6797cf22009-10-30 11:40:40 +0100439static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800440{
441#ifdef CONFIG_SND_DEBUG_VERBOSE
442 int i;
443 int slot;
444
445 for (i = 0; i < 8; i++) {
Wu Fengguang6797cf22009-10-30 11:40:40 +0100446 slot = snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800447 AC_VERB_GET_HDMI_CHAN_SLOT, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800448 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
Wu Fengguang1e7c10f2009-11-18 12:38:00 +0800449 slot >> 4, slot & 0xf);
Wu, Fengguang91504872008-11-05 11:16:56 +0800450 }
451#endif
452}
453
Wu, Fengguang91504872008-11-05 11:16:56 +0800454
455/*
Wu Fengguang4e19c582008-11-19 15:13:59 +0800456 * Audio InfoFrame routines
Wu, Fengguang91504872008-11-05 11:16:56 +0800457 */
458
Wu Fengguang6797cf22009-10-30 11:40:40 +0100459static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800460{
461#ifdef CONFIG_SND_DEBUG_VERBOSE
462 int i;
463 int size;
464
Wu Fengguang559059b2009-08-02 16:48:55 +0800465 size = snd_hdmi_get_eld_size(codec, pin_nid);
Wu Fengguang03284c82008-11-22 09:40:53 +0800466 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800467
468 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800469 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800470 AC_VERB_GET_HDMI_DIP_SIZE, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800471 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800472 }
473#endif
474}
475
Wu Fengguang6797cf22009-10-30 11:40:40 +0100476static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800477{
478#ifdef BE_PARANOID
479 int i, j;
480 int size;
481 int pi, bi;
482 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800483 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800484 AC_VERB_GET_HDMI_DIP_SIZE, i);
485 if (size == 0)
486 continue;
487
Wu Fengguang559059b2009-08-02 16:48:55 +0800488 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800489 for (j = 1; j < 1000; j++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800490 hdmi_write_dip_byte(codec, pin_nid, 0x0);
491 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
Wu, Fengguang91504872008-11-05 11:16:56 +0800492 if (pi != i)
493 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
494 bi, pi, i);
495 if (bi == 0) /* byte index wrapped around */
496 break;
497 }
498 snd_printd(KERN_INFO
Wu Fengguang03284c82008-11-22 09:40:53 +0800499 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
500 i, size, j);
Wu, Fengguang91504872008-11-05 11:16:56 +0800501 }
502#endif
503}
504
Wu Fengguang978be6d2009-11-18 12:38:04 +0800505static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
506{
507 u8 *bytes = (u8 *)ai;
508 u8 sum = 0;
509 int i;
510
511 ai->checksum = 0;
512
513 for (i = 0; i < sizeof(*ai); i++)
514 sum += bytes[i];
515
516 ai->checksum = - sum;
517}
518
Wu Fengguang5457a982008-11-19 08:56:15 +0800519static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
Wu Fengguang6797cf22009-10-30 11:40:40 +0100520 hda_nid_t pin_nid,
521 struct hdmi_audio_infoframe *ai)
Wu, Fengguang91504872008-11-05 11:16:56 +0800522{
Wu Fengguang978be6d2009-11-18 12:38:04 +0800523 u8 *bytes = (u8 *)ai;
Wu, Fengguang91504872008-11-05 11:16:56 +0800524 int i;
525
Wu Fengguang6797cf22009-10-30 11:40:40 +0100526 hdmi_debug_dip_size(codec, pin_nid);
527 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
Wu, Fengguang91504872008-11-05 11:16:56 +0800528
Wu Fengguang978be6d2009-11-18 12:38:04 +0800529 hdmi_checksum_audio_infoframe(ai);
Wu Fengguang9a957a22009-02-11 15:22:30 +0800530
Wu Fengguang559059b2009-08-02 16:48:55 +0800531 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang6f539a92009-11-18 12:37:59 +0800532 for (i = 0; i < sizeof(*ai); i++)
Wu Fengguang978be6d2009-11-18 12:38:04 +0800533 hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800534}
535
Wu Fengguang698544d2008-11-19 08:56:17 +0800536/*
537 * Compute derived values in channel_allocations[].
538 */
539static void init_channel_allocations(void)
540{
541 int i, j;
542 struct cea_channel_speaker_allocation *p;
543
544 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
545 p = channel_allocations + i;
546 p->channels = 0;
547 p->spk_mask = 0;
548 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
549 if (p->speakers[j]) {
550 p->channels++;
551 p->spk_mask |= p->speakers[j];
552 }
553 }
554}
555
556/*
557 * The transformation takes two steps:
558 *
559 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
560 * spk_mask => (channel_allocations[]) => ai->CA
561 *
562 * TODO: it could select the wrong CA from multiple candidates.
563*/
Wu Fengguang6797cf22009-10-30 11:40:40 +0100564static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang698544d2008-11-19 08:56:17 +0800565 struct hdmi_audio_infoframe *ai)
566{
567 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100568 struct hdmi_eld *eld;
Wu Fengguang698544d2008-11-19 08:56:17 +0800569 int i;
570 int spk_mask = 0;
571 int channels = 1 + (ai->CC02_CT47 & 0x7);
572 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
573
574 /*
575 * CA defaults to 0 for basic stereo audio
576 */
Wu Fengguang698544d2008-11-19 08:56:17 +0800577 if (channels <= 2)
578 return 0;
579
Wu Fengguang54a25f82009-10-30 11:44:26 +0100580 i = hda_node_index(spec->pin_cvt, nid);
581 if (i < 0)
582 return 0;
583 eld = &spec->sink_eld[i];
584
Wu Fengguang698544d2008-11-19 08:56:17 +0800585 /*
Wu Fengguanga1667e42009-02-11 15:22:28 +0800586 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
587 * in console or for audio devices. Assume the highest speakers
588 * configuration, to _not_ prohibit multi-channel audio playback.
589 */
590 if (!eld->spk_alloc)
591 eld->spk_alloc = 0xffff;
592
593 /*
Wu Fengguang698544d2008-11-19 08:56:17 +0800594 * expand ELD's speaker allocation mask
595 *
596 * ELD tells the speaker mask in a compact(paired) form,
Wu Fengguangb83923a2008-11-22 09:40:51 +0800597 * expand ELD's notions to match the ones used by Audio InfoFrame.
Wu Fengguang698544d2008-11-19 08:56:17 +0800598 */
599 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
600 if (eld->spk_alloc & (1 << i))
601 spk_mask |= eld_speaker_allocation_bits[i];
602 }
603
604 /* search for the first working match in the CA table */
605 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
606 if (channels == channel_allocations[i].channels &&
607 (spk_mask & channel_allocations[i].spk_mask) ==
608 channel_allocations[i].spk_mask) {
609 ai->CA = channel_allocations[i].ca_index;
Wu Fengguangcc02b832008-11-22 09:40:52 +0800610 break;
Wu Fengguang698544d2008-11-19 08:56:17 +0800611 }
612 }
613
614 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
Wu Fengguangcc02b832008-11-22 09:40:52 +0800615 snd_printdd(KERN_INFO
616 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
617 ai->CA, channels, buf);
618
619 return ai->CA;
Wu Fengguang698544d2008-11-19 08:56:17 +0800620}
621
Wu Fengguang6797cf22009-10-30 11:40:40 +0100622static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
623 struct hdmi_audio_infoframe *ai)
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800624{
Wu Fengguang559059b2009-08-02 16:48:55 +0800625 int i;
626
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800627 if (!ai->CA)
628 return;
629
630 /*
631 * TODO: adjust channel mapping if necessary
632 * ALSA sequence is front/surr/clfe/side?
633 */
634
Wu Fengguang559059b2009-08-02 16:48:55 +0800635 for (i = 0; i < 8; i++)
Wu Fengguang6797cf22009-10-30 11:40:40 +0100636 snd_hda_codec_write(codec, nid, 0,
Wu Fengguang559059b2009-08-02 16:48:55 +0800637 AC_VERB_SET_HDMI_CHAN_SLOT,
638 (i << 4) | i);
639
Wu Fengguang6797cf22009-10-30 11:40:40 +0100640 hdmi_debug_channel_mapping(codec, nid);
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800641}
642
Wu Fengguang848de592009-11-18 12:38:05 +0800643static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
644 struct hdmi_audio_infoframe *ai)
645{
646 u8 *bytes = (u8 *)ai;
647 u8 val;
648 int i;
649
650 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
651 != AC_DIPXMIT_BEST)
652 return false;
653
654 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
655 for (i = 0; i < sizeof(*ai); i++) {
656 val = snd_hda_codec_read(codec, pin_nid, 0,
657 AC_VERB_GET_HDMI_DIP_DATA, 0);
658 if (val != bytes[i])
659 return false;
660 }
661
662 return true;
663}
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800664
Wu Fengguang6797cf22009-10-30 11:40:40 +0100665static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang5457a982008-11-19 08:56:15 +0800666 struct snd_pcm_substream *substream)
667{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100668 struct intel_hdmi_spec *spec = codec->spec;
669 hda_nid_t pin_nid;
670 int i;
Wu Fengguang5457a982008-11-19 08:56:15 +0800671 struct hdmi_audio_infoframe ai = {
672 .type = 0x84,
673 .ver = 0x01,
674 .len = 0x0a,
675 .CC02_CT47 = substream->runtime->channels - 1,
676 };
677
Wu Fengguang6797cf22009-10-30 11:40:40 +0100678 hdmi_setup_channel_allocation(codec, nid, &ai);
679 hdmi_setup_channel_mapping(codec, nid, &ai);
Wu Fengguang698544d2008-11-19 08:56:17 +0800680
Wu Fengguang54a25f82009-10-30 11:44:26 +0100681 for (i = 0; i < spec->num_pins; i++) {
682 if (spec->pin_cvt[i] != nid)
683 continue;
Wu Fengguang23ccc2b2009-11-18 12:38:01 +0800684 if (!spec->sink_eld[i].monitor_present)
Wu Fengguang54a25f82009-10-30 11:44:26 +0100685 continue;
686
687 pin_nid = spec->pin[i];
Wu Fengguang848de592009-11-18 12:38:05 +0800688 if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
689 hdmi_stop_infoframe_trans(codec, pin_nid);
690 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
691 hdmi_start_infoframe_trans(codec, pin_nid);
692 }
Wu Fengguang54a25f82009-10-30 11:44:26 +0100693 }
Wu Fengguang5457a982008-11-19 08:56:15 +0800694}
695
Wu, Fengguang91504872008-11-05 11:16:56 +0800696
697/*
698 * Unsolicited events
699 */
700
701static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
702{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100703 struct intel_hdmi_spec *spec = codec->spec;
704 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800705 int pind = !!(res & AC_UNSOL_RES_PD);
706 int eldv = !!(res & AC_UNSOL_RES_ELDV);
Wu Fengguang54a25f82009-10-30 11:44:26 +0100707 int index;
Wu, Fengguang91504872008-11-05 11:16:56 +0800708
Wu Fengguang03284c82008-11-22 09:40:53 +0800709 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100710 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
711 tag, pind, eldv);
712
713 index = hda_node_index(spec->pin, tag);
714 if (index < 0)
715 return;
716
Wu Fengguang23ccc2b2009-11-18 12:38:01 +0800717 spec->sink_eld[index].monitor_present = pind;
718 spec->sink_eld[index].eld_valid = eldv;
Wu, Fengguang91504872008-11-05 11:16:56 +0800719
720 if (pind && eldv) {
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800721 hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800722 /* TODO: do real things about ELD */
723 }
724}
725
726static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
727{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100728 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800729 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
730 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
731 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
732
Wu Fengguang03284c82008-11-22 09:40:53 +0800733 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100734 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
735 tag,
Wu Fengguang03284c82008-11-22 09:40:53 +0800736 subtag,
737 cp_state,
738 cp_ready);
Wu, Fengguang91504872008-11-05 11:16:56 +0800739
Wu Fengguang03284c82008-11-22 09:40:53 +0800740 /* TODO */
Wu, Fengguang91504872008-11-05 11:16:56 +0800741 if (cp_state)
742 ;
743 if (cp_ready)
744 ;
745}
746
747
748static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
749{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100750 struct intel_hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800751 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
752 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
753
Wu Fengguang54a25f82009-10-30 11:44:26 +0100754 if (hda_node_index(spec->pin, tag) < 0) {
Wu Fengguang03284c82008-11-22 09:40:53 +0800755 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
Wu, Fengguang91504872008-11-05 11:16:56 +0800756 return;
757 }
758
759 if (subtag == 0)
760 hdmi_intrinsic_event(codec, res);
761 else
762 hdmi_non_intrinsic_event(codec, res);
763}
764
765/*
766 * Callbacks
767 */
768
Wu Fengguang57791912009-11-18 12:38:06 +0800769static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
770 u32 stream_tag, int format)
771{
772 int tag;
773 int fmt;
774
775 tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
776 fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
777
778 snd_printdd("hdmi_setup_stream: "
779 "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
780 nid,
781 tag == stream_tag ? "" : "new-",
782 stream_tag,
783 fmt == format ? "" : "new-",
784 format);
785
786 if (tag != stream_tag)
787 snd_hda_codec_write(codec, nid, 0,
788 AC_VERB_SET_CHANNEL_STREAMID, stream_tag << 4);
789 if (fmt != format)
790 snd_hda_codec_write(codec, nid, 0,
791 AC_VERB_SET_STREAM_FORMAT, format);
792}
793
Wu, Fengguang91504872008-11-05 11:16:56 +0800794static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
795 struct hda_codec *codec,
796 unsigned int stream_tag,
797 unsigned int format,
798 struct snd_pcm_substream *substream)
799{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100800 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +0100801 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +0800802
Wu Fengguang54a25f82009-10-30 11:44:26 +0100803 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +0800804
Wu Fengguang57791912009-11-18 12:38:06 +0800805 hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
Wu, Fengguang91504872008-11-05 11:16:56 +0800806 return 0;
807}
808
Wu Fengguangddb81522009-10-30 11:43:03 +0100809static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
810 struct hda_codec *codec,
811 struct snd_pcm_substream *substream)
812{
Wu Fengguangddb81522009-10-30 11:43:03 +0100813 return 0;
814}
815
Wu, Fengguang91504872008-11-05 11:16:56 +0800816static struct hda_pcm_stream intel_hdmi_pcm_playback = {
817 .substreams = 1,
818 .channels_min = 2,
Wu, Fengguang91504872008-11-05 11:16:56 +0800819 .ops = {
Wu Fengguang70ca35f2009-10-30 11:42:18 +0100820 .prepare = intel_hdmi_playback_pcm_prepare,
821 .cleanup = intel_hdmi_playback_pcm_cleanup,
Wu, Fengguang91504872008-11-05 11:16:56 +0800822 },
823};
824
825static int intel_hdmi_build_pcms(struct hda_codec *codec)
826{
827 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100828 struct hda_pcm *info = spec->pcm_rec;
829 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800830
Wu Fengguang54a25f82009-10-30 11:44:26 +0100831 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +0800832 codec->pcm_info = info;
833
Wu Fengguang54a25f82009-10-30 11:44:26 +0100834 for (i = 0; i < codec->num_pcms; i++, info++) {
Wu Fengguang69fb3462009-10-30 11:45:04 +0100835 unsigned int chans;
836
837 chans = get_wcaps(codec, spec->cvt[i]);
838 chans = get_wcaps_channels(chans);
839
Wu Fengguang54a25f82009-10-30 11:44:26 +0100840 info->name = intel_hdmi_pcm_names[i];
841 info->pcm_type = HDA_PCM_TYPE_HDMI;
842 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
843 intel_hdmi_pcm_playback;
844 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
Wu Fengguang69fb3462009-10-30 11:45:04 +0100845 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100846 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800847
848 return 0;
849}
850
851static int intel_hdmi_build_controls(struct hda_codec *codec)
852{
853 struct intel_hdmi_spec *spec = codec->spec;
854 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100855 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800856
Wu Fengguang54a25f82009-10-30 11:44:26 +0100857 for (i = 0; i < codec->num_pcms; i++) {
858 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
859 if (err < 0)
860 return err;
861 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800862
863 return 0;
864}
865
866static int intel_hdmi_init(struct hda_codec *codec)
867{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100868 struct intel_hdmi_spec *spec = codec->spec;
869 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800870
Wu Fengguang54a25f82009-10-30 11:44:26 +0100871 for (i = 0; spec->pin[i]; i++) {
872 hdmi_enable_output(codec, spec->pin[i]);
873 snd_hda_codec_write(codec, spec->pin[i], 0,
874 AC_VERB_SET_UNSOLICITED_ENABLE,
875 AC_USRSP_EN | spec->pin[i]);
876 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800877 return 0;
878}
879
880static void intel_hdmi_free(struct hda_codec *codec)
881{
Takashi Iwaif208dba2008-11-21 09:11:50 +0100882 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100883 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100884
Wu Fengguang54a25f82009-10-30 11:44:26 +0100885 for (i = 0; i < spec->num_pins; i++)
886 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
887
Takashi Iwaif208dba2008-11-21 09:11:50 +0100888 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800889}
890
891static struct hda_codec_ops intel_hdmi_patch_ops = {
892 .init = intel_hdmi_init,
893 .free = intel_hdmi_free,
894 .build_pcms = intel_hdmi_build_pcms,
895 .build_controls = intel_hdmi_build_controls,
896 .unsol_event = intel_hdmi_unsol_event,
897};
898
Wu Fengguangfd080b22009-10-30 11:46:22 +0100899static int patch_intel_hdmi(struct hda_codec *codec)
Wu, Fengguang91504872008-11-05 11:16:56 +0800900{
901 struct intel_hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100902 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800903
904 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
905 if (spec == NULL)
906 return -ENOMEM;
907
Wu, Fengguang91504872008-11-05 11:16:56 +0800908 codec->spec = spec;
Wu Fengguangf4243672009-10-30 11:45:35 +0100909 if (intel_hdmi_parse_codec(codec) < 0) {
910 codec->spec = NULL;
911 kfree(spec);
912 return -EINVAL;
913 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800914 codec->patch_ops = intel_hdmi_patch_ops;
915
Wu Fengguang54a25f82009-10-30 11:44:26 +0100916 for (i = 0; i < spec->num_pins; i++)
917 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800918
Wu Fengguang698544d2008-11-19 08:56:17 +0800919 init_channel_allocations();
920
Wu, Fengguang91504872008-11-05 11:16:56 +0800921 return 0;
922}
923
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100924static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Takashi Iwai74c61132008-12-18 09:11:33 +0100925 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
926 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
927 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
928 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
Wu Fengguangfd080b22009-10-30 11:46:22 +0100929 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
930 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
Wu Fengguang3a95cb92008-11-13 10:19:38 +0800931 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
Wu, Fengguang91504872008-11-05 11:16:56 +0800932 {} /* terminator */
933};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100934
935MODULE_ALIAS("snd-hda-codec-id:808629fb");
936MODULE_ALIAS("snd-hda-codec-id:80862801");
937MODULE_ALIAS("snd-hda-codec-id:80862802");
938MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800939MODULE_ALIAS("snd-hda-codec-id:80862804");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200940MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100941MODULE_ALIAS("snd-hda-codec-id:10951392");
942
943MODULE_LICENSE("GPL");
944MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
945
946static struct hda_codec_preset_list intel_list = {
947 .preset = snd_hda_preset_intelhdmi,
948 .owner = THIS_MODULE,
949};
950
951static int __init patch_intelhdmi_init(void)
952{
953 return snd_hda_add_codec_preset(&intel_list);
954}
955
956static void __exit patch_intelhdmi_exit(void)
957{
958 snd_hda_delete_codec_preset(&intel_list);
959}
960
961module_init(patch_intelhdmi_init)
962module_exit(patch_intelhdmi_exit)