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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331 u8 log_max_flow[0x8];
332
Matan Barakb4ff3a32016-02-09 14:57:42 +0200333 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334
335 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
336
337 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
338};
339
340struct mlx5_ifc_odp_per_transport_service_cap_bits {
341 u8 send[0x1];
342 u8 receive[0x1];
343 u8 write[0x1];
344 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200345 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300346 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200347 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300348};
349
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200350struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200351 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200352
353 u8 ipv4[0x20];
354};
355
356struct mlx5_ifc_ipv6_layout_bits {
357 u8 ipv6[16][0x8];
358};
359
360union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
361 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
362 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200363 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200364};
365
Saeed Mahameede2816822015-05-28 22:28:40 +0300366struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
367 u8 smac_47_16[0x20];
368
369 u8 smac_15_0[0x10];
370 u8 ethertype[0x10];
371
372 u8 dmac_47_16[0x20];
373
374 u8 dmac_15_0[0x10];
375 u8 first_prio[0x3];
376 u8 first_cfi[0x1];
377 u8 first_vid[0xc];
378
379 u8 ip_protocol[0x8];
380 u8 ip_dscp[0x6];
381 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300382 u8 cvlan_tag[0x1];
383 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300385 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300386 u8 tcp_flags[0x9];
387
388 u8 tcp_sport[0x10];
389 u8 tcp_dport[0x10];
390
Or Gerlitza8ade552017-06-07 17:49:56 +0300391 u8 reserved_at_c0[0x18];
392 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393
394 u8 udp_sport[0x10];
395 u8 udp_dport[0x10];
396
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200397 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200399 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300400};
401
402struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300403 u8 reserved_at_0[0x8];
404 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300405
Matan Barakb4ff3a32016-02-09 14:57:42 +0200406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300407 u8 source_port[0x10];
408
409 u8 outer_second_prio[0x3];
410 u8 outer_second_cfi[0x1];
411 u8 outer_second_vid[0xc];
412 u8 inner_second_prio[0x3];
413 u8 inner_second_cfi[0x1];
414 u8 inner_second_vid[0xc];
415
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300416 u8 outer_second_cvlan_tag[0x1];
417 u8 inner_second_cvlan_tag[0x1];
418 u8 outer_second_svlan_tag[0x1];
419 u8 inner_second_svlan_tag[0x1];
420 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421 u8 gre_protocol[0x10];
422
423 u8 gre_key_h[0x18];
424 u8 gre_key_l[0x8];
425
426 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 outer_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 inner_ipv6_flow_label[0x14];
436
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300437 u8 reserved_at_120[0x28];
438 u8 bth_dst_qp[0x18];
439 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300440};
441
442struct mlx5_ifc_cmd_pas_bits {
443 u8 pa_h[0x20];
444
445 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200446 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300447};
448
449struct mlx5_ifc_uint64_bits {
450 u8 hi[0x20];
451
452 u8 lo[0x20];
453};
454
455enum {
456 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
457 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
458 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
459 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
460 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
461 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
462 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
463 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
464 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
465 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
466};
467
468struct mlx5_ifc_ads_bits {
469 u8 fl[0x1];
470 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200471 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300472 u8 pkey_index[0x10];
473
Matan Barakb4ff3a32016-02-09 14:57:42 +0200474 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300475 u8 grh[0x1];
476 u8 mlid[0x7];
477 u8 rlid[0x10];
478
479 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200480 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300481 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200482 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300483 u8 stat_rate[0x4];
484 u8 hop_limit[0x8];
485
Matan Barakb4ff3a32016-02-09 14:57:42 +0200486 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300487 u8 tclass[0x8];
488 u8 flow_label[0x14];
489
490 u8 rgid_rip[16][0x8];
491
Matan Barakb4ff3a32016-02-09 14:57:42 +0200492 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300493 u8 f_dscp[0x1];
494 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200495 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300496 u8 f_eth_prio[0x1];
497 u8 ecn[0x2];
498 u8 dscp[0x6];
499 u8 udp_sport[0x10];
500
501 u8 dei_cfi[0x1];
502 u8 eth_prio[0x3];
503 u8 sl[0x4];
504 u8 port[0x8];
505 u8 rmac_47_32[0x10];
506
507 u8 rmac_31_0[0x20];
508};
509
510struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200511 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300512 u8 nic_rx_multi_path_tirs_fts[0x1];
513 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
514 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515
516 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
517
Matan Barakb4ff3a32016-02-09 14:57:42 +0200518 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300519
520 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
523
Matan Barakb4ff3a32016-02-09 14:57:42 +0200524 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300525
526 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
527
Matan Barakb4ff3a32016-02-09 14:57:42 +0200528 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300529};
530
Saeed Mahameed495716b2015-12-01 18:03:19 +0200531struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200532 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200533
534 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
535
536 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
537
538 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
539
Matan Barakb4ff3a32016-02-09 14:57:42 +0200540 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200541};
542
Saeed Mahameedd6666752015-12-01 18:03:22 +0200543struct mlx5_ifc_e_switch_cap_bits {
544 u8 vport_svlan_strip[0x1];
545 u8 vport_cvlan_strip[0x1];
546 u8 vport_svlan_insert[0x1];
547 u8 vport_cvlan_insert_if_not_exist[0x1];
548 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300549 u8 reserved_at_5[0x19];
550 u8 nic_vport_node_guid_modify[0x1];
551 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200552
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300553 u8 vxlan_encap_decap[0x1];
554 u8 nvgre_encap_decap[0x1];
555 u8 reserved_at_22[0x9];
556 u8 log_max_encap_headers[0x5];
557 u8 reserved_2b[0x6];
558 u8 max_encap_header_size[0xa];
559
560 u8 reserved_40[0x7c0];
561
Saeed Mahameedd6666752015-12-01 18:03:22 +0200562};
563
Saeed Mahameed74862162016-06-09 15:11:34 +0300564struct mlx5_ifc_qos_cap_bits {
565 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300566 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200567 u8 esw_bw_share[0x1];
568 u8 esw_rate_limit[0x1];
569 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300570
571 u8 reserved_at_20[0x20];
572
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
Saeed Mahameed74862162016-06-09 15:11:34 +0300575 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300576
577 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300578 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
580 u8 esw_element_type[0x10];
581 u8 esw_tsar_type[0x10];
582
583 u8 reserved_at_c0[0x10];
584 u8 max_qos_para_vport[0x10];
585
586 u8 max_tsar_bw_share[0x20];
587
588 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300589};
590
Saeed Mahameede2816822015-05-28 22:28:40 +0300591struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
592 u8 csum_cap[0x1];
593 u8 vlan_cap[0x1];
594 u8 lro_cap[0x1];
595 u8 lro_psh_flag[0x1];
596 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200597 u8 reserved_at_5[0x2];
598 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200599 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200600 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300601 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200602 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300603 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300604 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300605 u8 reg_umr_sq[0x1];
606 u8 scatter_fcs[0x1];
607 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300608 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200609 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300610 u8 tunnel_statless_gre[0x1];
611 u8 tunnel_stateless_vxlan[0x1];
612
Ilan Tayari547eede2017-04-18 16:04:28 +0300613 u8 swp[0x1];
614 u8 swp_csum[0x1];
615 u8 swp_lso[0x1];
616 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
Matan Barakb4ff3a32016-02-09 14:57:42 +0200618 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 lro_min_mss_size[0x10];
620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622
623 u8 lro_timer_supported_periods[4][0x20];
624
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626};
627
628struct mlx5_ifc_roce_cap_bits {
629 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200630 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300631
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200636 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300637 u8 roce_version[0x8];
638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 r_roce_dest_udp_port[0x10];
641
642 u8 r_roce_max_src_udp_port[0x10];
643 u8 r_roce_min_src_udp_port[0x10];
644
Matan Barakb4ff3a32016-02-09 14:57:42 +0200645 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300646 u8 roce_address_table_size[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649};
650
651enum {
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
661};
662
663enum {
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
673};
674
675struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200676 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300677
Or Gerlitzbd108382017-05-28 15:24:17 +0300678 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300680 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300681
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300685
Matan Barakb4ff3a32016-02-09 14:57:42 +0200686 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200687 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_size_qp[0x10];
691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300693 u8 atomic_size_dc[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696};
697
698struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
Matan Barakb4ff3a32016-02-09 14:57:42 +0200704 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300705
706 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
707
708 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
709
710 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
711
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713};
714
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200715struct mlx5_ifc_calc_op {
716 u8 reserved_at_0[0x10];
717 u8 reserved_at_10[0x9];
718 u8 op_swap_endianness[0x1];
719 u8 op_min[0x1];
720 u8 op_xor[0x1];
721 u8 op_or[0x1];
722 u8 op_and[0x1];
723 u8 op_max[0x1];
724 u8 op_add[0x1];
725};
726
727struct mlx5_ifc_vector_calc_cap_bits {
728 u8 calc_matrix[0x1];
729 u8 reserved_at_1[0x1f];
730 u8 reserved_at_20[0x8];
731 u8 max_vec_count[0x8];
732 u8 reserved_at_30[0xd];
733 u8 max_chunk_size[0x3];
734 struct mlx5_ifc_calc_op calc0;
735 struct mlx5_ifc_calc_op calc1;
736 struct mlx5_ifc_calc_op calc2;
737 struct mlx5_ifc_calc_op calc3;
738
739 u8 reserved_at_e0[0x720];
740};
741
Saeed Mahameede2816822015-05-28 22:28:40 +0300742enum {
743 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
744 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300745 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300746};
747
748enum {
749 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
750 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
751};
752
753enum {
754 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
755 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
756 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
757 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
759};
760
761enum {
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
764 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
765 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
772 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
773};
774
775enum {
776 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
777 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
778 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
779};
780
781enum {
782 MLX5_CAP_PORT_TYPE_IB = 0x0,
783 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300784};
785
Max Gurtovoy1410a902017-05-28 10:53:10 +0300786enum {
787 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
788 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
789 MLX5_CAP_UMR_FENCE_NONE = 0x2,
790};
791
Eli Cohenb7755162014-10-02 12:19:44 +0300792struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300794
795 u8 log_max_srq_sz[0x8];
796 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300798 u8 log_max_qp[0x5];
799
Matan Barakb4ff3a32016-02-09 14:57:42 +0200800 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300801 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300803
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300807 u8 log_max_cq[0x5];
808
809 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200812 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_eq[0x4];
814
815 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300817 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200818 u8 force_teardown[0x1];
819 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300820 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200821 u8 umr_extended_translation_offset[0x1];
822 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_klm_list_size[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_dc[0x6];
829
Matan Barakb4ff3a32016-02-09 14:57:42 +0200830 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 log_max_ra_res_qp[0x6];
834
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200835 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300836 u8 cc_query_allowed[0x1];
837 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200838 u8 start_pad[0x1];
839 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300840 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300841 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300842
Saeed Mahameede2816822015-05-28 22:28:40 +0300843 u8 out_of_seq_cnt[0x1];
844 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300845 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300846 u8 reserved_at_183[0x1];
847 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300848 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300849 u8 max_qp_cnt[0xa];
850 u8 pkey_table_size[0x10];
851
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 vport_group_manager[0x1];
853 u8 vhca_group_manager[0x1];
854 u8 ib_virt[0x1];
855 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200856 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300857 u8 ets[0x1];
858 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200859 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300860 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200861 u8 mcam_reg[0x1];
862 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200864 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300865 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300866 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200867 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300868 u8 disable_link_up[0x1];
869 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300870 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 num_ports[0x8];
872
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300873 u8 reserved_at_1c0[0x1];
874 u8 pps[0x1];
875 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300877 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200878 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300879 u8 reserved_at_1d0[0x1];
880 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300881 u8 general_notification_event[0x1];
882 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200883 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200884 u8 rol_s[0x1];
885 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300886 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200887 u8 wol_s[0x1];
888 u8 wol_g[0x1];
889 u8 wol_a[0x1];
890 u8 wol_b[0x1];
891 u8 wol_m[0x1];
892 u8 wol_u[0x1];
893 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300894
895 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300896 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300897 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300898
Saeed Mahameede2816822015-05-28 22:28:40 +0300899 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300900 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300901 u8 reserved_at_202[0x1];
902 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200903 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300904 u8 reserved_at_205[0x5];
905 u8 umr_fence[0x2];
906 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300907 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 cmdif_checksum[0x2];
909 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300910 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300911 u8 wq_signature[0x1];
912 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300913 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 sho[0x1];
915 u8 tph[0x1];
916 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300917 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300918 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 roce[0x1];
921 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923
924 u8 cq_oi[0x1];
925 u8 cq_resize[0x1];
926 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300928 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300929 u8 pg[0x1];
930 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300932 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300933 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200937 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300938 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200939 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 qkv[0x1];
942 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200943 u8 set_deth_sqpn[0x1];
944 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300945 u8 xrc[0x1];
946 u8 ud[0x1];
947 u8 uc[0x1];
948 u8 rc[0x1];
949
Eli Cohena6d51b62017-01-03 23:55:23 +0200950 u8 uar_4k[0x1];
951 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300952 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_pg_sz[0x8];
955
956 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200957 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300959 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300961
962 u8 reserved_at_270[0xb];
963 u8 lag_master[0x1];
964 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300965
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_wqe_sz_rq[0x10];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 max_wqe_sz_sq_dc[0x10];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300976 u8 max_qp_mcg[0x19];
977
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 log_max_mcg[0x8];
980
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300982 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 log_max_xrcd[0x5];
987
Amir Vadaia351a1b02016-07-14 10:32:38 +0300988 u8 reserved_at_340[0x8];
989 u8 log_max_flow_counter_bulk[0x8];
990 u8 max_flow_counter[0x10];
991
Eli Cohenb7755162014-10-02 12:19:44 +0300992
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 log_max_tis[0x5];
1001
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 log_max_tis_per_sq[0x5];
1011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001015 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001017 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001020
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001022 u8 log_max_wq_sz[0x5];
1023
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001025 u8 disable_local_lb[0x1];
1026 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001031 u8 log_max_current_uc_list[0x5];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001034
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001036 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001038 u8 log_uar_page_sz[0x10];
1039
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001041 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001042 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043
Eli Cohena6d51b62017-01-03 23:55:23 +02001044 u8 reserved_at_500[0x20];
1045 u8 num_of_uars_per_page[0x20];
1046 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001047
1048 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001049 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001050
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001051 u8 cqe_compression_timeout[0x10];
1052 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001053
Saeed Mahameed74862162016-06-09 15:11:34 +03001054 u8 reserved_at_5e0[0x10];
1055 u8 tag_matching[0x1];
1056 u8 rndv_offload_rc[0x1];
1057 u8 rndv_offload_dc[0x1];
1058 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001059 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001060 u8 log_max_xrq[0x5];
1061
Max Gurtovoy7b135582017-01-02 11:37:38 +02001062 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001063};
1064
Saeed Mahameed81848732015-12-01 18:03:20 +02001065enum mlx5_flow_destination_type {
1066 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1067 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1068 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001069
1070 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
1073struct mlx5_ifc_dest_format_struct_bits {
1074 u8 destination_type[0x8];
1075 u8 destination_id[0x18];
1076
Matan Barakb4ff3a32016-02-09 14:57:42 +02001077 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001078};
1079
Amir Vadai9dc0b282016-05-13 12:55:39 +00001080struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001081 u8 clear[0x1];
1082 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001083 u8 flow_counter_id[0x10];
1084
1085 u8 reserved_at_20[0x20];
1086};
1087
1088union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1089 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1090 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1091 u8 reserved_at_0[0x40];
1092};
1093
Saeed Mahameede2816822015-05-28 22:28:40 +03001094struct mlx5_ifc_fte_match_param_bits {
1095 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1096
1097 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1098
1099 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1100
Matan Barakb4ff3a32016-02-09 14:57:42 +02001101 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001102};
1103
1104enum {
1105 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1106 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1107 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1108 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1109 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1110};
1111
1112struct mlx5_ifc_rx_hash_field_select_bits {
1113 u8 l3_prot_type[0x1];
1114 u8 l4_prot_type[0x1];
1115 u8 selected_fields[0x1e];
1116};
1117
1118enum {
1119 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1120 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1121};
1122
1123enum {
1124 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1125 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1126};
1127
1128struct mlx5_ifc_wq_bits {
1129 u8 wq_type[0x4];
1130 u8 wq_signature[0x1];
1131 u8 end_padding_mode[0x2];
1132 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134
1135 u8 hds_skip_first_sge[0x1];
1136 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138 u8 page_offset[0x5];
1139 u8 lwm[0x10];
1140
Matan Barakb4ff3a32016-02-09 14:57:42 +02001141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001142 u8 pd[0x18];
1143
Matan Barakb4ff3a32016-02-09 14:57:42 +02001144 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001145 u8 uar_page[0x18];
1146
1147 u8 dbr_addr[0x40];
1148
1149 u8 hw_counter[0x20];
1150
1151 u8 sw_counter[0x20];
1152
Matan Barakb4ff3a32016-02-09 14:57:42 +02001153 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001157 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158 u8 log_wq_sz[0x5];
1159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001160 u8 reserved_at_120[0x15];
1161 u8 log_wqe_num_of_strides[0x3];
1162 u8 two_byte_shift_en[0x1];
1163 u8 reserved_at_139[0x4];
1164 u8 log_wqe_stride_size[0x3];
1165
1166 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001167
1168 struct mlx5_ifc_cmd_pas_bits pas[0];
1169};
1170
1171struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 rq_num[0x18];
1174};
1175
1176struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001178 u8 mac_addr_47_32[0x10];
1179
1180 u8 mac_addr_31_0[0x20];
1181};
1182
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001183struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001184 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001185 u8 vlan[0x0c];
1186
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001188};
1189
Saeed Mahameede2816822015-05-28 22:28:40 +03001190struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192
1193 u8 min_time_between_cnps[0x20];
1194
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001197 u8 reserved_at_d8[0x4];
1198 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 cnp_802p_prio[0x3];
1200
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202};
1203
1204struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214
1215 u8 rpg_time_reset[0x20];
1216
1217 u8 rpg_byte_reset[0x20];
1218
1219 u8 rpg_threshold[0x20];
1220
1221 u8 rpg_max_rate[0x20];
1222
1223 u8 rpg_ai_rate[0x20];
1224
1225 u8 rpg_hai_rate[0x20];
1226
1227 u8 rpg_gd[0x20];
1228
1229 u8 rpg_min_dec_fac[0x20];
1230
1231 u8 rpg_min_rate[0x20];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 rate_to_set_on_first_cnp[0x20];
1236
1237 u8 dce_tcp_g[0x20];
1238
1239 u8 dce_tcp_rtt[0x20];
1240
1241 u8 rate_reduce_monitor_period[0x20];
1242
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244
1245 u8 initial_alpha_value[0x20];
1246
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248};
1249
1250struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252
1253 u8 rppp_max_rps[0x20];
1254
1255 u8 rpg_time_reset[0x20];
1256
1257 u8 rpg_byte_reset[0x20];
1258
1259 u8 rpg_threshold[0x20];
1260
1261 u8 rpg_max_rate[0x20];
1262
1263 u8 rpg_ai_rate[0x20];
1264
1265 u8 rpg_hai_rate[0x20];
1266
1267 u8 rpg_gd[0x20];
1268
1269 u8 rpg_min_dec_fac[0x20];
1270
1271 u8 rpg_min_rate[0x20];
1272
Matan Barakb4ff3a32016-02-09 14:57:42 +02001273 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001274};
1275
1276enum {
1277 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1278 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1279 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1280};
1281
1282struct mlx5_ifc_resize_field_select_bits {
1283 u8 resize_field_select[0x20];
1284};
1285
1286enum {
1287 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1288 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1289 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1290 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1291};
1292
1293struct mlx5_ifc_modify_field_select_bits {
1294 u8 modify_field_select[0x20];
1295};
1296
1297struct mlx5_ifc_field_select_r_roce_np_bits {
1298 u8 field_select_r_roce_np[0x20];
1299};
1300
1301struct mlx5_ifc_field_select_r_roce_rp_bits {
1302 u8 field_select_r_roce_rp[0x20];
1303};
1304
1305enum {
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1316};
1317
1318struct mlx5_ifc_field_select_802_1qau_rp_bits {
1319 u8 field_select_8021qaurp[0x20];
1320};
1321
1322struct mlx5_ifc_phys_layer_cntrs_bits {
1323 u8 time_since_last_clear_high[0x20];
1324
1325 u8 time_since_last_clear_low[0x20];
1326
1327 u8 symbol_errors_high[0x20];
1328
1329 u8 symbol_errors_low[0x20];
1330
1331 u8 sync_headers_errors_high[0x20];
1332
1333 u8 sync_headers_errors_low[0x20];
1334
1335 u8 edpl_bip_errors_lane0_high[0x20];
1336
1337 u8 edpl_bip_errors_lane0_low[0x20];
1338
1339 u8 edpl_bip_errors_lane1_high[0x20];
1340
1341 u8 edpl_bip_errors_lane1_low[0x20];
1342
1343 u8 edpl_bip_errors_lane2_high[0x20];
1344
1345 u8 edpl_bip_errors_lane2_low[0x20];
1346
1347 u8 edpl_bip_errors_lane3_high[0x20];
1348
1349 u8 edpl_bip_errors_lane3_low[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1362
1363 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1364
1365 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1378
1379 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1380
1381 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1382
1383 u8 rs_fec_corrected_blocks_high[0x20];
1384
1385 u8 rs_fec_corrected_blocks_low[0x20];
1386
1387 u8 rs_fec_uncorrectable_blocks_high[0x20];
1388
1389 u8 rs_fec_uncorrectable_blocks_low[0x20];
1390
1391 u8 rs_fec_no_errors_blocks_high[0x20];
1392
1393 u8 rs_fec_no_errors_blocks_low[0x20];
1394
1395 u8 rs_fec_single_error_blocks_high[0x20];
1396
1397 u8 rs_fec_single_error_blocks_low[0x20];
1398
1399 u8 rs_fec_corrected_symbols_total_high[0x20];
1400
1401 u8 rs_fec_corrected_symbols_total_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1414
1415 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1416
1417 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1418
1419 u8 link_down_events[0x20];
1420
1421 u8 successful_recovery_events[0x20];
1422
Matan Barakb4ff3a32016-02-09 14:57:42 +02001423 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001424};
1425
Gal Pressmand8dc0502016-09-27 17:04:51 +03001426struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1427 u8 time_since_last_clear_high[0x20];
1428
1429 u8 time_since_last_clear_low[0x20];
1430
1431 u8 phy_received_bits_high[0x20];
1432
1433 u8 phy_received_bits_low[0x20];
1434
1435 u8 phy_symbol_errors_high[0x20];
1436
1437 u8 phy_symbol_errors_low[0x20];
1438
1439 u8 phy_corrected_bits_high[0x20];
1440
1441 u8 phy_corrected_bits_low[0x20];
1442
1443 u8 phy_corrected_bits_lane0_high[0x20];
1444
1445 u8 phy_corrected_bits_lane0_low[0x20];
1446
1447 u8 phy_corrected_bits_lane1_high[0x20];
1448
1449 u8 phy_corrected_bits_lane1_low[0x20];
1450
1451 u8 phy_corrected_bits_lane2_high[0x20];
1452
1453 u8 phy_corrected_bits_lane2_low[0x20];
1454
1455 u8 phy_corrected_bits_lane3_high[0x20];
1456
1457 u8 phy_corrected_bits_lane3_low[0x20];
1458
1459 u8 reserved_at_200[0x5c0];
1460};
1461
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001462struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1463 u8 symbol_error_counter[0x10];
1464
1465 u8 link_error_recovery_counter[0x8];
1466
1467 u8 link_downed_counter[0x8];
1468
1469 u8 port_rcv_errors[0x10];
1470
1471 u8 port_rcv_remote_physical_errors[0x10];
1472
1473 u8 port_rcv_switch_relay_errors[0x10];
1474
1475 u8 port_xmit_discards[0x10];
1476
1477 u8 port_xmit_constraint_errors[0x8];
1478
1479 u8 port_rcv_constraint_errors[0x8];
1480
1481 u8 reserved_at_70[0x8];
1482
1483 u8 link_overrun_errors[0x8];
1484
1485 u8 reserved_at_80[0x10];
1486
1487 u8 vl_15_dropped[0x10];
1488
Tim Wright133bea02017-05-01 17:30:08 +01001489 u8 reserved_at_a0[0x80];
1490
1491 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001492};
1493
Saeed Mahameede2816822015-05-28 22:28:40 +03001494struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1495 u8 transmit_queue_high[0x20];
1496
1497 u8 transmit_queue_low[0x20];
1498
Matan Barakb4ff3a32016-02-09 14:57:42 +02001499 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001500};
1501
1502struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1503 u8 rx_octets_high[0x20];
1504
1505 u8 rx_octets_low[0x20];
1506
Matan Barakb4ff3a32016-02-09 14:57:42 +02001507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001508
1509 u8 rx_frames_high[0x20];
1510
1511 u8 rx_frames_low[0x20];
1512
1513 u8 tx_octets_high[0x20];
1514
1515 u8 tx_octets_low[0x20];
1516
Matan Barakb4ff3a32016-02-09 14:57:42 +02001517 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001518
1519 u8 tx_frames_high[0x20];
1520
1521 u8 tx_frames_low[0x20];
1522
1523 u8 rx_pause_high[0x20];
1524
1525 u8 rx_pause_low[0x20];
1526
1527 u8 rx_pause_duration_high[0x20];
1528
1529 u8 rx_pause_duration_low[0x20];
1530
1531 u8 tx_pause_high[0x20];
1532
1533 u8 tx_pause_low[0x20];
1534
1535 u8 tx_pause_duration_high[0x20];
1536
1537 u8 tx_pause_duration_low[0x20];
1538
1539 u8 rx_pause_transition_high[0x20];
1540
1541 u8 rx_pause_transition_low[0x20];
1542
Matan Barakb4ff3a32016-02-09 14:57:42 +02001543 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001544};
1545
1546struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1547 u8 port_transmit_wait_high[0x20];
1548
1549 u8 port_transmit_wait_low[0x20];
1550
Matan Barakb4ff3a32016-02-09 14:57:42 +02001551 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001552};
1553
1554struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1555 u8 dot3stats_alignment_errors_high[0x20];
1556
1557 u8 dot3stats_alignment_errors_low[0x20];
1558
1559 u8 dot3stats_fcs_errors_high[0x20];
1560
1561 u8 dot3stats_fcs_errors_low[0x20];
1562
1563 u8 dot3stats_single_collision_frames_high[0x20];
1564
1565 u8 dot3stats_single_collision_frames_low[0x20];
1566
1567 u8 dot3stats_multiple_collision_frames_high[0x20];
1568
1569 u8 dot3stats_multiple_collision_frames_low[0x20];
1570
1571 u8 dot3stats_sqe_test_errors_high[0x20];
1572
1573 u8 dot3stats_sqe_test_errors_low[0x20];
1574
1575 u8 dot3stats_deferred_transmissions_high[0x20];
1576
1577 u8 dot3stats_deferred_transmissions_low[0x20];
1578
1579 u8 dot3stats_late_collisions_high[0x20];
1580
1581 u8 dot3stats_late_collisions_low[0x20];
1582
1583 u8 dot3stats_excessive_collisions_high[0x20];
1584
1585 u8 dot3stats_excessive_collisions_low[0x20];
1586
1587 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1588
1589 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1590
1591 u8 dot3stats_carrier_sense_errors_high[0x20];
1592
1593 u8 dot3stats_carrier_sense_errors_low[0x20];
1594
1595 u8 dot3stats_frame_too_longs_high[0x20];
1596
1597 u8 dot3stats_frame_too_longs_low[0x20];
1598
1599 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1600
1601 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1602
1603 u8 dot3stats_symbol_errors_high[0x20];
1604
1605 u8 dot3stats_symbol_errors_low[0x20];
1606
1607 u8 dot3control_in_unknown_opcodes_high[0x20];
1608
1609 u8 dot3control_in_unknown_opcodes_low[0x20];
1610
1611 u8 dot3in_pause_frames_high[0x20];
1612
1613 u8 dot3in_pause_frames_low[0x20];
1614
1615 u8 dot3out_pause_frames_high[0x20];
1616
1617 u8 dot3out_pause_frames_low[0x20];
1618
Matan Barakb4ff3a32016-02-09 14:57:42 +02001619 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001620};
1621
1622struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1623 u8 ether_stats_drop_events_high[0x20];
1624
1625 u8 ether_stats_drop_events_low[0x20];
1626
1627 u8 ether_stats_octets_high[0x20];
1628
1629 u8 ether_stats_octets_low[0x20];
1630
1631 u8 ether_stats_pkts_high[0x20];
1632
1633 u8 ether_stats_pkts_low[0x20];
1634
1635 u8 ether_stats_broadcast_pkts_high[0x20];
1636
1637 u8 ether_stats_broadcast_pkts_low[0x20];
1638
1639 u8 ether_stats_multicast_pkts_high[0x20];
1640
1641 u8 ether_stats_multicast_pkts_low[0x20];
1642
1643 u8 ether_stats_crc_align_errors_high[0x20];
1644
1645 u8 ether_stats_crc_align_errors_low[0x20];
1646
1647 u8 ether_stats_undersize_pkts_high[0x20];
1648
1649 u8 ether_stats_undersize_pkts_low[0x20];
1650
1651 u8 ether_stats_oversize_pkts_high[0x20];
1652
1653 u8 ether_stats_oversize_pkts_low[0x20];
1654
1655 u8 ether_stats_fragments_high[0x20];
1656
1657 u8 ether_stats_fragments_low[0x20];
1658
1659 u8 ether_stats_jabbers_high[0x20];
1660
1661 u8 ether_stats_jabbers_low[0x20];
1662
1663 u8 ether_stats_collisions_high[0x20];
1664
1665 u8 ether_stats_collisions_low[0x20];
1666
1667 u8 ether_stats_pkts64octets_high[0x20];
1668
1669 u8 ether_stats_pkts64octets_low[0x20];
1670
1671 u8 ether_stats_pkts65to127octets_high[0x20];
1672
1673 u8 ether_stats_pkts65to127octets_low[0x20];
1674
1675 u8 ether_stats_pkts128to255octets_high[0x20];
1676
1677 u8 ether_stats_pkts128to255octets_low[0x20];
1678
1679 u8 ether_stats_pkts256to511octets_high[0x20];
1680
1681 u8 ether_stats_pkts256to511octets_low[0x20];
1682
1683 u8 ether_stats_pkts512to1023octets_high[0x20];
1684
1685 u8 ether_stats_pkts512to1023octets_low[0x20];
1686
1687 u8 ether_stats_pkts1024to1518octets_high[0x20];
1688
1689 u8 ether_stats_pkts1024to1518octets_low[0x20];
1690
1691 u8 ether_stats_pkts1519to2047octets_high[0x20];
1692
1693 u8 ether_stats_pkts1519to2047octets_low[0x20];
1694
1695 u8 ether_stats_pkts2048to4095octets_high[0x20];
1696
1697 u8 ether_stats_pkts2048to4095octets_low[0x20];
1698
1699 u8 ether_stats_pkts4096to8191octets_high[0x20];
1700
1701 u8 ether_stats_pkts4096to8191octets_low[0x20];
1702
1703 u8 ether_stats_pkts8192to10239octets_high[0x20];
1704
1705 u8 ether_stats_pkts8192to10239octets_low[0x20];
1706
Matan Barakb4ff3a32016-02-09 14:57:42 +02001707 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001708};
1709
1710struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1711 u8 if_in_octets_high[0x20];
1712
1713 u8 if_in_octets_low[0x20];
1714
1715 u8 if_in_ucast_pkts_high[0x20];
1716
1717 u8 if_in_ucast_pkts_low[0x20];
1718
1719 u8 if_in_discards_high[0x20];
1720
1721 u8 if_in_discards_low[0x20];
1722
1723 u8 if_in_errors_high[0x20];
1724
1725 u8 if_in_errors_low[0x20];
1726
1727 u8 if_in_unknown_protos_high[0x20];
1728
1729 u8 if_in_unknown_protos_low[0x20];
1730
1731 u8 if_out_octets_high[0x20];
1732
1733 u8 if_out_octets_low[0x20];
1734
1735 u8 if_out_ucast_pkts_high[0x20];
1736
1737 u8 if_out_ucast_pkts_low[0x20];
1738
1739 u8 if_out_discards_high[0x20];
1740
1741 u8 if_out_discards_low[0x20];
1742
1743 u8 if_out_errors_high[0x20];
1744
1745 u8 if_out_errors_low[0x20];
1746
1747 u8 if_in_multicast_pkts_high[0x20];
1748
1749 u8 if_in_multicast_pkts_low[0x20];
1750
1751 u8 if_in_broadcast_pkts_high[0x20];
1752
1753 u8 if_in_broadcast_pkts_low[0x20];
1754
1755 u8 if_out_multicast_pkts_high[0x20];
1756
1757 u8 if_out_multicast_pkts_low[0x20];
1758
1759 u8 if_out_broadcast_pkts_high[0x20];
1760
1761 u8 if_out_broadcast_pkts_low[0x20];
1762
Matan Barakb4ff3a32016-02-09 14:57:42 +02001763 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001764};
1765
1766struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1767 u8 a_frames_transmitted_ok_high[0x20];
1768
1769 u8 a_frames_transmitted_ok_low[0x20];
1770
1771 u8 a_frames_received_ok_high[0x20];
1772
1773 u8 a_frames_received_ok_low[0x20];
1774
1775 u8 a_frame_check_sequence_errors_high[0x20];
1776
1777 u8 a_frame_check_sequence_errors_low[0x20];
1778
1779 u8 a_alignment_errors_high[0x20];
1780
1781 u8 a_alignment_errors_low[0x20];
1782
1783 u8 a_octets_transmitted_ok_high[0x20];
1784
1785 u8 a_octets_transmitted_ok_low[0x20];
1786
1787 u8 a_octets_received_ok_high[0x20];
1788
1789 u8 a_octets_received_ok_low[0x20];
1790
1791 u8 a_multicast_frames_xmitted_ok_high[0x20];
1792
1793 u8 a_multicast_frames_xmitted_ok_low[0x20];
1794
1795 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1796
1797 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1798
1799 u8 a_multicast_frames_received_ok_high[0x20];
1800
1801 u8 a_multicast_frames_received_ok_low[0x20];
1802
1803 u8 a_broadcast_frames_received_ok_high[0x20];
1804
1805 u8 a_broadcast_frames_received_ok_low[0x20];
1806
1807 u8 a_in_range_length_errors_high[0x20];
1808
1809 u8 a_in_range_length_errors_low[0x20];
1810
1811 u8 a_out_of_range_length_field_high[0x20];
1812
1813 u8 a_out_of_range_length_field_low[0x20];
1814
1815 u8 a_frame_too_long_errors_high[0x20];
1816
1817 u8 a_frame_too_long_errors_low[0x20];
1818
1819 u8 a_symbol_error_during_carrier_high[0x20];
1820
1821 u8 a_symbol_error_during_carrier_low[0x20];
1822
1823 u8 a_mac_control_frames_transmitted_high[0x20];
1824
1825 u8 a_mac_control_frames_transmitted_low[0x20];
1826
1827 u8 a_mac_control_frames_received_high[0x20];
1828
1829 u8 a_mac_control_frames_received_low[0x20];
1830
1831 u8 a_unsupported_opcodes_received_high[0x20];
1832
1833 u8 a_unsupported_opcodes_received_low[0x20];
1834
1835 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1836
1837 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1838
1839 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1840
1841 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1842
Matan Barakb4ff3a32016-02-09 14:57:42 +02001843 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001844};
1845
Gal Pressman8ed1a632016-11-17 13:46:01 +02001846struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1847 u8 life_time_counter_high[0x20];
1848
1849 u8 life_time_counter_low[0x20];
1850
1851 u8 rx_errors[0x20];
1852
1853 u8 tx_errors[0x20];
1854
1855 u8 l0_to_recovery_eieos[0x20];
1856
1857 u8 l0_to_recovery_ts[0x20];
1858
1859 u8 l0_to_recovery_framing[0x20];
1860
1861 u8 l0_to_recovery_retrain[0x20];
1862
1863 u8 crc_error_dllp[0x20];
1864
1865 u8 crc_error_tlp[0x20];
1866
1867 u8 reserved_at_140[0x680];
1868};
1869
Saeed Mahameede2816822015-05-28 22:28:40 +03001870struct mlx5_ifc_cmd_inter_comp_event_bits {
1871 u8 command_completion_vector[0x20];
1872
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874};
1875
1876struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001879 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001880 u8 vl[0x4];
1881
Matan Barakb4ff3a32016-02-09 14:57:42 +02001882 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001883};
1884
1885struct mlx5_ifc_db_bf_congestion_event_bits {
1886 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001889 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001890
Matan Barakb4ff3a32016-02-09 14:57:42 +02001891 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001892};
1893
1894struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001895 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001896
1897 u8 gpio_event_hi[0x20];
1898
1899 u8 gpio_event_lo[0x20];
1900
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902};
1903
1904struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906
1907 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001908 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001909
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911};
1912
1913struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001914 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001915};
1916
1917enum {
1918 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1919 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1920};
1921
1922struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924 u8 cqn[0x18];
1925
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929 u8 syndrome[0x8];
1930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932};
1933
1934struct mlx5_ifc_rdma_page_fault_event_bits {
1935 u8 bytes_committed[0x20];
1936
1937 u8 r_key[0x20];
1938
Matan Barakb4ff3a32016-02-09 14:57:42 +02001939 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001940 u8 packet_len[0x10];
1941
1942 u8 rdma_op_len[0x20];
1943
1944 u8 rdma_va[0x40];
1945
Matan Barakb4ff3a32016-02-09 14:57:42 +02001946 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001947 u8 rdma[0x1];
1948 u8 write[0x1];
1949 u8 requestor[0x1];
1950 u8 qp_number[0x18];
1951};
1952
1953struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1954 u8 bytes_committed[0x20];
1955
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957 u8 wqe_index[0x10];
1958
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960 u8 len[0x10];
1961
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965 u8 rdma[0x1];
1966 u8 write_read[0x1];
1967 u8 requestor[0x1];
1968 u8 qpn[0x18];
1969};
1970
1971struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973
1974 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001975 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001976
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978 u8 qpn_rqn_sqn[0x18];
1979};
1980
1981struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985 u8 dct_number[0x18];
1986};
1987
1988struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990
Matan Barakb4ff3a32016-02-09 14:57:42 +02001991 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001992 u8 cq_number[0x18];
1993};
1994
1995enum {
1996 MLX5_QPC_STATE_RST = 0x0,
1997 MLX5_QPC_STATE_INIT = 0x1,
1998 MLX5_QPC_STATE_RTR = 0x2,
1999 MLX5_QPC_STATE_RTS = 0x3,
2000 MLX5_QPC_STATE_SQER = 0x4,
2001 MLX5_QPC_STATE_ERR = 0x6,
2002 MLX5_QPC_STATE_SQD = 0x7,
2003 MLX5_QPC_STATE_SUSPENDED = 0x9,
2004};
2005
2006enum {
2007 MLX5_QPC_ST_RC = 0x0,
2008 MLX5_QPC_ST_UC = 0x1,
2009 MLX5_QPC_ST_UD = 0x2,
2010 MLX5_QPC_ST_XRC = 0x3,
2011 MLX5_QPC_ST_DCI = 0x5,
2012 MLX5_QPC_ST_QP0 = 0x7,
2013 MLX5_QPC_ST_QP1 = 0x8,
2014 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2015 MLX5_QPC_ST_REG_UMR = 0xc,
2016};
2017
2018enum {
2019 MLX5_QPC_PM_STATE_ARMED = 0x0,
2020 MLX5_QPC_PM_STATE_REARM = 0x1,
2021 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2022 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2023};
2024
2025enum {
2026 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2027 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2028};
2029
2030enum {
2031 MLX5_QPC_MTU_256_BYTES = 0x1,
2032 MLX5_QPC_MTU_512_BYTES = 0x2,
2033 MLX5_QPC_MTU_1K_BYTES = 0x3,
2034 MLX5_QPC_MTU_2K_BYTES = 0x4,
2035 MLX5_QPC_MTU_4K_BYTES = 0x5,
2036 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2037};
2038
2039enum {
2040 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2041 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2042 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2043 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2044 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2045 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2046 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2047 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2048};
2049
2050enum {
2051 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2052 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2053 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2054};
2055
2056enum {
2057 MLX5_QPC_CS_RES_DISABLE = 0x0,
2058 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2059 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2060};
2061
2062struct mlx5_ifc_qpc_bits {
2063 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002064 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002065 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002066 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002067 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002068 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071
2072 u8 wq_signature[0x1];
2073 u8 block_lb_mc[0x1];
2074 u8 atomic_like_write_en[0x1];
2075 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002076 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002077 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079 u8 pd[0x18];
2080
2081 u8 mtu[0x3];
2082 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002083 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002084 u8 log_rq_size[0x4];
2085 u8 log_rq_stride[0x3];
2086 u8 no_sq[0x1];
2087 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002090 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091
2092 u8 counter_set_id[0x8];
2093 u8 uar_page[0x18];
2094
Matan Barakb4ff3a32016-02-09 14:57:42 +02002095 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 user_index[0x18];
2097
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 log_page_size[0x5];
2100 u8 remote_qpn[0x18];
2101
2102 struct mlx5_ifc_ads_bits primary_address_path;
2103
2104 struct mlx5_ifc_ads_bits secondary_address_path;
2105
2106 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 retry_count[0x3];
2111 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 fre[0x1];
2114 u8 cur_rnr_retry[0x3];
2115 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117
Matan Barakb4ff3a32016-02-09 14:57:42 +02002118 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002119
Matan Barakb4ff3a32016-02-09 14:57:42 +02002120 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002121 u8 next_send_psn[0x18];
2122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 cqn_snd[0x18];
2125
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002126 u8 reserved_at_400[0x8];
2127 u8 deth_sqpn[0x18];
2128
2129 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130
Matan Barakb4ff3a32016-02-09 14:57:42 +02002131 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002132 u8 last_acked_psn[0x18];
2133
Matan Barakb4ff3a32016-02-09 14:57:42 +02002134 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135 u8 ssn[0x18];
2136
Matan Barakb4ff3a32016-02-09 14:57:42 +02002137 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002138 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140 u8 atomic_mode[0x4];
2141 u8 rre[0x1];
2142 u8 rwe[0x1];
2143 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 cd_slave_receive[0x1];
2148 u8 cd_slave_send[0x1];
2149 u8 cd_master[0x1];
2150
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 min_rnr_nak[0x5];
2153 u8 next_rcv_psn[0x18];
2154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 xrcd[0x18];
2157
Matan Barakb4ff3a32016-02-09 14:57:42 +02002158 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002159 u8 cqn_rcv[0x18];
2160
2161 u8 dbr_addr[0x40];
2162
2163 u8 q_key[0x20];
2164
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002167 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168
Matan Barakb4ff3a32016-02-09 14:57:42 +02002169 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170 u8 rmsn[0x18];
2171
2172 u8 hw_sq_wqebb_counter[0x10];
2173 u8 sw_sq_wqebb_counter[0x10];
2174
2175 u8 hw_rq_counter[0x20];
2176
2177 u8 sw_rq_counter[0x20];
2178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 cgs[0x1];
2183 u8 cs_req[0x8];
2184 u8 cs_res[0x8];
2185
2186 u8 dc_access_key[0x40];
2187
Matan Barakb4ff3a32016-02-09 14:57:42 +02002188 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002189};
2190
2191struct mlx5_ifc_roce_addr_layout_bits {
2192 u8 source_l3_address[16][0x8];
2193
Matan Barakb4ff3a32016-02-09 14:57:42 +02002194 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002195 u8 vlan_valid[0x1];
2196 u8 vlan_id[0xc];
2197 u8 source_mac_47_32[0x10];
2198
2199 u8 source_mac_31_0[0x20];
2200
Matan Barakb4ff3a32016-02-09 14:57:42 +02002201 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002202 u8 roce_l3_type[0x4];
2203 u8 roce_version[0x8];
2204
Matan Barakb4ff3a32016-02-09 14:57:42 +02002205 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206};
2207
2208union mlx5_ifc_hca_cap_union_bits {
2209 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2210 struct mlx5_ifc_odp_cap_bits odp_cap;
2211 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2212 struct mlx5_ifc_roce_cap_bits roce_cap;
2213 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2214 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002215 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002216 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002217 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002218 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002219 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221};
2222
2223enum {
2224 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2225 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2226 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002227 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002228 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2229 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002230 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002231};
2232
2233struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235
2236 u8 group_id[0x20];
2237
Matan Barakb4ff3a32016-02-09 14:57:42 +02002238 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002239 u8 flow_tag[0x18];
2240
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 action[0x10];
2243
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 destination_list_size[0x18];
2246
Amir Vadai9dc0b282016-05-13 12:55:39 +00002247 u8 reserved_at_a0[0x8];
2248 u8 flow_counter_list_size[0x18];
2249
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002250 u8 encap_id[0x20];
2251
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002252 u8 modify_header_id[0x20];
2253
2254 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002255
2256 struct mlx5_ifc_fte_match_param_bits match_value;
2257
Matan Barakb4ff3a32016-02-09 14:57:42 +02002258 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002259
Amir Vadai9dc0b282016-05-13 12:55:39 +00002260 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261};
2262
2263enum {
2264 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2265 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2266};
2267
2268struct mlx5_ifc_xrc_srqc_bits {
2269 u8 state[0x4];
2270 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272
2273 u8 wq_signature[0x1];
2274 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002275 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002276 u8 rlky[0x1];
2277 u8 basic_cyclic_rcv_wqe[0x1];
2278 u8 log_rq_stride[0x3];
2279 u8 xrcd[0x18];
2280
2281 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002282 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002283 u8 cqn[0x18];
2284
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286
2287 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289 u8 log_page_size[0x6];
2290 u8 user_index[0x18];
2291
Matan Barakb4ff3a32016-02-09 14:57:42 +02002292 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293
Matan Barakb4ff3a32016-02-09 14:57:42 +02002294 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002295 u8 pd[0x18];
2296
2297 u8 lwm[0x10];
2298 u8 wqe_cnt[0x10];
2299
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301
2302 u8 db_record_addr_h[0x20];
2303
2304 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002305 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002306
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308};
2309
2310struct mlx5_ifc_traffic_counter_bits {
2311 u8 packets[0x40];
2312
2313 u8 octets[0x40];
2314};
2315
2316struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002317 u8 strict_lag_tx_port_affinity[0x1];
2318 u8 reserved_at_1[0x3];
2319 u8 lag_tx_port_affinity[0x04];
2320
2321 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002323 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002324
Matan Barakb4ff3a32016-02-09 14:57:42 +02002325 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 transport_domain[0x18];
2329
Erez Shitrit500a3d02017-04-13 06:36:51 +03002330 u8 reserved_at_140[0x8];
2331 u8 underlay_qpn[0x18];
2332 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002333};
2334
2335enum {
2336 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2337 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2338};
2339
2340enum {
2341 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2342 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2343};
2344
2345enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002346 MLX5_RX_HASH_FN_NONE = 0x0,
2347 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2348 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002349};
2350
2351enum {
2352 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2353 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2354};
2355
2356struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358
2359 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361
Matan Barakb4ff3a32016-02-09 14:57:42 +02002362 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002363
Matan Barakb4ff3a32016-02-09 14:57:42 +02002364 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365 u8 lro_timeout_period_usecs[0x10];
2366 u8 lro_enable_mask[0x4];
2367 u8 lro_max_ip_payload_size[0x8];
2368
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372 u8 inline_rqn[0x18];
2373
2374 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002375 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002376 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378 u8 indirect_table[0x18];
2379
2380 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002381 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002382 u8 self_lb_block[0x2];
2383 u8 transport_domain[0x18];
2384
2385 u8 rx_hash_toeplitz_key[10][0x20];
2386
2387 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2388
2389 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2390
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392};
2393
2394enum {
2395 MLX5_SRQC_STATE_GOOD = 0x0,
2396 MLX5_SRQC_STATE_ERROR = 0x1,
2397};
2398
2399struct mlx5_ifc_srqc_bits {
2400 u8 state[0x4];
2401 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403
2404 u8 wq_signature[0x1];
2405 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002406 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 log_rq_stride[0x3];
2410 u8 xrcd[0x18];
2411
2412 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 cqn[0x18];
2415
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002420 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002421
Matan Barakb4ff3a32016-02-09 14:57:42 +02002422 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423
Matan Barakb4ff3a32016-02-09 14:57:42 +02002424 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425 u8 pd[0x18];
2426
2427 u8 lwm[0x10];
2428 u8 wqe_cnt[0x10];
2429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002432 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002433
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435};
2436
2437enum {
2438 MLX5_SQC_STATE_RST = 0x0,
2439 MLX5_SQC_STATE_RDY = 0x1,
2440 MLX5_SQC_STATE_ERR = 0x3,
2441};
2442
2443struct mlx5_ifc_sqc_bits {
2444 u8 rlky[0x1];
2445 u8 cd_master[0x1];
2446 u8 fre[0x1];
2447 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002448 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002449 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002451 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002452 u8 allow_swp[0x1];
2453 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456 u8 user_index[0x18];
2457
Matan Barakb4ff3a32016-02-09 14:57:42 +02002458 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459 u8 cqn[0x18];
2460
Saeed Mahameed74862162016-06-09 15:11:34 +03002461 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
Saeed Mahameed74862162016-06-09 15:11:34 +03002463 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468
Matan Barakb4ff3a32016-02-09 14:57:42 +02002469 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002470 u8 tis_num_0[0x18];
2471
2472 struct mlx5_ifc_wq_bits wq;
2473};
2474
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002475enum {
2476 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2477 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2478 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2479 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2480};
2481
2482struct mlx5_ifc_scheduling_context_bits {
2483 u8 element_type[0x8];
2484 u8 reserved_at_8[0x18];
2485
2486 u8 element_attributes[0x20];
2487
2488 u8 parent_element_id[0x20];
2489
2490 u8 reserved_at_60[0x40];
2491
2492 u8 bw_share[0x20];
2493
2494 u8 max_average_bw[0x20];
2495
2496 u8 reserved_at_e0[0x120];
2497};
2498
Saeed Mahameede2816822015-05-28 22:28:40 +03002499struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501
Matan Barakb4ff3a32016-02-09 14:57:42 +02002502 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002503 u8 rqt_max_size[0x10];
2504
Matan Barakb4ff3a32016-02-09 14:57:42 +02002505 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002506 u8 rqt_actual_size[0x10];
2507
Matan Barakb4ff3a32016-02-09 14:57:42 +02002508 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509
2510 struct mlx5_ifc_rq_num_bits rq_num[0];
2511};
2512
2513enum {
2514 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2515 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2516};
2517
2518enum {
2519 MLX5_RQC_STATE_RST = 0x0,
2520 MLX5_RQC_STATE_RDY = 0x1,
2521 MLX5_RQC_STATE_ERR = 0x3,
2522};
2523
2524struct mlx5_ifc_rqc_bits {
2525 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002526 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002527 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 vsd[0x1];
2529 u8 mem_rq_type[0x4];
2530 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 user_index[0x18];
2537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539 u8 cqn[0x18];
2540
2541 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002542 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002543
Matan Barakb4ff3a32016-02-09 14:57:42 +02002544 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002545 u8 rmpn[0x18];
2546
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548
2549 struct mlx5_ifc_wq_bits wq;
2550};
2551
2552enum {
2553 MLX5_RMPC_STATE_RDY = 0x1,
2554 MLX5_RMPC_STATE_ERR = 0x3,
2555};
2556
2557struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
2562 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002563 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566
2567 struct mlx5_ifc_wq_bits wq;
2568};
2569
Saeed Mahameede2816822015-05-28 22:28:40 +03002570struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002571 u8 reserved_at_0[0x5];
2572 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002573 u8 reserved_at_8[0x15];
2574 u8 disable_mc_local_lb[0x1];
2575 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 roce_en[0x1];
2577
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002578 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002579 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002580 u8 event_on_mtu[0x1];
2581 u8 event_on_promisc_change[0x1];
2582 u8 event_on_vlan_change[0x1];
2583 u8 event_on_mc_address_change[0x1];
2584 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002587
2588 u8 mtu[0x10];
2589
Achiad Shochat9efa7522015-12-23 18:47:20 +02002590 u8 system_image_guid[0x40];
2591 u8 port_guid[0x40];
2592 u8 node_guid[0x40];
2593
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002595 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002597
2598 u8 promisc_uc[0x1];
2599 u8 promisc_mc[0x1];
2600 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002601 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002602 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002603 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002604 u8 allowed_list_size[0xc];
2605
2606 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2607
Matan Barakb4ff3a32016-02-09 14:57:42 +02002608 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002609
2610 u8 current_uc_mac_address[0][0x40];
2611};
2612
2613enum {
2614 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2615 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2616 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002617 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002618};
2619
2620struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002621 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002622 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002624 u8 small_fence_on_rdma_read_response[0x1];
2625 u8 umr_en[0x1];
2626 u8 a[0x1];
2627 u8 rw[0x1];
2628 u8 rr[0x1];
2629 u8 lw[0x1];
2630 u8 lr[0x1];
2631 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633
2634 u8 qpn[0x18];
2635 u8 mkey_7_0[0x8];
2636
Matan Barakb4ff3a32016-02-09 14:57:42 +02002637 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638
2639 u8 length64[0x1];
2640 u8 bsf_en[0x1];
2641 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002642 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645 u8 en_rinval[0x1];
2646 u8 pd[0x18];
2647
2648 u8 start_addr[0x40];
2649
2650 u8 len[0x40];
2651
2652 u8 bsf_octword_size[0x20];
2653
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655
2656 u8 translations_octword_size[0x20];
2657
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659 u8 log_page_size[0x5];
2660
Matan Barakb4ff3a32016-02-09 14:57:42 +02002661 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002662};
2663
2664struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666 u8 pkey[0x10];
2667};
2668
2669struct mlx5_ifc_array128_auto_bits {
2670 u8 array128_auto[16][0x8];
2671};
2672
2673struct mlx5_ifc_hca_vport_context_bits {
2674 u8 field_select[0x20];
2675
Matan Barakb4ff3a32016-02-09 14:57:42 +02002676 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002677
2678 u8 sm_virt_aware[0x1];
2679 u8 has_smi[0x1];
2680 u8 has_raw[0x1];
2681 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002682 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002683 u8 port_physical_state[0x4];
2684 u8 vport_state_policy[0x4];
2685 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002686 u8 vport_state[0x4];
2687
Matan Barakb4ff3a32016-02-09 14:57:42 +02002688 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002689
2690 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691
2692 u8 port_guid[0x40];
2693
2694 u8 node_guid[0x40];
2695
2696 u8 cap_mask1[0x20];
2697
2698 u8 cap_mask1_field_select[0x20];
2699
2700 u8 cap_mask2[0x20];
2701
2702 u8 cap_mask2_field_select[0x20];
2703
Matan Barakb4ff3a32016-02-09 14:57:42 +02002704 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002705
2706 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002708 u8 init_type_reply[0x4];
2709 u8 lmc[0x3];
2710 u8 subnet_timeout[0x5];
2711
2712 u8 sm_lid[0x10];
2713 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002715
2716 u8 qkey_violation_counter[0x10];
2717 u8 pkey_violation_counter[0x10];
2718
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002720};
2721
Saeed Mahameedd6666752015-12-01 18:03:22 +02002722struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002723 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002724 u8 vport_svlan_strip[0x1];
2725 u8 vport_cvlan_strip[0x1];
2726 u8 vport_svlan_insert[0x1];
2727 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002729
Matan Barakb4ff3a32016-02-09 14:57:42 +02002730 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002731
2732 u8 svlan_cfi[0x1];
2733 u8 svlan_pcp[0x3];
2734 u8 svlan_id[0xc];
2735 u8 cvlan_cfi[0x1];
2736 u8 cvlan_pcp[0x3];
2737 u8 cvlan_id[0xc];
2738
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002740};
2741
Saeed Mahameede2816822015-05-28 22:28:40 +03002742enum {
2743 MLX5_EQC_STATUS_OK = 0x0,
2744 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2745};
2746
2747enum {
2748 MLX5_EQC_ST_ARMED = 0x9,
2749 MLX5_EQC_ST_FIRED = 0xa,
2750};
2751
2752struct mlx5_ifc_eqc_bits {
2753 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755 u8 ec[0x1];
2756 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002765 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002766
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002768 u8 log_eq_size[0x5];
2769 u8 uar_page[0x18];
2770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774 u8 intr[0x8];
2775
Matan Barakb4ff3a32016-02-09 14:57:42 +02002776 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779
Matan Barakb4ff3a32016-02-09 14:57:42 +02002780 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002781
Matan Barakb4ff3a32016-02-09 14:57:42 +02002782 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002783 u8 consumer_counter[0x18];
2784
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786 u8 producer_counter[0x18];
2787
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789};
2790
2791enum {
2792 MLX5_DCTC_STATE_ACTIVE = 0x0,
2793 MLX5_DCTC_STATE_DRAINING = 0x1,
2794 MLX5_DCTC_STATE_DRAINED = 0x2,
2795};
2796
2797enum {
2798 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2799 MLX5_DCTC_CS_RES_NA = 0x1,
2800 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2801};
2802
2803enum {
2804 MLX5_DCTC_MTU_256_BYTES = 0x1,
2805 MLX5_DCTC_MTU_512_BYTES = 0x2,
2806 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2807 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2808 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2809};
2810
2811struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817 u8 user_index[0x18];
2818
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820 u8 cqn[0x18];
2821
2822 u8 counter_set_id[0x8];
2823 u8 atomic_mode[0x4];
2824 u8 rre[0x1];
2825 u8 rwe[0x1];
2826 u8 rae[0x1];
2827 u8 atomic_like_write_en[0x1];
2828 u8 latency_sensitive[0x1];
2829 u8 rlky[0x1];
2830 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002831 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002832
Matan Barakb4ff3a32016-02-09 14:57:42 +02002833 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002834 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002840 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 pd[0x18];
2844
2845 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 flow_label[0x14];
2848
2849 u8 dc_access_key[0x40];
2850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 mtu[0x3];
2853 u8 port[0x8];
2854 u8 pkey_index[0x10];
2855
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859 u8 hop_limit[0x8];
2860
2861 u8 dc_access_key_violation_count[0x20];
2862
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864 u8 dei_cfi[0x1];
2865 u8 eth_prio[0x3];
2866 u8 ecn[0x2];
2867 u8 dscp[0x6];
2868
Matan Barakb4ff3a32016-02-09 14:57:42 +02002869 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002870};
2871
2872enum {
2873 MLX5_CQC_STATUS_OK = 0x0,
2874 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2875 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2876};
2877
2878enum {
2879 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2880 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2881};
2882
2883enum {
2884 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2885 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2886 MLX5_CQC_ST_FIRED = 0xa,
2887};
2888
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002889enum {
2890 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2891 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002892 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002893};
2894
Saeed Mahameede2816822015-05-28 22:28:40 +03002895struct mlx5_ifc_cqc_bits {
2896 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898 u8 cqe_sz[0x3];
2899 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901 u8 scqe_break_moderation_en[0x1];
2902 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002903 u8 cq_period_mode[0x2];
2904 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905 u8 mini_cqe_res_format[0x2];
2906 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002913 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 log_cq_size[0x5];
2917 u8 uar_page[0x18];
2918
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920 u8 cq_period[0xc];
2921 u8 cq_max_count[0x10];
2922
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924 u8 c_eqn[0x8];
2925
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933 u8 last_notified_index[0x18];
2934
Matan Barakb4ff3a32016-02-09 14:57:42 +02002935 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936 u8 last_solicit_index[0x18];
2937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939 u8 consumer_counter[0x18];
2940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942 u8 producer_counter[0x18];
2943
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002945
2946 u8 dbr_addr[0x40];
2947};
2948
2949union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2950 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2951 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2952 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002953 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002954};
2955
2956struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002957 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002960 u8 ieee_vendor_id[0x18];
2961
Matan Barakb4ff3a32016-02-09 14:57:42 +02002962 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002963 u8 vsd_vendor_id[0x10];
2964
2965 u8 vsd[208][0x8];
2966
2967 u8 vsd_contd_psid[16][0x8];
2968};
2969
Saeed Mahameed74862162016-06-09 15:11:34 +03002970enum {
2971 MLX5_XRQC_STATE_GOOD = 0x0,
2972 MLX5_XRQC_STATE_ERROR = 0x1,
2973};
2974
2975enum {
2976 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2977 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2978};
2979
2980enum {
2981 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2982};
2983
2984struct mlx5_ifc_tag_matching_topology_context_bits {
2985 u8 log_matching_list_sz[0x4];
2986 u8 reserved_at_4[0xc];
2987 u8 append_next_index[0x10];
2988
2989 u8 sw_phase_cnt[0x10];
2990 u8 hw_phase_cnt[0x10];
2991
2992 u8 reserved_at_40[0x40];
2993};
2994
2995struct mlx5_ifc_xrqc_bits {
2996 u8 state[0x4];
2997 u8 rlkey[0x1];
2998 u8 reserved_at_5[0xf];
2999 u8 topology[0x4];
3000 u8 reserved_at_18[0x4];
3001 u8 offload[0x4];
3002
3003 u8 reserved_at_20[0x8];
3004 u8 user_index[0x18];
3005
3006 u8 reserved_at_40[0x8];
3007 u8 cqn[0x18];
3008
3009 u8 reserved_at_60[0xa0];
3010
3011 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3012
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003013 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003014
3015 struct mlx5_ifc_wq_bits wq;
3016};
3017
Saeed Mahameede2816822015-05-28 22:28:40 +03003018union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3019 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3020 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003021 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003022};
3023
3024union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3025 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3026 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3027 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003028 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029};
3030
3031union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3032 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3033 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3034 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3035 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3036 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3037 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3038 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003039 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003040 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003041 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043};
3044
Gal Pressman8ed1a632016-11-17 13:46:01 +02003045union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3046 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3047 u8 reserved_at_0[0x7c0];
3048};
3049
Saeed Mahameede2816822015-05-28 22:28:40 +03003050union mlx5_ifc_event_auto_bits {
3051 struct mlx5_ifc_comp_event_bits comp_event;
3052 struct mlx5_ifc_dct_events_bits dct_events;
3053 struct mlx5_ifc_qp_events_bits qp_events;
3054 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3055 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3056 struct mlx5_ifc_cq_error_bits cq_error;
3057 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3058 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3059 struct mlx5_ifc_gpio_event_bits gpio_event;
3060 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3061 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3062 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003063 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003064};
3065
3066struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068
3069 u8 assert_existptr[0x20];
3070
3071 u8 assert_callra[0x20];
3072
Matan Barakb4ff3a32016-02-09 14:57:42 +02003073 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003074
3075 u8 fw_version[0x20];
3076
3077 u8 hw_id[0x20];
3078
Matan Barakb4ff3a32016-02-09 14:57:42 +02003079 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003080
3081 u8 irisc_index[0x8];
3082 u8 synd[0x8];
3083 u8 ext_synd[0x10];
3084};
3085
3086struct mlx5_ifc_register_loopback_control_bits {
3087 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003088 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003089 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003090 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003091
Matan Barakb4ff3a32016-02-09 14:57:42 +02003092 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003093};
3094
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003095struct mlx5_ifc_vport_tc_element_bits {
3096 u8 traffic_class[0x4];
3097 u8 reserved_at_4[0xc];
3098 u8 vport_number[0x10];
3099};
3100
3101struct mlx5_ifc_vport_element_bits {
3102 u8 reserved_at_0[0x10];
3103 u8 vport_number[0x10];
3104};
3105
3106enum {
3107 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3108 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3109 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3110};
3111
3112struct mlx5_ifc_tsar_element_bits {
3113 u8 reserved_at_0[0x8];
3114 u8 tsar_type[0x8];
3115 u8 reserved_at_10[0x10];
3116};
3117
Majd Dibbiny8812c242017-02-09 14:20:12 +02003118enum {
3119 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3120 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3121};
3122
Saeed Mahameede2816822015-05-28 22:28:40 +03003123struct mlx5_ifc_teardown_hca_out_bits {
3124 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003125 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003126
3127 u8 syndrome[0x20];
3128
Majd Dibbiny8812c242017-02-09 14:20:12 +02003129 u8 reserved_at_40[0x3f];
3130
3131 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003132};
3133
3134enum {
3135 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003136 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003137};
3138
3139struct mlx5_ifc_teardown_hca_in_bits {
3140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142
Matan Barakb4ff3a32016-02-09 14:57:42 +02003143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003144 u8 op_mod[0x10];
3145
Matan Barakb4ff3a32016-02-09 14:57:42 +02003146 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003147 u8 profile[0x10];
3148
Matan Barakb4ff3a32016-02-09 14:57:42 +02003149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003150};
3151
3152struct mlx5_ifc_sqerr2rts_qp_out_bits {
3153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155
3156 u8 syndrome[0x20];
3157
Matan Barakb4ff3a32016-02-09 14:57:42 +02003158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159};
3160
3161struct mlx5_ifc_sqerr2rts_qp_in_bits {
3162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166 u8 op_mod[0x10];
3167
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169 u8 qpn[0x18];
3170
Matan Barakb4ff3a32016-02-09 14:57:42 +02003171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003172
3173 u8 opt_param_mask[0x20];
3174
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176
3177 struct mlx5_ifc_qpc_bits qpc;
3178
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180};
3181
3182struct mlx5_ifc_sqd2rts_qp_out_bits {
3183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185
3186 u8 syndrome[0x20];
3187
Matan Barakb4ff3a32016-02-09 14:57:42 +02003188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003189};
3190
3191struct mlx5_ifc_sqd2rts_qp_in_bits {
3192 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196 u8 op_mod[0x10];
3197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199 u8 qpn[0x18];
3200
Matan Barakb4ff3a32016-02-09 14:57:42 +02003201 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003202
3203 u8 opt_param_mask[0x20];
3204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206
3207 struct mlx5_ifc_qpc_bits qpc;
3208
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210};
3211
3212struct mlx5_ifc_set_roce_address_out_bits {
3213 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215
3216 u8 syndrome[0x20];
3217
Matan Barakb4ff3a32016-02-09 14:57:42 +02003218 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003219};
3220
3221struct mlx5_ifc_set_roce_address_in_bits {
3222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003224
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226 u8 op_mod[0x10];
3227
3228 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003229 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232
3233 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3234};
3235
3236struct mlx5_ifc_set_mad_demux_out_bits {
3237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239
3240 u8 syndrome[0x20];
3241
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243};
3244
3245enum {
3246 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3247 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3248};
3249
3250struct mlx5_ifc_set_mad_demux_in_bits {
3251 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 op_mod[0x10];
3256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262};
3263
3264struct mlx5_ifc_set_l2_table_entry_out_bits {
3265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267
3268 u8 syndrome[0x20];
3269
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271};
3272
3273struct mlx5_ifc_set_l2_table_entry_in_bits {
3274 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276
Matan Barakb4ff3a32016-02-09 14:57:42 +02003277 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003278 u8 op_mod[0x10];
3279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283 u8 table_index[0x18];
3284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288 u8 vlan_valid[0x1];
3289 u8 vlan[0xc];
3290
3291 struct mlx5_ifc_mac_address_layout_bits mac_address;
3292
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294};
3295
3296struct mlx5_ifc_set_issi_out_bits {
3297 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299
3300 u8 syndrome[0x20];
3301
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303};
3304
3305struct mlx5_ifc_set_issi_in_bits {
3306 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308
Matan Barakb4ff3a32016-02-09 14:57:42 +02003309 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003310 u8 op_mod[0x10];
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313 u8 current_issi[0x10];
3314
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316};
3317
3318struct mlx5_ifc_set_hca_cap_out_bits {
3319 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321
3322 u8 syndrome[0x20];
3323
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003325};
3326
3327struct mlx5_ifc_set_hca_cap_in_bits {
3328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003330
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003332 u8 op_mod[0x10];
3333
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003335
Saeed Mahameede2816822015-05-28 22:28:40 +03003336 union mlx5_ifc_hca_cap_union_bits capability;
3337};
3338
Maor Gottlieb26a81452015-12-10 17:12:39 +02003339enum {
3340 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3341 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3342 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3343 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3344};
3345
Saeed Mahameede2816822015-05-28 22:28:40 +03003346struct mlx5_ifc_set_fte_out_bits {
3347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349
3350 u8 syndrome[0x20];
3351
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353};
3354
3355struct mlx5_ifc_set_fte_in_bits {
3356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360 u8 op_mod[0x10];
3361
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003362 u8 other_vport[0x1];
3363 u8 reserved_at_41[0xf];
3364 u8 vport_number[0x10];
3365
3366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367
3368 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372 u8 table_id[0x18];
3373
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003375 u8 modify_enable_mask[0x8];
3376
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378
3379 u8 flow_index[0x20];
3380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
3383 struct mlx5_ifc_flow_context_bits flow_context;
3384};
3385
3386struct mlx5_ifc_rts2rts_qp_out_bits {
3387 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389
3390 u8 syndrome[0x20];
3391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393};
3394
3395struct mlx5_ifc_rts2rts_qp_in_bits {
3396 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400 u8 op_mod[0x10];
3401
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403 u8 qpn[0x18];
3404
Matan Barakb4ff3a32016-02-09 14:57:42 +02003405 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003406
3407 u8 opt_param_mask[0x20];
3408
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410
3411 struct mlx5_ifc_qpc_bits qpc;
3412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414};
3415
3416struct mlx5_ifc_rtr2rts_qp_out_bits {
3417 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419
3420 u8 syndrome[0x20];
3421
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423};
3424
3425struct mlx5_ifc_rtr2rts_qp_in_bits {
3426 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430 u8 op_mod[0x10];
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433 u8 qpn[0x18];
3434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003436
3437 u8 opt_param_mask[0x20];
3438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440
3441 struct mlx5_ifc_qpc_bits qpc;
3442
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444};
3445
3446struct mlx5_ifc_rst2init_qp_out_bits {
3447 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449
3450 u8 syndrome[0x20];
3451
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453};
3454
3455struct mlx5_ifc_rst2init_qp_in_bits {
3456 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003458
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460 u8 op_mod[0x10];
3461
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463 u8 qpn[0x18];
3464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466
3467 u8 opt_param_mask[0x20];
3468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470
3471 struct mlx5_ifc_qpc_bits qpc;
3472
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003474};
3475
Saeed Mahameed74862162016-06-09 15:11:34 +03003476struct mlx5_ifc_query_xrq_out_bits {
3477 u8 status[0x8];
3478 u8 reserved_at_8[0x18];
3479
3480 u8 syndrome[0x20];
3481
3482 u8 reserved_at_40[0x40];
3483
3484 struct mlx5_ifc_xrqc_bits xrq_context;
3485};
3486
3487struct mlx5_ifc_query_xrq_in_bits {
3488 u8 opcode[0x10];
3489 u8 reserved_at_10[0x10];
3490
3491 u8 reserved_at_20[0x10];
3492 u8 op_mod[0x10];
3493
3494 u8 reserved_at_40[0x8];
3495 u8 xrqn[0x18];
3496
3497 u8 reserved_at_60[0x20];
3498};
3499
Saeed Mahameede2816822015-05-28 22:28:40 +03003500struct mlx5_ifc_query_xrc_srq_out_bits {
3501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 u8 syndrome[0x20];
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507
3508 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3509
Matan Barakb4ff3a32016-02-09 14:57:42 +02003510 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003511
3512 u8 pas[0][0x40];
3513};
3514
3515struct mlx5_ifc_query_xrc_srq_in_bits {
3516 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003517 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003518
Matan Barakb4ff3a32016-02-09 14:57:42 +02003519 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003520 u8 op_mod[0x10];
3521
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523 u8 xrc_srqn[0x18];
3524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526};
3527
3528enum {
3529 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3530 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3531};
3532
3533struct mlx5_ifc_query_vport_state_out_bits {
3534 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536
3537 u8 syndrome[0x20];
3538
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542 u8 admin_state[0x4];
3543 u8 state[0x4];
3544};
3545
3546enum {
3547 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003548 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003549};
3550
3551struct mlx5_ifc_query_vport_state_in_bits {
3552 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556 u8 op_mod[0x10];
3557
3558 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003559 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003560 u8 vport_number[0x10];
3561
Matan Barakb4ff3a32016-02-09 14:57:42 +02003562 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003563};
3564
3565struct mlx5_ifc_query_vport_counter_out_bits {
3566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568
3569 u8 syndrome[0x20];
3570
Matan Barakb4ff3a32016-02-09 14:57:42 +02003571 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003572
3573 struct mlx5_ifc_traffic_counter_bits received_errors;
3574
3575 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3576
3577 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3578
3579 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3580
3581 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3582
3583 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3584
3585 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3586
3587 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3588
3589 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3590
3591 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3592
3593 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3594
3595 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598};
3599
3600enum {
3601 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3602};
3603
3604struct mlx5_ifc_query_vport_counter_in_bits {
3605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609 u8 op_mod[0x10];
3610
3611 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003612 u8 reserved_at_41[0xb];
3613 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003614 u8 vport_number[0x10];
3615
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
3618 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003619 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622};
3623
3624struct mlx5_ifc_query_tis_out_bits {
3625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
3628 u8 syndrome[0x20];
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631
3632 struct mlx5_ifc_tisc_bits tis_context;
3633};
3634
3635struct mlx5_ifc_query_tis_in_bits {
3636 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003638
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640 u8 op_mod[0x10];
3641
Matan Barakb4ff3a32016-02-09 14:57:42 +02003642 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003643 u8 tisn[0x18];
3644
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646};
3647
3648struct mlx5_ifc_query_tir_out_bits {
3649 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
3652 u8 syndrome[0x20];
3653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655
3656 struct mlx5_ifc_tirc_bits tir_context;
3657};
3658
3659struct mlx5_ifc_query_tir_in_bits {
3660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664 u8 op_mod[0x10];
3665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667 u8 tirn[0x18];
3668
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670};
3671
3672struct mlx5_ifc_query_srq_out_bits {
3673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675
3676 u8 syndrome[0x20];
3677
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
3680 struct mlx5_ifc_srqc_bits srq_context_entry;
3681
Matan Barakb4ff3a32016-02-09 14:57:42 +02003682 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003683
3684 u8 pas[0][0x40];
3685};
3686
3687struct mlx5_ifc_query_srq_in_bits {
3688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690
Matan Barakb4ff3a32016-02-09 14:57:42 +02003691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003692 u8 op_mod[0x10];
3693
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695 u8 srqn[0x18];
3696
Matan Barakb4ff3a32016-02-09 14:57:42 +02003697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003698};
3699
3700struct mlx5_ifc_query_sq_out_bits {
3701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703
3704 u8 syndrome[0x20];
3705
Matan Barakb4ff3a32016-02-09 14:57:42 +02003706 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003707
3708 struct mlx5_ifc_sqc_bits sq_context;
3709};
3710
3711struct mlx5_ifc_query_sq_in_bits {
3712 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716 u8 op_mod[0x10];
3717
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719 u8 sqn[0x18];
3720
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722};
3723
3724struct mlx5_ifc_query_special_contexts_out_bits {
3725 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003726 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003727
3728 u8 syndrome[0x20];
3729
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003730 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731
3732 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003733
3734 u8 null_mkey[0x20];
3735
3736 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737};
3738
3739struct mlx5_ifc_query_special_contexts_in_bits {
3740 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742
Matan Barakb4ff3a32016-02-09 14:57:42 +02003743 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003744 u8 op_mod[0x10];
3745
Matan Barakb4ff3a32016-02-09 14:57:42 +02003746 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747};
3748
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003749struct mlx5_ifc_query_scheduling_element_out_bits {
3750 u8 opcode[0x10];
3751 u8 reserved_at_10[0x10];
3752
3753 u8 reserved_at_20[0x10];
3754 u8 op_mod[0x10];
3755
3756 u8 reserved_at_40[0xc0];
3757
3758 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3759
3760 u8 reserved_at_300[0x100];
3761};
3762
3763enum {
3764 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3765};
3766
3767struct mlx5_ifc_query_scheduling_element_in_bits {
3768 u8 opcode[0x10];
3769 u8 reserved_at_10[0x10];
3770
3771 u8 reserved_at_20[0x10];
3772 u8 op_mod[0x10];
3773
3774 u8 scheduling_hierarchy[0x8];
3775 u8 reserved_at_48[0x18];
3776
3777 u8 scheduling_element_id[0x20];
3778
3779 u8 reserved_at_80[0x180];
3780};
3781
Saeed Mahameede2816822015-05-28 22:28:40 +03003782struct mlx5_ifc_query_rqt_out_bits {
3783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785
3786 u8 syndrome[0x20];
3787
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
3790 struct mlx5_ifc_rqtc_bits rqt_context;
3791};
3792
3793struct mlx5_ifc_query_rqt_in_bits {
3794 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003795 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798 u8 op_mod[0x10];
3799
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801 u8 rqtn[0x18];
3802
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804};
3805
3806struct mlx5_ifc_query_rq_out_bits {
3807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809
3810 u8 syndrome[0x20];
3811
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
3814 struct mlx5_ifc_rqc_bits rq_context;
3815};
3816
3817struct mlx5_ifc_query_rq_in_bits {
3818 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822 u8 op_mod[0x10];
3823
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825 u8 rqn[0x18];
3826
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828};
3829
3830struct mlx5_ifc_query_roce_address_out_bits {
3831 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
3834 u8 syndrome[0x20];
3835
Matan Barakb4ff3a32016-02-09 14:57:42 +02003836 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837
3838 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3839};
3840
3841struct mlx5_ifc_query_roce_address_in_bits {
3842 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003843 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003844
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846 u8 op_mod[0x10];
3847
3848 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003849 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003850
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852};
3853
3854struct mlx5_ifc_query_rmp_out_bits {
3855 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857
3858 u8 syndrome[0x20];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861
3862 struct mlx5_ifc_rmpc_bits rmp_context;
3863};
3864
3865struct mlx5_ifc_query_rmp_in_bits {
3866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870 u8 op_mod[0x10];
3871
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873 u8 rmpn[0x18];
3874
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876};
3877
3878struct mlx5_ifc_query_qp_out_bits {
3879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
3882 u8 syndrome[0x20];
3883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885
3886 u8 opt_param_mask[0x20];
3887
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 struct mlx5_ifc_qpc_bits qpc;
3891
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 u8 pas[0][0x40];
3895};
3896
3897struct mlx5_ifc_query_qp_in_bits {
3898 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902 u8 op_mod[0x10];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905 u8 qpn[0x18];
3906
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908};
3909
3910struct mlx5_ifc_query_q_counter_out_bits {
3911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913
3914 u8 syndrome[0x20];
3915
Matan Barakb4ff3a32016-02-09 14:57:42 +02003916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003917
3918 u8 rx_write_requests[0x20];
3919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921
3922 u8 rx_read_requests[0x20];
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 u8 rx_atomic_requests[0x20];
3927
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929
3930 u8 rx_dct_connect[0x20];
3931
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933
3934 u8 out_of_buffer[0x20];
3935
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937
3938 u8 out_of_sequence[0x20];
3939
Saeed Mahameed74862162016-06-09 15:11:34 +03003940 u8 reserved_at_1e0[0x20];
3941
3942 u8 duplicate_request[0x20];
3943
3944 u8 reserved_at_220[0x20];
3945
3946 u8 rnr_nak_retry_err[0x20];
3947
3948 u8 reserved_at_260[0x20];
3949
3950 u8 packet_seq_err[0x20];
3951
3952 u8 reserved_at_2a0[0x20];
3953
3954 u8 implied_nak_seq_err[0x20];
3955
3956 u8 reserved_at_2e0[0x20];
3957
3958 u8 local_ack_timeout_err[0x20];
3959
Parav Pandit58dcb602017-06-19 07:19:37 +03003960 u8 reserved_at_320[0xa0];
3961
3962 u8 resp_local_length_error[0x20];
3963
3964 u8 req_local_length_error[0x20];
3965
3966 u8 resp_local_qp_error[0x20];
3967
3968 u8 local_operation_error[0x20];
3969
3970 u8 resp_local_protection[0x20];
3971
3972 u8 req_local_protection[0x20];
3973
3974 u8 resp_cqe_error[0x20];
3975
3976 u8 req_cqe_error[0x20];
3977
3978 u8 req_mw_binding[0x20];
3979
3980 u8 req_bad_response[0x20];
3981
3982 u8 req_remote_invalid_request[0x20];
3983
3984 u8 resp_remote_invalid_request[0x20];
3985
3986 u8 req_remote_access_errors[0x20];
3987
3988 u8 resp_remote_access_errors[0x20];
3989
3990 u8 req_remote_operation_errors[0x20];
3991
3992 u8 req_transport_retries_exceeded[0x20];
3993
3994 u8 cq_overflow[0x20];
3995
3996 u8 resp_cqe_flush_error[0x20];
3997
3998 u8 req_cqe_flush_error[0x20];
3999
4000 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001};
4002
4003struct mlx5_ifc_query_q_counter_in_bits {
4004 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004005 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008 u8 op_mod[0x10];
4009
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011
4012 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004013 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016 u8 counter_set_id[0x8];
4017};
4018
4019struct mlx5_ifc_query_pages_out_bits {
4020 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022
4023 u8 syndrome[0x20];
4024
Matan Barakb4ff3a32016-02-09 14:57:42 +02004025 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004026 u8 function_id[0x10];
4027
4028 u8 num_pages[0x20];
4029};
4030
4031enum {
4032 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4033 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4034 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4035};
4036
4037struct mlx5_ifc_query_pages_in_bits {
4038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040
Matan Barakb4ff3a32016-02-09 14:57:42 +02004041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004042 u8 op_mod[0x10];
4043
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045 u8 function_id[0x10];
4046
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048};
4049
4050struct mlx5_ifc_query_nic_vport_context_out_bits {
4051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053
4054 u8 syndrome[0x20];
4055
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057
4058 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4059};
4060
4061struct mlx5_ifc_query_nic_vport_context_in_bits {
4062 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064
Matan Barakb4ff3a32016-02-09 14:57:42 +02004065 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004066 u8 op_mod[0x10];
4067
4068 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070 u8 vport_number[0x10];
4071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075};
4076
4077struct mlx5_ifc_query_mkey_out_bits {
4078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 u8 syndrome[0x20];
4082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
4085 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088
4089 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4090
4091 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4092};
4093
4094struct mlx5_ifc_query_mkey_in_bits {
4095 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099 u8 op_mod[0x10];
4100
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102 u8 mkey_index[0x18];
4103
4104 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106};
4107
4108struct mlx5_ifc_query_mad_demux_out_bits {
4109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 u8 syndrome[0x20];
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115
4116 u8 mad_dumux_parameters_block[0x20];
4117};
4118
4119struct mlx5_ifc_query_mad_demux_in_bits {
4120 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004121 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004122
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124 u8 op_mod[0x10];
4125
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127};
4128
4129struct mlx5_ifc_query_l2_table_entry_out_bits {
4130 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132
4133 u8 syndrome[0x20];
4134
Matan Barakb4ff3a32016-02-09 14:57:42 +02004135 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004136
Matan Barakb4ff3a32016-02-09 14:57:42 +02004137 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004138 u8 vlan_valid[0x1];
4139 u8 vlan[0xc];
4140
4141 struct mlx5_ifc_mac_address_layout_bits mac_address;
4142
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144};
4145
4146struct mlx5_ifc_query_l2_table_entry_in_bits {
4147 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004148 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004149
Matan Barakb4ff3a32016-02-09 14:57:42 +02004150 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004151 u8 op_mod[0x10];
4152
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156 u8 table_index[0x18];
4157
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159};
4160
4161struct mlx5_ifc_query_issi_out_bits {
4162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
4165 u8 syndrome[0x20];
4166
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168 u8 current_issi[0x10];
4169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173 u8 supported_issi_dw0[0x20];
4174};
4175
4176struct mlx5_ifc_query_issi_in_bits {
4177 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004178 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004179
Matan Barakb4ff3a32016-02-09 14:57:42 +02004180 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004181 u8 op_mod[0x10];
4182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184};
4185
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004186struct mlx5_ifc_set_driver_version_out_bits {
4187 u8 status[0x8];
4188 u8 reserved_0[0x18];
4189
4190 u8 syndrome[0x20];
4191 u8 reserved_1[0x40];
4192};
4193
4194struct mlx5_ifc_set_driver_version_in_bits {
4195 u8 opcode[0x10];
4196 u8 reserved_0[0x10];
4197
4198 u8 reserved_1[0x10];
4199 u8 op_mod[0x10];
4200
4201 u8 reserved_2[0x40];
4202 u8 driver_version[64][0x8];
4203};
4204
Saeed Mahameede2816822015-05-28 22:28:40 +03004205struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4206 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208
4209 u8 syndrome[0x20];
4210
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212
4213 struct mlx5_ifc_pkey_bits pkey[0];
4214};
4215
4216struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004219
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221 u8 op_mod[0x10];
4222
4223 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004224 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004225 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004226 u8 vport_number[0x10];
4227
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229 u8 pkey_index[0x10];
4230};
4231
Eli Coheneff901d2016-03-11 22:58:42 +02004232enum {
4233 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4234 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4235 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4236};
4237
Saeed Mahameede2816822015-05-28 22:28:40 +03004238struct mlx5_ifc_query_hca_vport_gid_out_bits {
4239 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
4242 u8 syndrome[0x20];
4243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245
4246 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248
4249 struct mlx5_ifc_array128_auto_bits gid[0];
4250};
4251
4252struct mlx5_ifc_query_hca_vport_gid_in_bits {
4253 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004254 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004255
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257 u8 op_mod[0x10];
4258
4259 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004261 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262 u8 vport_number[0x10];
4263
Matan Barakb4ff3a32016-02-09 14:57:42 +02004264 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004265 u8 gid_index[0x10];
4266};
4267
4268struct mlx5_ifc_query_hca_vport_context_out_bits {
4269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 u8 syndrome[0x20];
4273
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275
4276 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4277};
4278
4279struct mlx5_ifc_query_hca_vport_context_in_bits {
4280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284 u8 op_mod[0x10];
4285
4286 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004288 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 vport_number[0x10];
4290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292};
4293
4294struct mlx5_ifc_query_hca_cap_out_bits {
4295 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297
4298 u8 syndrome[0x20];
4299
Matan Barakb4ff3a32016-02-09 14:57:42 +02004300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004301
4302 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004303};
4304
4305struct mlx5_ifc_query_hca_cap_in_bits {
4306 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004308
Matan Barakb4ff3a32016-02-09 14:57:42 +02004309 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004310 u8 op_mod[0x10];
4311
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004313};
4314
Saeed Mahameede2816822015-05-28 22:28:40 +03004315struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004318
4319 u8 syndrome[0x20];
4320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326 u8 log_size[0x8];
4327
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004329};
4330
Saeed Mahameede2816822015-05-28 22:28:40 +03004331struct mlx5_ifc_query_flow_table_in_bits {
4332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336 u8 op_mod[0x10];
4337
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004339
4340 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344 u8 table_id[0x18];
4345
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347};
4348
4349struct mlx5_ifc_query_fte_out_bits {
4350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
4353 u8 syndrome[0x20];
4354
Matan Barakb4ff3a32016-02-09 14:57:42 +02004355 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004356
4357 struct mlx5_ifc_flow_context_bits flow_context;
4358};
4359
4360struct mlx5_ifc_query_fte_in_bits {
4361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365 u8 op_mod[0x10];
4366
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368
4369 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373 u8 table_id[0x18];
4374
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376
4377 u8 flow_index[0x20];
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380};
4381
4382enum {
4383 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4384 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4385 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4386};
4387
4388struct mlx5_ifc_query_flow_group_out_bits {
4389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004391
4392 u8 syndrome[0x20];
4393
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004395
4396 u8 start_flow_index[0x20];
4397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399
4400 u8 end_flow_index[0x20];
4401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403
Matan Barakb4ff3a32016-02-09 14:57:42 +02004404 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004405 u8 match_criteria_enable[0x8];
4406
4407 struct mlx5_ifc_fte_match_param_bits match_criteria;
4408
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004410};
4411
4412struct mlx5_ifc_query_flow_group_in_bits {
4413 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004415
Matan Barakb4ff3a32016-02-09 14:57:42 +02004416 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004417 u8 op_mod[0x10];
4418
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004420
4421 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004423
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004425 u8 table_id[0x18];
4426
4427 u8 group_id[0x20];
4428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430};
4431
Amir Vadai9dc0b282016-05-13 12:55:39 +00004432struct mlx5_ifc_query_flow_counter_out_bits {
4433 u8 status[0x8];
4434 u8 reserved_at_8[0x18];
4435
4436 u8 syndrome[0x20];
4437
4438 u8 reserved_at_40[0x40];
4439
4440 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4441};
4442
4443struct mlx5_ifc_query_flow_counter_in_bits {
4444 u8 opcode[0x10];
4445 u8 reserved_at_10[0x10];
4446
4447 u8 reserved_at_20[0x10];
4448 u8 op_mod[0x10];
4449
4450 u8 reserved_at_40[0x80];
4451
4452 u8 clear[0x1];
4453 u8 reserved_at_c1[0xf];
4454 u8 num_of_counters[0x10];
4455
4456 u8 reserved_at_e0[0x10];
4457 u8 flow_counter_id[0x10];
4458};
4459
Saeed Mahameedd6666752015-12-01 18:03:22 +02004460struct mlx5_ifc_query_esw_vport_context_out_bits {
4461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004463
4464 u8 syndrome[0x20];
4465
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004467
4468 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4469};
4470
4471struct mlx5_ifc_query_esw_vport_context_in_bits {
4472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004476 u8 op_mod[0x10];
4477
4478 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004480 u8 vport_number[0x10];
4481
Matan Barakb4ff3a32016-02-09 14:57:42 +02004482 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004483};
4484
4485struct mlx5_ifc_modify_esw_vport_context_out_bits {
4486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004488
4489 u8 syndrome[0x20];
4490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004492};
4493
4494struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004495 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004496 u8 vport_cvlan_insert[0x1];
4497 u8 vport_svlan_insert[0x1];
4498 u8 vport_cvlan_strip[0x1];
4499 u8 vport_svlan_strip[0x1];
4500};
4501
4502struct mlx5_ifc_modify_esw_vport_context_in_bits {
4503 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004505
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004507 u8 op_mod[0x10];
4508
4509 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004511 u8 vport_number[0x10];
4512
4513 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4514
4515 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4516};
4517
Saeed Mahameede2816822015-05-28 22:28:40 +03004518struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004519 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004520 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004521
4522 u8 syndrome[0x20];
4523
Matan Barakb4ff3a32016-02-09 14:57:42 +02004524 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004525
4526 struct mlx5_ifc_eqc_bits eq_context_entry;
4527
Matan Barakb4ff3a32016-02-09 14:57:42 +02004528 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004529
4530 u8 event_bitmask[0x40];
4531
Matan Barakb4ff3a32016-02-09 14:57:42 +02004532 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004533
4534 u8 pas[0][0x40];
4535};
4536
4537struct mlx5_ifc_query_eq_in_bits {
4538 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004539 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004540
Matan Barakb4ff3a32016-02-09 14:57:42 +02004541 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004542 u8 op_mod[0x10];
4543
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545 u8 eq_number[0x8];
4546
Matan Barakb4ff3a32016-02-09 14:57:42 +02004547 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004548};
4549
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004550struct mlx5_ifc_encap_header_in_bits {
4551 u8 reserved_at_0[0x5];
4552 u8 header_type[0x3];
4553 u8 reserved_at_8[0xe];
4554 u8 encap_header_size[0xa];
4555
4556 u8 reserved_at_20[0x10];
4557 u8 encap_header[2][0x8];
4558
4559 u8 more_encap_header[0][0x8];
4560};
4561
4562struct mlx5_ifc_query_encap_header_out_bits {
4563 u8 status[0x8];
4564 u8 reserved_at_8[0x18];
4565
4566 u8 syndrome[0x20];
4567
4568 u8 reserved_at_40[0xa0];
4569
4570 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4571};
4572
4573struct mlx5_ifc_query_encap_header_in_bits {
4574 u8 opcode[0x10];
4575 u8 reserved_at_10[0x10];
4576
4577 u8 reserved_at_20[0x10];
4578 u8 op_mod[0x10];
4579
4580 u8 encap_id[0x20];
4581
4582 u8 reserved_at_60[0xa0];
4583};
4584
4585struct mlx5_ifc_alloc_encap_header_out_bits {
4586 u8 status[0x8];
4587 u8 reserved_at_8[0x18];
4588
4589 u8 syndrome[0x20];
4590
4591 u8 encap_id[0x20];
4592
4593 u8 reserved_at_60[0x20];
4594};
4595
4596struct mlx5_ifc_alloc_encap_header_in_bits {
4597 u8 opcode[0x10];
4598 u8 reserved_at_10[0x10];
4599
4600 u8 reserved_at_20[0x10];
4601 u8 op_mod[0x10];
4602
4603 u8 reserved_at_40[0xa0];
4604
4605 struct mlx5_ifc_encap_header_in_bits encap_header;
4606};
4607
4608struct mlx5_ifc_dealloc_encap_header_out_bits {
4609 u8 status[0x8];
4610 u8 reserved_at_8[0x18];
4611
4612 u8 syndrome[0x20];
4613
4614 u8 reserved_at_40[0x40];
4615};
4616
4617struct mlx5_ifc_dealloc_encap_header_in_bits {
4618 u8 opcode[0x10];
4619 u8 reserved_at_10[0x10];
4620
4621 u8 reserved_20[0x10];
4622 u8 op_mod[0x10];
4623
4624 u8 encap_id[0x20];
4625
4626 u8 reserved_60[0x20];
4627};
4628
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004629struct mlx5_ifc_set_action_in_bits {
4630 u8 action_type[0x4];
4631 u8 field[0xc];
4632 u8 reserved_at_10[0x3];
4633 u8 offset[0x5];
4634 u8 reserved_at_18[0x3];
4635 u8 length[0x5];
4636
4637 u8 data[0x20];
4638};
4639
4640struct mlx5_ifc_add_action_in_bits {
4641 u8 action_type[0x4];
4642 u8 field[0xc];
4643 u8 reserved_at_10[0x10];
4644
4645 u8 data[0x20];
4646};
4647
4648union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4649 struct mlx5_ifc_set_action_in_bits set_action_in;
4650 struct mlx5_ifc_add_action_in_bits add_action_in;
4651 u8 reserved_at_0[0x40];
4652};
4653
4654enum {
4655 MLX5_ACTION_TYPE_SET = 0x1,
4656 MLX5_ACTION_TYPE_ADD = 0x2,
4657};
4658
4659enum {
4660 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4661 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4662 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4663 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4664 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4665 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4666 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4667 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4668 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4669 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4670 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4671 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4672 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4673 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4674 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4675 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4676 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4677 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4678 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4679 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4680 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4681 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004682 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004683};
4684
4685struct mlx5_ifc_alloc_modify_header_context_out_bits {
4686 u8 status[0x8];
4687 u8 reserved_at_8[0x18];
4688
4689 u8 syndrome[0x20];
4690
4691 u8 modify_header_id[0x20];
4692
4693 u8 reserved_at_60[0x20];
4694};
4695
4696struct mlx5_ifc_alloc_modify_header_context_in_bits {
4697 u8 opcode[0x10];
4698 u8 reserved_at_10[0x10];
4699
4700 u8 reserved_at_20[0x10];
4701 u8 op_mod[0x10];
4702
4703 u8 reserved_at_40[0x20];
4704
4705 u8 table_type[0x8];
4706 u8 reserved_at_68[0x10];
4707 u8 num_of_actions[0x8];
4708
4709 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4710};
4711
4712struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4713 u8 status[0x8];
4714 u8 reserved_at_8[0x18];
4715
4716 u8 syndrome[0x20];
4717
4718 u8 reserved_at_40[0x40];
4719};
4720
4721struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4722 u8 opcode[0x10];
4723 u8 reserved_at_10[0x10];
4724
4725 u8 reserved_at_20[0x10];
4726 u8 op_mod[0x10];
4727
4728 u8 modify_header_id[0x20];
4729
4730 u8 reserved_at_60[0x20];
4731};
4732
Saeed Mahameede2816822015-05-28 22:28:40 +03004733struct mlx5_ifc_query_dct_out_bits {
4734 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004735 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004736
4737 u8 syndrome[0x20];
4738
Matan Barakb4ff3a32016-02-09 14:57:42 +02004739 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004740
4741 struct mlx5_ifc_dctc_bits dct_context_entry;
4742
Matan Barakb4ff3a32016-02-09 14:57:42 +02004743 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004744};
4745
4746struct mlx5_ifc_query_dct_in_bits {
4747 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004749
Matan Barakb4ff3a32016-02-09 14:57:42 +02004750 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004751 u8 op_mod[0x10];
4752
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754 u8 dctn[0x18];
4755
Matan Barakb4ff3a32016-02-09 14:57:42 +02004756 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004757};
4758
4759struct mlx5_ifc_query_cq_out_bits {
4760 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004761 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004762
4763 u8 syndrome[0x20];
4764
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004766
4767 struct mlx5_ifc_cqc_bits cq_context;
4768
Matan Barakb4ff3a32016-02-09 14:57:42 +02004769 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770
4771 u8 pas[0][0x40];
4772};
4773
4774struct mlx5_ifc_query_cq_in_bits {
4775 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777
Matan Barakb4ff3a32016-02-09 14:57:42 +02004778 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779 u8 op_mod[0x10];
4780
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782 u8 cqn[0x18];
4783
Matan Barakb4ff3a32016-02-09 14:57:42 +02004784 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004785};
4786
4787struct mlx5_ifc_query_cong_status_out_bits {
4788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790
4791 u8 syndrome[0x20];
4792
Matan Barakb4ff3a32016-02-09 14:57:42 +02004793 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004794
4795 u8 enable[0x1];
4796 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798};
4799
4800struct mlx5_ifc_query_cong_status_in_bits {
4801 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803
Matan Barakb4ff3a32016-02-09 14:57:42 +02004804 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004805 u8 op_mod[0x10];
4806
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808 u8 priority[0x4];
4809 u8 cong_protocol[0x4];
4810
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812};
4813
4814struct mlx5_ifc_query_cong_statistics_out_bits {
4815 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004816 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004817
4818 u8 syndrome[0x20];
4819
Matan Barakb4ff3a32016-02-09 14:57:42 +02004820 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004821
Parav Pandite1f24a72017-04-16 07:29:29 +03004822 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823
4824 u8 sum_flows[0x20];
4825
Parav Pandite1f24a72017-04-16 07:29:29 +03004826 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004827
Parav Pandite1f24a72017-04-16 07:29:29 +03004828 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829
Parav Pandite1f24a72017-04-16 07:29:29 +03004830 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831
Parav Pandite1f24a72017-04-16 07:29:29 +03004832 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004833
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
4836 u8 time_stamp_high[0x20];
4837
4838 u8 time_stamp_low[0x20];
4839
4840 u8 accumulators_period[0x20];
4841
Parav Pandite1f24a72017-04-16 07:29:29 +03004842 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843
Parav Pandite1f24a72017-04-16 07:29:29 +03004844 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004845
Parav Pandite1f24a72017-04-16 07:29:29 +03004846 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004847
Parav Pandite1f24a72017-04-16 07:29:29 +03004848 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851};
4852
4853struct mlx5_ifc_query_cong_statistics_in_bits {
4854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858 u8 op_mod[0x10];
4859
4860 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004861 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864};
4865
4866struct mlx5_ifc_query_cong_params_out_bits {
4867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
4870 u8 syndrome[0x20];
4871
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
4874 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4875};
4876
4877struct mlx5_ifc_query_cong_params_in_bits {
4878 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882 u8 op_mod[0x10];
4883
Matan Barakb4ff3a32016-02-09 14:57:42 +02004884 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885 u8 cong_protocol[0x4];
4886
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888};
4889
4890struct mlx5_ifc_query_adapter_out_bits {
4891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
4894 u8 syndrome[0x20];
4895
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897
4898 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4899};
4900
4901struct mlx5_ifc_query_adapter_in_bits {
4902 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904
Matan Barakb4ff3a32016-02-09 14:57:42 +02004905 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906 u8 op_mod[0x10];
4907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_qp_2rst_out_bits {
4912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
4915 u8 syndrome[0x20];
4916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918};
4919
4920struct mlx5_ifc_qp_2rst_in_bits {
4921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925 u8 op_mod[0x10];
4926
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928 u8 qpn[0x18];
4929
Matan Barakb4ff3a32016-02-09 14:57:42 +02004930 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931};
4932
4933struct mlx5_ifc_qp_2err_out_bits {
4934 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936
4937 u8 syndrome[0x20];
4938
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940};
4941
4942struct mlx5_ifc_qp_2err_in_bits {
4943 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004944 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004945
Matan Barakb4ff3a32016-02-09 14:57:42 +02004946 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947 u8 op_mod[0x10];
4948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950 u8 qpn[0x18];
4951
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953};
4954
4955struct mlx5_ifc_page_fault_resume_out_bits {
4956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
4959 u8 syndrome[0x20];
4960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962};
4963
4964struct mlx5_ifc_page_fault_resume_in_bits {
4965 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967
Matan Barakb4ff3a32016-02-09 14:57:42 +02004968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004969 u8 op_mod[0x10];
4970
4971 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004973 u8 page_fault_type[0x3];
4974 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004976 u8 reserved_at_60[0x8];
4977 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978};
4979
4980struct mlx5_ifc_nop_out_bits {
4981 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
4984 u8 syndrome[0x20];
4985
Matan Barakb4ff3a32016-02-09 14:57:42 +02004986 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004987};
4988
4989struct mlx5_ifc_nop_in_bits {
4990 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994 u8 op_mod[0x10];
4995
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997};
4998
4999struct mlx5_ifc_modify_vport_state_out_bits {
5000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002
5003 u8 syndrome[0x20];
5004
Matan Barakb4ff3a32016-02-09 14:57:42 +02005005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006};
5007
5008struct mlx5_ifc_modify_vport_state_in_bits {
5009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013 u8 op_mod[0x10];
5014
5015 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017 u8 vport_number[0x10];
5018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022};
5023
5024struct mlx5_ifc_modify_tis_out_bits {
5025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027
5028 u8 syndrome[0x20];
5029
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031};
5032
majd@mellanox.com75850d02016-01-14 19:13:06 +02005033struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005035
Aviv Heller84df61e2016-05-10 13:47:50 +03005036 u8 reserved_at_20[0x1d];
5037 u8 lag_tx_port_affinity[0x1];
5038 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005039 u8 prio[0x1];
5040};
5041
Saeed Mahameede2816822015-05-28 22:28:40 +03005042struct mlx5_ifc_modify_tis_in_bits {
5043 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047 u8 op_mod[0x10];
5048
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050 u8 tisn[0x18];
5051
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
majd@mellanox.com75850d02016-01-14 19:13:06 +02005054 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005055
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057
5058 struct mlx5_ifc_tisc_bits ctx;
5059};
5060
Achiad Shochatd9eea402015-08-04 14:05:42 +03005061struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005063
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005065 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005066 u8 reserved_at_3c[0x1];
5067 u8 hash[0x1];
5068 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005069 u8 lro[0x1];
5070};
5071
Saeed Mahameede2816822015-05-28 22:28:40 +03005072struct mlx5_ifc_modify_tir_out_bits {
5073 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075
5076 u8 syndrome[0x20];
5077
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079};
5080
5081struct mlx5_ifc_modify_tir_in_bits {
5082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005084
Matan Barakb4ff3a32016-02-09 14:57:42 +02005085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005086 u8 op_mod[0x10];
5087
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089 u8 tirn[0x18];
5090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005092
Achiad Shochatd9eea402015-08-04 14:05:42 +03005093 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005094
Matan Barakb4ff3a32016-02-09 14:57:42 +02005095 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005096
5097 struct mlx5_ifc_tirc_bits ctx;
5098};
5099
5100struct mlx5_ifc_modify_sq_out_bits {
5101 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103
5104 u8 syndrome[0x20];
5105
Matan Barakb4ff3a32016-02-09 14:57:42 +02005106 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005107};
5108
5109struct mlx5_ifc_modify_sq_in_bits {
5110 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112
Matan Barakb4ff3a32016-02-09 14:57:42 +02005113 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005114 u8 op_mod[0x10];
5115
5116 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118 u8 sqn[0x18];
5119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121
5122 u8 modify_bitmask[0x40];
5123
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125
5126 struct mlx5_ifc_sqc_bits ctx;
5127};
5128
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005129struct mlx5_ifc_modify_scheduling_element_out_bits {
5130 u8 status[0x8];
5131 u8 reserved_at_8[0x18];
5132
5133 u8 syndrome[0x20];
5134
5135 u8 reserved_at_40[0x1c0];
5136};
5137
5138enum {
5139 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5140 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5141};
5142
5143struct mlx5_ifc_modify_scheduling_element_in_bits {
5144 u8 opcode[0x10];
5145 u8 reserved_at_10[0x10];
5146
5147 u8 reserved_at_20[0x10];
5148 u8 op_mod[0x10];
5149
5150 u8 scheduling_hierarchy[0x8];
5151 u8 reserved_at_48[0x18];
5152
5153 u8 scheduling_element_id[0x20];
5154
5155 u8 reserved_at_80[0x20];
5156
5157 u8 modify_bitmask[0x20];
5158
5159 u8 reserved_at_c0[0x40];
5160
5161 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5162
5163 u8 reserved_at_300[0x100];
5164};
5165
Saeed Mahameede2816822015-05-28 22:28:40 +03005166struct mlx5_ifc_modify_rqt_out_bits {
5167 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169
5170 u8 syndrome[0x20];
5171
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005173};
5174
Achiad Shochat5c503682015-08-04 14:05:43 +03005175struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005177
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005179 u8 rqn_list[0x1];
5180};
5181
Saeed Mahameede2816822015-05-28 22:28:40 +03005182struct mlx5_ifc_modify_rqt_in_bits {
5183 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185
Matan Barakb4ff3a32016-02-09 14:57:42 +02005186 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005187 u8 op_mod[0x10];
5188
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190 u8 rqtn[0x18];
5191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193
Achiad Shochat5c503682015-08-04 14:05:43 +03005194 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005197
5198 struct mlx5_ifc_rqtc_bits ctx;
5199};
5200
5201struct mlx5_ifc_modify_rq_out_bits {
5202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204
5205 u8 syndrome[0x20];
5206
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208};
5209
Alex Vesker83b502a2016-08-04 17:32:02 +03005210enum {
5211 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005212 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005213 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005214};
5215
Saeed Mahameede2816822015-05-28 22:28:40 +03005216struct mlx5_ifc_modify_rq_in_bits {
5217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219
Matan Barakb4ff3a32016-02-09 14:57:42 +02005220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005221 u8 op_mod[0x10];
5222
5223 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225 u8 rqn[0x18];
5226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228
5229 u8 modify_bitmask[0x40];
5230
Matan Barakb4ff3a32016-02-09 14:57:42 +02005231 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005232
5233 struct mlx5_ifc_rqc_bits ctx;
5234};
5235
5236struct mlx5_ifc_modify_rmp_out_bits {
5237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239
5240 u8 syndrome[0x20];
5241
Matan Barakb4ff3a32016-02-09 14:57:42 +02005242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005243};
5244
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005245struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005247
Matan Barakb4ff3a32016-02-09 14:57:42 +02005248 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005249 u8 lwm[0x1];
5250};
5251
Saeed Mahameede2816822015-05-28 22:28:40 +03005252struct mlx5_ifc_modify_rmp_in_bits {
5253 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257 u8 op_mod[0x10];
5258
5259 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005260 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005261 u8 rmpn[0x18];
5262
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005265 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005266
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268
5269 struct mlx5_ifc_rmpc_bits ctx;
5270};
5271
5272struct mlx5_ifc_modify_nic_vport_context_out_bits {
5273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
5276 u8 syndrome[0x20];
5277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279};
5280
5281struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005282 u8 reserved_at_0[0x14];
5283 u8 disable_uc_local_lb[0x1];
5284 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005285 u8 node_guid[0x1];
5286 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005287 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005288 u8 mtu[0x1];
5289 u8 change_event[0x1];
5290 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291 u8 permanent_address[0x1];
5292 u8 addresses_list[0x1];
5293 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005295};
5296
5297struct mlx5_ifc_modify_nic_vport_context_in_bits {
5298 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300
Matan Barakb4ff3a32016-02-09 14:57:42 +02005301 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005302 u8 op_mod[0x10];
5303
5304 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306 u8 vport_number[0x10];
5307
5308 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311
5312 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5313};
5314
5315struct mlx5_ifc_modify_hca_vport_context_out_bits {
5316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
5319 u8 syndrome[0x20];
5320
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322};
5323
5324struct mlx5_ifc_modify_hca_vport_context_in_bits {
5325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327
Matan Barakb4ff3a32016-02-09 14:57:42 +02005328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005329 u8 op_mod[0x10];
5330
5331 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005333 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334 u8 vport_number[0x10];
5335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337
5338 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5339};
5340
5341struct mlx5_ifc_modify_cq_out_bits {
5342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
5345 u8 syndrome[0x20];
5346
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005348};
5349
5350enum {
5351 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5352 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5353};
5354
5355struct mlx5_ifc_modify_cq_in_bits {
5356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 op_mod[0x10];
5361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363 u8 cqn[0x18];
5364
5365 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5366
5367 struct mlx5_ifc_cqc_bits cq_context;
5368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370
5371 u8 pas[0][0x40];
5372};
5373
5374struct mlx5_ifc_modify_cong_status_out_bits {
5375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005376 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005377
5378 u8 syndrome[0x20];
5379
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381};
5382
5383struct mlx5_ifc_modify_cong_status_in_bits {
5384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005386
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388 u8 op_mod[0x10];
5389
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391 u8 priority[0x4];
5392 u8 cong_protocol[0x4];
5393
5394 u8 enable[0x1];
5395 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397};
5398
5399struct mlx5_ifc_modify_cong_params_out_bits {
5400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
5403 u8 syndrome[0x20];
5404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406};
5407
5408struct mlx5_ifc_modify_cong_params_in_bits {
5409 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413 u8 op_mod[0x10];
5414
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416 u8 cong_protocol[0x4];
5417
5418 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5419
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421
5422 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5423};
5424
5425struct mlx5_ifc_manage_pages_out_bits {
5426 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
5429 u8 syndrome[0x20];
5430
5431 u8 output_num_entries[0x20];
5432
Matan Barakb4ff3a32016-02-09 14:57:42 +02005433 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005434
5435 u8 pas[0][0x40];
5436};
5437
5438enum {
5439 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5440 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5441 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5442};
5443
5444struct mlx5_ifc_manage_pages_in_bits {
5445 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449 u8 op_mod[0x10];
5450
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452 u8 function_id[0x10];
5453
5454 u8 input_num_entries[0x20];
5455
5456 u8 pas[0][0x40];
5457};
5458
5459struct mlx5_ifc_mad_ifc_out_bits {
5460 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462
5463 u8 syndrome[0x20];
5464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466
5467 u8 response_mad_packet[256][0x8];
5468};
5469
5470struct mlx5_ifc_mad_ifc_in_bits {
5471 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473
Matan Barakb4ff3a32016-02-09 14:57:42 +02005474 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005475 u8 op_mod[0x10];
5476
5477 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479 u8 port[0x8];
5480
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482
5483 u8 mad[256][0x8];
5484};
5485
5486struct mlx5_ifc_init_hca_out_bits {
5487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489
5490 u8 syndrome[0x20];
5491
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493};
5494
5495struct mlx5_ifc_init_hca_in_bits {
5496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500 u8 op_mod[0x10];
5501
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503};
5504
5505struct mlx5_ifc_init2rtr_qp_out_bits {
5506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508
5509 u8 syndrome[0x20];
5510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512};
5513
5514struct mlx5_ifc_init2rtr_qp_in_bits {
5515 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519 u8 op_mod[0x10];
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522 u8 qpn[0x18];
5523
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525
5526 u8 opt_param_mask[0x20];
5527
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
5530 struct mlx5_ifc_qpc_bits qpc;
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533};
5534
5535struct mlx5_ifc_init2init_qp_out_bits {
5536 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538
5539 u8 syndrome[0x20];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542};
5543
5544struct mlx5_ifc_init2init_qp_in_bits {
5545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
Matan Barakb4ff3a32016-02-09 14:57:42 +02005548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005549 u8 op_mod[0x10];
5550
Matan Barakb4ff3a32016-02-09 14:57:42 +02005551 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005552 u8 qpn[0x18];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
5556 u8 opt_param_mask[0x20];
5557
Matan Barakb4ff3a32016-02-09 14:57:42 +02005558 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005559
5560 struct mlx5_ifc_qpc_bits qpc;
5561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563};
5564
5565struct mlx5_ifc_get_dropped_packet_log_out_bits {
5566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568
5569 u8 syndrome[0x20];
5570
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572
5573 u8 packet_headers_log[128][0x8];
5574
5575 u8 packet_syndrome[64][0x8];
5576};
5577
5578struct mlx5_ifc_get_dropped_packet_log_in_bits {
5579 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583 u8 op_mod[0x10];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586};
5587
5588struct mlx5_ifc_gen_eqe_in_bits {
5589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593 u8 op_mod[0x10];
5594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 eq_number[0x8];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
5600 u8 eqe[64][0x8];
5601};
5602
5603struct mlx5_ifc_gen_eq_out_bits {
5604 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
5607 u8 syndrome[0x20];
5608
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610};
5611
5612struct mlx5_ifc_enable_hca_out_bits {
5613 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615
5616 u8 syndrome[0x20];
5617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619};
5620
5621struct mlx5_ifc_enable_hca_in_bits {
5622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626 u8 op_mod[0x10];
5627
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629 u8 function_id[0x10];
5630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632};
5633
5634struct mlx5_ifc_drain_dct_out_bits {
5635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
5638 u8 syndrome[0x20];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641};
5642
5643struct mlx5_ifc_drain_dct_in_bits {
5644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648 u8 op_mod[0x10];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 dctn[0x18];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654};
5655
5656struct mlx5_ifc_disable_hca_out_bits {
5657 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659
5660 u8 syndrome[0x20];
5661
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663};
5664
5665struct mlx5_ifc_disable_hca_in_bits {
5666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670 u8 op_mod[0x10];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673 u8 function_id[0x10];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676};
5677
5678struct mlx5_ifc_detach_from_mcg_out_bits {
5679 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 syndrome[0x20];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685};
5686
5687struct mlx5_ifc_detach_from_mcg_in_bits {
5688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692 u8 op_mod[0x10];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695 u8 qpn[0x18];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698
5699 u8 multicast_gid[16][0x8];
5700};
5701
Saeed Mahameed74862162016-06-09 15:11:34 +03005702struct mlx5_ifc_destroy_xrq_out_bits {
5703 u8 status[0x8];
5704 u8 reserved_at_8[0x18];
5705
5706 u8 syndrome[0x20];
5707
5708 u8 reserved_at_40[0x40];
5709};
5710
5711struct mlx5_ifc_destroy_xrq_in_bits {
5712 u8 opcode[0x10];
5713 u8 reserved_at_10[0x10];
5714
5715 u8 reserved_at_20[0x10];
5716 u8 op_mod[0x10];
5717
5718 u8 reserved_at_40[0x8];
5719 u8 xrqn[0x18];
5720
5721 u8 reserved_at_60[0x20];
5722};
5723
Saeed Mahameede2816822015-05-28 22:28:40 +03005724struct mlx5_ifc_destroy_xrc_srq_out_bits {
5725 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727
5728 u8 syndrome[0x20];
5729
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731};
5732
5733struct mlx5_ifc_destroy_xrc_srq_in_bits {
5734 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738 u8 op_mod[0x10];
5739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741 u8 xrc_srqn[0x18];
5742
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744};
5745
5746struct mlx5_ifc_destroy_tis_out_bits {
5747 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749
5750 u8 syndrome[0x20];
5751
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753};
5754
5755struct mlx5_ifc_destroy_tis_in_bits {
5756 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760 u8 op_mod[0x10];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763 u8 tisn[0x18];
5764
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766};
5767
5768struct mlx5_ifc_destroy_tir_out_bits {
5769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
5772 u8 syndrome[0x20];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_destroy_tir_in_bits {
5778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 op_mod[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785 u8 tirn[0x18];
5786
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788};
5789
5790struct mlx5_ifc_destroy_srq_out_bits {
5791 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793
5794 u8 syndrome[0x20];
5795
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797};
5798
5799struct mlx5_ifc_destroy_srq_in_bits {
5800 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802
Matan Barakb4ff3a32016-02-09 14:57:42 +02005803 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005804 u8 op_mod[0x10];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807 u8 srqn[0x18];
5808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810};
5811
5812struct mlx5_ifc_destroy_sq_out_bits {
5813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815
5816 u8 syndrome[0x20];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819};
5820
5821struct mlx5_ifc_destroy_sq_in_bits {
5822 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826 u8 op_mod[0x10];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829 u8 sqn[0x18];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005834struct mlx5_ifc_destroy_scheduling_element_out_bits {
5835 u8 status[0x8];
5836 u8 reserved_at_8[0x18];
5837
5838 u8 syndrome[0x20];
5839
5840 u8 reserved_at_40[0x1c0];
5841};
5842
5843struct mlx5_ifc_destroy_scheduling_element_in_bits {
5844 u8 opcode[0x10];
5845 u8 reserved_at_10[0x10];
5846
5847 u8 reserved_at_20[0x10];
5848 u8 op_mod[0x10];
5849
5850 u8 scheduling_hierarchy[0x8];
5851 u8 reserved_at_48[0x18];
5852
5853 u8 scheduling_element_id[0x20];
5854
5855 u8 reserved_at_80[0x180];
5856};
5857
Saeed Mahameede2816822015-05-28 22:28:40 +03005858struct mlx5_ifc_destroy_rqt_out_bits {
5859 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861
5862 u8 syndrome[0x20];
5863
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865};
5866
5867struct mlx5_ifc_destroy_rqt_in_bits {
5868 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870
Matan Barakb4ff3a32016-02-09 14:57:42 +02005871 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005872 u8 op_mod[0x10];
5873
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875 u8 rqtn[0x18];
5876
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878};
5879
5880struct mlx5_ifc_destroy_rq_out_bits {
5881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883
5884 u8 syndrome[0x20];
5885
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887};
5888
5889struct mlx5_ifc_destroy_rq_in_bits {
5890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894 u8 op_mod[0x10];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897 u8 rqn[0x18];
5898
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900};
5901
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005902struct mlx5_ifc_set_delay_drop_params_in_bits {
5903 u8 opcode[0x10];
5904 u8 reserved_at_10[0x10];
5905
5906 u8 reserved_at_20[0x10];
5907 u8 op_mod[0x10];
5908
5909 u8 reserved_at_40[0x20];
5910
5911 u8 reserved_at_60[0x10];
5912 u8 delay_drop_timeout[0x10];
5913};
5914
5915struct mlx5_ifc_set_delay_drop_params_out_bits {
5916 u8 status[0x8];
5917 u8 reserved_at_8[0x18];
5918
5919 u8 syndrome[0x20];
5920
5921 u8 reserved_at_40[0x40];
5922};
5923
Saeed Mahameede2816822015-05-28 22:28:40 +03005924struct mlx5_ifc_destroy_rmp_out_bits {
5925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927
5928 u8 syndrome[0x20];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931};
5932
5933struct mlx5_ifc_destroy_rmp_in_bits {
5934 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938 u8 op_mod[0x10];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941 u8 rmpn[0x18];
5942
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944};
5945
5946struct mlx5_ifc_destroy_qp_out_bits {
5947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949
5950 u8 syndrome[0x20];
5951
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953};
5954
5955struct mlx5_ifc_destroy_qp_in_bits {
5956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 op_mod[0x10];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 qpn[0x18];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966};
5967
5968struct mlx5_ifc_destroy_psv_out_bits {
5969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 syndrome[0x20];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_psv_in_bits {
5978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 op_mod[0x10];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985 u8 psvn[0x18];
5986
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988};
5989
5990struct mlx5_ifc_destroy_mkey_out_bits {
5991 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993
5994 u8 syndrome[0x20];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_mkey_in_bits {
6000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004 u8 op_mod[0x10];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007 u8 mkey_index[0x18];
6008
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010};
6011
6012struct mlx5_ifc_destroy_flow_table_out_bits {
6013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015
6016 u8 syndrome[0x20];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_flow_table_in_bits {
6022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026 u8 op_mod[0x10];
6027
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006028 u8 other_vport[0x1];
6029 u8 reserved_at_41[0xf];
6030 u8 vport_number[0x10];
6031
6032 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
6034 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 table_id[0x18];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_destroy_flow_group_out_bits {
6044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
6047 u8 syndrome[0x20];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050};
6051
6052struct mlx5_ifc_destroy_flow_group_in_bits {
6053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057 u8 op_mod[0x10];
6058
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006059 u8 other_vport[0x1];
6060 u8 reserved_at_41[0xf];
6061 u8 vport_number[0x10];
6062
6063 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064
6065 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069 u8 table_id[0x18];
6070
6071 u8 group_id[0x20];
6072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074};
6075
6076struct mlx5_ifc_destroy_eq_out_bits {
6077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079
6080 u8 syndrome[0x20];
6081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083};
6084
6085struct mlx5_ifc_destroy_eq_in_bits {
6086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090 u8 op_mod[0x10];
6091
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093 u8 eq_number[0x8];
6094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096};
6097
6098struct mlx5_ifc_destroy_dct_out_bits {
6099 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101
6102 u8 syndrome[0x20];
6103
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105};
6106
6107struct mlx5_ifc_destroy_dct_in_bits {
6108 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006110
Matan Barakb4ff3a32016-02-09 14:57:42 +02006111 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006112 u8 op_mod[0x10];
6113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115 u8 dctn[0x18];
6116
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118};
6119
6120struct mlx5_ifc_destroy_cq_out_bits {
6121 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123
6124 u8 syndrome[0x20];
6125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127};
6128
6129struct mlx5_ifc_destroy_cq_in_bits {
6130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132
Matan Barakb4ff3a32016-02-09 14:57:42 +02006133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006134 u8 op_mod[0x10];
6135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137 u8 cqn[0x18];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140};
6141
6142struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6143 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145
6146 u8 syndrome[0x20];
6147
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149};
6150
6151struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154
Matan Barakb4ff3a32016-02-09 14:57:42 +02006155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006156 u8 op_mod[0x10];
6157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161 u8 vxlan_udp_port[0x10];
6162};
6163
6164struct mlx5_ifc_delete_l2_table_entry_out_bits {
6165 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167
6168 u8 syndrome[0x20];
6169
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171};
6172
6173struct mlx5_ifc_delete_l2_table_entry_in_bits {
6174 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176
Matan Barakb4ff3a32016-02-09 14:57:42 +02006177 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006178 u8 op_mod[0x10];
6179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183 u8 table_index[0x18];
6184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186};
6187
6188struct mlx5_ifc_delete_fte_out_bits {
6189 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191
6192 u8 syndrome[0x20];
6193
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195};
6196
6197struct mlx5_ifc_delete_fte_in_bits {
6198 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202 u8 op_mod[0x10];
6203
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006204 u8 other_vport[0x1];
6205 u8 reserved_at_41[0xf];
6206 u8 vport_number[0x10];
6207
6208 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209
6210 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 table_id[0x18];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
6218 u8 flow_index[0x20];
6219
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221};
6222
6223struct mlx5_ifc_dealloc_xrcd_out_bits {
6224 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226
6227 u8 syndrome[0x20];
6228
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230};
6231
6232struct mlx5_ifc_dealloc_xrcd_in_bits {
6233 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237 u8 op_mod[0x10];
6238
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240 u8 xrcd[0x18];
6241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243};
6244
6245struct mlx5_ifc_dealloc_uar_out_bits {
6246 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
6249 u8 syndrome[0x20];
6250
Matan Barakb4ff3a32016-02-09 14:57:42 +02006251 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006252};
6253
6254struct mlx5_ifc_dealloc_uar_in_bits {
6255 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257
Matan Barakb4ff3a32016-02-09 14:57:42 +02006258 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006259 u8 op_mod[0x10];
6260
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262 u8 uar[0x18];
6263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265};
6266
6267struct mlx5_ifc_dealloc_transport_domain_out_bits {
6268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270
6271 u8 syndrome[0x20];
6272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274};
6275
6276struct mlx5_ifc_dealloc_transport_domain_in_bits {
6277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279
Matan Barakb4ff3a32016-02-09 14:57:42 +02006280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006281 u8 op_mod[0x10];
6282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284 u8 transport_domain[0x18];
6285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287};
6288
6289struct mlx5_ifc_dealloc_q_counter_out_bits {
6290 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006291 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006292
6293 u8 syndrome[0x20];
6294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296};
6297
6298struct mlx5_ifc_dealloc_q_counter_in_bits {
6299 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
Matan Barakb4ff3a32016-02-09 14:57:42 +02006302 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006303 u8 op_mod[0x10];
6304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306 u8 counter_set_id[0x8];
6307
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309};
6310
6311struct mlx5_ifc_dealloc_pd_out_bits {
6312 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314
6315 u8 syndrome[0x20];
6316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318};
6319
6320struct mlx5_ifc_dealloc_pd_in_bits {
6321 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325 u8 op_mod[0x10];
6326
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328 u8 pd[0x18];
6329
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331};
6332
Amir Vadai9dc0b282016-05-13 12:55:39 +00006333struct mlx5_ifc_dealloc_flow_counter_out_bits {
6334 u8 status[0x8];
6335 u8 reserved_at_8[0x18];
6336
6337 u8 syndrome[0x20];
6338
6339 u8 reserved_at_40[0x40];
6340};
6341
6342struct mlx5_ifc_dealloc_flow_counter_in_bits {
6343 u8 opcode[0x10];
6344 u8 reserved_at_10[0x10];
6345
6346 u8 reserved_at_20[0x10];
6347 u8 op_mod[0x10];
6348
6349 u8 reserved_at_40[0x10];
6350 u8 flow_counter_id[0x10];
6351
6352 u8 reserved_at_60[0x20];
6353};
6354
Saeed Mahameed74862162016-06-09 15:11:34 +03006355struct mlx5_ifc_create_xrq_out_bits {
6356 u8 status[0x8];
6357 u8 reserved_at_8[0x18];
6358
6359 u8 syndrome[0x20];
6360
6361 u8 reserved_at_40[0x8];
6362 u8 xrqn[0x18];
6363
6364 u8 reserved_at_60[0x20];
6365};
6366
6367struct mlx5_ifc_create_xrq_in_bits {
6368 u8 opcode[0x10];
6369 u8 reserved_at_10[0x10];
6370
6371 u8 reserved_at_20[0x10];
6372 u8 op_mod[0x10];
6373
6374 u8 reserved_at_40[0x40];
6375
6376 struct mlx5_ifc_xrqc_bits xrq_context;
6377};
6378
Saeed Mahameede2816822015-05-28 22:28:40 +03006379struct mlx5_ifc_create_xrc_srq_out_bits {
6380 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006381 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006382
6383 u8 syndrome[0x20];
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386 u8 xrc_srqn[0x18];
6387
Matan Barakb4ff3a32016-02-09 14:57:42 +02006388 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006389};
6390
6391struct mlx5_ifc_create_xrc_srq_in_bits {
6392 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396 u8 op_mod[0x10];
6397
Matan Barakb4ff3a32016-02-09 14:57:42 +02006398 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006399
6400 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403
6404 u8 pas[0][0x40];
6405};
6406
6407struct mlx5_ifc_create_tis_out_bits {
6408 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410
6411 u8 syndrome[0x20];
6412
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414 u8 tisn[0x18];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417};
6418
6419struct mlx5_ifc_create_tis_in_bits {
6420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424 u8 op_mod[0x10];
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427
6428 struct mlx5_ifc_tisc_bits ctx;
6429};
6430
6431struct mlx5_ifc_create_tir_out_bits {
6432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
6435 u8 syndrome[0x20];
6436
Matan Barakb4ff3a32016-02-09 14:57:42 +02006437 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006438 u8 tirn[0x18];
6439
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441};
6442
6443struct mlx5_ifc_create_tir_in_bits {
6444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448 u8 op_mod[0x10];
6449
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451
6452 struct mlx5_ifc_tirc_bits ctx;
6453};
6454
6455struct mlx5_ifc_create_srq_out_bits {
6456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458
6459 u8 syndrome[0x20];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462 u8 srqn[0x18];
6463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465};
6466
6467struct mlx5_ifc_create_srq_in_bits {
6468 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472 u8 op_mod[0x10];
6473
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
6476 struct mlx5_ifc_srqc_bits srq_context_entry;
6477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
6480 u8 pas[0][0x40];
6481};
6482
6483struct mlx5_ifc_create_sq_out_bits {
6484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006485 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006486
6487 u8 syndrome[0x20];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 sqn[0x18];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493};
6494
6495struct mlx5_ifc_create_sq_in_bits {
6496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500 u8 op_mod[0x10];
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
6504 struct mlx5_ifc_sqc_bits ctx;
6505};
6506
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006507struct mlx5_ifc_create_scheduling_element_out_bits {
6508 u8 status[0x8];
6509 u8 reserved_at_8[0x18];
6510
6511 u8 syndrome[0x20];
6512
6513 u8 reserved_at_40[0x40];
6514
6515 u8 scheduling_element_id[0x20];
6516
6517 u8 reserved_at_a0[0x160];
6518};
6519
6520struct mlx5_ifc_create_scheduling_element_in_bits {
6521 u8 opcode[0x10];
6522 u8 reserved_at_10[0x10];
6523
6524 u8 reserved_at_20[0x10];
6525 u8 op_mod[0x10];
6526
6527 u8 scheduling_hierarchy[0x8];
6528 u8 reserved_at_48[0x18];
6529
6530 u8 reserved_at_60[0xa0];
6531
6532 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6533
6534 u8 reserved_at_300[0x100];
6535};
6536
Saeed Mahameede2816822015-05-28 22:28:40 +03006537struct mlx5_ifc_create_rqt_out_bits {
6538 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006539 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006540
6541 u8 syndrome[0x20];
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544 u8 rqtn[0x18];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547};
6548
6549struct mlx5_ifc_create_rqt_in_bits {
6550 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552
Matan Barakb4ff3a32016-02-09 14:57:42 +02006553 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006554 u8 op_mod[0x10];
6555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557
6558 struct mlx5_ifc_rqtc_bits rqt_context;
6559};
6560
6561struct mlx5_ifc_create_rq_out_bits {
6562 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006563 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
6565 u8 syndrome[0x20];
6566
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568 u8 rqn[0x18];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571};
6572
6573struct mlx5_ifc_create_rq_in_bits {
6574 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 op_mod[0x10];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 struct mlx5_ifc_rqc_bits ctx;
6583};
6584
6585struct mlx5_ifc_create_rmp_out_bits {
6586 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 u8 syndrome[0x20];
6590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592 u8 rmpn[0x18];
6593
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595};
6596
6597struct mlx5_ifc_create_rmp_in_bits {
6598 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602 u8 op_mod[0x10];
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
6606 struct mlx5_ifc_rmpc_bits ctx;
6607};
6608
6609struct mlx5_ifc_create_qp_out_bits {
6610 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612
6613 u8 syndrome[0x20];
6614
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616 u8 qpn[0x18];
6617
Matan Barakb4ff3a32016-02-09 14:57:42 +02006618 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006619};
6620
6621struct mlx5_ifc_create_qp_in_bits {
6622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626 u8 op_mod[0x10];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
6630 u8 opt_param_mask[0x20];
6631
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633
6634 struct mlx5_ifc_qpc_bits qpc;
6635
Matan Barakb4ff3a32016-02-09 14:57:42 +02006636 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637
6638 u8 pas[0][0x40];
6639};
6640
6641struct mlx5_ifc_create_psv_out_bits {
6642 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006643 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644
6645 u8 syndrome[0x20];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650 u8 psv0_index[0x18];
6651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653 u8 psv1_index[0x18];
6654
Matan Barakb4ff3a32016-02-09 14:57:42 +02006655 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006656 u8 psv2_index[0x18];
6657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659 u8 psv3_index[0x18];
6660};
6661
6662struct mlx5_ifc_create_psv_in_bits {
6663 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667 u8 op_mod[0x10];
6668
6669 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006670 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006671 u8 pd[0x18];
6672
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674};
6675
6676struct mlx5_ifc_create_mkey_out_bits {
6677 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679
6680 u8 syndrome[0x20];
6681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 mkey_index[0x18];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686};
6687
6688struct mlx5_ifc_create_mkey_in_bits {
6689 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693 u8 op_mod[0x10];
6694
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
6697 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699
6700 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6701
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703
6704 u8 translations_octword_actual_size[0x20];
6705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707
6708 u8 klm_pas_mtt[0][0x20];
6709};
6710
6711struct mlx5_ifc_create_flow_table_out_bits {
6712 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714
6715 u8 syndrome[0x20];
6716
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718 u8 table_id[0x18];
6719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721};
6722
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006723struct mlx5_ifc_flow_table_context_bits {
6724 u8 encap_en[0x1];
6725 u8 decap_en[0x1];
6726 u8 reserved_at_2[0x2];
6727 u8 table_miss_action[0x4];
6728 u8 level[0x8];
6729 u8 reserved_at_10[0x8];
6730 u8 log_size[0x8];
6731
6732 u8 reserved_at_20[0x8];
6733 u8 table_miss_id[0x18];
6734
6735 u8 reserved_at_40[0x8];
6736 u8 lag_master_next_table_id[0x18];
6737
6738 u8 reserved_at_60[0xe0];
6739};
6740
Saeed Mahameede2816822015-05-28 22:28:40 +03006741struct mlx5_ifc_create_flow_table_in_bits {
6742 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746 u8 op_mod[0x10];
6747
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006748 u8 other_vport[0x1];
6749 u8 reserved_at_41[0xf];
6750 u8 vport_number[0x10];
6751
6752 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753
6754 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756
Matan Barakb4ff3a32016-02-09 14:57:42 +02006757 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006758
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006759 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006760};
6761
6762struct mlx5_ifc_create_flow_group_out_bits {
6763 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765
6766 u8 syndrome[0x20];
6767
Matan Barakb4ff3a32016-02-09 14:57:42 +02006768 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006769 u8 group_id[0x18];
6770
Matan Barakb4ff3a32016-02-09 14:57:42 +02006771 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006772};
6773
6774enum {
6775 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6776 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6777 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6778};
6779
6780struct mlx5_ifc_create_flow_group_in_bits {
6781 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785 u8 op_mod[0x10];
6786
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006787 u8 other_vport[0x1];
6788 u8 reserved_at_41[0xf];
6789 u8 vport_number[0x10];
6790
6791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792
6793 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797 u8 table_id[0x18];
6798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
6801 u8 start_flow_index[0x20];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 u8 end_flow_index[0x20];
6806
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
Matan Barakb4ff3a32016-02-09 14:57:42 +02006809 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810 u8 match_criteria_enable[0x8];
6811
6812 struct mlx5_ifc_fte_match_param_bits match_criteria;
6813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815};
6816
6817struct mlx5_ifc_create_eq_out_bits {
6818 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
6821 u8 syndrome[0x20];
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824 u8 eq_number[0x8];
6825
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827};
6828
6829struct mlx5_ifc_create_eq_in_bits {
6830 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834 u8 op_mod[0x10];
6835
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837
6838 struct mlx5_ifc_eqc_bits eq_context_entry;
6839
Matan Barakb4ff3a32016-02-09 14:57:42 +02006840 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841
6842 u8 event_bitmask[0x40];
6843
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
6846 u8 pas[0][0x40];
6847};
6848
6849struct mlx5_ifc_create_dct_out_bits {
6850 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852
6853 u8 syndrome[0x20];
6854
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856 u8 dctn[0x18];
6857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859};
6860
6861struct mlx5_ifc_create_dct_in_bits {
6862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866 u8 op_mod[0x10];
6867
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
6870 struct mlx5_ifc_dctc_bits dct_context_entry;
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
6875struct mlx5_ifc_create_cq_out_bits {
6876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878
6879 u8 syndrome[0x20];
6880
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882 u8 cqn[0x18];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885};
6886
6887struct mlx5_ifc_create_cq_in_bits {
6888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892 u8 op_mod[0x10];
6893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895
6896 struct mlx5_ifc_cqc_bits cq_context;
6897
Matan Barakb4ff3a32016-02-09 14:57:42 +02006898 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006899
6900 u8 pas[0][0x40];
6901};
6902
6903struct mlx5_ifc_config_int_moderation_out_bits {
6904 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906
6907 u8 syndrome[0x20];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910 u8 min_delay[0xc];
6911 u8 int_vector[0x10];
6912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914};
6915
6916enum {
6917 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6918 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6919};
6920
6921struct mlx5_ifc_config_int_moderation_in_bits {
6922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926 u8 op_mod[0x10];
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929 u8 min_delay[0xc];
6930 u8 int_vector[0x10];
6931
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933};
6934
6935struct mlx5_ifc_attach_to_mcg_out_bits {
6936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
6939 u8 syndrome[0x20];
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942};
6943
6944struct mlx5_ifc_attach_to_mcg_in_bits {
6945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949 u8 op_mod[0x10];
6950
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952 u8 qpn[0x18];
6953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955
6956 u8 multicast_gid[16][0x8];
6957};
6958
Saeed Mahameed74862162016-06-09 15:11:34 +03006959struct mlx5_ifc_arm_xrq_out_bits {
6960 u8 status[0x8];
6961 u8 reserved_at_8[0x18];
6962
6963 u8 syndrome[0x20];
6964
6965 u8 reserved_at_40[0x40];
6966};
6967
6968struct mlx5_ifc_arm_xrq_in_bits {
6969 u8 opcode[0x10];
6970 u8 reserved_at_10[0x10];
6971
6972 u8 reserved_at_20[0x10];
6973 u8 op_mod[0x10];
6974
6975 u8 reserved_at_40[0x8];
6976 u8 xrqn[0x18];
6977
6978 u8 reserved_at_60[0x10];
6979 u8 lwm[0x10];
6980};
6981
Saeed Mahameede2816822015-05-28 22:28:40 +03006982struct mlx5_ifc_arm_xrc_srq_out_bits {
6983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006985
6986 u8 syndrome[0x20];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989};
6990
6991enum {
6992 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6993};
6994
6995struct mlx5_ifc_arm_xrc_srq_in_bits {
6996 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000 u8 op_mod[0x10];
7001
Matan Barakb4ff3a32016-02-09 14:57:42 +02007002 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007003 u8 xrc_srqn[0x18];
7004
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006 u8 lwm[0x10];
7007};
7008
7009struct mlx5_ifc_arm_rq_out_bits {
7010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
7013 u8 syndrome[0x20];
7014
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016};
7017
7018enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007019 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7020 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007021};
7022
7023struct mlx5_ifc_arm_rq_in_bits {
7024 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028 u8 op_mod[0x10];
7029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 srq_number[0x18];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034 u8 lwm[0x10];
7035};
7036
7037struct mlx5_ifc_arm_dct_out_bits {
7038 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
7041 u8 syndrome[0x20];
7042
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044};
7045
7046struct mlx5_ifc_arm_dct_in_bits {
7047 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051 u8 op_mod[0x10];
7052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054 u8 dct_number[0x18];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057};
7058
7059struct mlx5_ifc_alloc_xrcd_out_bits {
7060 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062
7063 u8 syndrome[0x20];
7064
Matan Barakb4ff3a32016-02-09 14:57:42 +02007065 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007066 u8 xrcd[0x18];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069};
7070
7071struct mlx5_ifc_alloc_xrcd_in_bits {
7072 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 op_mod[0x10];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081struct mlx5_ifc_alloc_uar_out_bits {
7082 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
7085 u8 syndrome[0x20];
7086
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088 u8 uar[0x18];
7089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091};
7092
7093struct mlx5_ifc_alloc_uar_in_bits {
7094 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098 u8 op_mod[0x10];
7099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101};
7102
7103struct mlx5_ifc_alloc_transport_domain_out_bits {
7104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
7107 u8 syndrome[0x20];
7108
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110 u8 transport_domain[0x18];
7111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113};
7114
7115struct mlx5_ifc_alloc_transport_domain_in_bits {
7116 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120 u8 op_mod[0x10];
7121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123};
7124
7125struct mlx5_ifc_alloc_q_counter_out_bits {
7126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128
7129 u8 syndrome[0x20];
7130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132 u8 counter_set_id[0x8];
7133
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135};
7136
7137struct mlx5_ifc_alloc_q_counter_in_bits {
7138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142 u8 op_mod[0x10];
7143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145};
7146
7147struct mlx5_ifc_alloc_pd_out_bits {
7148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
7151 u8 syndrome[0x20];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154 u8 pd[0x18];
7155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157};
7158
7159struct mlx5_ifc_alloc_pd_in_bits {
7160 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164 u8 op_mod[0x10];
7165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167};
7168
Amir Vadai9dc0b282016-05-13 12:55:39 +00007169struct mlx5_ifc_alloc_flow_counter_out_bits {
7170 u8 status[0x8];
7171 u8 reserved_at_8[0x18];
7172
7173 u8 syndrome[0x20];
7174
7175 u8 reserved_at_40[0x10];
7176 u8 flow_counter_id[0x10];
7177
7178 u8 reserved_at_60[0x20];
7179};
7180
7181struct mlx5_ifc_alloc_flow_counter_in_bits {
7182 u8 opcode[0x10];
7183 u8 reserved_at_10[0x10];
7184
7185 u8 reserved_at_20[0x10];
7186 u8 op_mod[0x10];
7187
7188 u8 reserved_at_40[0x40];
7189};
7190
Saeed Mahameede2816822015-05-28 22:28:40 +03007191struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7192 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194
7195 u8 syndrome[0x20];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198};
7199
7200struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7201 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203
Matan Barakb4ff3a32016-02-09 14:57:42 +02007204 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007205 u8 op_mod[0x10];
7206
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208
Matan Barakb4ff3a32016-02-09 14:57:42 +02007209 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007210 u8 vxlan_udp_port[0x10];
7211};
7212
Saeed Mahameed74862162016-06-09 15:11:34 +03007213struct mlx5_ifc_set_rate_limit_out_bits {
7214 u8 status[0x8];
7215 u8 reserved_at_8[0x18];
7216
7217 u8 syndrome[0x20];
7218
7219 u8 reserved_at_40[0x40];
7220};
7221
7222struct mlx5_ifc_set_rate_limit_in_bits {
7223 u8 opcode[0x10];
7224 u8 reserved_at_10[0x10];
7225
7226 u8 reserved_at_20[0x10];
7227 u8 op_mod[0x10];
7228
7229 u8 reserved_at_40[0x10];
7230 u8 rate_limit_index[0x10];
7231
7232 u8 reserved_at_60[0x20];
7233
7234 u8 rate_limit[0x20];
7235};
7236
Saeed Mahameede2816822015-05-28 22:28:40 +03007237struct mlx5_ifc_access_register_out_bits {
7238 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240
7241 u8 syndrome[0x20];
7242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244
7245 u8 register_data[0][0x20];
7246};
7247
7248enum {
7249 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7250 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7251};
7252
7253struct mlx5_ifc_access_register_in_bits {
7254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258 u8 op_mod[0x10];
7259
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261 u8 register_id[0x10];
7262
7263 u8 argument[0x20];
7264
7265 u8 register_data[0][0x20];
7266};
7267
7268struct mlx5_ifc_sltp_reg_bits {
7269 u8 status[0x4];
7270 u8 version[0x4];
7271 u8 local_port[0x8];
7272 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007273 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007274 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280 u8 polarity[0x1];
7281 u8 ob_tap0[0x8];
7282 u8 ob_tap1[0x8];
7283 u8 ob_tap2[0x8];
7284
Matan Barakb4ff3a32016-02-09 14:57:42 +02007285 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286 u8 ob_preemp_mode[0x4];
7287 u8 ob_reg[0x8];
7288 u8 ob_bias[0x8];
7289
Matan Barakb4ff3a32016-02-09 14:57:42 +02007290 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291};
7292
7293struct mlx5_ifc_slrg_reg_bits {
7294 u8 status[0x4];
7295 u8 version[0x4];
7296 u8 local_port[0x8];
7297 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007300 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007301
7302 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304 u8 grade_lane_speed[0x4];
7305
7306 u8 grade_version[0x8];
7307 u8 grade[0x18];
7308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 height_grade_type[0x4];
7311 u8 height_grade[0x18];
7312
7313 u8 height_dz[0x10];
7314 u8 height_dv[0x10];
7315
Matan Barakb4ff3a32016-02-09 14:57:42 +02007316 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007317 u8 height_sigma[0x10];
7318
Matan Barakb4ff3a32016-02-09 14:57:42 +02007319 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 phase_grade_type[0x4];
7323 u8 phase_grade[0x18];
7324
Matan Barakb4ff3a32016-02-09 14:57:42 +02007325 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007326 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007327 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007328 u8 phase_eo_neg[0x8];
7329
7330 u8 ffe_set_tested[0x10];
7331 u8 test_errors_per_lane[0x10];
7332};
7333
7334struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007335 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007336 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340 u8 vl_hw_cap[0x4];
7341
Matan Barakb4ff3a32016-02-09 14:57:42 +02007342 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007343 u8 vl_admin[0x4];
7344
Matan Barakb4ff3a32016-02-09 14:57:42 +02007345 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007346 u8 vl_operational[0x4];
7347};
7348
7349struct mlx5_ifc_pude_reg_bits {
7350 u8 swid[0x8];
7351 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007354 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007355 u8 oper_status[0x4];
7356
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358};
7359
7360struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007361 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007362 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007363 u8 an_disable_cap[0x1];
7364 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007365 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367 u8 proto_mask[0x3];
7368
Saeed Mahameed74862162016-06-09 15:11:34 +03007369 u8 an_status[0x4];
7370 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371
7372 u8 eth_proto_capability[0x20];
7373
7374 u8 ib_link_width_capability[0x10];
7375 u8 ib_proto_capability[0x10];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378
7379 u8 eth_proto_admin[0x20];
7380
7381 u8 ib_link_width_admin[0x10];
7382 u8 ib_proto_admin[0x10];
7383
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385
7386 u8 eth_proto_oper[0x20];
7387
7388 u8 ib_link_width_oper[0x10];
7389 u8 ib_proto_oper[0x10];
7390
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007391 u8 reserved_at_160[0x1c];
7392 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393
7394 u8 eth_proto_lp_advertise[0x20];
7395
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397};
7398
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007399struct mlx5_ifc_mlcr_reg_bits {
7400 u8 reserved_at_0[0x8];
7401 u8 local_port[0x8];
7402 u8 reserved_at_10[0x20];
7403
7404 u8 beacon_duration[0x10];
7405 u8 reserved_at_40[0x10];
7406
7407 u8 beacon_remain[0x10];
7408};
7409
Saeed Mahameede2816822015-05-28 22:28:40 +03007410struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007411 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007412
7413 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415 u8 repetitions_mode[0x4];
7416 u8 num_of_repetitions[0x8];
7417
7418 u8 grade_version[0x8];
7419 u8 height_grade_type[0x4];
7420 u8 phase_grade_type[0x4];
7421 u8 height_grade_weight[0x8];
7422 u8 phase_grade_weight[0x8];
7423
7424 u8 gisim_measure_bits[0x10];
7425 u8 adaptive_tap_measure_bits[0x10];
7426
7427 u8 ber_bath_high_error_threshold[0x10];
7428 u8 ber_bath_mid_error_threshold[0x10];
7429
7430 u8 ber_bath_low_error_threshold[0x10];
7431 u8 one_ratio_high_threshold[0x10];
7432
7433 u8 one_ratio_high_mid_threshold[0x10];
7434 u8 one_ratio_low_mid_threshold[0x10];
7435
7436 u8 one_ratio_low_threshold[0x10];
7437 u8 ndeo_error_threshold[0x10];
7438
7439 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441 u8 mix90_phase_for_voltage_bath[0x8];
7442
7443 u8 mixer_offset_start[0x10];
7444 u8 mixer_offset_end[0x10];
7445
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447 u8 ber_test_time[0xb];
7448};
7449
7450struct mlx5_ifc_pspa_reg_bits {
7451 u8 swid[0x8];
7452 u8 local_port[0x8];
7453 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457};
7458
7459struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007460 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007461 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 mode[0x2];
7466
Matan Barakb4ff3a32016-02-09 14:57:42 +02007467 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007468
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 min_threshold[0x10];
7471
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 max_threshold[0x10];
7474
Matan Barakb4ff3a32016-02-09 14:57:42 +02007475 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007476 u8 mark_probability_denominator[0x10];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479};
7480
7481struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489 u8 wrps_admin[0x4];
7490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 wrps_status[0x4];
7493
Matan Barakb4ff3a32016-02-09 14:57:42 +02007494 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 down_threshold[0x8];
7498
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502 u8 srps_admin[0x4];
7503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 srps_status[0x4];
7506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508};
7509
7510struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007513 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007514
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 lb_en[0x8];
7519};
7520
7521struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527
7528 u8 port_profile_mode[0x8];
7529 u8 static_port_profile[0x8];
7530 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532
7533 u8 retransmission_active[0x8];
7534 u8 fec_mode_active[0x18];
7535
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537};
7538
7539struct mlx5_ifc_ppcnt_reg_bits {
7540 u8 swid[0x8];
7541 u8 local_port[0x8];
7542 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 grp[0x6];
7545
7546 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548 u8 prio_tc[0x3];
7549
7550 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7551};
7552
Gal Pressman8ed1a632016-11-17 13:46:01 +02007553struct mlx5_ifc_mpcnt_reg_bits {
7554 u8 reserved_at_0[0x8];
7555 u8 pcie_index[0x8];
7556 u8 reserved_at_10[0xa];
7557 u8 grp[0x6];
7558
7559 u8 clr[0x1];
7560 u8 reserved_at_21[0x1f];
7561
7562 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7563};
7564
Saeed Mahameede2816822015-05-28 22:28:40 +03007565struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569 u8 local_port[0x8];
7570 u8 mac_47_32[0x10];
7571
7572 u8 mac_31_0[0x20];
7573
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575};
7576
7577struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581
7582 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584
7585 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587
7588 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590};
7591
7592struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007596
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 attenuation_5g[0x8];
7599
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601 u8 attenuation_7g[0x8];
7602
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604 u8 attenuation_12g[0x8];
7605};
7606
7607struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611 u8 module_status[0x4];
7612
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614};
7615
7616struct mlx5_ifc_pmpc_reg_bits {
7617 u8 module_state_updated[32][0x8];
7618};
7619
7620struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 mlpn_status[0x4];
7623 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625
7626 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628};
7629
7630struct mlx5_ifc_pmlp_reg_bits {
7631 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 width[0x8];
7636
7637 u8 lane0_module_mapping[0x20];
7638
7639 u8 lane1_module_mapping[0x20];
7640
7641 u8 lane2_module_mapping[0x20];
7642
7643 u8 lane3_module_mapping[0x20];
7644
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646};
7647
7648struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 oper_status[0x4];
7655
7656 u8 ase[0x1];
7657 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 e[0x2];
7660
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662};
7663
7664struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672 u8 lane_speed[0x10];
7673
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675 u8 lpbf[0x1];
7676 u8 fec_mode_policy[0x8];
7677
7678 u8 retransmission_capability[0x8];
7679 u8 fec_mode_capability[0x18];
7680
7681 u8 retransmission_support_admin[0x8];
7682 u8 fec_mode_support_admin[0x18];
7683
7684 u8 retransmission_request_admin[0x8];
7685 u8 fec_mode_request_admin[0x18];
7686
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688};
7689
7690struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694 u8 ib_port[0x8];
7695
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697};
7698
7699struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 lbf_mode[0x3];
7704
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706};
7707
7708struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712
7713 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717};
7718
7719struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007720 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007721 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725
7726 u8 port_filter[8][0x20];
7727
7728 u8 port_filter_update_en[8][0x20];
7729};
7730
7731struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735
7736 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740 u8 prio_mask_rx[0x8];
7741
7742 u8 pptx[0x1];
7743 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747
7748 u8 pprx[0x1];
7749 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007750 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007751 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753
Matan Barakb4ff3a32016-02-09 14:57:42 +02007754 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007755};
7756
7757struct mlx5_ifc_pelc_reg_bits {
7758 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762
7763 u8 op_admin[0x8];
7764 u8 op_capability[0x8];
7765 u8 op_request[0x8];
7766 u8 op_active[0x8];
7767
7768 u8 admin[0x40];
7769
7770 u8 capability[0x40];
7771
7772 u8 request[0x40];
7773
7774 u8 active[0x40];
7775
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777};
7778
7779struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007780 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007781 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791 u8 error_type[0x8];
7792};
7793
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007794struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007795 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007796
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007797 u8 ptys_connector_type[0x1];
7798 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007799 u8 ppcnt_discard_group[0x1];
7800 u8 ppcnt_statistical_group[0x1];
7801};
7802
7803struct mlx5_ifc_pcam_reg_bits {
7804 u8 reserved_at_0[0x8];
7805 u8 feature_group[0x8];
7806 u8 reserved_at_10[0x8];
7807 u8 access_reg_group[0x8];
7808
7809 u8 reserved_at_20[0x20];
7810
7811 union {
7812 u8 reserved_at_0[0x80];
7813 } port_access_reg_cap_mask;
7814
7815 u8 reserved_at_c0[0x80];
7816
7817 union {
7818 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7819 u8 reserved_at_0[0x80];
7820 } feature_cap_mask;
7821
7822 u8 reserved_at_1c0[0xc0];
7823};
7824
7825struct mlx5_ifc_mcam_enhanced_features_bits {
7826 u8 reserved_at_0[0x7f];
7827
7828 u8 pcie_performance_group[0x1];
7829};
7830
Or Gerlitz0ab87742017-06-11 15:25:38 +03007831struct mlx5_ifc_mcam_access_reg_bits {
7832 u8 reserved_at_0[0x1c];
7833 u8 mcda[0x1];
7834 u8 mcc[0x1];
7835 u8 mcqi[0x1];
7836 u8 reserved_at_1f[0x1];
7837
7838 u8 regs_95_to_64[0x20];
7839 u8 regs_63_to_32[0x20];
7840 u8 regs_31_to_0[0x20];
7841};
7842
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007843struct mlx5_ifc_mcam_reg_bits {
7844 u8 reserved_at_0[0x8];
7845 u8 feature_group[0x8];
7846 u8 reserved_at_10[0x8];
7847 u8 access_reg_group[0x8];
7848
7849 u8 reserved_at_20[0x20];
7850
7851 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007852 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007853 u8 reserved_at_0[0x80];
7854 } mng_access_reg_cap_mask;
7855
7856 u8 reserved_at_c0[0x80];
7857
7858 union {
7859 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7860 u8 reserved_at_0[0x80];
7861 } mng_feature_cap_mask;
7862
7863 u8 reserved_at_1c0[0x80];
7864};
7865
Saeed Mahameede2816822015-05-28 22:28:40 +03007866struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007867 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007868 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007869 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007870
7871 u8 port_capability_mask[4][0x20];
7872};
7873
7874struct mlx5_ifc_paos_reg_bits {
7875 u8 swid[0x8];
7876 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007877 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007878 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 oper_status[0x4];
7881
7882 u8 ase[0x1];
7883 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885 u8 e[0x2];
7886
Matan Barakb4ff3a32016-02-09 14:57:42 +02007887 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007888};
7889
7890struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007891 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007893 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007894 u8 opamp_group_type[0x4];
7895
7896 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898 u8 num_of_indices[0xc];
7899
7900 u8 index_data[18][0x10];
7901};
7902
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007903struct mlx5_ifc_pcmr_reg_bits {
7904 u8 reserved_at_0[0x8];
7905 u8 local_port[0x8];
7906 u8 reserved_at_10[0x2e];
7907 u8 fcs_cap[0x1];
7908 u8 reserved_at_3f[0x1f];
7909 u8 fcs_chk[0x1];
7910 u8 reserved_at_5f[0x1];
7911};
7912
Saeed Mahameede2816822015-05-28 22:28:40 +03007913struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007914 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007915 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007918 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007919 u8 module[0x8];
7920};
7921
7922struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 lossy[0x1];
7925 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007926 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007927 u8 size[0xc];
7928
7929 u8 xoff_threshold[0x10];
7930 u8 xon_threshold[0x10];
7931};
7932
7933struct mlx5_ifc_set_node_in_bits {
7934 u8 node_description[64][0x8];
7935};
7936
7937struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939 u8 power_settings_level[0x8];
7940
Matan Barakb4ff3a32016-02-09 14:57:42 +02007941 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007942};
7943
7944struct mlx5_ifc_register_host_endianness_bits {
7945 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949};
7950
7951struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953
7954 u8 mkey[0x20];
7955
7956 u8 addressh_63_32[0x20];
7957
7958 u8 addressl_31_0[0x20];
7959};
7960
7961struct mlx5_ifc_ud_adrs_vector_bits {
7962 u8 dc_key[0x40];
7963
7964 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966 u8 destination_qp_dct[0x18];
7967
7968 u8 static_rate[0x4];
7969 u8 sl_eth_prio[0x4];
7970 u8 fl[0x1];
7971 u8 mlid[0x7];
7972 u8 rlid_udp_sport[0x10];
7973
Matan Barakb4ff3a32016-02-09 14:57:42 +02007974 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007975
7976 u8 rmac_47_16[0x20];
7977
7978 u8 rmac_15_0[0x10];
7979 u8 tclass[0x8];
7980 u8 hop_limit[0x8];
7981
Matan Barakb4ff3a32016-02-09 14:57:42 +02007982 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007983 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985 u8 src_addr_index[0x8];
7986 u8 flow_label[0x14];
7987
7988 u8 rgid_rip[16][0x8];
7989};
7990
7991struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007992 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007993 u8 function_id[0x10];
7994
7995 u8 num_pages[0x20];
7996
Matan Barakb4ff3a32016-02-09 14:57:42 +02007997 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007998};
7999
8000struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008001 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008002 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008003 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008004 u8 event_sub_type[0x8];
8005
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007
8008 union mlx5_ifc_event_auto_bits event_data;
8009
Matan Barakb4ff3a32016-02-09 14:57:42 +02008010 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008011 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008012 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008013 u8 owner[0x1];
8014};
8015
8016enum {
8017 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8018};
8019
8020struct mlx5_ifc_cmd_queue_entry_bits {
8021 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023
8024 u8 input_length[0x20];
8025
8026 u8 input_mailbox_pointer_63_32[0x20];
8027
8028 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008029 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008030
8031 u8 command_input_inline_data[16][0x8];
8032
8033 u8 command_output_inline_data[16][0x8];
8034
8035 u8 output_mailbox_pointer_63_32[0x20];
8036
8037 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008038 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008039
8040 u8 output_length[0x20];
8041
8042 u8 token[0x8];
8043 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008044 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008045 u8 status[0x7];
8046 u8 ownership[0x1];
8047};
8048
8049struct mlx5_ifc_cmd_out_bits {
8050 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008051 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008052
8053 u8 syndrome[0x20];
8054
8055 u8 command_output[0x20];
8056};
8057
8058struct mlx5_ifc_cmd_in_bits {
8059 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008060 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008061
Matan Barakb4ff3a32016-02-09 14:57:42 +02008062 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008063 u8 op_mod[0x10];
8064
8065 u8 command[0][0x20];
8066};
8067
8068struct mlx5_ifc_cmd_if_box_bits {
8069 u8 mailbox_data[512][0x8];
8070
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072
8073 u8 next_pointer_63_32[0x20];
8074
8075 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077
8078 u8 block_number[0x20];
8079
Matan Barakb4ff3a32016-02-09 14:57:42 +02008080 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008081 u8 token[0x8];
8082 u8 ctrl_signature[0x8];
8083 u8 signature[0x8];
8084};
8085
8086struct mlx5_ifc_mtt_bits {
8087 u8 ptag_63_32[0x20];
8088
8089 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008090 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008091 u8 wr_en[0x1];
8092 u8 rd_en[0x1];
8093};
8094
Tariq Toukan928cfe82016-02-22 18:17:29 +02008095struct mlx5_ifc_query_wol_rol_out_bits {
8096 u8 status[0x8];
8097 u8 reserved_at_8[0x18];
8098
8099 u8 syndrome[0x20];
8100
8101 u8 reserved_at_40[0x10];
8102 u8 rol_mode[0x8];
8103 u8 wol_mode[0x8];
8104
8105 u8 reserved_at_60[0x20];
8106};
8107
8108struct mlx5_ifc_query_wol_rol_in_bits {
8109 u8 opcode[0x10];
8110 u8 reserved_at_10[0x10];
8111
8112 u8 reserved_at_20[0x10];
8113 u8 op_mod[0x10];
8114
8115 u8 reserved_at_40[0x40];
8116};
8117
8118struct mlx5_ifc_set_wol_rol_out_bits {
8119 u8 status[0x8];
8120 u8 reserved_at_8[0x18];
8121
8122 u8 syndrome[0x20];
8123
8124 u8 reserved_at_40[0x40];
8125};
8126
8127struct mlx5_ifc_set_wol_rol_in_bits {
8128 u8 opcode[0x10];
8129 u8 reserved_at_10[0x10];
8130
8131 u8 reserved_at_20[0x10];
8132 u8 op_mod[0x10];
8133
8134 u8 rol_mode_valid[0x1];
8135 u8 wol_mode_valid[0x1];
8136 u8 reserved_at_42[0xe];
8137 u8 rol_mode[0x8];
8138 u8 wol_mode[0x8];
8139
8140 u8 reserved_at_60[0x20];
8141};
8142
Saeed Mahameede2816822015-05-28 22:28:40 +03008143enum {
8144 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8145 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8146 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8147};
8148
8149enum {
8150 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8151 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8152 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8153};
8154
8155enum {
8156 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8157 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8158 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8159 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8160 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8161 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8162 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8163 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8164 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8165 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8166 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8167};
8168
8169struct mlx5_ifc_initial_seg_bits {
8170 u8 fw_rev_minor[0x10];
8171 u8 fw_rev_major[0x10];
8172
8173 u8 cmd_interface_rev[0x10];
8174 u8 fw_rev_subminor[0x10];
8175
Matan Barakb4ff3a32016-02-09 14:57:42 +02008176 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008177
8178 u8 cmdq_phy_addr_63_32[0x20];
8179
8180 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008181 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008182 u8 nic_interface[0x2];
8183 u8 log_cmdq_size[0x4];
8184 u8 log_cmdq_stride[0x4];
8185
8186 u8 command_doorbell_vector[0x20];
8187
Matan Barakb4ff3a32016-02-09 14:57:42 +02008188 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008189
8190 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008191 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008192 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008193 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008194
8195 struct mlx5_ifc_health_buffer_bits health_buffer;
8196
8197 u8 no_dram_nic_offset[0x20];
8198
Matan Barakb4ff3a32016-02-09 14:57:42 +02008199 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008200
Matan Barakb4ff3a32016-02-09 14:57:42 +02008201 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008202 u8 clear_int[0x1];
8203
8204 u8 health_syndrome[0x8];
8205 u8 health_counter[0x18];
8206
Matan Barakb4ff3a32016-02-09 14:57:42 +02008207 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008208};
8209
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008210struct mlx5_ifc_mtpps_reg_bits {
8211 u8 reserved_at_0[0xc];
8212 u8 cap_number_of_pps_pins[0x4];
8213 u8 reserved_at_10[0x4];
8214 u8 cap_max_num_of_pps_in_pins[0x4];
8215 u8 reserved_at_18[0x4];
8216 u8 cap_max_num_of_pps_out_pins[0x4];
8217
8218 u8 reserved_at_20[0x24];
8219 u8 cap_pin_3_mode[0x4];
8220 u8 reserved_at_48[0x4];
8221 u8 cap_pin_2_mode[0x4];
8222 u8 reserved_at_50[0x4];
8223 u8 cap_pin_1_mode[0x4];
8224 u8 reserved_at_58[0x4];
8225 u8 cap_pin_0_mode[0x4];
8226
8227 u8 reserved_at_60[0x4];
8228 u8 cap_pin_7_mode[0x4];
8229 u8 reserved_at_68[0x4];
8230 u8 cap_pin_6_mode[0x4];
8231 u8 reserved_at_70[0x4];
8232 u8 cap_pin_5_mode[0x4];
8233 u8 reserved_at_78[0x4];
8234 u8 cap_pin_4_mode[0x4];
8235
8236 u8 reserved_at_80[0x80];
8237
8238 u8 enable[0x1];
8239 u8 reserved_at_101[0xb];
8240 u8 pattern[0x4];
8241 u8 reserved_at_110[0x4];
8242 u8 pin_mode[0x4];
8243 u8 pin[0x8];
8244
8245 u8 reserved_at_120[0x20];
8246
8247 u8 time_stamp[0x40];
8248
8249 u8 out_pulse_duration[0x10];
8250 u8 out_periodic_adjustment[0x10];
8251
8252 u8 reserved_at_1a0[0x60];
8253};
8254
8255struct mlx5_ifc_mtppse_reg_bits {
8256 u8 reserved_at_0[0x18];
8257 u8 pin[0x8];
8258 u8 event_arm[0x1];
8259 u8 reserved_at_21[0x1b];
8260 u8 event_generation_mode[0x4];
8261 u8 reserved_at_40[0x40];
8262};
8263
Or Gerlitz47176282017-04-18 13:35:39 +03008264struct mlx5_ifc_mcqi_cap_bits {
8265 u8 supported_info_bitmask[0x20];
8266
8267 u8 component_size[0x20];
8268
8269 u8 max_component_size[0x20];
8270
8271 u8 log_mcda_word_size[0x4];
8272 u8 reserved_at_64[0xc];
8273 u8 mcda_max_write_size[0x10];
8274
8275 u8 rd_en[0x1];
8276 u8 reserved_at_81[0x1];
8277 u8 match_chip_id[0x1];
8278 u8 match_psid[0x1];
8279 u8 check_user_timestamp[0x1];
8280 u8 match_base_guid_mac[0x1];
8281 u8 reserved_at_86[0x1a];
8282};
8283
8284struct mlx5_ifc_mcqi_reg_bits {
8285 u8 read_pending_component[0x1];
8286 u8 reserved_at_1[0xf];
8287 u8 component_index[0x10];
8288
8289 u8 reserved_at_20[0x20];
8290
8291 u8 reserved_at_40[0x1b];
8292 u8 info_type[0x5];
8293
8294 u8 info_size[0x20];
8295
8296 u8 offset[0x20];
8297
8298 u8 reserved_at_a0[0x10];
8299 u8 data_size[0x10];
8300
8301 u8 data[0][0x20];
8302};
8303
8304struct mlx5_ifc_mcc_reg_bits {
8305 u8 reserved_at_0[0x4];
8306 u8 time_elapsed_since_last_cmd[0xc];
8307 u8 reserved_at_10[0x8];
8308 u8 instruction[0x8];
8309
8310 u8 reserved_at_20[0x10];
8311 u8 component_index[0x10];
8312
8313 u8 reserved_at_40[0x8];
8314 u8 update_handle[0x18];
8315
8316 u8 handle_owner_type[0x4];
8317 u8 handle_owner_host_id[0x4];
8318 u8 reserved_at_68[0x1];
8319 u8 control_progress[0x7];
8320 u8 error_code[0x8];
8321 u8 reserved_at_78[0x4];
8322 u8 control_state[0x4];
8323
8324 u8 component_size[0x20];
8325
8326 u8 reserved_at_a0[0x60];
8327};
8328
8329struct mlx5_ifc_mcda_reg_bits {
8330 u8 reserved_at_0[0x8];
8331 u8 update_handle[0x18];
8332
8333 u8 offset[0x20];
8334
8335 u8 reserved_at_40[0x10];
8336 u8 size[0x10];
8337
8338 u8 reserved_at_60[0x20];
8339
8340 u8 data[0][0x20];
8341};
8342
Saeed Mahameede2816822015-05-28 22:28:40 +03008343union mlx5_ifc_ports_control_registers_document_bits {
8344 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8345 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8346 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8347 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8348 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8349 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8350 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8351 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8352 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8353 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8354 struct mlx5_ifc_paos_reg_bits paos_reg;
8355 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8356 struct mlx5_ifc_peir_reg_bits peir_reg;
8357 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8358 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008359 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008360 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8361 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8362 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8363 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8364 struct mlx5_ifc_plib_reg_bits plib_reg;
8365 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8366 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8367 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8368 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8369 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8370 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8371 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8372 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8373 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8374 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008375 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008376 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8377 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8378 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8379 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8380 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8381 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8382 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008383 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008384 struct mlx5_ifc_pude_reg_bits pude_reg;
8385 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8386 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8387 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008388 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8389 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008390 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008391 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8392 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008393 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8394 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8395 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008396 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008397};
8398
8399union mlx5_ifc_debug_enhancements_document_bits {
8400 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008401 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008402};
8403
8404union mlx5_ifc_uplink_pci_interface_document_bits {
8405 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008406 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008407};
8408
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008409struct mlx5_ifc_set_flow_table_root_out_bits {
8410 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008411 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008412
8413 u8 syndrome[0x20];
8414
Matan Barakb4ff3a32016-02-09 14:57:42 +02008415 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008416};
8417
8418struct mlx5_ifc_set_flow_table_root_in_bits {
8419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008420 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008421
Matan Barakb4ff3a32016-02-09 14:57:42 +02008422 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008423 u8 op_mod[0x10];
8424
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008425 u8 other_vport[0x1];
8426 u8 reserved_at_41[0xf];
8427 u8 vport_number[0x10];
8428
8429 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008430
8431 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008432 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008433
Matan Barakb4ff3a32016-02-09 14:57:42 +02008434 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008435 u8 table_id[0x18];
8436
Erez Shitrit500a3d02017-04-13 06:36:51 +03008437 u8 reserved_at_c0[0x8];
8438 u8 underlay_qpn[0x18];
8439 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008440};
8441
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008442enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008443 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8444 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008445};
8446
8447struct mlx5_ifc_modify_flow_table_out_bits {
8448 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008449 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008450
8451 u8 syndrome[0x20];
8452
Matan Barakb4ff3a32016-02-09 14:57:42 +02008453 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008454};
8455
8456struct mlx5_ifc_modify_flow_table_in_bits {
8457 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008458 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008459
Matan Barakb4ff3a32016-02-09 14:57:42 +02008460 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008461 u8 op_mod[0x10];
8462
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008463 u8 other_vport[0x1];
8464 u8 reserved_at_41[0xf];
8465 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008466
Matan Barakb4ff3a32016-02-09 14:57:42 +02008467 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008468 u8 modify_field_select[0x10];
8469
8470 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008471 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008472
Matan Barakb4ff3a32016-02-09 14:57:42 +02008473 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008474 u8 table_id[0x18];
8475
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008476 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008477};
8478
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008479struct mlx5_ifc_ets_tcn_config_reg_bits {
8480 u8 g[0x1];
8481 u8 b[0x1];
8482 u8 r[0x1];
8483 u8 reserved_at_3[0x9];
8484 u8 group[0x4];
8485 u8 reserved_at_10[0x9];
8486 u8 bw_allocation[0x7];
8487
8488 u8 reserved_at_20[0xc];
8489 u8 max_bw_units[0x4];
8490 u8 reserved_at_30[0x8];
8491 u8 max_bw_value[0x8];
8492};
8493
8494struct mlx5_ifc_ets_global_config_reg_bits {
8495 u8 reserved_at_0[0x2];
8496 u8 r[0x1];
8497 u8 reserved_at_3[0x1d];
8498
8499 u8 reserved_at_20[0xc];
8500 u8 max_bw_units[0x4];
8501 u8 reserved_at_30[0x8];
8502 u8 max_bw_value[0x8];
8503};
8504
8505struct mlx5_ifc_qetc_reg_bits {
8506 u8 reserved_at_0[0x8];
8507 u8 port_number[0x8];
8508 u8 reserved_at_10[0x30];
8509
8510 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8511 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8512};
8513
8514struct mlx5_ifc_qtct_reg_bits {
8515 u8 reserved_at_0[0x8];
8516 u8 port_number[0x8];
8517 u8 reserved_at_10[0xd];
8518 u8 prio[0x3];
8519
8520 u8 reserved_at_20[0x1d];
8521 u8 tclass[0x3];
8522};
8523
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008524struct mlx5_ifc_mcia_reg_bits {
8525 u8 l[0x1];
8526 u8 reserved_at_1[0x7];
8527 u8 module[0x8];
8528 u8 reserved_at_10[0x8];
8529 u8 status[0x8];
8530
8531 u8 i2c_device_address[0x8];
8532 u8 page_number[0x8];
8533 u8 device_address[0x10];
8534
8535 u8 reserved_at_40[0x10];
8536 u8 size[0x10];
8537
8538 u8 reserved_at_60[0x20];
8539
8540 u8 dword_0[0x20];
8541 u8 dword_1[0x20];
8542 u8 dword_2[0x20];
8543 u8 dword_3[0x20];
8544 u8 dword_4[0x20];
8545 u8 dword_5[0x20];
8546 u8 dword_6[0x20];
8547 u8 dword_7[0x20];
8548 u8 dword_8[0x20];
8549 u8 dword_9[0x20];
8550 u8 dword_10[0x20];
8551 u8 dword_11[0x20];
8552};
8553
Saeed Mahameed74862162016-06-09 15:11:34 +03008554struct mlx5_ifc_dcbx_param_bits {
8555 u8 dcbx_cee_cap[0x1];
8556 u8 dcbx_ieee_cap[0x1];
8557 u8 dcbx_standby_cap[0x1];
8558 u8 reserved_at_0[0x5];
8559 u8 port_number[0x8];
8560 u8 reserved_at_10[0xa];
8561 u8 max_application_table_size[6];
8562 u8 reserved_at_20[0x15];
8563 u8 version_oper[0x3];
8564 u8 reserved_at_38[5];
8565 u8 version_admin[0x3];
8566 u8 willing_admin[0x1];
8567 u8 reserved_at_41[0x3];
8568 u8 pfc_cap_oper[0x4];
8569 u8 reserved_at_48[0x4];
8570 u8 pfc_cap_admin[0x4];
8571 u8 reserved_at_50[0x4];
8572 u8 num_of_tc_oper[0x4];
8573 u8 reserved_at_58[0x4];
8574 u8 num_of_tc_admin[0x4];
8575 u8 remote_willing[0x1];
8576 u8 reserved_at_61[3];
8577 u8 remote_pfc_cap[4];
8578 u8 reserved_at_68[0x14];
8579 u8 remote_num_of_tc[0x4];
8580 u8 reserved_at_80[0x18];
8581 u8 error[0x8];
8582 u8 reserved_at_a0[0x160];
8583};
Aviv Heller84df61e2016-05-10 13:47:50 +03008584
8585struct mlx5_ifc_lagc_bits {
8586 u8 reserved_at_0[0x1d];
8587 u8 lag_state[0x3];
8588
8589 u8 reserved_at_20[0x14];
8590 u8 tx_remap_affinity_2[0x4];
8591 u8 reserved_at_38[0x4];
8592 u8 tx_remap_affinity_1[0x4];
8593};
8594
8595struct mlx5_ifc_create_lag_out_bits {
8596 u8 status[0x8];
8597 u8 reserved_at_8[0x18];
8598
8599 u8 syndrome[0x20];
8600
8601 u8 reserved_at_40[0x40];
8602};
8603
8604struct mlx5_ifc_create_lag_in_bits {
8605 u8 opcode[0x10];
8606 u8 reserved_at_10[0x10];
8607
8608 u8 reserved_at_20[0x10];
8609 u8 op_mod[0x10];
8610
8611 struct mlx5_ifc_lagc_bits ctx;
8612};
8613
8614struct mlx5_ifc_modify_lag_out_bits {
8615 u8 status[0x8];
8616 u8 reserved_at_8[0x18];
8617
8618 u8 syndrome[0x20];
8619
8620 u8 reserved_at_40[0x40];
8621};
8622
8623struct mlx5_ifc_modify_lag_in_bits {
8624 u8 opcode[0x10];
8625 u8 reserved_at_10[0x10];
8626
8627 u8 reserved_at_20[0x10];
8628 u8 op_mod[0x10];
8629
8630 u8 reserved_at_40[0x20];
8631 u8 field_select[0x20];
8632
8633 struct mlx5_ifc_lagc_bits ctx;
8634};
8635
8636struct mlx5_ifc_query_lag_out_bits {
8637 u8 status[0x8];
8638 u8 reserved_at_8[0x18];
8639
8640 u8 syndrome[0x20];
8641
8642 u8 reserved_at_40[0x40];
8643
8644 struct mlx5_ifc_lagc_bits ctx;
8645};
8646
8647struct mlx5_ifc_query_lag_in_bits {
8648 u8 opcode[0x10];
8649 u8 reserved_at_10[0x10];
8650
8651 u8 reserved_at_20[0x10];
8652 u8 op_mod[0x10];
8653
8654 u8 reserved_at_40[0x40];
8655};
8656
8657struct mlx5_ifc_destroy_lag_out_bits {
8658 u8 status[0x8];
8659 u8 reserved_at_8[0x18];
8660
8661 u8 syndrome[0x20];
8662
8663 u8 reserved_at_40[0x40];
8664};
8665
8666struct mlx5_ifc_destroy_lag_in_bits {
8667 u8 opcode[0x10];
8668 u8 reserved_at_10[0x10];
8669
8670 u8 reserved_at_20[0x10];
8671 u8 op_mod[0x10];
8672
8673 u8 reserved_at_40[0x40];
8674};
8675
8676struct mlx5_ifc_create_vport_lag_out_bits {
8677 u8 status[0x8];
8678 u8 reserved_at_8[0x18];
8679
8680 u8 syndrome[0x20];
8681
8682 u8 reserved_at_40[0x40];
8683};
8684
8685struct mlx5_ifc_create_vport_lag_in_bits {
8686 u8 opcode[0x10];
8687 u8 reserved_at_10[0x10];
8688
8689 u8 reserved_at_20[0x10];
8690 u8 op_mod[0x10];
8691
8692 u8 reserved_at_40[0x40];
8693};
8694
8695struct mlx5_ifc_destroy_vport_lag_out_bits {
8696 u8 status[0x8];
8697 u8 reserved_at_8[0x18];
8698
8699 u8 syndrome[0x20];
8700
8701 u8 reserved_at_40[0x40];
8702};
8703
8704struct mlx5_ifc_destroy_vport_lag_in_bits {
8705 u8 opcode[0x10];
8706 u8 reserved_at_10[0x10];
8707
8708 u8 reserved_at_20[0x10];
8709 u8 op_mod[0x10];
8710
8711 u8 reserved_at_40[0x40];
8712};
8713
Eli Cohend29b7962014-10-02 12:19:43 +03008714#endif /* MLX5_IFC_H */