blob: f339de97c5b660fc9b4f30ac0888f88907428985 [file] [log] [blame]
Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
Carolyn Wyborny4297f992011-06-29 01:16:10 +00004 Copyright(c) 2007-2011 Intel Corporation.
Auke Kok9d5c8242008-01-24 02:22:38 -08005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/init.h>
Jiri Pirkob2cb09b2011-07-21 03:27:27 +000031#include <linux/bitops.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080032#include <linux/vmalloc.h>
33#include <linux/pagemap.h>
34#include <linux/netdevice.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080035#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/slab.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080037#include <net/checksum.h>
38#include <net/ip6_checksum.h>
Patrick Ohlyc6cb0902009-02-12 05:03:42 +000039#include <linux/net_tstamp.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080040#include <linux/mii.h>
41#include <linux/ethtool.h>
Jiri Pirko01789342011-08-16 06:29:00 +000042#include <linux/if.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080043#include <linux/if_vlan.h>
44#include <linux/pci.h>
Alexander Duyckc54106b2008-10-16 21:26:57 -070045#include <linux/pci-aspm.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080046#include <linux/delay.h>
47#include <linux/interrupt.h>
Alexander Duyck7d13a7d2011-08-26 07:44:32 +000048#include <linux/ip.h>
49#include <linux/tcp.h>
50#include <linux/sctp.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080051#include <linux/if_ether.h>
Alexander Duyck40a914f2008-11-27 00:24:37 -080052#include <linux/aer.h>
Paul Gortmaker70c71602011-05-22 16:47:17 -040053#include <linux/prefetch.h>
Jeff Kirsher421e02f2008-10-17 11:08:31 -070054#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -070055#include <linux/dca.h>
56#endif
Auke Kok9d5c8242008-01-24 02:22:38 -080057#include "igb.h"
58
Carolyn Wyborny0d1fe822011-03-11 20:58:19 -080059#define MAJ 3
60#define MIN 0
61#define BUILD 6
Carolyn Wyborny0d1fe822011-03-11 20:58:19 -080062#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
Carolyn Wyborny929dd042011-05-26 03:02:26 +000063__stringify(BUILD) "-k"
Auke Kok9d5c8242008-01-24 02:22:38 -080064char igb_driver_name[] = "igb";
65char igb_driver_version[] = DRV_VERSION;
66static const char igb_driver_string[] =
67 "Intel(R) Gigabit Ethernet Network Driver";
Carolyn Wyborny4c4b42c2011-02-17 09:02:30 +000068static const char igb_copyright[] = "Copyright (c) 2007-2011 Intel Corporation.";
Auke Kok9d5c8242008-01-24 02:22:38 -080069
Auke Kok9d5c8242008-01-24 02:22:38 -080070static const struct e1000_info *igb_info_tbl[] = {
71 [board_82575] = &e1000_82575_info,
72};
73
Alexey Dobriyana3aa1882010-01-07 11:58:11 +000074static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +000075 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
76 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
77 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
78 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
Alexander Duyck55cac242009-11-19 12:42:21 +000079 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
Carolyn Wyborny6493d242011-01-14 05:33:46 +000081 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
Alexander Duyck55cac242009-11-19 12:42:21 +000082 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
Joseph Gasparakis308fb392010-09-22 17:56:44 +000085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
Gasparakis, Joseph1b5dda32010-12-09 01:41:01 +000087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
Alexander Duyck2d064c02008-07-08 15:10:12 -070089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
Alexander Duyck9eb23412009-03-13 20:42:15 +000090 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
Alexander Duyck747d49b2009-10-05 06:33:27 +000091 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
Alexander Duyck2d064c02008-07-08 15:10:12 -070092 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
Alexander Duyck4703bf72009-07-23 18:09:48 +000094 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
Carolyn Wybornyb894fa22010-03-19 06:07:48 +000095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
Alexander Duyckc8ea5ea2009-03-13 20:42:35 +000096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
Auke Kok9d5c8242008-01-24 02:22:38 -080097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
100 /* required last entry */
101 {0, }
102};
103
104MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
105
106void igb_reset(struct igb_adapter *);
107static int igb_setup_all_tx_resources(struct igb_adapter *);
108static int igb_setup_all_rx_resources(struct igb_adapter *);
109static void igb_free_all_tx_resources(struct igb_adapter *);
110static void igb_free_all_rx_resources(struct igb_adapter *);
Alexander Duyck06cf2662009-10-27 15:53:25 +0000111static void igb_setup_mrqc(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800112static int igb_probe(struct pci_dev *, const struct pci_device_id *);
113static void __devexit igb_remove(struct pci_dev *pdev);
Anders Berggren673b8b72011-02-04 07:32:32 +0000114static void igb_init_hw_timer(struct igb_adapter *adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800115static int igb_sw_init(struct igb_adapter *);
116static int igb_open(struct net_device *);
117static int igb_close(struct net_device *);
118static void igb_configure_tx(struct igb_adapter *);
119static void igb_configure_rx(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800120static void igb_clean_all_tx_rings(struct igb_adapter *);
121static void igb_clean_all_rx_rings(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700122static void igb_clean_tx_ring(struct igb_ring *);
123static void igb_clean_rx_ring(struct igb_ring *);
Alexander Duyckff41f8d2009-09-03 14:48:56 +0000124static void igb_set_rx_mode(struct net_device *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800125static void igb_update_phy_info(unsigned long);
126static void igb_watchdog(unsigned long);
127static void igb_watchdog_task(struct work_struct *);
Alexander Duyckcd392f52011-08-26 07:43:59 +0000128static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
Eric Dumazet12dcd862010-10-15 17:27:10 +0000129static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
130 struct rtnl_link_stats64 *stats);
Auke Kok9d5c8242008-01-24 02:22:38 -0800131static int igb_change_mtu(struct net_device *, int);
132static int igb_set_mac(struct net_device *, void *);
Alexander Duyck68d480c2009-10-05 06:33:08 +0000133static void igb_set_uta(struct igb_adapter *adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800134static irqreturn_t igb_intr(int irq, void *);
135static irqreturn_t igb_intr_msi(int irq, void *);
136static irqreturn_t igb_msix_other(int irq, void *);
Alexander Duyck047e0032009-10-27 15:49:27 +0000137static irqreturn_t igb_msix_ring(int irq, void *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700138#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +0000139static void igb_update_dca(struct igb_q_vector *);
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700140static void igb_setup_dca(struct igb_adapter *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700141#endif /* CONFIG_IGB_DCA */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700142static int igb_poll(struct napi_struct *, int);
Alexander Duyck13fde972011-10-05 13:35:24 +0000143static bool igb_clean_tx_irq(struct igb_q_vector *);
Alexander Duyckcd392f52011-08-26 07:43:59 +0000144static bool igb_clean_rx_irq(struct igb_q_vector *, int);
Auke Kok9d5c8242008-01-24 02:22:38 -0800145static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
146static void igb_tx_timeout(struct net_device *);
147static void igb_reset_task(struct work_struct *);
Jiri Pirkob2cb09b2011-07-21 03:27:27 +0000148static void igb_vlan_mode(struct net_device *netdev, u32 features);
Auke Kok9d5c8242008-01-24 02:22:38 -0800149static void igb_vlan_rx_add_vid(struct net_device *, u16);
150static void igb_vlan_rx_kill_vid(struct net_device *, u16);
151static void igb_restore_vlan(struct igb_adapter *);
Alexander Duyck26ad9172009-10-05 06:32:49 +0000152static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800153static void igb_ping_all_vfs(struct igb_adapter *);
154static void igb_msg_task(struct igb_adapter *);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800155static void igb_vmm_control(struct igb_adapter *);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +0000156static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800157static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
Williams, Mitch A8151d292010-02-10 01:44:24 +0000158static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
159static int igb_ndo_set_vf_vlan(struct net_device *netdev,
160 int vf, u16 vlan, u8 qos);
161static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
162static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
163 struct ifla_vf_info *ivi);
Lior Levy17dc5662011-02-08 02:28:46 +0000164static void igb_check_vf_rate_limit(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800165
Auke Kok9d5c8242008-01-24 02:22:38 -0800166#ifdef CONFIG_PM
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +0000167static int igb_suspend(struct pci_dev *, pm_message_t);
Auke Kok9d5c8242008-01-24 02:22:38 -0800168static int igb_resume(struct pci_dev *);
169#endif
170static void igb_shutdown(struct pci_dev *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700171#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700172static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
173static struct notifier_block dca_notifier = {
174 .notifier_call = igb_notify_dca,
175 .next = NULL,
176 .priority = 0
177};
178#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800179#ifdef CONFIG_NET_POLL_CONTROLLER
180/* for netdump / net console */
181static void igb_netpoll(struct net_device *);
182#endif
Alexander Duyck37680112009-02-19 20:40:30 -0800183#ifdef CONFIG_PCI_IOV
Alexander Duyck2a3abf62009-04-07 14:37:52 +0000184static unsigned int max_vfs = 0;
185module_param(max_vfs, uint, 0);
186MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
187 "per physical function");
188#endif /* CONFIG_PCI_IOV */
189
Auke Kok9d5c8242008-01-24 02:22:38 -0800190static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
191 pci_channel_state_t);
192static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
193static void igb_io_resume(struct pci_dev *);
194
195static struct pci_error_handlers igb_err_handler = {
196 .error_detected = igb_io_error_detected,
197 .slot_reset = igb_io_slot_reset,
198 .resume = igb_io_resume,
199};
200
201
202static struct pci_driver igb_driver = {
203 .name = igb_driver_name,
204 .id_table = igb_pci_tbl,
205 .probe = igb_probe,
206 .remove = __devexit_p(igb_remove),
207#ifdef CONFIG_PM
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300208 /* Power Management Hooks */
Auke Kok9d5c8242008-01-24 02:22:38 -0800209 .suspend = igb_suspend,
210 .resume = igb_resume,
211#endif
212 .shutdown = igb_shutdown,
213 .err_handler = &igb_err_handler
214};
215
216MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
217MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
218MODULE_LICENSE("GPL");
219MODULE_VERSION(DRV_VERSION);
220
Taku Izumic97ec422010-04-27 14:39:30 +0000221struct igb_reg_info {
222 u32 ofs;
223 char *name;
224};
225
226static const struct igb_reg_info igb_reg_info_tbl[] = {
227
228 /* General Registers */
229 {E1000_CTRL, "CTRL"},
230 {E1000_STATUS, "STATUS"},
231 {E1000_CTRL_EXT, "CTRL_EXT"},
232
233 /* Interrupt Registers */
234 {E1000_ICR, "ICR"},
235
236 /* RX Registers */
237 {E1000_RCTL, "RCTL"},
238 {E1000_RDLEN(0), "RDLEN"},
239 {E1000_RDH(0), "RDH"},
240 {E1000_RDT(0), "RDT"},
241 {E1000_RXDCTL(0), "RXDCTL"},
242 {E1000_RDBAL(0), "RDBAL"},
243 {E1000_RDBAH(0), "RDBAH"},
244
245 /* TX Registers */
246 {E1000_TCTL, "TCTL"},
247 {E1000_TDBAL(0), "TDBAL"},
248 {E1000_TDBAH(0), "TDBAH"},
249 {E1000_TDLEN(0), "TDLEN"},
250 {E1000_TDH(0), "TDH"},
251 {E1000_TDT(0), "TDT"},
252 {E1000_TXDCTL(0), "TXDCTL"},
253 {E1000_TDFH, "TDFH"},
254 {E1000_TDFT, "TDFT"},
255 {E1000_TDFHS, "TDFHS"},
256 {E1000_TDFPC, "TDFPC"},
257
258 /* List Terminator */
259 {}
260};
261
262/*
263 * igb_regdump - register printout routine
264 */
265static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
266{
267 int n = 0;
268 char rname[16];
269 u32 regs[8];
270
271 switch (reginfo->ofs) {
272 case E1000_RDLEN(0):
273 for (n = 0; n < 4; n++)
274 regs[n] = rd32(E1000_RDLEN(n));
275 break;
276 case E1000_RDH(0):
277 for (n = 0; n < 4; n++)
278 regs[n] = rd32(E1000_RDH(n));
279 break;
280 case E1000_RDT(0):
281 for (n = 0; n < 4; n++)
282 regs[n] = rd32(E1000_RDT(n));
283 break;
284 case E1000_RXDCTL(0):
285 for (n = 0; n < 4; n++)
286 regs[n] = rd32(E1000_RXDCTL(n));
287 break;
288 case E1000_RDBAL(0):
289 for (n = 0; n < 4; n++)
290 regs[n] = rd32(E1000_RDBAL(n));
291 break;
292 case E1000_RDBAH(0):
293 for (n = 0; n < 4; n++)
294 regs[n] = rd32(E1000_RDBAH(n));
295 break;
296 case E1000_TDBAL(0):
297 for (n = 0; n < 4; n++)
298 regs[n] = rd32(E1000_RDBAL(n));
299 break;
300 case E1000_TDBAH(0):
301 for (n = 0; n < 4; n++)
302 regs[n] = rd32(E1000_TDBAH(n));
303 break;
304 case E1000_TDLEN(0):
305 for (n = 0; n < 4; n++)
306 regs[n] = rd32(E1000_TDLEN(n));
307 break;
308 case E1000_TDH(0):
309 for (n = 0; n < 4; n++)
310 regs[n] = rd32(E1000_TDH(n));
311 break;
312 case E1000_TDT(0):
313 for (n = 0; n < 4; n++)
314 regs[n] = rd32(E1000_TDT(n));
315 break;
316 case E1000_TXDCTL(0):
317 for (n = 0; n < 4; n++)
318 regs[n] = rd32(E1000_TXDCTL(n));
319 break;
320 default:
321 printk(KERN_INFO "%-15s %08x\n",
322 reginfo->name, rd32(reginfo->ofs));
323 return;
324 }
325
326 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
327 printk(KERN_INFO "%-15s ", rname);
328 for (n = 0; n < 4; n++)
329 printk(KERN_CONT "%08x ", regs[n]);
330 printk(KERN_CONT "\n");
331}
332
333/*
334 * igb_dump - Print registers, tx-rings and rx-rings
335 */
336static void igb_dump(struct igb_adapter *adapter)
337{
338 struct net_device *netdev = adapter->netdev;
339 struct e1000_hw *hw = &adapter->hw;
340 struct igb_reg_info *reginfo;
Taku Izumic97ec422010-04-27 14:39:30 +0000341 struct igb_ring *tx_ring;
342 union e1000_adv_tx_desc *tx_desc;
343 struct my_u0 { u64 a; u64 b; } *u0;
Taku Izumic97ec422010-04-27 14:39:30 +0000344 struct igb_ring *rx_ring;
345 union e1000_adv_rx_desc *rx_desc;
346 u32 staterr;
Alexander Duyck6ad4edf2011-08-26 07:45:26 +0000347 u16 i, n;
Taku Izumic97ec422010-04-27 14:39:30 +0000348
349 if (!netif_msg_hw(adapter))
350 return;
351
352 /* Print netdevice Info */
353 if (netdev) {
354 dev_info(&adapter->pdev->dev, "Net device Info\n");
355 printk(KERN_INFO "Device Name state "
356 "trans_start last_rx\n");
357 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
358 netdev->name,
359 netdev->state,
360 netdev->trans_start,
361 netdev->last_rx);
362 }
363
364 /* Print Registers */
365 dev_info(&adapter->pdev->dev, "Register Dump\n");
366 printk(KERN_INFO " Register Name Value\n");
367 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
368 reginfo->name; reginfo++) {
369 igb_regdump(hw, reginfo);
370 }
371
372 /* Print TX Ring Summary */
373 if (!netdev || !netif_running(netdev))
374 goto exit;
375
376 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
377 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
378 " leng ntw timestamp\n");
379 for (n = 0; n < adapter->num_tx_queues; n++) {
Alexander Duyck06034642011-08-26 07:44:22 +0000380 struct igb_tx_buffer *buffer_info;
Taku Izumic97ec422010-04-27 14:39:30 +0000381 tx_ring = adapter->tx_ring[n];
Alexander Duyck06034642011-08-26 07:44:22 +0000382 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
Alexander Duyck8542db02011-08-26 07:44:43 +0000383 printk(KERN_INFO " %5d %5X %5X %016llX %04X %p %016llX\n",
Taku Izumic97ec422010-04-27 14:39:30 +0000384 n, tx_ring->next_to_use, tx_ring->next_to_clean,
385 (u64)buffer_info->dma,
386 buffer_info->length,
387 buffer_info->next_to_watch,
388 (u64)buffer_info->time_stamp);
389 }
390
391 /* Print TX Rings */
392 if (!netif_msg_tx_done(adapter))
393 goto rx_ring_summary;
394
395 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
396
397 /* Transmit Descriptor Formats
398 *
399 * Advanced Transmit Descriptor
400 * +--------------------------------------------------------------+
401 * 0 | Buffer Address [63:0] |
402 * +--------------------------------------------------------------+
403 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
404 * +--------------------------------------------------------------+
405 * 63 46 45 40 39 38 36 35 32 31 24 15 0
406 */
407
408 for (n = 0; n < adapter->num_tx_queues; n++) {
409 tx_ring = adapter->tx_ring[n];
410 printk(KERN_INFO "------------------------------------\n");
411 printk(KERN_INFO "TX QUEUE INDEX = %d\n", tx_ring->queue_index);
412 printk(KERN_INFO "------------------------------------\n");
413 printk(KERN_INFO "T [desc] [address 63:0 ] "
414 "[PlPOCIStDDM Ln] [bi->dma ] "
415 "leng ntw timestamp bi->skb\n");
416
417 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
Alexander Duyck06034642011-08-26 07:44:22 +0000418 struct igb_tx_buffer *buffer_info;
Alexander Duyck601369062011-08-26 07:44:05 +0000419 tx_desc = IGB_TX_DESC(tx_ring, i);
Alexander Duyck06034642011-08-26 07:44:22 +0000420 buffer_info = &tx_ring->tx_buffer_info[i];
Taku Izumic97ec422010-04-27 14:39:30 +0000421 u0 = (struct my_u0 *)tx_desc;
422 printk(KERN_INFO "T [0x%03X] %016llX %016llX %016llX"
Alexander Duyck8542db02011-08-26 07:44:43 +0000423 " %04X %p %016llX %p", i,
Taku Izumic97ec422010-04-27 14:39:30 +0000424 le64_to_cpu(u0->a),
425 le64_to_cpu(u0->b),
426 (u64)buffer_info->dma,
427 buffer_info->length,
428 buffer_info->next_to_watch,
429 (u64)buffer_info->time_stamp,
430 buffer_info->skb);
431 if (i == tx_ring->next_to_use &&
432 i == tx_ring->next_to_clean)
433 printk(KERN_CONT " NTC/U\n");
434 else if (i == tx_ring->next_to_use)
435 printk(KERN_CONT " NTU\n");
436 else if (i == tx_ring->next_to_clean)
437 printk(KERN_CONT " NTC\n");
438 else
439 printk(KERN_CONT "\n");
440
441 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
442 print_hex_dump(KERN_INFO, "",
443 DUMP_PREFIX_ADDRESS,
444 16, 1, phys_to_virt(buffer_info->dma),
445 buffer_info->length, true);
446 }
447 }
448
449 /* Print RX Rings Summary */
450rx_ring_summary:
451 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
452 printk(KERN_INFO "Queue [NTU] [NTC]\n");
453 for (n = 0; n < adapter->num_rx_queues; n++) {
454 rx_ring = adapter->rx_ring[n];
455 printk(KERN_INFO " %5d %5X %5X\n", n,
456 rx_ring->next_to_use, rx_ring->next_to_clean);
457 }
458
459 /* Print RX Rings */
460 if (!netif_msg_rx_status(adapter))
461 goto exit;
462
463 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
464
465 /* Advanced Receive Descriptor (Read) Format
466 * 63 1 0
467 * +-----------------------------------------------------+
468 * 0 | Packet Buffer Address [63:1] |A0/NSE|
469 * +----------------------------------------------+------+
470 * 8 | Header Buffer Address [63:1] | DD |
471 * +-----------------------------------------------------+
472 *
473 *
474 * Advanced Receive Descriptor (Write-Back) Format
475 *
476 * 63 48 47 32 31 30 21 20 17 16 4 3 0
477 * +------------------------------------------------------+
478 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
479 * | Checksum Ident | | | | Type | Type |
480 * +------------------------------------------------------+
481 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
482 * +------------------------------------------------------+
483 * 63 48 47 32 31 20 19 0
484 */
485
486 for (n = 0; n < adapter->num_rx_queues; n++) {
487 rx_ring = adapter->rx_ring[n];
488 printk(KERN_INFO "------------------------------------\n");
489 printk(KERN_INFO "RX QUEUE INDEX = %d\n", rx_ring->queue_index);
490 printk(KERN_INFO "------------------------------------\n");
491 printk(KERN_INFO "R [desc] [ PktBuf A0] "
492 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
493 "<-- Adv Rx Read format\n");
494 printk(KERN_INFO "RWB[desc] [PcsmIpSHl PtRs] "
495 "[vl er S cks ln] ---------------- [bi->skb] "
496 "<-- Adv Rx Write-Back format\n");
497
498 for (i = 0; i < rx_ring->count; i++) {
Alexander Duyck06034642011-08-26 07:44:22 +0000499 struct igb_rx_buffer *buffer_info;
500 buffer_info = &rx_ring->rx_buffer_info[i];
Alexander Duyck601369062011-08-26 07:44:05 +0000501 rx_desc = IGB_RX_DESC(rx_ring, i);
Taku Izumic97ec422010-04-27 14:39:30 +0000502 u0 = (struct my_u0 *)rx_desc;
503 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
504 if (staterr & E1000_RXD_STAT_DD) {
505 /* Descriptor Done */
506 printk(KERN_INFO "RWB[0x%03X] %016llX "
507 "%016llX ---------------- %p", i,
508 le64_to_cpu(u0->a),
509 le64_to_cpu(u0->b),
510 buffer_info->skb);
511 } else {
512 printk(KERN_INFO "R [0x%03X] %016llX "
513 "%016llX %016llX %p", i,
514 le64_to_cpu(u0->a),
515 le64_to_cpu(u0->b),
516 (u64)buffer_info->dma,
517 buffer_info->skb);
518
519 if (netif_msg_pktdata(adapter)) {
520 print_hex_dump(KERN_INFO, "",
521 DUMP_PREFIX_ADDRESS,
522 16, 1,
523 phys_to_virt(buffer_info->dma),
Alexander Duyck44390ca2011-08-26 07:43:38 +0000524 IGB_RX_HDR_LEN, true);
525 print_hex_dump(KERN_INFO, "",
526 DUMP_PREFIX_ADDRESS,
527 16, 1,
528 phys_to_virt(
529 buffer_info->page_dma +
530 buffer_info->page_offset),
531 PAGE_SIZE/2, true);
Taku Izumic97ec422010-04-27 14:39:30 +0000532 }
533 }
534
535 if (i == rx_ring->next_to_use)
536 printk(KERN_CONT " NTU\n");
537 else if (i == rx_ring->next_to_clean)
538 printk(KERN_CONT " NTC\n");
539 else
540 printk(KERN_CONT "\n");
541
542 }
543 }
544
545exit:
546 return;
547}
548
549
Patrick Ohly38c845c2009-02-12 05:03:41 +0000550/**
Patrick Ohly38c845c2009-02-12 05:03:41 +0000551 * igb_read_clock - read raw cycle counter (to be used by time counter)
552 */
553static cycle_t igb_read_clock(const struct cyclecounter *tc)
554{
555 struct igb_adapter *adapter =
556 container_of(tc, struct igb_adapter, cycles);
557 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +0000558 u64 stamp = 0;
559 int shift = 0;
Patrick Ohly38c845c2009-02-12 05:03:41 +0000560
Alexander Duyck55cac242009-11-19 12:42:21 +0000561 /*
562 * The timestamp latches on lowest register read. For the 82580
563 * the lowest register is SYSTIMR instead of SYSTIML. However we never
564 * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it.
565 */
566 if (hw->mac.type == e1000_82580) {
567 stamp = rd32(E1000_SYSTIMR) >> 8;
568 shift = IGB_82580_TSYNC_SHIFT;
569 }
570
Alexander Duyckc5b9bd52009-10-27 23:46:01 +0000571 stamp |= (u64)rd32(E1000_SYSTIML) << shift;
572 stamp |= (u64)rd32(E1000_SYSTIMH) << (shift + 32);
Patrick Ohly38c845c2009-02-12 05:03:41 +0000573 return stamp;
574}
575
Auke Kok9d5c8242008-01-24 02:22:38 -0800576/**
Alexander Duyckc0410762010-03-25 13:10:08 +0000577 * igb_get_hw_dev - return device
Auke Kok9d5c8242008-01-24 02:22:38 -0800578 * used by hardware layer to print debugging information
579 **/
Alexander Duyckc0410762010-03-25 13:10:08 +0000580struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
Auke Kok9d5c8242008-01-24 02:22:38 -0800581{
582 struct igb_adapter *adapter = hw->back;
Alexander Duyckc0410762010-03-25 13:10:08 +0000583 return adapter->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -0800584}
Patrick Ohly38c845c2009-02-12 05:03:41 +0000585
586/**
Auke Kok9d5c8242008-01-24 02:22:38 -0800587 * igb_init_module - Driver Registration Routine
588 *
589 * igb_init_module is the first routine called when the driver is
590 * loaded. All it does is register with the PCI subsystem.
591 **/
592static int __init igb_init_module(void)
593{
594 int ret;
595 printk(KERN_INFO "%s - version %s\n",
596 igb_driver_string, igb_driver_version);
597
598 printk(KERN_INFO "%s\n", igb_copyright);
599
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700600#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700601 dca_register_notify(&dca_notifier);
602#endif
Alexander Duyckbbd98fe2009-01-31 00:52:30 -0800603 ret = pci_register_driver(&igb_driver);
Auke Kok9d5c8242008-01-24 02:22:38 -0800604 return ret;
605}
606
607module_init(igb_init_module);
608
609/**
610 * igb_exit_module - Driver Exit Cleanup Routine
611 *
612 * igb_exit_module is called just before the driver is removed
613 * from memory.
614 **/
615static void __exit igb_exit_module(void)
616{
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700617#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700618 dca_unregister_notify(&dca_notifier);
619#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800620 pci_unregister_driver(&igb_driver);
621}
622
623module_exit(igb_exit_module);
624
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800625#define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
626/**
627 * igb_cache_ring_register - Descriptor ring to register mapping
628 * @adapter: board private structure to initialize
629 *
630 * Once we know the feature-set enabled for the device, we'll cache
631 * the register offset the descriptor ring is assigned to.
632 **/
633static void igb_cache_ring_register(struct igb_adapter *adapter)
634{
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000635 int i = 0, j = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +0000636 u32 rbase_offset = adapter->vfs_allocated_count;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800637
638 switch (adapter->hw.mac.type) {
639 case e1000_82576:
640 /* The queues are allocated for virtualization such that VF 0
641 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
642 * In order to avoid collision we start at the first free queue
643 * and continue consuming queues in the same sequence
644 */
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000645 if (adapter->vfs_allocated_count) {
Alexander Duycka99955f2009-11-12 18:37:19 +0000646 for (; i < adapter->rss_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +0000647 adapter->rx_ring[i]->reg_idx = rbase_offset +
648 Q_IDX_82576(i);
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000649 }
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800650 case e1000_82575:
Alexander Duyck55cac242009-11-19 12:42:21 +0000651 case e1000_82580:
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +0000652 case e1000_i350:
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800653 default:
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000654 for (; i < adapter->num_rx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +0000655 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000656 for (; j < adapter->num_tx_queues; j++)
Alexander Duyck3025a442010-02-17 01:02:39 +0000657 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800658 break;
659 }
660}
661
Alexander Duyck047e0032009-10-27 15:49:27 +0000662static void igb_free_queues(struct igb_adapter *adapter)
663{
Alexander Duyck3025a442010-02-17 01:02:39 +0000664 int i;
Alexander Duyck047e0032009-10-27 15:49:27 +0000665
Alexander Duyck3025a442010-02-17 01:02:39 +0000666 for (i = 0; i < adapter->num_tx_queues; i++) {
667 kfree(adapter->tx_ring[i]);
668 adapter->tx_ring[i] = NULL;
669 }
670 for (i = 0; i < adapter->num_rx_queues; i++) {
671 kfree(adapter->rx_ring[i]);
672 adapter->rx_ring[i] = NULL;
673 }
Alexander Duyck047e0032009-10-27 15:49:27 +0000674 adapter->num_rx_queues = 0;
675 adapter->num_tx_queues = 0;
676}
677
Auke Kok9d5c8242008-01-24 02:22:38 -0800678/**
679 * igb_alloc_queues - Allocate memory for all rings
680 * @adapter: board private structure to initialize
681 *
682 * We allocate one ring per queue at run-time since we don't know the
683 * number of queues at compile-time.
684 **/
685static int igb_alloc_queues(struct igb_adapter *adapter)
686{
Alexander Duyck3025a442010-02-17 01:02:39 +0000687 struct igb_ring *ring;
Auke Kok9d5c8242008-01-24 02:22:38 -0800688 int i;
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000689 int orig_node = adapter->node;
Auke Kok9d5c8242008-01-24 02:22:38 -0800690
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700691 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000692 if (orig_node == -1) {
693 int cur_node = next_online_node(adapter->node);
694 if (cur_node == MAX_NUMNODES)
695 cur_node = first_online_node;
696 adapter->node = cur_node;
697 }
698 ring = kzalloc_node(sizeof(struct igb_ring), GFP_KERNEL,
699 adapter->node);
700 if (!ring)
701 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
Alexander Duyck3025a442010-02-17 01:02:39 +0000702 if (!ring)
703 goto err;
Alexander Duyck68fd9912008-11-20 00:48:10 -0800704 ring->count = adapter->tx_ring_count;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700705 ring->queue_index = i;
Alexander Duyck59d71982010-04-27 13:09:25 +0000706 ring->dev = &adapter->pdev->dev;
Alexander Duycke694e962009-10-27 15:53:06 +0000707 ring->netdev = adapter->netdev;
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000708 ring->numa_node = adapter->node;
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000709 /* For 82575, context index must be unique per ring. */
710 if (adapter->hw.mac.type == e1000_82575)
Alexander Duyck866cff02011-08-26 07:45:36 +0000711 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
Alexander Duyck3025a442010-02-17 01:02:39 +0000712 adapter->tx_ring[i] = ring;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700713 }
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000714 /* Restore the adapter's original node */
715 adapter->node = orig_node;
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000716
Auke Kok9d5c8242008-01-24 02:22:38 -0800717 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000718 if (orig_node == -1) {
719 int cur_node = next_online_node(adapter->node);
720 if (cur_node == MAX_NUMNODES)
721 cur_node = first_online_node;
722 adapter->node = cur_node;
723 }
724 ring = kzalloc_node(sizeof(struct igb_ring), GFP_KERNEL,
725 adapter->node);
726 if (!ring)
727 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
Alexander Duyck3025a442010-02-17 01:02:39 +0000728 if (!ring)
729 goto err;
Alexander Duyck68fd9912008-11-20 00:48:10 -0800730 ring->count = adapter->rx_ring_count;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700731 ring->queue_index = i;
Alexander Duyck59d71982010-04-27 13:09:25 +0000732 ring->dev = &adapter->pdev->dev;
Alexander Duycke694e962009-10-27 15:53:06 +0000733 ring->netdev = adapter->netdev;
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000734 ring->numa_node = adapter->node;
Alexander Duyck866cff02011-08-26 07:45:36 +0000735 /* enable rx checksum */
736 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000737 /* set flag indicating ring supports SCTP checksum offload */
738 if (adapter->hw.mac.type >= e1000_82576)
Alexander Duyck866cff02011-08-26 07:45:36 +0000739 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
Alexander Duyck3025a442010-02-17 01:02:39 +0000740 adapter->rx_ring[i] = ring;
Auke Kok9d5c8242008-01-24 02:22:38 -0800741 }
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000742 /* Restore the adapter's original node */
743 adapter->node = orig_node;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800744
745 igb_cache_ring_register(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +0000746
Auke Kok9d5c8242008-01-24 02:22:38 -0800747 return 0;
Auke Kok9d5c8242008-01-24 02:22:38 -0800748
Alexander Duyck047e0032009-10-27 15:49:27 +0000749err:
Alexander Duyck81c2fc22011-08-26 07:45:20 +0000750 /* Restore the adapter's original node */
751 adapter->node = orig_node;
Alexander Duyck047e0032009-10-27 15:49:27 +0000752 igb_free_queues(adapter);
Alexander Duycka88f10e2008-07-08 15:13:38 -0700753
Alexander Duyck047e0032009-10-27 15:49:27 +0000754 return -ENOMEM;
Alexander Duycka88f10e2008-07-08 15:13:38 -0700755}
756
Auke Kok9d5c8242008-01-24 02:22:38 -0800757#define IGB_N0_QUEUE -1
Alexander Duyck047e0032009-10-27 15:49:27 +0000758static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -0800759{
760 u32 msixbm = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +0000761 struct igb_adapter *adapter = q_vector->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -0800762 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700763 u32 ivar, index;
Alexander Duyck047e0032009-10-27 15:49:27 +0000764 int rx_queue = IGB_N0_QUEUE;
765 int tx_queue = IGB_N0_QUEUE;
766
767 if (q_vector->rx_ring)
768 rx_queue = q_vector->rx_ring->reg_idx;
769 if (q_vector->tx_ring)
770 tx_queue = q_vector->tx_ring->reg_idx;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700771
772 switch (hw->mac.type) {
773 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800774 /* The 82575 assigns vectors using a bitmask, which matches the
775 bitmask for the EICR/EIMS/EIMC registers. To assign one
776 or more queues to a vector, we write the appropriate bits
777 into the MSIXBM register for that vector. */
Alexander Duyck047e0032009-10-27 15:49:27 +0000778 if (rx_queue > IGB_N0_QUEUE)
Auke Kok9d5c8242008-01-24 02:22:38 -0800779 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
Alexander Duyck047e0032009-10-27 15:49:27 +0000780 if (tx_queue > IGB_N0_QUEUE)
Auke Kok9d5c8242008-01-24 02:22:38 -0800781 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
Alexander Duyckfeeb2722010-02-03 21:59:51 +0000782 if (!adapter->msix_entries && msix_vector == 0)
783 msixbm |= E1000_EIMS_OTHER;
Auke Kok9d5c8242008-01-24 02:22:38 -0800784 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
Alexander Duyck047e0032009-10-27 15:49:27 +0000785 q_vector->eims_value = msixbm;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700786 break;
787 case e1000_82576:
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800788 /* 82576 uses a table-based method for assigning vectors.
Alexander Duyck2d064c02008-07-08 15:10:12 -0700789 Each queue has a single entry in the table to which we write
790 a vector number along with a "valid" bit. Sadly, the layout
791 of the table is somewhat counterintuitive. */
792 if (rx_queue > IGB_N0_QUEUE) {
Alexander Duyck047e0032009-10-27 15:49:27 +0000793 index = (rx_queue & 0x7);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700794 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck047e0032009-10-27 15:49:27 +0000795 if (rx_queue < 8) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800796 /* vector goes into low byte of register */
797 ivar = ivar & 0xFFFFFF00;
798 ivar |= msix_vector | E1000_IVAR_VALID;
Alexander Duyck047e0032009-10-27 15:49:27 +0000799 } else {
800 /* vector goes into third byte of register */
801 ivar = ivar & 0xFF00FFFF;
802 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700803 }
Alexander Duyck2d064c02008-07-08 15:10:12 -0700804 array_wr32(E1000_IVAR0, index, ivar);
805 }
806 if (tx_queue > IGB_N0_QUEUE) {
Alexander Duyck047e0032009-10-27 15:49:27 +0000807 index = (tx_queue & 0x7);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700808 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck047e0032009-10-27 15:49:27 +0000809 if (tx_queue < 8) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800810 /* vector goes into second byte of register */
811 ivar = ivar & 0xFFFF00FF;
812 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
Alexander Duyck047e0032009-10-27 15:49:27 +0000813 } else {
814 /* vector goes into high byte of register */
815 ivar = ivar & 0x00FFFFFF;
816 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700817 }
Alexander Duyck2d064c02008-07-08 15:10:12 -0700818 array_wr32(E1000_IVAR0, index, ivar);
819 }
Alexander Duyck047e0032009-10-27 15:49:27 +0000820 q_vector->eims_value = 1 << msix_vector;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700821 break;
Alexander Duyck55cac242009-11-19 12:42:21 +0000822 case e1000_82580:
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +0000823 case e1000_i350:
Alexander Duyck55cac242009-11-19 12:42:21 +0000824 /* 82580 uses the same table-based approach as 82576 but has fewer
825 entries as a result we carry over for queues greater than 4. */
826 if (rx_queue > IGB_N0_QUEUE) {
827 index = (rx_queue >> 1);
828 ivar = array_rd32(E1000_IVAR0, index);
829 if (rx_queue & 0x1) {
830 /* vector goes into third byte of register */
831 ivar = ivar & 0xFF00FFFF;
832 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
833 } else {
834 /* vector goes into low byte of register */
835 ivar = ivar & 0xFFFFFF00;
836 ivar |= msix_vector | E1000_IVAR_VALID;
837 }
838 array_wr32(E1000_IVAR0, index, ivar);
839 }
840 if (tx_queue > IGB_N0_QUEUE) {
841 index = (tx_queue >> 1);
842 ivar = array_rd32(E1000_IVAR0, index);
843 if (tx_queue & 0x1) {
844 /* vector goes into high byte of register */
845 ivar = ivar & 0x00FFFFFF;
846 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
847 } else {
848 /* vector goes into second byte of register */
849 ivar = ivar & 0xFFFF00FF;
850 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
851 }
852 array_wr32(E1000_IVAR0, index, ivar);
853 }
854 q_vector->eims_value = 1 << msix_vector;
855 break;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700856 default:
857 BUG();
858 break;
859 }
Alexander Duyck26b39272010-02-17 01:00:41 +0000860
861 /* add q_vector eims value to global eims_enable_mask */
862 adapter->eims_enable_mask |= q_vector->eims_value;
863
864 /* configure q_vector to set itr on first interrupt */
865 q_vector->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -0800866}
867
868/**
869 * igb_configure_msix - Configure MSI-X hardware
870 *
871 * igb_configure_msix sets up the hardware to properly
872 * generate MSI-X interrupts.
873 **/
874static void igb_configure_msix(struct igb_adapter *adapter)
875{
876 u32 tmp;
877 int i, vector = 0;
878 struct e1000_hw *hw = &adapter->hw;
879
880 adapter->eims_enable_mask = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -0800881
882 /* set vector for other causes, i.e. link changes */
Alexander Duyck2d064c02008-07-08 15:10:12 -0700883 switch (hw->mac.type) {
884 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800885 tmp = rd32(E1000_CTRL_EXT);
886 /* enable MSI-X PBA support*/
887 tmp |= E1000_CTRL_EXT_PBA_CLR;
888
889 /* Auto-Mask interrupts upon ICR read. */
890 tmp |= E1000_CTRL_EXT_EIAME;
891 tmp |= E1000_CTRL_EXT_IRCA;
892
893 wr32(E1000_CTRL_EXT, tmp);
Alexander Duyck047e0032009-10-27 15:49:27 +0000894
895 /* enable msix_other interrupt */
896 array_wr32(E1000_MSIXBM(0), vector++,
897 E1000_EIMS_OTHER);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700898 adapter->eims_other = E1000_EIMS_OTHER;
Auke Kok9d5c8242008-01-24 02:22:38 -0800899
Alexander Duyck2d064c02008-07-08 15:10:12 -0700900 break;
901
902 case e1000_82576:
Alexander Duyck55cac242009-11-19 12:42:21 +0000903 case e1000_82580:
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +0000904 case e1000_i350:
Alexander Duyck047e0032009-10-27 15:49:27 +0000905 /* Turn on MSI-X capability first, or our settings
906 * won't stick. And it will take days to debug. */
907 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
908 E1000_GPIE_PBA | E1000_GPIE_EIAME |
909 E1000_GPIE_NSICR);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700910
Alexander Duyck047e0032009-10-27 15:49:27 +0000911 /* enable msix_other interrupt */
912 adapter->eims_other = 1 << vector;
913 tmp = (vector++ | E1000_IVAR_VALID) << 8;
914
915 wr32(E1000_IVAR_MISC, tmp);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700916 break;
917 default:
918 /* do nothing, since nothing else supports MSI-X */
919 break;
920 } /* switch (hw->mac.type) */
Alexander Duyck047e0032009-10-27 15:49:27 +0000921
922 adapter->eims_enable_mask |= adapter->eims_other;
923
Alexander Duyck26b39272010-02-17 01:00:41 +0000924 for (i = 0; i < adapter->num_q_vectors; i++)
925 igb_assign_vector(adapter->q_vector[i], vector++);
Alexander Duyck047e0032009-10-27 15:49:27 +0000926
Auke Kok9d5c8242008-01-24 02:22:38 -0800927 wrfl();
928}
929
930/**
931 * igb_request_msix - Initialize MSI-X interrupts
932 *
933 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
934 * kernel.
935 **/
936static int igb_request_msix(struct igb_adapter *adapter)
937{
938 struct net_device *netdev = adapter->netdev;
Alexander Duyck047e0032009-10-27 15:49:27 +0000939 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -0800940 int i, err = 0, vector = 0;
941
Auke Kok9d5c8242008-01-24 02:22:38 -0800942 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -0800943 igb_msix_other, 0, netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800944 if (err)
945 goto out;
Alexander Duyck047e0032009-10-27 15:49:27 +0000946 vector++;
947
948 for (i = 0; i < adapter->num_q_vectors; i++) {
949 struct igb_q_vector *q_vector = adapter->q_vector[i];
950
951 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
952
953 if (q_vector->rx_ring && q_vector->tx_ring)
954 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
955 q_vector->rx_ring->queue_index);
956 else if (q_vector->tx_ring)
957 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
958 q_vector->tx_ring->queue_index);
959 else if (q_vector->rx_ring)
960 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
961 q_vector->rx_ring->queue_index);
962 else
963 sprintf(q_vector->name, "%s-unused", netdev->name);
964
965 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -0800966 igb_msix_ring, 0, q_vector->name,
Alexander Duyck047e0032009-10-27 15:49:27 +0000967 q_vector);
968 if (err)
969 goto out;
970 vector++;
971 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800972
Auke Kok9d5c8242008-01-24 02:22:38 -0800973 igb_configure_msix(adapter);
974 return 0;
975out:
976 return err;
977}
978
979static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
980{
981 if (adapter->msix_entries) {
982 pci_disable_msix(adapter->pdev);
983 kfree(adapter->msix_entries);
984 adapter->msix_entries = NULL;
Alexander Duyck047e0032009-10-27 15:49:27 +0000985 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800986 pci_disable_msi(adapter->pdev);
Alexander Duyck047e0032009-10-27 15:49:27 +0000987 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800988}
989
Alexander Duyck047e0032009-10-27 15:49:27 +0000990/**
991 * igb_free_q_vectors - Free memory allocated for interrupt vectors
992 * @adapter: board private structure to initialize
993 *
994 * This function frees the memory allocated to the q_vectors. In addition if
995 * NAPI is enabled it will delete any references to the NAPI struct prior
996 * to freeing the q_vector.
997 **/
998static void igb_free_q_vectors(struct igb_adapter *adapter)
999{
1000 int v_idx;
1001
1002 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1003 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1004 adapter->q_vector[v_idx] = NULL;
Nick Nunleyfe0592b2010-02-17 01:05:35 +00001005 if (!q_vector)
1006 continue;
Alexander Duyck047e0032009-10-27 15:49:27 +00001007 netif_napi_del(&q_vector->napi);
1008 kfree(q_vector);
1009 }
1010 adapter->num_q_vectors = 0;
1011}
1012
1013/**
1014 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1015 *
1016 * This function resets the device so that it has 0 rx queues, tx queues, and
1017 * MSI-X interrupts allocated.
1018 */
1019static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1020{
1021 igb_free_queues(adapter);
1022 igb_free_q_vectors(adapter);
1023 igb_reset_interrupt_capability(adapter);
1024}
Auke Kok9d5c8242008-01-24 02:22:38 -08001025
1026/**
1027 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1028 *
1029 * Attempt to configure interrupts using the best available
1030 * capabilities of the hardware and kernel.
1031 **/
Ben Hutchings21adef32010-09-27 08:28:39 +00001032static int igb_set_interrupt_capability(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08001033{
1034 int err;
1035 int numvecs, i;
1036
Alexander Duyck83b71802009-02-06 23:15:45 +00001037 /* Number of supported queues. */
Alexander Duycka99955f2009-11-12 18:37:19 +00001038 adapter->num_rx_queues = adapter->rss_queues;
Greg Rose5fa85172010-07-01 13:38:16 +00001039 if (adapter->vfs_allocated_count)
1040 adapter->num_tx_queues = 1;
1041 else
1042 adapter->num_tx_queues = adapter->rss_queues;
Alexander Duyck83b71802009-02-06 23:15:45 +00001043
Alexander Duyck047e0032009-10-27 15:49:27 +00001044 /* start with one vector for every rx queue */
1045 numvecs = adapter->num_rx_queues;
1046
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08001047 /* if tx handler is separate add 1 for every tx queue */
Alexander Duycka99955f2009-11-12 18:37:19 +00001048 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1049 numvecs += adapter->num_tx_queues;
Alexander Duyck047e0032009-10-27 15:49:27 +00001050
1051 /* store the number of vectors reserved for queues */
1052 adapter->num_q_vectors = numvecs;
1053
1054 /* add 1 vector for link status interrupts */
1055 numvecs++;
Auke Kok9d5c8242008-01-24 02:22:38 -08001056 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1057 GFP_KERNEL);
1058 if (!adapter->msix_entries)
1059 goto msi_only;
1060
1061 for (i = 0; i < numvecs; i++)
1062 adapter->msix_entries[i].entry = i;
1063
1064 err = pci_enable_msix(adapter->pdev,
1065 adapter->msix_entries,
1066 numvecs);
1067 if (err == 0)
Alexander Duyck34a20e82008-08-26 04:25:13 -07001068 goto out;
Auke Kok9d5c8242008-01-24 02:22:38 -08001069
1070 igb_reset_interrupt_capability(adapter);
1071
1072 /* If we can't do MSI-X, try MSI */
1073msi_only:
Alexander Duyck2a3abf62009-04-07 14:37:52 +00001074#ifdef CONFIG_PCI_IOV
1075 /* disable SR-IOV for non MSI-X configurations */
1076 if (adapter->vf_data) {
1077 struct e1000_hw *hw = &adapter->hw;
1078 /* disable iov and allow time for transactions to clear */
1079 pci_disable_sriov(adapter->pdev);
1080 msleep(500);
1081
1082 kfree(adapter->vf_data);
1083 adapter->vf_data = NULL;
1084 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
Jesse Brandeburg945a5152011-07-20 00:56:21 +00001085 wrfl();
Alexander Duyck2a3abf62009-04-07 14:37:52 +00001086 msleep(100);
1087 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1088 }
1089#endif
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001090 adapter->vfs_allocated_count = 0;
Alexander Duycka99955f2009-11-12 18:37:19 +00001091 adapter->rss_queues = 1;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001092 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
Auke Kok9d5c8242008-01-24 02:22:38 -08001093 adapter->num_rx_queues = 1;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001094 adapter->num_tx_queues = 1;
Alexander Duyck047e0032009-10-27 15:49:27 +00001095 adapter->num_q_vectors = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08001096 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001097 adapter->flags |= IGB_FLAG_HAS_MSI;
Alexander Duyck34a20e82008-08-26 04:25:13 -07001098out:
Ben Hutchings21adef32010-09-27 08:28:39 +00001099 /* Notify the stack of the (possibly) reduced queue counts. */
1100 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
1101 return netif_set_real_num_rx_queues(adapter->netdev,
1102 adapter->num_rx_queues);
Auke Kok9d5c8242008-01-24 02:22:38 -08001103}
1104
1105/**
Alexander Duyck047e0032009-10-27 15:49:27 +00001106 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1107 * @adapter: board private structure to initialize
1108 *
1109 * We allocate one q_vector per queue interrupt. If allocation fails we
1110 * return -ENOMEM.
1111 **/
1112static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1113{
1114 struct igb_q_vector *q_vector;
1115 struct e1000_hw *hw = &adapter->hw;
1116 int v_idx;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00001117 int orig_node = adapter->node;
Alexander Duyck047e0032009-10-27 15:49:27 +00001118
1119 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
Alexander Duyck81c2fc22011-08-26 07:45:20 +00001120 if ((adapter->num_q_vectors == (adapter->num_rx_queues +
1121 adapter->num_tx_queues)) &&
1122 (adapter->num_rx_queues == v_idx))
1123 adapter->node = orig_node;
1124 if (orig_node == -1) {
1125 int cur_node = next_online_node(adapter->node);
1126 if (cur_node == MAX_NUMNODES)
1127 cur_node = first_online_node;
1128 adapter->node = cur_node;
1129 }
1130 q_vector = kzalloc_node(sizeof(struct igb_q_vector), GFP_KERNEL,
1131 adapter->node);
1132 if (!q_vector)
1133 q_vector = kzalloc(sizeof(struct igb_q_vector),
1134 GFP_KERNEL);
Alexander Duyck047e0032009-10-27 15:49:27 +00001135 if (!q_vector)
1136 goto err_out;
1137 q_vector->adapter = adapter;
Alexander Duyck047e0032009-10-27 15:49:27 +00001138 q_vector->itr_register = hw->hw_addr + E1000_EITR(0);
1139 q_vector->itr_val = IGB_START_ITR;
Alexander Duyck047e0032009-10-27 15:49:27 +00001140 netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64);
1141 adapter->q_vector[v_idx] = q_vector;
1142 }
Alexander Duyck81c2fc22011-08-26 07:45:20 +00001143 /* Restore the adapter's original node */
1144 adapter->node = orig_node;
1145
Alexander Duyck047e0032009-10-27 15:49:27 +00001146 return 0;
1147
1148err_out:
Alexander Duyck81c2fc22011-08-26 07:45:20 +00001149 /* Restore the adapter's original node */
1150 adapter->node = orig_node;
Nick Nunleyfe0592b2010-02-17 01:05:35 +00001151 igb_free_q_vectors(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +00001152 return -ENOMEM;
1153}
1154
1155static void igb_map_rx_ring_to_vector(struct igb_adapter *adapter,
1156 int ring_idx, int v_idx)
1157{
Alexander Duyck3025a442010-02-17 01:02:39 +00001158 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
Alexander Duyck047e0032009-10-27 15:49:27 +00001159
Alexander Duyck3025a442010-02-17 01:02:39 +00001160 q_vector->rx_ring = adapter->rx_ring[ring_idx];
Alexander Duyck047e0032009-10-27 15:49:27 +00001161 q_vector->rx_ring->q_vector = q_vector;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001162 q_vector->itr_val = adapter->rx_itr_setting;
1163 if (q_vector->itr_val && q_vector->itr_val <= 3)
1164 q_vector->itr_val = IGB_START_ITR;
Alexander Duyck047e0032009-10-27 15:49:27 +00001165}
1166
1167static void igb_map_tx_ring_to_vector(struct igb_adapter *adapter,
1168 int ring_idx, int v_idx)
1169{
Alexander Duyck3025a442010-02-17 01:02:39 +00001170 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
Alexander Duyck047e0032009-10-27 15:49:27 +00001171
Alexander Duyck3025a442010-02-17 01:02:39 +00001172 q_vector->tx_ring = adapter->tx_ring[ring_idx];
Alexander Duyck047e0032009-10-27 15:49:27 +00001173 q_vector->tx_ring->q_vector = q_vector;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001174 q_vector->itr_val = adapter->tx_itr_setting;
Alexander Duyck13fde972011-10-05 13:35:24 +00001175 q_vector->tx_work_limit = adapter->tx_work_limit;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001176 if (q_vector->itr_val && q_vector->itr_val <= 3)
1177 q_vector->itr_val = IGB_START_ITR;
Alexander Duyck047e0032009-10-27 15:49:27 +00001178}
1179
1180/**
1181 * igb_map_ring_to_vector - maps allocated queues to vectors
1182 *
1183 * This function maps the recently allocated queues to vectors.
1184 **/
1185static int igb_map_ring_to_vector(struct igb_adapter *adapter)
1186{
1187 int i;
1188 int v_idx = 0;
1189
1190 if ((adapter->num_q_vectors < adapter->num_rx_queues) ||
1191 (adapter->num_q_vectors < adapter->num_tx_queues))
1192 return -ENOMEM;
1193
1194 if (adapter->num_q_vectors >=
1195 (adapter->num_rx_queues + adapter->num_tx_queues)) {
1196 for (i = 0; i < adapter->num_rx_queues; i++)
1197 igb_map_rx_ring_to_vector(adapter, i, v_idx++);
1198 for (i = 0; i < adapter->num_tx_queues; i++)
1199 igb_map_tx_ring_to_vector(adapter, i, v_idx++);
1200 } else {
1201 for (i = 0; i < adapter->num_rx_queues; i++) {
1202 if (i < adapter->num_tx_queues)
1203 igb_map_tx_ring_to_vector(adapter, i, v_idx);
1204 igb_map_rx_ring_to_vector(adapter, i, v_idx++);
1205 }
1206 for (; i < adapter->num_tx_queues; i++)
1207 igb_map_tx_ring_to_vector(adapter, i, v_idx++);
1208 }
1209 return 0;
1210}
1211
1212/**
1213 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1214 *
1215 * This function initializes the interrupts and allocates all of the queues.
1216 **/
1217static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
1218{
1219 struct pci_dev *pdev = adapter->pdev;
1220 int err;
1221
Ben Hutchings21adef32010-09-27 08:28:39 +00001222 err = igb_set_interrupt_capability(adapter);
1223 if (err)
1224 return err;
Alexander Duyck047e0032009-10-27 15:49:27 +00001225
1226 err = igb_alloc_q_vectors(adapter);
1227 if (err) {
1228 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1229 goto err_alloc_q_vectors;
1230 }
1231
1232 err = igb_alloc_queues(adapter);
1233 if (err) {
1234 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1235 goto err_alloc_queues;
1236 }
1237
1238 err = igb_map_ring_to_vector(adapter);
1239 if (err) {
1240 dev_err(&pdev->dev, "Invalid q_vector to ring mapping\n");
1241 goto err_map_queues;
1242 }
1243
1244
1245 return 0;
1246err_map_queues:
1247 igb_free_queues(adapter);
1248err_alloc_queues:
1249 igb_free_q_vectors(adapter);
1250err_alloc_q_vectors:
1251 igb_reset_interrupt_capability(adapter);
1252 return err;
1253}
1254
1255/**
Auke Kok9d5c8242008-01-24 02:22:38 -08001256 * igb_request_irq - initialize interrupts
1257 *
1258 * Attempts to configure interrupts using the best available
1259 * capabilities of the hardware and kernel.
1260 **/
1261static int igb_request_irq(struct igb_adapter *adapter)
1262{
1263 struct net_device *netdev = adapter->netdev;
Alexander Duyck047e0032009-10-27 15:49:27 +00001264 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001265 int err = 0;
1266
1267 if (adapter->msix_entries) {
1268 err = igb_request_msix(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001269 if (!err)
Auke Kok9d5c8242008-01-24 02:22:38 -08001270 goto request_done;
Auke Kok9d5c8242008-01-24 02:22:38 -08001271 /* fall back to MSI */
Alexander Duyck047e0032009-10-27 15:49:27 +00001272 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001273 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001274 adapter->flags |= IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -08001275 igb_free_all_tx_resources(adapter);
1276 igb_free_all_rx_resources(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +00001277 adapter->num_tx_queues = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08001278 adapter->num_rx_queues = 1;
Alexander Duyck047e0032009-10-27 15:49:27 +00001279 adapter->num_q_vectors = 1;
1280 err = igb_alloc_q_vectors(adapter);
1281 if (err) {
1282 dev_err(&pdev->dev,
1283 "Unable to allocate memory for vectors\n");
1284 goto request_done;
1285 }
1286 err = igb_alloc_queues(adapter);
1287 if (err) {
1288 dev_err(&pdev->dev,
1289 "Unable to allocate memory for queues\n");
1290 igb_free_q_vectors(adapter);
1291 goto request_done;
1292 }
1293 igb_setup_all_tx_resources(adapter);
1294 igb_setup_all_rx_resources(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001295 } else {
Alexander Duyckfeeb2722010-02-03 21:59:51 +00001296 igb_assign_vector(adapter->q_vector[0], 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08001297 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001298
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001299 if (adapter->flags & IGB_FLAG_HAS_MSI) {
Joe Perchesa0607fd2009-11-18 23:29:17 -08001300 err = request_irq(adapter->pdev->irq, igb_intr_msi, 0,
Alexander Duyck047e0032009-10-27 15:49:27 +00001301 netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001302 if (!err)
1303 goto request_done;
Alexander Duyck047e0032009-10-27 15:49:27 +00001304
Auke Kok9d5c8242008-01-24 02:22:38 -08001305 /* fall back to legacy interrupts */
1306 igb_reset_interrupt_capability(adapter);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001307 adapter->flags &= ~IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -08001308 }
1309
Joe Perchesa0607fd2009-11-18 23:29:17 -08001310 err = request_irq(adapter->pdev->irq, igb_intr, IRQF_SHARED,
Alexander Duyck047e0032009-10-27 15:49:27 +00001311 netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001312
Andy Gospodarek6cb5e572008-02-15 14:05:25 -08001313 if (err)
Auke Kok9d5c8242008-01-24 02:22:38 -08001314 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
1315 err);
Auke Kok9d5c8242008-01-24 02:22:38 -08001316
1317request_done:
1318 return err;
1319}
1320
1321static void igb_free_irq(struct igb_adapter *adapter)
1322{
Auke Kok9d5c8242008-01-24 02:22:38 -08001323 if (adapter->msix_entries) {
1324 int vector = 0, i;
1325
Alexander Duyck047e0032009-10-27 15:49:27 +00001326 free_irq(adapter->msix_entries[vector++].vector, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001327
Alexander Duyck047e0032009-10-27 15:49:27 +00001328 for (i = 0; i < adapter->num_q_vectors; i++) {
1329 struct igb_q_vector *q_vector = adapter->q_vector[i];
1330 free_irq(adapter->msix_entries[vector++].vector,
1331 q_vector);
1332 }
1333 } else {
1334 free_irq(adapter->pdev->irq, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001335 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001336}
1337
1338/**
1339 * igb_irq_disable - Mask off interrupt generation on the NIC
1340 * @adapter: board private structure
1341 **/
1342static void igb_irq_disable(struct igb_adapter *adapter)
1343{
1344 struct e1000_hw *hw = &adapter->hw;
1345
Alexander Duyck25568a52009-10-27 23:49:59 +00001346 /*
1347 * we need to be careful when disabling interrupts. The VFs are also
1348 * mapped into these registers and so clearing the bits can cause
1349 * issues on the VF drivers so we only need to clear what we set
1350 */
Auke Kok9d5c8242008-01-24 02:22:38 -08001351 if (adapter->msix_entries) {
Alexander Duyck2dfd1212009-09-03 14:49:15 +00001352 u32 regval = rd32(E1000_EIAM);
1353 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1354 wr32(E1000_EIMC, adapter->eims_enable_mask);
1355 regval = rd32(E1000_EIAC);
1356 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
Auke Kok9d5c8242008-01-24 02:22:38 -08001357 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001358
1359 wr32(E1000_IAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08001360 wr32(E1000_IMC, ~0);
1361 wrfl();
Emil Tantilov81a61852010-08-02 14:40:52 +00001362 if (adapter->msix_entries) {
1363 int i;
1364 for (i = 0; i < adapter->num_q_vectors; i++)
1365 synchronize_irq(adapter->msix_entries[i].vector);
1366 } else {
1367 synchronize_irq(adapter->pdev->irq);
1368 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001369}
1370
1371/**
1372 * igb_irq_enable - Enable default interrupt generation settings
1373 * @adapter: board private structure
1374 **/
1375static void igb_irq_enable(struct igb_adapter *adapter)
1376{
1377 struct e1000_hw *hw = &adapter->hw;
1378
1379 if (adapter->msix_entries) {
Alexander Duyck25568a52009-10-27 23:49:59 +00001380 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC;
Alexander Duyck2dfd1212009-09-03 14:49:15 +00001381 u32 regval = rd32(E1000_EIAC);
1382 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1383 regval = rd32(E1000_EIAM);
1384 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001385 wr32(E1000_EIMS, adapter->eims_enable_mask);
Alexander Duyck25568a52009-10-27 23:49:59 +00001386 if (adapter->vfs_allocated_count) {
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001387 wr32(E1000_MBVFIMR, 0xFF);
Alexander Duyck25568a52009-10-27 23:49:59 +00001388 ims |= E1000_IMS_VMMB;
1389 }
Alexander Duyck55cac242009-11-19 12:42:21 +00001390 if (adapter->hw.mac.type == e1000_82580)
1391 ims |= E1000_IMS_DRSTA;
1392
Alexander Duyck25568a52009-10-27 23:49:59 +00001393 wr32(E1000_IMS, ims);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001394 } else {
Alexander Duyck55cac242009-11-19 12:42:21 +00001395 wr32(E1000_IMS, IMS_ENABLE_MASK |
1396 E1000_IMS_DRSTA);
1397 wr32(E1000_IAM, IMS_ENABLE_MASK |
1398 E1000_IMS_DRSTA);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001399 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001400}
1401
1402static void igb_update_mng_vlan(struct igb_adapter *adapter)
1403{
Alexander Duyck51466232009-10-27 23:47:35 +00001404 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08001405 u16 vid = adapter->hw.mng_cookie.vlan_id;
1406 u16 old_vid = adapter->mng_vlan_id;
Auke Kok9d5c8242008-01-24 02:22:38 -08001407
Alexander Duyck51466232009-10-27 23:47:35 +00001408 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1409 /* add VID to filter table */
1410 igb_vfta_set(hw, vid, true);
1411 adapter->mng_vlan_id = vid;
1412 } else {
1413 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1414 }
1415
1416 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1417 (vid != old_vid) &&
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00001418 !test_bit(old_vid, adapter->active_vlans)) {
Alexander Duyck51466232009-10-27 23:47:35 +00001419 /* remove VID from filter table */
1420 igb_vfta_set(hw, old_vid, false);
Auke Kok9d5c8242008-01-24 02:22:38 -08001421 }
1422}
1423
1424/**
1425 * igb_release_hw_control - release control of the h/w to f/w
1426 * @adapter: address of board private structure
1427 *
1428 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1429 * For ASF and Pass Through versions of f/w this means that the
1430 * driver is no longer loaded.
1431 *
1432 **/
1433static void igb_release_hw_control(struct igb_adapter *adapter)
1434{
1435 struct e1000_hw *hw = &adapter->hw;
1436 u32 ctrl_ext;
1437
1438 /* Let firmware take over control of h/w */
1439 ctrl_ext = rd32(E1000_CTRL_EXT);
1440 wr32(E1000_CTRL_EXT,
1441 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1442}
1443
Auke Kok9d5c8242008-01-24 02:22:38 -08001444/**
1445 * igb_get_hw_control - get control of the h/w from f/w
1446 * @adapter: address of board private structure
1447 *
1448 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1449 * For ASF and Pass Through versions of f/w this means that
1450 * the driver is loaded.
1451 *
1452 **/
1453static void igb_get_hw_control(struct igb_adapter *adapter)
1454{
1455 struct e1000_hw *hw = &adapter->hw;
1456 u32 ctrl_ext;
1457
1458 /* Let firmware know the driver has taken over */
1459 ctrl_ext = rd32(E1000_CTRL_EXT);
1460 wr32(E1000_CTRL_EXT,
1461 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1462}
1463
Auke Kok9d5c8242008-01-24 02:22:38 -08001464/**
1465 * igb_configure - configure the hardware for RX and TX
1466 * @adapter: private board structure
1467 **/
1468static void igb_configure(struct igb_adapter *adapter)
1469{
1470 struct net_device *netdev = adapter->netdev;
1471 int i;
1472
1473 igb_get_hw_control(adapter);
Alexander Duyckff41f8d2009-09-03 14:48:56 +00001474 igb_set_rx_mode(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001475
1476 igb_restore_vlan(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001477
Alexander Duyck85b430b2009-10-27 15:50:29 +00001478 igb_setup_tctl(adapter);
Alexander Duyck06cf2662009-10-27 15:53:25 +00001479 igb_setup_mrqc(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001480 igb_setup_rctl(adapter);
Alexander Duyck85b430b2009-10-27 15:50:29 +00001481
1482 igb_configure_tx(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001483 igb_configure_rx(adapter);
Alexander Duyck662d7202008-06-27 11:00:29 -07001484
1485 igb_rx_fifo_flush_82575(&adapter->hw);
1486
Alexander Duyckc493ea42009-03-20 00:16:50 +00001487 /* call igb_desc_unused which always leaves
Auke Kok9d5c8242008-01-24 02:22:38 -08001488 * at least 1 descriptor unused to make sure
1489 * next_to_use != next_to_clean */
1490 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyck3025a442010-02-17 01:02:39 +00001491 struct igb_ring *ring = adapter->rx_ring[i];
Alexander Duyckcd392f52011-08-26 07:43:59 +00001492 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
Auke Kok9d5c8242008-01-24 02:22:38 -08001493 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001494}
1495
Nick Nunley88a268c2010-02-17 01:01:59 +00001496/**
1497 * igb_power_up_link - Power up the phy/serdes link
1498 * @adapter: address of board private structure
1499 **/
1500void igb_power_up_link(struct igb_adapter *adapter)
1501{
1502 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1503 igb_power_up_phy_copper(&adapter->hw);
1504 else
1505 igb_power_up_serdes_link_82575(&adapter->hw);
1506}
1507
1508/**
1509 * igb_power_down_link - Power down the phy/serdes link
1510 * @adapter: address of board private structure
1511 */
1512static void igb_power_down_link(struct igb_adapter *adapter)
1513{
1514 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1515 igb_power_down_phy_copper_82575(&adapter->hw);
1516 else
1517 igb_shutdown_serdes_link_82575(&adapter->hw);
1518}
Auke Kok9d5c8242008-01-24 02:22:38 -08001519
1520/**
1521 * igb_up - Open the interface and prepare it to handle traffic
1522 * @adapter: board private structure
1523 **/
Auke Kok9d5c8242008-01-24 02:22:38 -08001524int igb_up(struct igb_adapter *adapter)
1525{
1526 struct e1000_hw *hw = &adapter->hw;
1527 int i;
1528
1529 /* hardware has been reset, we need to reload some things */
1530 igb_configure(adapter);
1531
1532 clear_bit(__IGB_DOWN, &adapter->state);
1533
Alexander Duyck047e0032009-10-27 15:49:27 +00001534 for (i = 0; i < adapter->num_q_vectors; i++) {
1535 struct igb_q_vector *q_vector = adapter->q_vector[i];
1536 napi_enable(&q_vector->napi);
1537 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001538 if (adapter->msix_entries)
Auke Kok9d5c8242008-01-24 02:22:38 -08001539 igb_configure_msix(adapter);
Alexander Duyckfeeb2722010-02-03 21:59:51 +00001540 else
1541 igb_assign_vector(adapter->q_vector[0], 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08001542
1543 /* Clear any pending interrupts. */
1544 rd32(E1000_ICR);
1545 igb_irq_enable(adapter);
1546
Alexander Duyckd4960302009-10-27 15:53:45 +00001547 /* notify VFs that reset has been completed */
1548 if (adapter->vfs_allocated_count) {
1549 u32 reg_data = rd32(E1000_CTRL_EXT);
1550 reg_data |= E1000_CTRL_EXT_PFRSTD;
1551 wr32(E1000_CTRL_EXT, reg_data);
1552 }
1553
Jesse Brandeburg4cb9be72009-04-21 18:42:05 +00001554 netif_tx_start_all_queues(adapter->netdev);
1555
Alexander Duyck25568a52009-10-27 23:49:59 +00001556 /* start the watchdog. */
1557 hw->mac.get_link_status = 1;
1558 schedule_work(&adapter->watchdog_task);
1559
Auke Kok9d5c8242008-01-24 02:22:38 -08001560 return 0;
1561}
1562
1563void igb_down(struct igb_adapter *adapter)
1564{
Auke Kok9d5c8242008-01-24 02:22:38 -08001565 struct net_device *netdev = adapter->netdev;
Alexander Duyck330a6d62009-10-27 23:51:35 +00001566 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08001567 u32 tctl, rctl;
1568 int i;
1569
1570 /* signal that we're down so the interrupt handler does not
1571 * reschedule our watchdog timer */
1572 set_bit(__IGB_DOWN, &adapter->state);
1573
1574 /* disable receives in the hardware */
1575 rctl = rd32(E1000_RCTL);
1576 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1577 /* flush and sleep below */
1578
David S. Millerfd2ea0a2008-07-17 01:56:23 -07001579 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001580
1581 /* disable transmits in the hardware */
1582 tctl = rd32(E1000_TCTL);
1583 tctl &= ~E1000_TCTL_EN;
1584 wr32(E1000_TCTL, tctl);
1585 /* flush both disables and wait for them to finish */
1586 wrfl();
1587 msleep(10);
1588
Alexander Duyck047e0032009-10-27 15:49:27 +00001589 for (i = 0; i < adapter->num_q_vectors; i++) {
1590 struct igb_q_vector *q_vector = adapter->q_vector[i];
1591 napi_disable(&q_vector->napi);
1592 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001593
Auke Kok9d5c8242008-01-24 02:22:38 -08001594 igb_irq_disable(adapter);
1595
1596 del_timer_sync(&adapter->watchdog_timer);
1597 del_timer_sync(&adapter->phy_info_timer);
1598
Auke Kok9d5c8242008-01-24 02:22:38 -08001599 netif_carrier_off(netdev);
Alexander Duyck04fe6352009-02-06 23:22:32 +00001600
1601 /* record the stats before reset*/
Eric Dumazet12dcd862010-10-15 17:27:10 +00001602 spin_lock(&adapter->stats64_lock);
1603 igb_update_stats(adapter, &adapter->stats64);
1604 spin_unlock(&adapter->stats64_lock);
Alexander Duyck04fe6352009-02-06 23:22:32 +00001605
Auke Kok9d5c8242008-01-24 02:22:38 -08001606 adapter->link_speed = 0;
1607 adapter->link_duplex = 0;
1608
Jeff Kirsher30236822008-06-24 17:01:15 -07001609 if (!pci_channel_offline(adapter->pdev))
1610 igb_reset(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001611 igb_clean_all_tx_rings(adapter);
1612 igb_clean_all_rx_rings(adapter);
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00001613#ifdef CONFIG_IGB_DCA
1614
1615 /* since we reset the hardware DCA settings were cleared */
1616 igb_setup_dca(adapter);
1617#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001618}
1619
1620void igb_reinit_locked(struct igb_adapter *adapter)
1621{
1622 WARN_ON(in_interrupt());
1623 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1624 msleep(1);
1625 igb_down(adapter);
1626 igb_up(adapter);
1627 clear_bit(__IGB_RESETTING, &adapter->state);
1628}
1629
1630void igb_reset(struct igb_adapter *adapter)
1631{
Alexander Duyck090b1792009-10-27 23:51:55 +00001632 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001633 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07001634 struct e1000_mac_info *mac = &hw->mac;
1635 struct e1000_fc_info *fc = &hw->fc;
Auke Kok9d5c8242008-01-24 02:22:38 -08001636 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
1637 u16 hwm;
1638
1639 /* Repartition Pba for greater than 9k mtu
1640 * To take effect CTRL.RST is required.
1641 */
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001642 switch (mac->type) {
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +00001643 case e1000_i350:
Alexander Duyck55cac242009-11-19 12:42:21 +00001644 case e1000_82580:
1645 pba = rd32(E1000_RXPBS);
1646 pba = igb_rxpbs_adjust_82580(pba);
1647 break;
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001648 case e1000_82576:
Alexander Duyckd249be52009-10-27 23:46:38 +00001649 pba = rd32(E1000_RXPBS);
1650 pba &= E1000_RXPBS_SIZE_MASK_82576;
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001651 break;
1652 case e1000_82575:
1653 default:
1654 pba = E1000_PBA_34K;
1655 break;
Alexander Duyck2d064c02008-07-08 15:10:12 -07001656 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001657
Alexander Duyck2d064c02008-07-08 15:10:12 -07001658 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1659 (mac->type < e1000_82576)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08001660 /* adjust PBA for jumbo frames */
1661 wr32(E1000_PBA, pba);
1662
1663 /* To maintain wire speed transmits, the Tx FIFO should be
1664 * large enough to accommodate two full transmit packets,
1665 * rounded up to the next 1KB and expressed in KB. Likewise,
1666 * the Rx FIFO should be large enough to accommodate at least
1667 * one full receive packet and is similarly rounded up and
1668 * expressed in KB. */
1669 pba = rd32(E1000_PBA);
1670 /* upper 16 bits has Tx packet buffer allocation size in KB */
1671 tx_space = pba >> 16;
1672 /* lower 16 bits has Rx packet buffer allocation size in KB */
1673 pba &= 0xffff;
1674 /* the tx fifo also stores 16 bytes of information about the tx
1675 * but don't include ethernet FCS because hardware appends it */
1676 min_tx_space = (adapter->max_frame_size +
Alexander Duyck85e8d002009-02-16 00:00:20 -08001677 sizeof(union e1000_adv_tx_desc) -
Auke Kok9d5c8242008-01-24 02:22:38 -08001678 ETH_FCS_LEN) * 2;
1679 min_tx_space = ALIGN(min_tx_space, 1024);
1680 min_tx_space >>= 10;
1681 /* software strips receive CRC, so leave room for it */
1682 min_rx_space = adapter->max_frame_size;
1683 min_rx_space = ALIGN(min_rx_space, 1024);
1684 min_rx_space >>= 10;
1685
1686 /* If current Tx allocation is less than the min Tx FIFO size,
1687 * and the min Tx FIFO size is less than the current Rx FIFO
1688 * allocation, take space away from current Rx allocation */
1689 if (tx_space < min_tx_space &&
1690 ((min_tx_space - tx_space) < pba)) {
1691 pba = pba - (min_tx_space - tx_space);
1692
1693 /* if short on rx space, rx wins and must trump tx
1694 * adjustment */
1695 if (pba < min_rx_space)
1696 pba = min_rx_space;
1697 }
Alexander Duyck2d064c02008-07-08 15:10:12 -07001698 wr32(E1000_PBA, pba);
Auke Kok9d5c8242008-01-24 02:22:38 -08001699 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001700
1701 /* flow control settings */
1702 /* The high water mark must be low enough to fit one full frame
1703 * (or the size used for early receive) above it in the Rx FIFO.
1704 * Set it to the lower of:
1705 * - 90% of the Rx FIFO size, or
1706 * - the full Rx FIFO size minus one full frame */
1707 hwm = min(((pba << 10) * 9 / 10),
Alexander Duyck2d064c02008-07-08 15:10:12 -07001708 ((pba << 10) - 2 * adapter->max_frame_size));
Auke Kok9d5c8242008-01-24 02:22:38 -08001709
Alexander Duyckd405ea32009-12-23 13:21:27 +00001710 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
1711 fc->low_water = fc->high_water - 16;
Auke Kok9d5c8242008-01-24 02:22:38 -08001712 fc->pause_time = 0xFFFF;
1713 fc->send_xon = 1;
Alexander Duyck0cce1192009-07-23 18:10:24 +00001714 fc->current_mode = fc->requested_mode;
Auke Kok9d5c8242008-01-24 02:22:38 -08001715
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001716 /* disable receive for all VFs and wait one second */
1717 if (adapter->vfs_allocated_count) {
1718 int i;
1719 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
Greg Rose8fa7e0f2010-11-06 05:43:21 +00001720 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001721
1722 /* ping all the active vfs to let them know we are going down */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00001723 igb_ping_all_vfs(adapter);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001724
1725 /* disable transmits and receives */
1726 wr32(E1000_VFRE, 0);
1727 wr32(E1000_VFTE, 0);
1728 }
1729
Auke Kok9d5c8242008-01-24 02:22:38 -08001730 /* Allow time for pending master requests to run */
Alexander Duyck330a6d62009-10-27 23:51:35 +00001731 hw->mac.ops.reset_hw(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001732 wr32(E1000_WUC, 0);
1733
Alexander Duyck330a6d62009-10-27 23:51:35 +00001734 if (hw->mac.ops.init_hw(hw))
Alexander Duyck090b1792009-10-27 23:51:55 +00001735 dev_err(&pdev->dev, "Hardware Error\n");
Carolyn Wyborny831ec0b2011-03-11 20:43:54 -08001736 if (hw->mac.type > e1000_82580) {
1737 if (adapter->flags & IGB_FLAG_DMAC) {
1738 u32 reg;
Auke Kok9d5c8242008-01-24 02:22:38 -08001739
Carolyn Wyborny831ec0b2011-03-11 20:43:54 -08001740 /*
1741 * DMA Coalescing high water mark needs to be higher
1742 * than * the * Rx threshold. The Rx threshold is
1743 * currently * pba - 6, so we * should use a high water
1744 * mark of pba * - 4. */
1745 hwm = (pba - 4) << 10;
1746
1747 reg = (((pba-6) << E1000_DMACR_DMACTHR_SHIFT)
1748 & E1000_DMACR_DMACTHR_MASK);
1749
1750 /* transition to L0x or L1 if available..*/
1751 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
1752
1753 /* watchdog timer= +-1000 usec in 32usec intervals */
1754 reg |= (1000 >> 5);
1755 wr32(E1000_DMACR, reg);
1756
1757 /* no lower threshold to disable coalescing(smart fifb)
1758 * -UTRESH=0*/
1759 wr32(E1000_DMCRTRH, 0);
1760
1761 /* set hwm to PBA - 2 * max frame size */
1762 wr32(E1000_FCRTC, hwm);
1763
1764 /*
1765 * This sets the time to wait before requesting tran-
1766 * sition to * low power state to number of usecs needed
1767 * to receive 1 512 * byte frame at gigabit line rate
1768 */
1769 reg = rd32(E1000_DMCTLX);
1770 reg |= IGB_DMCTLX_DCFLUSH_DIS;
1771
1772 /* Delay 255 usec before entering Lx state. */
1773 reg |= 0xFF;
1774 wr32(E1000_DMCTLX, reg);
1775
1776 /* free space in Tx packet buffer to wake from DMAC */
1777 wr32(E1000_DMCTXTH,
1778 (IGB_MIN_TXPBSIZE -
1779 (IGB_TX_BUF_4096 + adapter->max_frame_size))
1780 >> 6);
1781
1782 /* make low power state decision controlled by DMAC */
1783 reg = rd32(E1000_PCIEMISC);
1784 reg |= E1000_PCIEMISC_LX_DECISION;
1785 wr32(E1000_PCIEMISC, reg);
1786 } /* end if IGB_FLAG_DMAC set */
1787 }
Alexander Duyck55cac242009-11-19 12:42:21 +00001788 if (hw->mac.type == e1000_82580) {
1789 u32 reg = rd32(E1000_PCIEMISC);
1790 wr32(E1000_PCIEMISC,
1791 reg & ~E1000_PCIEMISC_LX_DECISION);
1792 }
Nick Nunley88a268c2010-02-17 01:01:59 +00001793 if (!netif_running(adapter->netdev))
1794 igb_power_down_link(adapter);
1795
Auke Kok9d5c8242008-01-24 02:22:38 -08001796 igb_update_mng_vlan(adapter);
1797
1798 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1799 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1800
Alexander Duyck330a6d62009-10-27 23:51:35 +00001801 igb_get_phy_info(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001802}
1803
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00001804static u32 igb_fix_features(struct net_device *netdev, u32 features)
1805{
1806 /*
1807 * Since there is no support for separate rx/tx vlan accel
1808 * enable/disable make sure tx flag is always in same state as rx.
1809 */
1810 if (features & NETIF_F_HW_VLAN_RX)
1811 features |= NETIF_F_HW_VLAN_TX;
1812 else
1813 features &= ~NETIF_F_HW_VLAN_TX;
1814
1815 return features;
1816}
1817
Michał Mirosławac52caa2011-06-08 08:38:01 +00001818static int igb_set_features(struct net_device *netdev, u32 features)
1819{
1820 struct igb_adapter *adapter = netdev_priv(netdev);
1821 int i;
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00001822 u32 changed = netdev->features ^ features;
Michał Mirosławac52caa2011-06-08 08:38:01 +00001823
1824 for (i = 0; i < adapter->num_rx_queues; i++) {
1825 if (features & NETIF_F_RXCSUM)
Alexander Duyck866cff02011-08-26 07:45:36 +00001826 set_bit(IGB_RING_FLAG_RX_CSUM,
1827 &adapter->rx_ring[i]->flags);
Michał Mirosławac52caa2011-06-08 08:38:01 +00001828 else
Alexander Duyck866cff02011-08-26 07:45:36 +00001829 clear_bit(IGB_RING_FLAG_RX_CSUM,
1830 &adapter->rx_ring[i]->flags);
Michał Mirosławac52caa2011-06-08 08:38:01 +00001831 }
1832
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00001833 if (changed & NETIF_F_HW_VLAN_RX)
1834 igb_vlan_mode(netdev, features);
1835
Michał Mirosławac52caa2011-06-08 08:38:01 +00001836 return 0;
1837}
1838
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001839static const struct net_device_ops igb_netdev_ops = {
Alexander Duyck559e9c42009-10-27 23:52:50 +00001840 .ndo_open = igb_open,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001841 .ndo_stop = igb_close,
Alexander Duyckcd392f52011-08-26 07:43:59 +00001842 .ndo_start_xmit = igb_xmit_frame,
Eric Dumazet12dcd862010-10-15 17:27:10 +00001843 .ndo_get_stats64 = igb_get_stats64,
Alexander Duyckff41f8d2009-09-03 14:48:56 +00001844 .ndo_set_rx_mode = igb_set_rx_mode,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001845 .ndo_set_mac_address = igb_set_mac,
1846 .ndo_change_mtu = igb_change_mtu,
1847 .ndo_do_ioctl = igb_ioctl,
1848 .ndo_tx_timeout = igb_tx_timeout,
1849 .ndo_validate_addr = eth_validate_addr,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001850 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1851 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
Williams, Mitch A8151d292010-02-10 01:44:24 +00001852 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
1853 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
1854 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
1855 .ndo_get_vf_config = igb_ndo_get_vf_config,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001856#ifdef CONFIG_NET_POLL_CONTROLLER
1857 .ndo_poll_controller = igb_netpoll,
1858#endif
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00001859 .ndo_fix_features = igb_fix_features,
1860 .ndo_set_features = igb_set_features,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001861};
1862
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001863/**
Auke Kok9d5c8242008-01-24 02:22:38 -08001864 * igb_probe - Device Initialization Routine
1865 * @pdev: PCI device information struct
1866 * @ent: entry in igb_pci_tbl
1867 *
1868 * Returns 0 on success, negative on failure
1869 *
1870 * igb_probe initializes an adapter identified by a pci_dev structure.
1871 * The OS initialization, configuring of the adapter private structure,
1872 * and a hardware reset occur.
1873 **/
1874static int __devinit igb_probe(struct pci_dev *pdev,
1875 const struct pci_device_id *ent)
1876{
1877 struct net_device *netdev;
1878 struct igb_adapter *adapter;
1879 struct e1000_hw *hw;
Alexander Duyck4337e992009-10-27 23:48:31 +00001880 u16 eeprom_data = 0;
Carolyn Wyborny9835fd72010-11-22 17:17:21 +00001881 s32 ret_val;
Alexander Duyck4337e992009-10-27 23:48:31 +00001882 static int global_quad_port_a; /* global quad port a indication */
Auke Kok9d5c8242008-01-24 02:22:38 -08001883 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1884 unsigned long mmio_start, mmio_len;
David S. Miller2d6a5e92009-03-17 15:01:30 -07001885 int err, pci_using_dac;
Auke Kok9d5c8242008-01-24 02:22:38 -08001886 u16 eeprom_apme_mask = IGB_EEPROM_APME;
Carolyn Wyborny9835fd72010-11-22 17:17:21 +00001887 u8 part_str[E1000_PBANUM_LENGTH];
Auke Kok9d5c8242008-01-24 02:22:38 -08001888
Andy Gospodarekbded64a2010-07-21 06:40:31 +00001889 /* Catch broken hardware that put the wrong VF device ID in
1890 * the PCIe SR-IOV capability.
1891 */
1892 if (pdev->is_virtfn) {
1893 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
1894 pci_name(pdev), pdev->vendor, pdev->device);
1895 return -EINVAL;
1896 }
1897
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001898 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001899 if (err)
1900 return err;
1901
1902 pci_using_dac = 0;
Alexander Duyck59d71982010-04-27 13:09:25 +00001903 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
Auke Kok9d5c8242008-01-24 02:22:38 -08001904 if (!err) {
Alexander Duyck59d71982010-04-27 13:09:25 +00001905 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
Auke Kok9d5c8242008-01-24 02:22:38 -08001906 if (!err)
1907 pci_using_dac = 1;
1908 } else {
Alexander Duyck59d71982010-04-27 13:09:25 +00001909 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
Auke Kok9d5c8242008-01-24 02:22:38 -08001910 if (err) {
Alexander Duyck59d71982010-04-27 13:09:25 +00001911 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
Auke Kok9d5c8242008-01-24 02:22:38 -08001912 if (err) {
1913 dev_err(&pdev->dev, "No usable DMA "
1914 "configuration, aborting\n");
1915 goto err_dma;
1916 }
1917 }
1918 }
1919
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001920 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
1921 IORESOURCE_MEM),
1922 igb_driver_name);
Auke Kok9d5c8242008-01-24 02:22:38 -08001923 if (err)
1924 goto err_pci_reg;
1925
Frans Pop19d5afd2009-10-02 10:04:12 -07001926 pci_enable_pcie_error_reporting(pdev);
Alexander Duyck40a914f2008-11-27 00:24:37 -08001927
Auke Kok9d5c8242008-01-24 02:22:38 -08001928 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07001929 pci_save_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001930
1931 err = -ENOMEM;
Alexander Duyck1bfaf072009-02-19 20:39:23 -08001932 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
Alexander Duyck1cc3bd82011-08-26 07:44:10 +00001933 IGB_MAX_TX_QUEUES);
Auke Kok9d5c8242008-01-24 02:22:38 -08001934 if (!netdev)
1935 goto err_alloc_etherdev;
1936
1937 SET_NETDEV_DEV(netdev, &pdev->dev);
1938
1939 pci_set_drvdata(pdev, netdev);
1940 adapter = netdev_priv(netdev);
1941 adapter->netdev = netdev;
1942 adapter->pdev = pdev;
1943 hw = &adapter->hw;
1944 hw->back = adapter;
1945 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1946
1947 mmio_start = pci_resource_start(pdev, 0);
1948 mmio_len = pci_resource_len(pdev, 0);
1949
1950 err = -EIO;
Alexander Duyck28b07592009-02-06 23:20:31 +00001951 hw->hw_addr = ioremap(mmio_start, mmio_len);
1952 if (!hw->hw_addr)
Auke Kok9d5c8242008-01-24 02:22:38 -08001953 goto err_ioremap;
1954
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001955 netdev->netdev_ops = &igb_netdev_ops;
Auke Kok9d5c8242008-01-24 02:22:38 -08001956 igb_set_ethtool_ops(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001957 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9d5c8242008-01-24 02:22:38 -08001958
1959 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1960
1961 netdev->mem_start = mmio_start;
1962 netdev->mem_end = mmio_start + mmio_len;
1963
Auke Kok9d5c8242008-01-24 02:22:38 -08001964 /* PCI config space info */
1965 hw->vendor_id = pdev->vendor;
1966 hw->device_id = pdev->device;
1967 hw->revision_id = pdev->revision;
1968 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1969 hw->subsystem_device_id = pdev->subsystem_device;
1970
Auke Kok9d5c8242008-01-24 02:22:38 -08001971 /* Copy the default MAC, PHY and NVM function pointers */
1972 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1973 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1974 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1975 /* Initialize skew-specific constants */
1976 err = ei->get_invariants(hw);
1977 if (err)
Alexander Duyck450c87c2009-02-06 23:22:11 +00001978 goto err_sw_init;
Auke Kok9d5c8242008-01-24 02:22:38 -08001979
Alexander Duyck450c87c2009-02-06 23:22:11 +00001980 /* setup the private structure */
Auke Kok9d5c8242008-01-24 02:22:38 -08001981 err = igb_sw_init(adapter);
1982 if (err)
1983 goto err_sw_init;
1984
1985 igb_get_bus_info_pcie(hw);
1986
1987 hw->phy.autoneg_wait_to_complete = false;
Auke Kok9d5c8242008-01-24 02:22:38 -08001988
1989 /* Copper options */
1990 if (hw->phy.media_type == e1000_media_type_copper) {
1991 hw->phy.mdix = AUTO_ALL_MODES;
1992 hw->phy.disable_polarity_correction = false;
1993 hw->phy.ms_type = e1000_ms_hw_default;
1994 }
1995
1996 if (igb_check_reset_block(hw))
1997 dev_info(&pdev->dev,
1998 "PHY reset is blocked due to SOL/IDER session.\n");
1999
Michał Mirosławac52caa2011-06-08 08:38:01 +00002000 netdev->hw_features = NETIF_F_SG |
Alexander Duyck7d8eb292009-02-06 23:18:27 +00002001 NETIF_F_IP_CSUM |
Michał Mirosławac52caa2011-06-08 08:38:01 +00002002 NETIF_F_IPV6_CSUM |
2003 NETIF_F_TSO |
2004 NETIF_F_TSO6 |
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00002005 NETIF_F_RXCSUM |
2006 NETIF_F_HW_VLAN_RX;
Michał Mirosławac52caa2011-06-08 08:38:01 +00002007
2008 netdev->features = netdev->hw_features |
Auke Kok9d5c8242008-01-24 02:22:38 -08002009 NETIF_F_HW_VLAN_TX |
Auke Kok9d5c8242008-01-24 02:22:38 -08002010 NETIF_F_HW_VLAN_FILTER;
2011
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07002012 netdev->vlan_features |= NETIF_F_TSO;
2013 netdev->vlan_features |= NETIF_F_TSO6;
Alexander Duyck7d8eb292009-02-06 23:18:27 +00002014 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyckcd1da502009-08-25 04:47:50 +00002015 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07002016 netdev->vlan_features |= NETIF_F_SG;
2017
Yi Zou7b872a52010-09-22 17:57:58 +00002018 if (pci_using_dac) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002019 netdev->features |= NETIF_F_HIGHDMA;
Yi Zou7b872a52010-09-22 17:57:58 +00002020 netdev->vlan_features |= NETIF_F_HIGHDMA;
2021 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002022
Michał Mirosławac52caa2011-06-08 08:38:01 +00002023 if (hw->mac.type >= e1000_82576) {
2024 netdev->hw_features |= NETIF_F_SCTP_CSUM;
Jesse Brandeburgb9473562009-04-27 22:36:13 +00002025 netdev->features |= NETIF_F_SCTP_CSUM;
Michał Mirosławac52caa2011-06-08 08:38:01 +00002026 }
Jesse Brandeburgb9473562009-04-27 22:36:13 +00002027
Jiri Pirko01789342011-08-16 06:29:00 +00002028 netdev->priv_flags |= IFF_UNICAST_FLT;
2029
Alexander Duyck330a6d62009-10-27 23:51:35 +00002030 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08002031
2032 /* before reading the NVM, reset the controller to put the device in a
2033 * known good starting state */
2034 hw->mac.ops.reset_hw(hw);
2035
2036 /* make sure the NVM is good */
Carolyn Wyborny4322e562011-03-11 20:43:18 -08002037 if (hw->nvm.ops.validate(hw) < 0) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002038 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2039 err = -EIO;
2040 goto err_eeprom;
2041 }
2042
2043 /* copy the MAC address out of the NVM */
2044 if (hw->mac.ops.read_mac_addr(hw))
2045 dev_err(&pdev->dev, "NVM Read Error\n");
2046
2047 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2048 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2049
2050 if (!is_valid_ether_addr(netdev->perm_addr)) {
2051 dev_err(&pdev->dev, "Invalid MAC Address\n");
2052 err = -EIO;
2053 goto err_eeprom;
2054 }
2055
Joe Perchesc061b182010-08-23 18:20:03 +00002056 setup_timer(&adapter->watchdog_timer, igb_watchdog,
Alexander Duyck0e340482009-03-20 00:17:08 +00002057 (unsigned long) adapter);
Joe Perchesc061b182010-08-23 18:20:03 +00002058 setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
Alexander Duyck0e340482009-03-20 00:17:08 +00002059 (unsigned long) adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08002060
2061 INIT_WORK(&adapter->reset_task, igb_reset_task);
2062 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2063
Alexander Duyck450c87c2009-02-06 23:22:11 +00002064 /* Initialize link properties that are user-changeable */
Auke Kok9d5c8242008-01-24 02:22:38 -08002065 adapter->fc_autoneg = true;
2066 hw->mac.autoneg = true;
2067 hw->phy.autoneg_advertised = 0x2f;
2068
Alexander Duyck0cce1192009-07-23 18:10:24 +00002069 hw->fc.requested_mode = e1000_fc_default;
2070 hw->fc.current_mode = e1000_fc_default;
Auke Kok9d5c8242008-01-24 02:22:38 -08002071
Auke Kok9d5c8242008-01-24 02:22:38 -08002072 igb_validate_mdi_setting(hw);
2073
Auke Kok9d5c8242008-01-24 02:22:38 -08002074 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
2075 * enable the ACPI Magic Packet filter
2076 */
2077
Alexander Duycka2cf8b62009-03-13 20:41:17 +00002078 if (hw->bus.func == 0)
Alexander Duyck312c75a2009-02-06 23:17:47 +00002079 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
Carolyn Wyborny6d337dc2011-07-07 00:24:56 +00002080 else if (hw->mac.type >= e1000_82580)
Alexander Duyck55cac242009-11-19 12:42:21 +00002081 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2082 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2083 &eeprom_data);
Alexander Duycka2cf8b62009-03-13 20:41:17 +00002084 else if (hw->bus.func == 1)
2085 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
Auke Kok9d5c8242008-01-24 02:22:38 -08002086
2087 if (eeprom_data & eeprom_apme_mask)
2088 adapter->eeprom_wol |= E1000_WUFC_MAG;
2089
2090 /* now that we have the eeprom settings, apply the special cases where
2091 * the eeprom may be wrong or the board simply won't support wake on
2092 * lan on a particular port */
2093 switch (pdev->device) {
2094 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2095 adapter->eeprom_wol = 0;
2096 break;
2097 case E1000_DEV_ID_82575EB_FIBER_SERDES:
Alexander Duyck2d064c02008-07-08 15:10:12 -07002098 case E1000_DEV_ID_82576_FIBER:
2099 case E1000_DEV_ID_82576_SERDES:
Auke Kok9d5c8242008-01-24 02:22:38 -08002100 /* Wake events only supported on port A for dual fiber
2101 * regardless of eeprom setting */
2102 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2103 adapter->eeprom_wol = 0;
2104 break;
Alexander Duyckc8ea5ea2009-03-13 20:42:35 +00002105 case E1000_DEV_ID_82576_QUAD_COPPER:
Stefan Assmannd5aa2252010-04-09 09:51:34 +00002106 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
Alexander Duyckc8ea5ea2009-03-13 20:42:35 +00002107 /* if quad port adapter, disable WoL on all but port A */
2108 if (global_quad_port_a != 0)
2109 adapter->eeprom_wol = 0;
2110 else
2111 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2112 /* Reset for multiple quad port adapters */
2113 if (++global_quad_port_a == 4)
2114 global_quad_port_a = 0;
2115 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08002116 }
2117
2118 /* initialize the wol settings based on the eeprom settings */
2119 adapter->wol = adapter->eeprom_wol;
\"Rafael J. Wysocki\e1b86d82008-11-07 20:30:37 +00002120 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
Auke Kok9d5c8242008-01-24 02:22:38 -08002121
2122 /* reset the hardware with the new settings */
2123 igb_reset(adapter);
2124
2125 /* let the f/w know that the h/w is now under the control of the
2126 * driver. */
2127 igb_get_hw_control(adapter);
2128
Auke Kok9d5c8242008-01-24 02:22:38 -08002129 strcpy(netdev->name, "eth%d");
2130 err = register_netdev(netdev);
2131 if (err)
2132 goto err_register;
2133
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00002134 igb_vlan_mode(netdev, netdev->features);
2135
Jesse Brandeburgb168dfc2009-04-17 20:44:32 +00002136 /* carrier off reporting is important to ethtool even BEFORE open */
2137 netif_carrier_off(netdev);
2138
Jeff Kirsher421e02f2008-10-17 11:08:31 -07002139#ifdef CONFIG_IGB_DCA
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08002140 if (dca_add_requester(&pdev->dev) == 0) {
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002141 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002142 dev_info(&pdev->dev, "DCA enabled\n");
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002143 igb_setup_dca(adapter);
2144 }
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00002145
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002146#endif
Anders Berggren673b8b72011-02-04 07:32:32 +00002147 /* do hw tstamp init after resetting */
2148 igb_init_hw_timer(adapter);
2149
Auke Kok9d5c8242008-01-24 02:22:38 -08002150 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2151 /* print bus type/speed/width info */
Johannes Berg7c510e42008-10-27 17:47:26 -07002152 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08002153 netdev->name,
Alexander Duyck559e9c42009-10-27 23:52:50 +00002154 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
Alexander Duyckff846f52010-04-27 01:02:40 +00002155 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
Alexander Duyck559e9c42009-10-27 23:52:50 +00002156 "unknown"),
Alexander Duyck59c3de82009-03-31 20:38:00 +00002157 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2158 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2159 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2160 "unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07002161 netdev->dev_addr);
Auke Kok9d5c8242008-01-24 02:22:38 -08002162
Carolyn Wyborny9835fd72010-11-22 17:17:21 +00002163 ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2164 if (ret_val)
2165 strcpy(part_str, "Unknown");
2166 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
Auke Kok9d5c8242008-01-24 02:22:38 -08002167 dev_info(&pdev->dev,
2168 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2169 adapter->msix_entries ? "MSI-X" :
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002170 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
Auke Kok9d5c8242008-01-24 02:22:38 -08002171 adapter->num_rx_queues, adapter->num_tx_queues);
Carolyn Wyborny09b068d2011-03-11 20:42:13 -08002172 switch (hw->mac.type) {
2173 case e1000_i350:
2174 igb_set_eee_i350(hw);
2175 break;
2176 default:
2177 break;
2178 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002179 return 0;
2180
2181err_register:
2182 igb_release_hw_control(adapter);
2183err_eeprom:
2184 if (!igb_check_reset_block(hw))
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08002185 igb_reset_phy(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08002186
2187 if (hw->flash_address)
2188 iounmap(hw->flash_address);
Auke Kok9d5c8242008-01-24 02:22:38 -08002189err_sw_init:
Alexander Duyck047e0032009-10-27 15:49:27 +00002190 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08002191 iounmap(hw->hw_addr);
2192err_ioremap:
2193 free_netdev(netdev);
2194err_alloc_etherdev:
Alexander Duyck559e9c42009-10-27 23:52:50 +00002195 pci_release_selected_regions(pdev,
2196 pci_select_bars(pdev, IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08002197err_pci_reg:
2198err_dma:
2199 pci_disable_device(pdev);
2200 return err;
2201}
2202
2203/**
2204 * igb_remove - Device Removal Routine
2205 * @pdev: PCI device information struct
2206 *
2207 * igb_remove is called by the PCI subsystem to alert the driver
2208 * that it should release a PCI device. The could be caused by a
2209 * Hot-Plug event, or because the driver is going to be removed from
2210 * memory.
2211 **/
2212static void __devexit igb_remove(struct pci_dev *pdev)
2213{
2214 struct net_device *netdev = pci_get_drvdata(pdev);
2215 struct igb_adapter *adapter = netdev_priv(netdev);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002216 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08002217
Tejun Heo760141a2010-12-12 16:45:14 +01002218 /*
2219 * The watchdog timer may be rescheduled, so explicitly
2220 * disable watchdog from being rescheduled.
2221 */
Auke Kok9d5c8242008-01-24 02:22:38 -08002222 set_bit(__IGB_DOWN, &adapter->state);
2223 del_timer_sync(&adapter->watchdog_timer);
2224 del_timer_sync(&adapter->phy_info_timer);
2225
Tejun Heo760141a2010-12-12 16:45:14 +01002226 cancel_work_sync(&adapter->reset_task);
2227 cancel_work_sync(&adapter->watchdog_task);
Auke Kok9d5c8242008-01-24 02:22:38 -08002228
Jeff Kirsher421e02f2008-10-17 11:08:31 -07002229#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002230 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002231 dev_info(&pdev->dev, "DCA disabled\n");
2232 dca_remove_requester(&pdev->dev);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002233 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08002234 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07002235 }
2236#endif
2237
Auke Kok9d5c8242008-01-24 02:22:38 -08002238 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2239 * would have already happened in close and is redundant. */
2240 igb_release_hw_control(adapter);
2241
2242 unregister_netdev(netdev);
2243
Alexander Duyck047e0032009-10-27 15:49:27 +00002244 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08002245
Alexander Duyck37680112009-02-19 20:40:30 -08002246#ifdef CONFIG_PCI_IOV
2247 /* reclaim resources allocated to VFs */
2248 if (adapter->vf_data) {
2249 /* disable iov and allow time for transactions to clear */
2250 pci_disable_sriov(pdev);
2251 msleep(500);
2252
2253 kfree(adapter->vf_data);
2254 adapter->vf_data = NULL;
2255 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
Jesse Brandeburg945a5152011-07-20 00:56:21 +00002256 wrfl();
Alexander Duyck37680112009-02-19 20:40:30 -08002257 msleep(100);
2258 dev_info(&pdev->dev, "IOV Disabled\n");
2259 }
2260#endif
Alexander Duyck559e9c42009-10-27 23:52:50 +00002261
Alexander Duyck28b07592009-02-06 23:20:31 +00002262 iounmap(hw->hw_addr);
2263 if (hw->flash_address)
2264 iounmap(hw->flash_address);
Alexander Duyck559e9c42009-10-27 23:52:50 +00002265 pci_release_selected_regions(pdev,
2266 pci_select_bars(pdev, IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08002267
2268 free_netdev(netdev);
2269
Frans Pop19d5afd2009-10-02 10:04:12 -07002270 pci_disable_pcie_error_reporting(pdev);
Alexander Duyck40a914f2008-11-27 00:24:37 -08002271
Auke Kok9d5c8242008-01-24 02:22:38 -08002272 pci_disable_device(pdev);
2273}
2274
2275/**
Alexander Duycka6b623e2009-10-27 23:47:53 +00002276 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2277 * @adapter: board private structure to initialize
2278 *
2279 * This function initializes the vf specific data storage and then attempts to
2280 * allocate the VFs. The reason for ordering it this way is because it is much
2281 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2282 * the memory for the VFs.
2283 **/
2284static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
2285{
2286#ifdef CONFIG_PCI_IOV
2287 struct pci_dev *pdev = adapter->pdev;
2288
Alexander Duycka6b623e2009-10-27 23:47:53 +00002289 if (adapter->vfs_allocated_count) {
2290 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2291 sizeof(struct vf_data_storage),
2292 GFP_KERNEL);
2293 /* if allocation failed then we do not support SR-IOV */
2294 if (!adapter->vf_data) {
2295 adapter->vfs_allocated_count = 0;
2296 dev_err(&pdev->dev, "Unable to allocate memory for VF "
2297 "Data Storage\n");
2298 }
2299 }
2300
2301 if (pci_enable_sriov(pdev, adapter->vfs_allocated_count)) {
2302 kfree(adapter->vf_data);
2303 adapter->vf_data = NULL;
2304#endif /* CONFIG_PCI_IOV */
2305 adapter->vfs_allocated_count = 0;
2306#ifdef CONFIG_PCI_IOV
2307 } else {
2308 unsigned char mac_addr[ETH_ALEN];
2309 int i;
2310 dev_info(&pdev->dev, "%d vfs allocated\n",
2311 adapter->vfs_allocated_count);
2312 for (i = 0; i < adapter->vfs_allocated_count; i++) {
2313 random_ether_addr(mac_addr);
2314 igb_set_vf_mac(adapter, i, mac_addr);
2315 }
Carolyn Wyborny831ec0b2011-03-11 20:43:54 -08002316 /* DMA Coalescing is not supported in IOV mode. */
2317 if (adapter->flags & IGB_FLAG_DMAC)
2318 adapter->flags &= ~IGB_FLAG_DMAC;
Alexander Duycka6b623e2009-10-27 23:47:53 +00002319 }
2320#endif /* CONFIG_PCI_IOV */
2321}
2322
Alexander Duyck115f4592009-11-12 18:37:00 +00002323
2324/**
2325 * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
2326 * @adapter: board private structure to initialize
2327 *
2328 * igb_init_hw_timer initializes the function pointer and values for the hw
2329 * timer found in hardware.
2330 **/
2331static void igb_init_hw_timer(struct igb_adapter *adapter)
2332{
2333 struct e1000_hw *hw = &adapter->hw;
2334
2335 switch (hw->mac.type) {
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +00002336 case e1000_i350:
Alexander Duyck55cac242009-11-19 12:42:21 +00002337 case e1000_82580:
2338 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
2339 adapter->cycles.read = igb_read_clock;
2340 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
2341 adapter->cycles.mult = 1;
2342 /*
2343 * The 82580 timesync updates the system timer every 8ns by 8ns
2344 * and the value cannot be shifted. Instead we need to shift
2345 * the registers to generate a 64bit timer value. As a result
2346 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by
2347 * 24 in order to generate a larger value for synchronization.
2348 */
2349 adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;
2350 /* disable system timer temporarily by setting bit 31 */
2351 wr32(E1000_TSAUXC, 0x80000000);
2352 wrfl();
2353
2354 /* Set registers so that rollover occurs soon to test this. */
2355 wr32(E1000_SYSTIMR, 0x00000000);
2356 wr32(E1000_SYSTIML, 0x80000000);
2357 wr32(E1000_SYSTIMH, 0x000000FF);
2358 wrfl();
2359
2360 /* enable system timer by clearing bit 31 */
2361 wr32(E1000_TSAUXC, 0x0);
2362 wrfl();
2363
2364 timecounter_init(&adapter->clock,
2365 &adapter->cycles,
2366 ktime_to_ns(ktime_get_real()));
2367 /*
2368 * Synchronize our NIC clock against system wall clock. NIC
2369 * time stamp reading requires ~3us per sample, each sample
2370 * was pretty stable even under load => only require 10
2371 * samples for each offset comparison.
2372 */
2373 memset(&adapter->compare, 0, sizeof(adapter->compare));
2374 adapter->compare.source = &adapter->clock;
2375 adapter->compare.target = ktime_get_real;
2376 adapter->compare.num_samples = 10;
2377 timecompare_update(&adapter->compare, 0);
2378 break;
Alexander Duyck115f4592009-11-12 18:37:00 +00002379 case e1000_82576:
2380 /*
2381 * Initialize hardware timer: we keep it running just in case
2382 * that some program needs it later on.
2383 */
2384 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
2385 adapter->cycles.read = igb_read_clock;
2386 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
2387 adapter->cycles.mult = 1;
2388 /**
2389 * Scale the NIC clock cycle by a large factor so that
2390 * relatively small clock corrections can be added or
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002391 * subtracted at each clock tick. The drawbacks of a large
Alexander Duyck115f4592009-11-12 18:37:00 +00002392 * factor are a) that the clock register overflows more quickly
2393 * (not such a big deal) and b) that the increment per tick has
2394 * to fit into 24 bits. As a result we need to use a shift of
2395 * 19 so we can fit a value of 16 into the TIMINCA register.
2396 */
2397 adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
2398 wr32(E1000_TIMINCA,
2399 (1 << E1000_TIMINCA_16NS_SHIFT) |
2400 (16 << IGB_82576_TSYNC_SHIFT));
2401
2402 /* Set registers so that rollover occurs soon to test this. */
2403 wr32(E1000_SYSTIML, 0x00000000);
2404 wr32(E1000_SYSTIMH, 0xFF800000);
2405 wrfl();
2406
2407 timecounter_init(&adapter->clock,
2408 &adapter->cycles,
2409 ktime_to_ns(ktime_get_real()));
2410 /*
2411 * Synchronize our NIC clock against system wall clock. NIC
2412 * time stamp reading requires ~3us per sample, each sample
2413 * was pretty stable even under load => only require 10
2414 * samples for each offset comparison.
2415 */
2416 memset(&adapter->compare, 0, sizeof(adapter->compare));
2417 adapter->compare.source = &adapter->clock;
2418 adapter->compare.target = ktime_get_real;
2419 adapter->compare.num_samples = 10;
2420 timecompare_update(&adapter->compare, 0);
2421 break;
2422 case e1000_82575:
2423 /* 82575 does not support timesync */
2424 default:
2425 break;
2426 }
2427
2428}
2429
Alexander Duycka6b623e2009-10-27 23:47:53 +00002430/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002431 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2432 * @adapter: board private structure to initialize
2433 *
2434 * igb_sw_init initializes the Adapter private data structure.
2435 * Fields are initialized based on PCI device information and
2436 * OS network device settings (MTU size).
2437 **/
2438static int __devinit igb_sw_init(struct igb_adapter *adapter)
2439{
2440 struct e1000_hw *hw = &adapter->hw;
2441 struct net_device *netdev = adapter->netdev;
2442 struct pci_dev *pdev = adapter->pdev;
2443
2444 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2445
Alexander Duyck13fde972011-10-05 13:35:24 +00002446 /* set default ring sizes */
Alexander Duyck68fd9912008-11-20 00:48:10 -08002447 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2448 adapter->rx_ring_count = IGB_DEFAULT_RXD;
Alexander Duyck13fde972011-10-05 13:35:24 +00002449
2450 /* set default ITR values */
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00002451 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2452 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2453
Alexander Duyck13fde972011-10-05 13:35:24 +00002454 /* set default work limits */
2455 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2456
Alexander Duyck153285f2011-08-26 07:43:32 +00002457 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2458 VLAN_HLEN;
Auke Kok9d5c8242008-01-24 02:22:38 -08002459 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2460
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002461 adapter->node = -1;
2462
Eric Dumazet12dcd862010-10-15 17:27:10 +00002463 spin_lock_init(&adapter->stats64_lock);
Alexander Duycka6b623e2009-10-27 23:47:53 +00002464#ifdef CONFIG_PCI_IOV
Carolyn Wyborny6b78bb12011-01-20 06:40:45 +00002465 switch (hw->mac.type) {
2466 case e1000_82576:
2467 case e1000_i350:
Stefan Assmann9b082d72011-02-24 20:03:31 +00002468 if (max_vfs > 7) {
2469 dev_warn(&pdev->dev,
2470 "Maximum of 7 VFs per PF, using max\n");
2471 adapter->vfs_allocated_count = 7;
2472 } else
2473 adapter->vfs_allocated_count = max_vfs;
Carolyn Wyborny6b78bb12011-01-20 06:40:45 +00002474 break;
2475 default:
2476 break;
2477 }
Alexander Duycka6b623e2009-10-27 23:47:53 +00002478#endif /* CONFIG_PCI_IOV */
Alexander Duycka99955f2009-11-12 18:37:19 +00002479 adapter->rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());
Williams, Mitch A665c8c82011-06-07 14:22:57 -07002480 /* i350 cannot do RSS and SR-IOV at the same time */
2481 if (hw->mac.type == e1000_i350 && adapter->vfs_allocated_count)
2482 adapter->rss_queues = 1;
Alexander Duycka99955f2009-11-12 18:37:19 +00002483
2484 /*
2485 * if rss_queues > 4 or vfs are going to be allocated with rss_queues
2486 * then we should combine the queues into a queue pair in order to
2487 * conserve interrupts due to limited supply
2488 */
2489 if ((adapter->rss_queues > 4) ||
2490 ((adapter->rss_queues > 1) && (adapter->vfs_allocated_count > 6)))
2491 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2492
Alexander Duycka6b623e2009-10-27 23:47:53 +00002493 /* This call may decrease the number of queues */
Alexander Duyck047e0032009-10-27 15:49:27 +00002494 if (igb_init_interrupt_scheme(adapter)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002495 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2496 return -ENOMEM;
2497 }
2498
Alexander Duycka6b623e2009-10-27 23:47:53 +00002499 igb_probe_vfs(adapter);
2500
Auke Kok9d5c8242008-01-24 02:22:38 -08002501 /* Explicitly disable IRQ since the NIC can be in any state. */
2502 igb_irq_disable(adapter);
2503
Carolyn Wyborny831ec0b2011-03-11 20:43:54 -08002504 if (hw->mac.type == e1000_i350)
2505 adapter->flags &= ~IGB_FLAG_DMAC;
2506
Auke Kok9d5c8242008-01-24 02:22:38 -08002507 set_bit(__IGB_DOWN, &adapter->state);
2508 return 0;
2509}
2510
2511/**
2512 * igb_open - Called when a network interface is made active
2513 * @netdev: network interface device structure
2514 *
2515 * Returns 0 on success, negative value on failure
2516 *
2517 * The open entry point is called when a network interface is made
2518 * active by the system (IFF_UP). At this point all resources needed
2519 * for transmit and receive operations are allocated, the interrupt
2520 * handler is registered with the OS, the watchdog timer is started,
2521 * and the stack is notified that the interface is ready.
2522 **/
2523static int igb_open(struct net_device *netdev)
2524{
2525 struct igb_adapter *adapter = netdev_priv(netdev);
2526 struct e1000_hw *hw = &adapter->hw;
2527 int err;
2528 int i;
2529
2530 /* disallow open during test */
2531 if (test_bit(__IGB_TESTING, &adapter->state))
2532 return -EBUSY;
2533
Jesse Brandeburgb168dfc2009-04-17 20:44:32 +00002534 netif_carrier_off(netdev);
2535
Auke Kok9d5c8242008-01-24 02:22:38 -08002536 /* allocate transmit descriptors */
2537 err = igb_setup_all_tx_resources(adapter);
2538 if (err)
2539 goto err_setup_tx;
2540
2541 /* allocate receive descriptors */
2542 err = igb_setup_all_rx_resources(adapter);
2543 if (err)
2544 goto err_setup_rx;
2545
Nick Nunley88a268c2010-02-17 01:01:59 +00002546 igb_power_up_link(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08002547
Auke Kok9d5c8242008-01-24 02:22:38 -08002548 /* before we allocate an interrupt, we must be ready to handle it.
2549 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2550 * as soon as we call pci_request_irq, so we have to setup our
2551 * clean_rx handler before we do so. */
2552 igb_configure(adapter);
2553
2554 err = igb_request_irq(adapter);
2555 if (err)
2556 goto err_req_irq;
2557
2558 /* From here on the code is the same as igb_up() */
2559 clear_bit(__IGB_DOWN, &adapter->state);
2560
Alexander Duyck047e0032009-10-27 15:49:27 +00002561 for (i = 0; i < adapter->num_q_vectors; i++) {
2562 struct igb_q_vector *q_vector = adapter->q_vector[i];
2563 napi_enable(&q_vector->napi);
2564 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002565
2566 /* Clear any pending interrupts. */
2567 rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07002568
2569 igb_irq_enable(adapter);
2570
Alexander Duyckd4960302009-10-27 15:53:45 +00002571 /* notify VFs that reset has been completed */
2572 if (adapter->vfs_allocated_count) {
2573 u32 reg_data = rd32(E1000_CTRL_EXT);
2574 reg_data |= E1000_CTRL_EXT_PFRSTD;
2575 wr32(E1000_CTRL_EXT, reg_data);
2576 }
2577
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07002578 netif_tx_start_all_queues(netdev);
2579
Alexander Duyck25568a52009-10-27 23:49:59 +00002580 /* start the watchdog. */
2581 hw->mac.get_link_status = 1;
2582 schedule_work(&adapter->watchdog_task);
Auke Kok9d5c8242008-01-24 02:22:38 -08002583
2584 return 0;
2585
2586err_req_irq:
2587 igb_release_hw_control(adapter);
Nick Nunley88a268c2010-02-17 01:01:59 +00002588 igb_power_down_link(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08002589 igb_free_all_rx_resources(adapter);
2590err_setup_rx:
2591 igb_free_all_tx_resources(adapter);
2592err_setup_tx:
2593 igb_reset(adapter);
2594
2595 return err;
2596}
2597
2598/**
2599 * igb_close - Disables a network interface
2600 * @netdev: network interface device structure
2601 *
2602 * Returns 0, this is not allowed to fail
2603 *
2604 * The close entry point is called when an interface is de-activated
2605 * by the OS. The hardware is still under the driver's control, but
2606 * needs to be disabled. A global MAC reset is issued to stop the
2607 * hardware, and all transmit and receive resources are freed.
2608 **/
2609static int igb_close(struct net_device *netdev)
2610{
2611 struct igb_adapter *adapter = netdev_priv(netdev);
2612
2613 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2614 igb_down(adapter);
2615
2616 igb_free_irq(adapter);
2617
2618 igb_free_all_tx_resources(adapter);
2619 igb_free_all_rx_resources(adapter);
2620
Auke Kok9d5c8242008-01-24 02:22:38 -08002621 return 0;
2622}
2623
2624/**
2625 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
Auke Kok9d5c8242008-01-24 02:22:38 -08002626 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2627 *
2628 * Return 0 on success, negative on failure
2629 **/
Alexander Duyck80785292009-10-27 15:51:47 +00002630int igb_setup_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002631{
Alexander Duyck59d71982010-04-27 13:09:25 +00002632 struct device *dev = tx_ring->dev;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002633 int orig_node = dev_to_node(dev);
Auke Kok9d5c8242008-01-24 02:22:38 -08002634 int size;
2635
Alexander Duyck06034642011-08-26 07:44:22 +00002636 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002637 tx_ring->tx_buffer_info = vzalloc_node(size, tx_ring->numa_node);
2638 if (!tx_ring->tx_buffer_info)
2639 tx_ring->tx_buffer_info = vzalloc(size);
Alexander Duyck06034642011-08-26 07:44:22 +00002640 if (!tx_ring->tx_buffer_info)
Auke Kok9d5c8242008-01-24 02:22:38 -08002641 goto err;
Auke Kok9d5c8242008-01-24 02:22:38 -08002642
2643 /* round up to nearest 4K */
Alexander Duyck85e8d002009-02-16 00:00:20 -08002644 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
Auke Kok9d5c8242008-01-24 02:22:38 -08002645 tx_ring->size = ALIGN(tx_ring->size, 4096);
2646
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002647 set_dev_node(dev, tx_ring->numa_node);
Alexander Duyck59d71982010-04-27 13:09:25 +00002648 tx_ring->desc = dma_alloc_coherent(dev,
2649 tx_ring->size,
2650 &tx_ring->dma,
2651 GFP_KERNEL);
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002652 set_dev_node(dev, orig_node);
2653 if (!tx_ring->desc)
2654 tx_ring->desc = dma_alloc_coherent(dev,
2655 tx_ring->size,
2656 &tx_ring->dma,
2657 GFP_KERNEL);
Auke Kok9d5c8242008-01-24 02:22:38 -08002658
2659 if (!tx_ring->desc)
2660 goto err;
2661
Auke Kok9d5c8242008-01-24 02:22:38 -08002662 tx_ring->next_to_use = 0;
2663 tx_ring->next_to_clean = 0;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002664
Auke Kok9d5c8242008-01-24 02:22:38 -08002665 return 0;
2666
2667err:
Alexander Duyck06034642011-08-26 07:44:22 +00002668 vfree(tx_ring->tx_buffer_info);
Alexander Duyck59d71982010-04-27 13:09:25 +00002669 dev_err(dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002670 "Unable to allocate memory for the transmit descriptor ring\n");
2671 return -ENOMEM;
2672}
2673
2674/**
2675 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2676 * (Descriptors) for all queues
2677 * @adapter: board private structure
2678 *
2679 * Return 0 on success, negative on failure
2680 **/
2681static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2682{
Alexander Duyck439705e2009-10-27 23:49:20 +00002683 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002684 int i, err = 0;
2685
2686 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck3025a442010-02-17 01:02:39 +00002687 err = igb_setup_tx_resources(adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002688 if (err) {
Alexander Duyck439705e2009-10-27 23:49:20 +00002689 dev_err(&pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002690 "Allocation for Tx Queue %u failed\n", i);
2691 for (i--; i >= 0; i--)
Alexander Duyck3025a442010-02-17 01:02:39 +00002692 igb_free_tx_resources(adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002693 break;
2694 }
2695 }
2696
2697 return err;
2698}
2699
2700/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00002701 * igb_setup_tctl - configure the transmit control registers
2702 * @adapter: Board private structure
Auke Kok9d5c8242008-01-24 02:22:38 -08002703 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002704void igb_setup_tctl(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002705{
Auke Kok9d5c8242008-01-24 02:22:38 -08002706 struct e1000_hw *hw = &adapter->hw;
2707 u32 tctl;
Auke Kok9d5c8242008-01-24 02:22:38 -08002708
Alexander Duyck85b430b2009-10-27 15:50:29 +00002709 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2710 wr32(E1000_TXDCTL(0), 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08002711
2712 /* Program the Transmit Control Register */
Auke Kok9d5c8242008-01-24 02:22:38 -08002713 tctl = rd32(E1000_TCTL);
2714 tctl &= ~E1000_TCTL_CT;
2715 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2716 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2717
2718 igb_config_collision_dist(hw);
2719
Auke Kok9d5c8242008-01-24 02:22:38 -08002720 /* Enable transmits */
2721 tctl |= E1000_TCTL_EN;
2722
2723 wr32(E1000_TCTL, tctl);
2724}
2725
2726/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00002727 * igb_configure_tx_ring - Configure transmit ring after Reset
2728 * @adapter: board private structure
2729 * @ring: tx ring to configure
2730 *
2731 * Configure a transmit ring after a reset.
2732 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002733void igb_configure_tx_ring(struct igb_adapter *adapter,
2734 struct igb_ring *ring)
Alexander Duyck85b430b2009-10-27 15:50:29 +00002735{
2736 struct e1000_hw *hw = &adapter->hw;
Alexander Duycka74420e2011-08-26 07:43:27 +00002737 u32 txdctl = 0;
Alexander Duyck85b430b2009-10-27 15:50:29 +00002738 u64 tdba = ring->dma;
2739 int reg_idx = ring->reg_idx;
2740
2741 /* disable the queue */
Alexander Duycka74420e2011-08-26 07:43:27 +00002742 wr32(E1000_TXDCTL(reg_idx), 0);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002743 wrfl();
2744 mdelay(10);
2745
2746 wr32(E1000_TDLEN(reg_idx),
2747 ring->count * sizeof(union e1000_adv_tx_desc));
2748 wr32(E1000_TDBAL(reg_idx),
2749 tdba & 0x00000000ffffffffULL);
2750 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2751
Alexander Duyckfce99e32009-10-27 15:51:27 +00002752 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
Alexander Duycka74420e2011-08-26 07:43:27 +00002753 wr32(E1000_TDH(reg_idx), 0);
Alexander Duyckfce99e32009-10-27 15:51:27 +00002754 writel(0, ring->tail);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002755
2756 txdctl |= IGB_TX_PTHRESH;
2757 txdctl |= IGB_TX_HTHRESH << 8;
2758 txdctl |= IGB_TX_WTHRESH << 16;
2759
2760 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
2761 wr32(E1000_TXDCTL(reg_idx), txdctl);
2762}
2763
2764/**
2765 * igb_configure_tx - Configure transmit Unit after Reset
2766 * @adapter: board private structure
2767 *
2768 * Configure the Tx unit of the MAC after a reset.
2769 **/
2770static void igb_configure_tx(struct igb_adapter *adapter)
2771{
2772 int i;
2773
2774 for (i = 0; i < adapter->num_tx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00002775 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002776}
2777
2778/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002779 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
Auke Kok9d5c8242008-01-24 02:22:38 -08002780 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2781 *
2782 * Returns 0 on success, negative on failure
2783 **/
Alexander Duyck80785292009-10-27 15:51:47 +00002784int igb_setup_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002785{
Alexander Duyck59d71982010-04-27 13:09:25 +00002786 struct device *dev = rx_ring->dev;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002787 int orig_node = dev_to_node(dev);
Auke Kok9d5c8242008-01-24 02:22:38 -08002788 int size, desc_len;
2789
Alexander Duyck06034642011-08-26 07:44:22 +00002790 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002791 rx_ring->rx_buffer_info = vzalloc_node(size, rx_ring->numa_node);
2792 if (!rx_ring->rx_buffer_info)
2793 rx_ring->rx_buffer_info = vzalloc(size);
Alexander Duyck06034642011-08-26 07:44:22 +00002794 if (!rx_ring->rx_buffer_info)
Auke Kok9d5c8242008-01-24 02:22:38 -08002795 goto err;
Auke Kok9d5c8242008-01-24 02:22:38 -08002796
2797 desc_len = sizeof(union e1000_adv_rx_desc);
2798
2799 /* Round up to nearest 4K */
2800 rx_ring->size = rx_ring->count * desc_len;
2801 rx_ring->size = ALIGN(rx_ring->size, 4096);
2802
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002803 set_dev_node(dev, rx_ring->numa_node);
Alexander Duyck59d71982010-04-27 13:09:25 +00002804 rx_ring->desc = dma_alloc_coherent(dev,
2805 rx_ring->size,
2806 &rx_ring->dma,
2807 GFP_KERNEL);
Alexander Duyck81c2fc22011-08-26 07:45:20 +00002808 set_dev_node(dev, orig_node);
2809 if (!rx_ring->desc)
2810 rx_ring->desc = dma_alloc_coherent(dev,
2811 rx_ring->size,
2812 &rx_ring->dma,
2813 GFP_KERNEL);
Auke Kok9d5c8242008-01-24 02:22:38 -08002814
2815 if (!rx_ring->desc)
2816 goto err;
2817
2818 rx_ring->next_to_clean = 0;
2819 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002820
Auke Kok9d5c8242008-01-24 02:22:38 -08002821 return 0;
2822
2823err:
Alexander Duyck06034642011-08-26 07:44:22 +00002824 vfree(rx_ring->rx_buffer_info);
2825 rx_ring->rx_buffer_info = NULL;
Alexander Duyck59d71982010-04-27 13:09:25 +00002826 dev_err(dev, "Unable to allocate memory for the receive descriptor"
2827 " ring\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08002828 return -ENOMEM;
2829}
2830
2831/**
2832 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2833 * (Descriptors) for all queues
2834 * @adapter: board private structure
2835 *
2836 * Return 0 on success, negative on failure
2837 **/
2838static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
2839{
Alexander Duyck439705e2009-10-27 23:49:20 +00002840 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002841 int i, err = 0;
2842
2843 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyck3025a442010-02-17 01:02:39 +00002844 err = igb_setup_rx_resources(adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002845 if (err) {
Alexander Duyck439705e2009-10-27 23:49:20 +00002846 dev_err(&pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002847 "Allocation for Rx Queue %u failed\n", i);
2848 for (i--; i >= 0; i--)
Alexander Duyck3025a442010-02-17 01:02:39 +00002849 igb_free_rx_resources(adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002850 break;
2851 }
2852 }
2853
2854 return err;
2855}
2856
2857/**
Alexander Duyck06cf2662009-10-27 15:53:25 +00002858 * igb_setup_mrqc - configure the multiple receive queue control registers
2859 * @adapter: Board private structure
2860 **/
2861static void igb_setup_mrqc(struct igb_adapter *adapter)
2862{
2863 struct e1000_hw *hw = &adapter->hw;
2864 u32 mrqc, rxcsum;
2865 u32 j, num_rx_queues, shift = 0, shift2 = 0;
2866 union e1000_reta {
2867 u32 dword;
2868 u8 bytes[4];
2869 } reta;
2870 static const u8 rsshash[40] = {
2871 0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 0x41, 0x67,
2872 0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0, 0xd0, 0xca, 0x2b, 0xcb,
2873 0xae, 0x7b, 0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30,
2874 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa };
2875
2876 /* Fill out hash function seeds */
2877 for (j = 0; j < 10; j++) {
2878 u32 rsskey = rsshash[(j * 4)];
2879 rsskey |= rsshash[(j * 4) + 1] << 8;
2880 rsskey |= rsshash[(j * 4) + 2] << 16;
2881 rsskey |= rsshash[(j * 4) + 3] << 24;
2882 array_wr32(E1000_RSSRK(0), j, rsskey);
2883 }
2884
Alexander Duycka99955f2009-11-12 18:37:19 +00002885 num_rx_queues = adapter->rss_queues;
Alexander Duyck06cf2662009-10-27 15:53:25 +00002886
2887 if (adapter->vfs_allocated_count) {
2888 /* 82575 and 82576 supports 2 RSS queues for VMDq */
2889 switch (hw->mac.type) {
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +00002890 case e1000_i350:
Alexander Duyck55cac242009-11-19 12:42:21 +00002891 case e1000_82580:
2892 num_rx_queues = 1;
2893 shift = 0;
2894 break;
Alexander Duyck06cf2662009-10-27 15:53:25 +00002895 case e1000_82576:
2896 shift = 3;
2897 num_rx_queues = 2;
2898 break;
2899 case e1000_82575:
2900 shift = 2;
2901 shift2 = 6;
2902 default:
2903 break;
2904 }
2905 } else {
2906 if (hw->mac.type == e1000_82575)
2907 shift = 6;
2908 }
2909
2910 for (j = 0; j < (32 * 4); j++) {
2911 reta.bytes[j & 3] = (j % num_rx_queues) << shift;
2912 if (shift2)
2913 reta.bytes[j & 3] |= num_rx_queues << shift2;
2914 if ((j & 3) == 3)
2915 wr32(E1000_RETA(j >> 2), reta.dword);
2916 }
2917
2918 /*
2919 * Disable raw packet checksumming so that RSS hash is placed in
2920 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
2921 * offloads as they are enabled by default
2922 */
2923 rxcsum = rd32(E1000_RXCSUM);
2924 rxcsum |= E1000_RXCSUM_PCSD;
2925
2926 if (adapter->hw.mac.type >= e1000_82576)
2927 /* Enable Receive Checksum Offload for SCTP */
2928 rxcsum |= E1000_RXCSUM_CRCOFL;
2929
2930 /* Don't need to set TUOFL or IPOFL, they default to 1 */
2931 wr32(E1000_RXCSUM, rxcsum);
2932
2933 /* If VMDq is enabled then we set the appropriate mode for that, else
2934 * we default to RSS so that an RSS hash is calculated per packet even
2935 * if we are only using one queue */
2936 if (adapter->vfs_allocated_count) {
2937 if (hw->mac.type > e1000_82575) {
2938 /* Set the default pool for the PF's first queue */
2939 u32 vtctl = rd32(E1000_VT_CTL);
2940 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
2941 E1000_VT_CTL_DISABLE_DEF_POOL);
2942 vtctl |= adapter->vfs_allocated_count <<
2943 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
2944 wr32(E1000_VT_CTL, vtctl);
2945 }
Alexander Duycka99955f2009-11-12 18:37:19 +00002946 if (adapter->rss_queues > 1)
Alexander Duyck06cf2662009-10-27 15:53:25 +00002947 mrqc = E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
2948 else
2949 mrqc = E1000_MRQC_ENABLE_VMDQ;
2950 } else {
2951 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
2952 }
2953 igb_vmm_control(adapter);
2954
Alexander Duyck4478a9c2010-07-01 20:01:05 +00002955 /*
2956 * Generate RSS hash based on TCP port numbers and/or
2957 * IPv4/v6 src and dst addresses since UDP cannot be
2958 * hashed reliably due to IP fragmentation
2959 */
2960 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2961 E1000_MRQC_RSS_FIELD_IPV4_TCP |
2962 E1000_MRQC_RSS_FIELD_IPV6 |
2963 E1000_MRQC_RSS_FIELD_IPV6_TCP |
2964 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
Alexander Duyck06cf2662009-10-27 15:53:25 +00002965
2966 wr32(E1000_MRQC, mrqc);
2967}
2968
2969/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002970 * igb_setup_rctl - configure the receive control registers
2971 * @adapter: Board private structure
2972 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002973void igb_setup_rctl(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002974{
2975 struct e1000_hw *hw = &adapter->hw;
2976 u32 rctl;
Auke Kok9d5c8242008-01-24 02:22:38 -08002977
2978 rctl = rd32(E1000_RCTL);
2979
2980 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
Alexander Duyck69d728b2008-11-25 01:04:03 -08002981 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
Auke Kok9d5c8242008-01-24 02:22:38 -08002982
Alexander Duyck69d728b2008-11-25 01:04:03 -08002983 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
Alexander Duyck28b07592009-02-06 23:20:31 +00002984 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
Auke Kok9d5c8242008-01-24 02:22:38 -08002985
Auke Kok87cb7e82008-07-08 15:08:29 -07002986 /*
2987 * enable stripping of CRC. It's unlikely this will break BMC
2988 * redirection as it did with e1000. Newer features require
2989 * that the HW strips the CRC.
Alexander Duyck73cd78f2009-02-12 18:16:59 +00002990 */
Auke Kok87cb7e82008-07-08 15:08:29 -07002991 rctl |= E1000_RCTL_SECRC;
Auke Kok9d5c8242008-01-24 02:22:38 -08002992
Alexander Duyck559e9c42009-10-27 23:52:50 +00002993 /* disable store bad packets and clear size bits. */
Alexander Duyckec54d7d2009-01-31 00:52:57 -08002994 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
Auke Kok9d5c8242008-01-24 02:22:38 -08002995
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00002996 /* enable LPE to prevent packets larger than max_frame_size */
2997 rctl |= E1000_RCTL_LPE;
Auke Kok9d5c8242008-01-24 02:22:38 -08002998
Alexander Duyck952f72a2009-10-27 15:51:07 +00002999 /* disable queue 0 to prevent tail write w/o re-config */
3000 wr32(E1000_RXDCTL(0), 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08003001
Alexander Duycke1739522009-02-19 20:39:44 -08003002 /* Attention!!! For SR-IOV PF driver operations you must enable
3003 * queue drop for all VF and PF queues to prevent head of line blocking
3004 * if an un-trusted VF does not provide descriptors to hardware.
3005 */
3006 if (adapter->vfs_allocated_count) {
Alexander Duycke1739522009-02-19 20:39:44 -08003007 /* set all queue drop enable bits */
3008 wr32(E1000_QDE, ALL_QUEUES);
Alexander Duycke1739522009-02-19 20:39:44 -08003009 }
3010
Auke Kok9d5c8242008-01-24 02:22:38 -08003011 wr32(E1000_RCTL, rctl);
3012}
3013
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003014static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3015 int vfn)
3016{
3017 struct e1000_hw *hw = &adapter->hw;
3018 u32 vmolr;
3019
3020 /* if it isn't the PF check to see if VFs are enabled and
3021 * increase the size to support vlan tags */
3022 if (vfn < adapter->vfs_allocated_count &&
3023 adapter->vf_data[vfn].vlans_enabled)
3024 size += VLAN_TAG_SIZE;
3025
3026 vmolr = rd32(E1000_VMOLR(vfn));
3027 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3028 vmolr |= size | E1000_VMOLR_LPE;
3029 wr32(E1000_VMOLR(vfn), vmolr);
3030
3031 return 0;
3032}
3033
Auke Kok9d5c8242008-01-24 02:22:38 -08003034/**
Alexander Duycke1739522009-02-19 20:39:44 -08003035 * igb_rlpml_set - set maximum receive packet size
3036 * @adapter: board private structure
3037 *
3038 * Configure maximum receivable packet size.
3039 **/
3040static void igb_rlpml_set(struct igb_adapter *adapter)
3041{
Alexander Duyck153285f2011-08-26 07:43:32 +00003042 u32 max_frame_size = adapter->max_frame_size;
Alexander Duycke1739522009-02-19 20:39:44 -08003043 struct e1000_hw *hw = &adapter->hw;
3044 u16 pf_id = adapter->vfs_allocated_count;
3045
Alexander Duycke1739522009-02-19 20:39:44 -08003046 if (pf_id) {
3047 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
Alexander Duyck153285f2011-08-26 07:43:32 +00003048 /*
3049 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3050 * to our max jumbo frame size, in case we need to enable
3051 * jumbo frames on one of the rings later.
3052 * This will not pass over-length frames into the default
3053 * queue because it's gated by the VMOLR.RLPML.
3054 */
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003055 max_frame_size = MAX_JUMBO_FRAME_SIZE;
Alexander Duycke1739522009-02-19 20:39:44 -08003056 }
3057
3058 wr32(E1000_RLPML, max_frame_size);
3059}
3060
Williams, Mitch A8151d292010-02-10 01:44:24 +00003061static inline void igb_set_vmolr(struct igb_adapter *adapter,
3062 int vfn, bool aupe)
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003063{
3064 struct e1000_hw *hw = &adapter->hw;
3065 u32 vmolr;
3066
3067 /*
3068 * This register exists only on 82576 and newer so if we are older then
3069 * we should exit and do nothing
3070 */
3071 if (hw->mac.type < e1000_82576)
3072 return;
3073
3074 vmolr = rd32(E1000_VMOLR(vfn));
Williams, Mitch A8151d292010-02-10 01:44:24 +00003075 vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3076 if (aupe)
3077 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3078 else
3079 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003080
3081 /* clear all bits that might not be set */
3082 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3083
Alexander Duycka99955f2009-11-12 18:37:19 +00003084 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003085 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3086 /*
3087 * for VMDq only allow the VFs and pool 0 to accept broadcast and
3088 * multicast packets
3089 */
3090 if (vfn <= adapter->vfs_allocated_count)
3091 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3092
3093 wr32(E1000_VMOLR(vfn), vmolr);
3094}
3095
Alexander Duycke1739522009-02-19 20:39:44 -08003096/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00003097 * igb_configure_rx_ring - Configure a receive ring after Reset
3098 * @adapter: board private structure
3099 * @ring: receive ring to be configured
3100 *
3101 * Configure the Rx unit of the MAC after a reset.
3102 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00003103void igb_configure_rx_ring(struct igb_adapter *adapter,
3104 struct igb_ring *ring)
Alexander Duyck85b430b2009-10-27 15:50:29 +00003105{
3106 struct e1000_hw *hw = &adapter->hw;
3107 u64 rdba = ring->dma;
3108 int reg_idx = ring->reg_idx;
Alexander Duycka74420e2011-08-26 07:43:27 +00003109 u32 srrctl = 0, rxdctl = 0;
Alexander Duyck85b430b2009-10-27 15:50:29 +00003110
3111 /* disable the queue */
Alexander Duycka74420e2011-08-26 07:43:27 +00003112 wr32(E1000_RXDCTL(reg_idx), 0);
Alexander Duyck85b430b2009-10-27 15:50:29 +00003113
3114 /* Set DMA base address registers */
3115 wr32(E1000_RDBAL(reg_idx),
3116 rdba & 0x00000000ffffffffULL);
3117 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3118 wr32(E1000_RDLEN(reg_idx),
3119 ring->count * sizeof(union e1000_adv_rx_desc));
3120
3121 /* initialize head and tail */
Alexander Duyckfce99e32009-10-27 15:51:27 +00003122 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
Alexander Duycka74420e2011-08-26 07:43:27 +00003123 wr32(E1000_RDH(reg_idx), 0);
Alexander Duyckfce99e32009-10-27 15:51:27 +00003124 writel(0, ring->tail);
Alexander Duyck85b430b2009-10-27 15:50:29 +00003125
Alexander Duyck952f72a2009-10-27 15:51:07 +00003126 /* set descriptor configuration */
Alexander Duyck44390ca2011-08-26 07:43:38 +00003127 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
Alexander Duyck952f72a2009-10-27 15:51:07 +00003128#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
Alexander Duyck44390ca2011-08-26 07:43:38 +00003129 srrctl |= IGB_RXBUFFER_16384 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
Alexander Duyck952f72a2009-10-27 15:51:07 +00003130#else
Alexander Duyck44390ca2011-08-26 07:43:38 +00003131 srrctl |= (PAGE_SIZE / 2) >> E1000_SRRCTL_BSIZEPKT_SHIFT;
Alexander Duyck952f72a2009-10-27 15:51:07 +00003132#endif
Alexander Duyck44390ca2011-08-26 07:43:38 +00003133 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
Nick Nunley757b77e2010-03-26 11:36:47 +00003134 if (hw->mac.type == e1000_82580)
3135 srrctl |= E1000_SRRCTL_TIMESTAMP;
Nick Nunleye6bdb6f2010-02-17 01:03:38 +00003136 /* Only set Drop Enable if we are supporting multiple queues */
3137 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3138 srrctl |= E1000_SRRCTL_DROP_EN;
Alexander Duyck952f72a2009-10-27 15:51:07 +00003139
3140 wr32(E1000_SRRCTL(reg_idx), srrctl);
3141
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003142 /* set filtering for VMDQ pools */
Williams, Mitch A8151d292010-02-10 01:44:24 +00003143 igb_set_vmolr(adapter, reg_idx & 0x7, true);
Alexander Duyck7d5753f2009-10-27 23:47:16 +00003144
Alexander Duyck85b430b2009-10-27 15:50:29 +00003145 rxdctl |= IGB_RX_PTHRESH;
3146 rxdctl |= IGB_RX_HTHRESH << 8;
3147 rxdctl |= IGB_RX_WTHRESH << 16;
Alexander Duycka74420e2011-08-26 07:43:27 +00003148
3149 /* enable receive descriptor fetching */
3150 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
Alexander Duyck85b430b2009-10-27 15:50:29 +00003151 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3152}
3153
3154/**
Auke Kok9d5c8242008-01-24 02:22:38 -08003155 * igb_configure_rx - Configure receive Unit after Reset
3156 * @adapter: board private structure
3157 *
3158 * Configure the Rx unit of the MAC after a reset.
3159 **/
3160static void igb_configure_rx(struct igb_adapter *adapter)
3161{
Hannes Eder91075842009-02-18 19:36:04 -08003162 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003163
Alexander Duyck68d480c2009-10-05 06:33:08 +00003164 /* set UTA to appropriate mode */
3165 igb_set_uta(adapter);
3166
Alexander Duyck26ad9172009-10-05 06:32:49 +00003167 /* set the correct pool for the PF default MAC address in entry 0 */
3168 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3169 adapter->vfs_allocated_count);
3170
Alexander Duyck06cf2662009-10-27 15:53:25 +00003171 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3172 * the Base and Length of the Rx Descriptor Ring */
3173 for (i = 0; i < adapter->num_rx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00003174 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003175}
3176
3177/**
3178 * igb_free_tx_resources - Free Tx Resources per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08003179 * @tx_ring: Tx descriptor ring for a specific queue
3180 *
3181 * Free all transmit software resources
3182 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08003183void igb_free_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003184{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003185 igb_clean_tx_ring(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003186
Alexander Duyck06034642011-08-26 07:44:22 +00003187 vfree(tx_ring->tx_buffer_info);
3188 tx_ring->tx_buffer_info = NULL;
Auke Kok9d5c8242008-01-24 02:22:38 -08003189
Alexander Duyck439705e2009-10-27 23:49:20 +00003190 /* if not set, then don't free */
3191 if (!tx_ring->desc)
3192 return;
3193
Alexander Duyck59d71982010-04-27 13:09:25 +00003194 dma_free_coherent(tx_ring->dev, tx_ring->size,
3195 tx_ring->desc, tx_ring->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08003196
3197 tx_ring->desc = NULL;
3198}
3199
3200/**
3201 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3202 * @adapter: board private structure
3203 *
3204 * Free all transmit software resources
3205 **/
3206static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3207{
3208 int i;
3209
3210 for (i = 0; i < adapter->num_tx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00003211 igb_free_tx_resources(adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003212}
3213
Alexander Duyckebe42d12011-08-26 07:45:09 +00003214void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3215 struct igb_tx_buffer *tx_buffer)
Auke Kok9d5c8242008-01-24 02:22:38 -08003216{
Alexander Duyckebe42d12011-08-26 07:45:09 +00003217 if (tx_buffer->skb) {
3218 dev_kfree_skb_any(tx_buffer->skb);
3219 if (tx_buffer->dma)
3220 dma_unmap_single(ring->dev,
3221 tx_buffer->dma,
3222 tx_buffer->length,
3223 DMA_TO_DEVICE);
3224 } else if (tx_buffer->dma) {
3225 dma_unmap_page(ring->dev,
3226 tx_buffer->dma,
3227 tx_buffer->length,
3228 DMA_TO_DEVICE);
Alexander Duyck6366ad32009-12-02 16:47:18 +00003229 }
Alexander Duyckebe42d12011-08-26 07:45:09 +00003230 tx_buffer->next_to_watch = NULL;
3231 tx_buffer->skb = NULL;
3232 tx_buffer->dma = 0;
3233 /* buffer_info must be completely set up in the transmit path */
Auke Kok9d5c8242008-01-24 02:22:38 -08003234}
3235
3236/**
3237 * igb_clean_tx_ring - Free Tx Buffers
Auke Kok9d5c8242008-01-24 02:22:38 -08003238 * @tx_ring: ring to be cleaned
3239 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003240static void igb_clean_tx_ring(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003241{
Alexander Duyck06034642011-08-26 07:44:22 +00003242 struct igb_tx_buffer *buffer_info;
Auke Kok9d5c8242008-01-24 02:22:38 -08003243 unsigned long size;
Alexander Duyck6ad4edf2011-08-26 07:45:26 +00003244 u16 i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003245
Alexander Duyck06034642011-08-26 07:44:22 +00003246 if (!tx_ring->tx_buffer_info)
Auke Kok9d5c8242008-01-24 02:22:38 -08003247 return;
3248 /* Free all the Tx ring sk_buffs */
3249
3250 for (i = 0; i < tx_ring->count; i++) {
Alexander Duyck06034642011-08-26 07:44:22 +00003251 buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck80785292009-10-27 15:51:47 +00003252 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
Auke Kok9d5c8242008-01-24 02:22:38 -08003253 }
3254
Alexander Duyck06034642011-08-26 07:44:22 +00003255 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3256 memset(tx_ring->tx_buffer_info, 0, size);
Auke Kok9d5c8242008-01-24 02:22:38 -08003257
3258 /* Zero out the descriptor ring */
Auke Kok9d5c8242008-01-24 02:22:38 -08003259 memset(tx_ring->desc, 0, tx_ring->size);
3260
3261 tx_ring->next_to_use = 0;
3262 tx_ring->next_to_clean = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003263}
3264
3265/**
3266 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3267 * @adapter: board private structure
3268 **/
3269static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3270{
3271 int i;
3272
3273 for (i = 0; i < adapter->num_tx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00003274 igb_clean_tx_ring(adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003275}
3276
3277/**
3278 * igb_free_rx_resources - Free Rx Resources
Auke Kok9d5c8242008-01-24 02:22:38 -08003279 * @rx_ring: ring to clean the resources from
3280 *
3281 * Free all receive software resources
3282 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08003283void igb_free_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003284{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003285 igb_clean_rx_ring(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003286
Alexander Duyck06034642011-08-26 07:44:22 +00003287 vfree(rx_ring->rx_buffer_info);
3288 rx_ring->rx_buffer_info = NULL;
Auke Kok9d5c8242008-01-24 02:22:38 -08003289
Alexander Duyck439705e2009-10-27 23:49:20 +00003290 /* if not set, then don't free */
3291 if (!rx_ring->desc)
3292 return;
3293
Alexander Duyck59d71982010-04-27 13:09:25 +00003294 dma_free_coherent(rx_ring->dev, rx_ring->size,
3295 rx_ring->desc, rx_ring->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08003296
3297 rx_ring->desc = NULL;
3298}
3299
3300/**
3301 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3302 * @adapter: board private structure
3303 *
3304 * Free all receive software resources
3305 **/
3306static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3307{
3308 int i;
3309
3310 for (i = 0; i < adapter->num_rx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00003311 igb_free_rx_resources(adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003312}
3313
3314/**
3315 * igb_clean_rx_ring - Free Rx Buffers per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08003316 * @rx_ring: ring to free buffers from
3317 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003318static void igb_clean_rx_ring(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003319{
Auke Kok9d5c8242008-01-24 02:22:38 -08003320 unsigned long size;
Alexander Duyckc023cd82011-08-26 07:43:43 +00003321 u16 i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003322
Alexander Duyck06034642011-08-26 07:44:22 +00003323 if (!rx_ring->rx_buffer_info)
Auke Kok9d5c8242008-01-24 02:22:38 -08003324 return;
Alexander Duyck439705e2009-10-27 23:49:20 +00003325
Auke Kok9d5c8242008-01-24 02:22:38 -08003326 /* Free all the Rx ring sk_buffs */
3327 for (i = 0; i < rx_ring->count; i++) {
Alexander Duyck06034642011-08-26 07:44:22 +00003328 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9d5c8242008-01-24 02:22:38 -08003329 if (buffer_info->dma) {
Alexander Duyck59d71982010-04-27 13:09:25 +00003330 dma_unmap_single(rx_ring->dev,
Alexander Duyck80785292009-10-27 15:51:47 +00003331 buffer_info->dma,
Alexander Duyck44390ca2011-08-26 07:43:38 +00003332 IGB_RX_HDR_LEN,
Alexander Duyck59d71982010-04-27 13:09:25 +00003333 DMA_FROM_DEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08003334 buffer_info->dma = 0;
3335 }
3336
3337 if (buffer_info->skb) {
3338 dev_kfree_skb(buffer_info->skb);
3339 buffer_info->skb = NULL;
3340 }
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00003341 if (buffer_info->page_dma) {
Alexander Duyck59d71982010-04-27 13:09:25 +00003342 dma_unmap_page(rx_ring->dev,
Alexander Duyck80785292009-10-27 15:51:47 +00003343 buffer_info->page_dma,
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00003344 PAGE_SIZE / 2,
Alexander Duyck59d71982010-04-27 13:09:25 +00003345 DMA_FROM_DEVICE);
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00003346 buffer_info->page_dma = 0;
3347 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003348 if (buffer_info->page) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003349 put_page(buffer_info->page);
3350 buffer_info->page = NULL;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003351 buffer_info->page_offset = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003352 }
3353 }
3354
Alexander Duyck06034642011-08-26 07:44:22 +00003355 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3356 memset(rx_ring->rx_buffer_info, 0, size);
Auke Kok9d5c8242008-01-24 02:22:38 -08003357
3358 /* Zero out the descriptor ring */
3359 memset(rx_ring->desc, 0, rx_ring->size);
3360
3361 rx_ring->next_to_clean = 0;
3362 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003363}
3364
3365/**
3366 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3367 * @adapter: board private structure
3368 **/
3369static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3370{
3371 int i;
3372
3373 for (i = 0; i < adapter->num_rx_queues; i++)
Alexander Duyck3025a442010-02-17 01:02:39 +00003374 igb_clean_rx_ring(adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003375}
3376
3377/**
3378 * igb_set_mac - Change the Ethernet Address of the NIC
3379 * @netdev: network interface device structure
3380 * @p: pointer to an address structure
3381 *
3382 * Returns 0 on success, negative on failure
3383 **/
3384static int igb_set_mac(struct net_device *netdev, void *p)
3385{
3386 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck28b07592009-02-06 23:20:31 +00003387 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08003388 struct sockaddr *addr = p;
3389
3390 if (!is_valid_ether_addr(addr->sa_data))
3391 return -EADDRNOTAVAIL;
3392
3393 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Alexander Duyck28b07592009-02-06 23:20:31 +00003394 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9d5c8242008-01-24 02:22:38 -08003395
Alexander Duyck26ad9172009-10-05 06:32:49 +00003396 /* set the correct pool for the new PF MAC address in entry 0 */
3397 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3398 adapter->vfs_allocated_count);
Alexander Duycke1739522009-02-19 20:39:44 -08003399
Auke Kok9d5c8242008-01-24 02:22:38 -08003400 return 0;
3401}
3402
3403/**
Alexander Duyck68d480c2009-10-05 06:33:08 +00003404 * igb_write_mc_addr_list - write multicast addresses to MTA
3405 * @netdev: network interface device structure
3406 *
3407 * Writes multicast address list to the MTA hash table.
3408 * Returns: -ENOMEM on failure
3409 * 0 on no addresses written
3410 * X on writing X addresses to MTA
3411 **/
3412static int igb_write_mc_addr_list(struct net_device *netdev)
3413{
3414 struct igb_adapter *adapter = netdev_priv(netdev);
3415 struct e1000_hw *hw = &adapter->hw;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003416 struct netdev_hw_addr *ha;
Alexander Duyck68d480c2009-10-05 06:33:08 +00003417 u8 *mta_list;
Alexander Duyck68d480c2009-10-05 06:33:08 +00003418 int i;
3419
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003420 if (netdev_mc_empty(netdev)) {
Alexander Duyck68d480c2009-10-05 06:33:08 +00003421 /* nothing to program, so clear mc list */
3422 igb_update_mc_addr_list(hw, NULL, 0);
3423 igb_restore_vf_multicasts(adapter);
3424 return 0;
3425 }
3426
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003427 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
Alexander Duyck68d480c2009-10-05 06:33:08 +00003428 if (!mta_list)
3429 return -ENOMEM;
3430
Alexander Duyck68d480c2009-10-05 06:33:08 +00003431 /* The shared function expects a packed array of only addresses. */
Jiri Pirko48e2f182010-02-22 09:22:26 +00003432 i = 0;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003433 netdev_for_each_mc_addr(ha, netdev)
3434 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
Alexander Duyck68d480c2009-10-05 06:33:08 +00003435
Alexander Duyck68d480c2009-10-05 06:33:08 +00003436 igb_update_mc_addr_list(hw, mta_list, i);
3437 kfree(mta_list);
3438
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003439 return netdev_mc_count(netdev);
Alexander Duyck68d480c2009-10-05 06:33:08 +00003440}
3441
3442/**
3443 * igb_write_uc_addr_list - write unicast addresses to RAR table
3444 * @netdev: network interface device structure
3445 *
3446 * Writes unicast address list to the RAR table.
3447 * Returns: -ENOMEM on failure/insufficient address space
3448 * 0 on no addresses written
3449 * X on writing X addresses to the RAR table
3450 **/
3451static int igb_write_uc_addr_list(struct net_device *netdev)
3452{
3453 struct igb_adapter *adapter = netdev_priv(netdev);
3454 struct e1000_hw *hw = &adapter->hw;
3455 unsigned int vfn = adapter->vfs_allocated_count;
3456 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3457 int count = 0;
3458
3459 /* return ENOMEM indicating insufficient memory for addresses */
Jiri Pirko32e7bfc2010-01-25 13:36:10 -08003460 if (netdev_uc_count(netdev) > rar_entries)
Alexander Duyck68d480c2009-10-05 06:33:08 +00003461 return -ENOMEM;
3462
Jiri Pirko32e7bfc2010-01-25 13:36:10 -08003463 if (!netdev_uc_empty(netdev) && rar_entries) {
Alexander Duyck68d480c2009-10-05 06:33:08 +00003464 struct netdev_hw_addr *ha;
Jiri Pirko32e7bfc2010-01-25 13:36:10 -08003465
3466 netdev_for_each_uc_addr(ha, netdev) {
Alexander Duyck68d480c2009-10-05 06:33:08 +00003467 if (!rar_entries)
3468 break;
3469 igb_rar_set_qsel(adapter, ha->addr,
3470 rar_entries--,
3471 vfn);
3472 count++;
3473 }
3474 }
3475 /* write the addresses in reverse order to avoid write combining */
3476 for (; rar_entries > 0 ; rar_entries--) {
3477 wr32(E1000_RAH(rar_entries), 0);
3478 wr32(E1000_RAL(rar_entries), 0);
3479 }
3480 wrfl();
3481
3482 return count;
3483}
3484
3485/**
Alexander Duyckff41f8d2009-09-03 14:48:56 +00003486 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
Auke Kok9d5c8242008-01-24 02:22:38 -08003487 * @netdev: network interface device structure
3488 *
Alexander Duyckff41f8d2009-09-03 14:48:56 +00003489 * The set_rx_mode entry point is called whenever the unicast or multicast
3490 * address lists or the network interface flags are updated. This routine is
3491 * responsible for configuring the hardware for proper unicast, multicast,
Auke Kok9d5c8242008-01-24 02:22:38 -08003492 * promiscuous mode, and all-multi behavior.
3493 **/
Alexander Duyckff41f8d2009-09-03 14:48:56 +00003494static void igb_set_rx_mode(struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08003495{
3496 struct igb_adapter *adapter = netdev_priv(netdev);
3497 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck68d480c2009-10-05 06:33:08 +00003498 unsigned int vfn = adapter->vfs_allocated_count;
3499 u32 rctl, vmolr = 0;
3500 int count;
Auke Kok9d5c8242008-01-24 02:22:38 -08003501
3502 /* Check for Promiscuous and All Multicast modes */
Auke Kok9d5c8242008-01-24 02:22:38 -08003503 rctl = rd32(E1000_RCTL);
3504
Alexander Duyck68d480c2009-10-05 06:33:08 +00003505 /* clear the effected bits */
3506 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3507
Patrick McHardy746b9f02008-07-16 20:15:45 -07003508 if (netdev->flags & IFF_PROMISC) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003509 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
Alexander Duyck68d480c2009-10-05 06:33:08 +00003510 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
Patrick McHardy746b9f02008-07-16 20:15:45 -07003511 } else {
Alexander Duyck68d480c2009-10-05 06:33:08 +00003512 if (netdev->flags & IFF_ALLMULTI) {
Patrick McHardy746b9f02008-07-16 20:15:45 -07003513 rctl |= E1000_RCTL_MPE;
Alexander Duyck68d480c2009-10-05 06:33:08 +00003514 vmolr |= E1000_VMOLR_MPME;
3515 } else {
3516 /*
3517 * Write addresses to the MTA, if the attempt fails
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003518 * then we should just turn on promiscuous mode so
Alexander Duyck68d480c2009-10-05 06:33:08 +00003519 * that we can at least receive multicast traffic
3520 */
3521 count = igb_write_mc_addr_list(netdev);
3522 if (count < 0) {
3523 rctl |= E1000_RCTL_MPE;
3524 vmolr |= E1000_VMOLR_MPME;
3525 } else if (count) {
3526 vmolr |= E1000_VMOLR_ROMPE;
3527 }
3528 }
3529 /*
3530 * Write addresses to available RAR registers, if there is not
3531 * sufficient space to store all the addresses then enable
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003532 * unicast promiscuous mode
Alexander Duyck68d480c2009-10-05 06:33:08 +00003533 */
3534 count = igb_write_uc_addr_list(netdev);
3535 if (count < 0) {
Alexander Duyckff41f8d2009-09-03 14:48:56 +00003536 rctl |= E1000_RCTL_UPE;
Alexander Duyck68d480c2009-10-05 06:33:08 +00003537 vmolr |= E1000_VMOLR_ROPE;
3538 }
Patrick McHardy78ed11a2008-07-16 20:16:14 -07003539 rctl |= E1000_RCTL_VFE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07003540 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003541 wr32(E1000_RCTL, rctl);
3542
Alexander Duyck68d480c2009-10-05 06:33:08 +00003543 /*
3544 * In order to support SR-IOV and eventually VMDq it is necessary to set
3545 * the VMOLR to enable the appropriate modes. Without this workaround
3546 * we will have issues with VLAN tag stripping not being done for frames
3547 * that are only arriving because we are the default pool
3548 */
3549 if (hw->mac.type < e1000_82576)
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003550 return;
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003551
Alexander Duyck68d480c2009-10-05 06:33:08 +00003552 vmolr |= rd32(E1000_VMOLR(vfn)) &
3553 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3554 wr32(E1000_VMOLR(vfn), vmolr);
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003555 igb_restore_vf_multicasts(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003556}
3557
Greg Rose13800462010-11-06 02:08:26 +00003558static void igb_check_wvbr(struct igb_adapter *adapter)
3559{
3560 struct e1000_hw *hw = &adapter->hw;
3561 u32 wvbr = 0;
3562
3563 switch (hw->mac.type) {
3564 case e1000_82576:
3565 case e1000_i350:
3566 if (!(wvbr = rd32(E1000_WVBR)))
3567 return;
3568 break;
3569 default:
3570 break;
3571 }
3572
3573 adapter->wvbr |= wvbr;
3574}
3575
3576#define IGB_STAGGERED_QUEUE_OFFSET 8
3577
3578static void igb_spoof_check(struct igb_adapter *adapter)
3579{
3580 int j;
3581
3582 if (!adapter->wvbr)
3583 return;
3584
3585 for(j = 0; j < adapter->vfs_allocated_count; j++) {
3586 if (adapter->wvbr & (1 << j) ||
3587 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3588 dev_warn(&adapter->pdev->dev,
3589 "Spoof event(s) detected on VF %d\n", j);
3590 adapter->wvbr &=
3591 ~((1 << j) |
3592 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3593 }
3594 }
3595}
3596
Auke Kok9d5c8242008-01-24 02:22:38 -08003597/* Need to wait a few seconds after link up to get diagnostic information from
3598 * the phy */
3599static void igb_update_phy_info(unsigned long data)
3600{
3601 struct igb_adapter *adapter = (struct igb_adapter *) data;
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08003602 igb_get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08003603}
3604
3605/**
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003606 * igb_has_link - check shared code for link and determine up/down
3607 * @adapter: pointer to driver private info
3608 **/
Nick Nunley31455352010-02-17 01:01:21 +00003609bool igb_has_link(struct igb_adapter *adapter)
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003610{
3611 struct e1000_hw *hw = &adapter->hw;
3612 bool link_active = false;
3613 s32 ret_val = 0;
3614
3615 /* get_link_status is set on LSC (link status) interrupt or
3616 * rx sequence error interrupt. get_link_status will stay
3617 * false until the e1000_check_for_link establishes link
3618 * for copper adapters ONLY
3619 */
3620 switch (hw->phy.media_type) {
3621 case e1000_media_type_copper:
3622 if (hw->mac.get_link_status) {
3623 ret_val = hw->mac.ops.check_for_link(hw);
3624 link_active = !hw->mac.get_link_status;
3625 } else {
3626 link_active = true;
3627 }
3628 break;
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003629 case e1000_media_type_internal_serdes:
3630 ret_val = hw->mac.ops.check_for_link(hw);
3631 link_active = hw->mac.serdes_has_link;
3632 break;
3633 default:
3634 case e1000_media_type_unknown:
3635 break;
3636 }
3637
3638 return link_active;
3639}
3640
Stefan Assmann563988d2011-04-05 04:27:15 +00003641static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3642{
3643 bool ret = false;
3644 u32 ctrl_ext, thstat;
3645
3646 /* check for thermal sensor event on i350, copper only */
3647 if (hw->mac.type == e1000_i350) {
3648 thstat = rd32(E1000_THSTAT);
3649 ctrl_ext = rd32(E1000_CTRL_EXT);
3650
3651 if ((hw->phy.media_type == e1000_media_type_copper) &&
3652 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3653 ret = !!(thstat & event);
3654 }
3655 }
3656
3657 return ret;
3658}
3659
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003660/**
Auke Kok9d5c8242008-01-24 02:22:38 -08003661 * igb_watchdog - Timer Call-back
3662 * @data: pointer to adapter cast into an unsigned long
3663 **/
3664static void igb_watchdog(unsigned long data)
3665{
3666 struct igb_adapter *adapter = (struct igb_adapter *)data;
3667 /* Do the rest outside of interrupt context */
3668 schedule_work(&adapter->watchdog_task);
3669}
3670
3671static void igb_watchdog_task(struct work_struct *work)
3672{
3673 struct igb_adapter *adapter = container_of(work,
Alexander Duyck559e9c42009-10-27 23:52:50 +00003674 struct igb_adapter,
3675 watchdog_task);
Auke Kok9d5c8242008-01-24 02:22:38 -08003676 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08003677 struct net_device *netdev = adapter->netdev;
Stefan Assmann563988d2011-04-05 04:27:15 +00003678 u32 link;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003679 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003680
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003681 link = igb_has_link(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003682 if (link) {
3683 if (!netif_carrier_ok(netdev)) {
3684 u32 ctrl;
Alexander Duyck330a6d62009-10-27 23:51:35 +00003685 hw->mac.ops.get_speed_and_duplex(hw,
3686 &adapter->link_speed,
3687 &adapter->link_duplex);
Auke Kok9d5c8242008-01-24 02:22:38 -08003688
3689 ctrl = rd32(E1000_CTRL);
Alexander Duyck527d47c2008-11-27 00:21:39 -08003690 /* Links status message must follow this format */
3691 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
Auke Kok9d5c8242008-01-24 02:22:38 -08003692 "Flow Control: %s\n",
Alexander Duyck559e9c42009-10-27 23:52:50 +00003693 netdev->name,
3694 adapter->link_speed,
3695 adapter->link_duplex == FULL_DUPLEX ?
Auke Kok9d5c8242008-01-24 02:22:38 -08003696 "Full Duplex" : "Half Duplex",
Alexander Duyck559e9c42009-10-27 23:52:50 +00003697 ((ctrl & E1000_CTRL_TFCE) &&
3698 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX" :
3699 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3700 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
Auke Kok9d5c8242008-01-24 02:22:38 -08003701
Stefan Assmann563988d2011-04-05 04:27:15 +00003702 /* check for thermal sensor event */
3703 if (igb_thermal_sensor_event(hw, E1000_THSTAT_LINK_THROTTLE)) {
3704 printk(KERN_INFO "igb: %s The network adapter "
3705 "link speed was downshifted "
3706 "because it overheated.\n",
3707 netdev->name);
Carolyn Wyborny7ef5ed12011-03-12 08:59:47 +00003708 }
Stefan Assmann563988d2011-04-05 04:27:15 +00003709
Emil Tantilovd07f3e32010-03-23 18:34:57 +00003710 /* adjust timeout factor according to speed/duplex */
Auke Kok9d5c8242008-01-24 02:22:38 -08003711 adapter->tx_timeout_factor = 1;
3712 switch (adapter->link_speed) {
3713 case SPEED_10:
Auke Kok9d5c8242008-01-24 02:22:38 -08003714 adapter->tx_timeout_factor = 14;
3715 break;
3716 case SPEED_100:
Auke Kok9d5c8242008-01-24 02:22:38 -08003717 /* maybe add some timeout factor ? */
3718 break;
3719 }
3720
3721 netif_carrier_on(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003722
Alexander Duyck4ae196d2009-02-19 20:40:07 -08003723 igb_ping_all_vfs(adapter);
Lior Levy17dc5662011-02-08 02:28:46 +00003724 igb_check_vf_rate_limit(adapter);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08003725
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003726 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08003727 if (!test_bit(__IGB_DOWN, &adapter->state))
3728 mod_timer(&adapter->phy_info_timer,
3729 round_jiffies(jiffies + 2 * HZ));
3730 }
3731 } else {
3732 if (netif_carrier_ok(netdev)) {
3733 adapter->link_speed = 0;
3734 adapter->link_duplex = 0;
Stefan Assmann563988d2011-04-05 04:27:15 +00003735
3736 /* check for thermal sensor event */
3737 if (igb_thermal_sensor_event(hw, E1000_THSTAT_PWR_DOWN)) {
3738 printk(KERN_ERR "igb: %s The network adapter "
3739 "was stopped because it "
3740 "overheated.\n",
Carolyn Wyborny7ef5ed12011-03-12 08:59:47 +00003741 netdev->name);
Carolyn Wyborny7ef5ed12011-03-12 08:59:47 +00003742 }
Stefan Assmann563988d2011-04-05 04:27:15 +00003743
Alexander Duyck527d47c2008-11-27 00:21:39 -08003744 /* Links status message must follow this format */
3745 printk(KERN_INFO "igb: %s NIC Link is Down\n",
3746 netdev->name);
Auke Kok9d5c8242008-01-24 02:22:38 -08003747 netif_carrier_off(netdev);
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003748
Alexander Duyck4ae196d2009-02-19 20:40:07 -08003749 igb_ping_all_vfs(adapter);
3750
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003751 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08003752 if (!test_bit(__IGB_DOWN, &adapter->state))
3753 mod_timer(&adapter->phy_info_timer,
3754 round_jiffies(jiffies + 2 * HZ));
3755 }
3756 }
3757
Eric Dumazet12dcd862010-10-15 17:27:10 +00003758 spin_lock(&adapter->stats64_lock);
3759 igb_update_stats(adapter, &adapter->stats64);
3760 spin_unlock(&adapter->stats64_lock);
Auke Kok9d5c8242008-01-24 02:22:38 -08003761
Alexander Duyckdbabb062009-11-12 18:38:16 +00003762 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck3025a442010-02-17 01:02:39 +00003763 struct igb_ring *tx_ring = adapter->tx_ring[i];
Alexander Duyckdbabb062009-11-12 18:38:16 +00003764 if (!netif_carrier_ok(netdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003765 /* We've lost link, so the controller stops DMA,
3766 * but we've got queued Tx work that's never going
3767 * to get done, so reset controller to flush Tx.
3768 * (Do the reset outside of interrupt context). */
Alexander Duyckdbabb062009-11-12 18:38:16 +00003769 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
3770 adapter->tx_timeout_count++;
3771 schedule_work(&adapter->reset_task);
3772 /* return immediately since reset is imminent */
3773 return;
3774 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003775 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003776
Alexander Duyckdbabb062009-11-12 18:38:16 +00003777 /* Force detection of hung controller every watchdog period */
3778 tx_ring->detect_tx_hung = true;
3779 }
Alexander Duyckf7ba2052009-10-27 23:48:51 +00003780
Auke Kok9d5c8242008-01-24 02:22:38 -08003781 /* Cause software interrupt to ensure rx ring is cleaned */
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003782 if (adapter->msix_entries) {
Alexander Duyck047e0032009-10-27 15:49:27 +00003783 u32 eics = 0;
3784 for (i = 0; i < adapter->num_q_vectors; i++) {
3785 struct igb_q_vector *q_vector = adapter->q_vector[i];
3786 eics |= q_vector->eims_value;
3787 }
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003788 wr32(E1000_EICS, eics);
3789 } else {
3790 wr32(E1000_ICS, E1000_ICS_RXDMT0);
3791 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003792
Greg Rose13800462010-11-06 02:08:26 +00003793 igb_spoof_check(adapter);
3794
Auke Kok9d5c8242008-01-24 02:22:38 -08003795 /* Reset the timer */
3796 if (!test_bit(__IGB_DOWN, &adapter->state))
3797 mod_timer(&adapter->watchdog_timer,
3798 round_jiffies(jiffies + 2 * HZ));
3799}
3800
3801enum latency_range {
3802 lowest_latency = 0,
3803 low_latency = 1,
3804 bulk_latency = 2,
3805 latency_invalid = 255
3806};
3807
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003808/**
3809 * igb_update_ring_itr - update the dynamic ITR value based on packet size
3810 *
3811 * Stores a new ITR value based on strictly on packet size. This
3812 * algorithm is less sophisticated than that used in igb_update_itr,
3813 * due to the difficulty of synchronizing statistics across multiple
Stefan Weileef35c22010-08-06 21:11:15 +02003814 * receive rings. The divisors and thresholds used by this function
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003815 * were determined based on theoretical maximum wire speed and testing
3816 * data, in order to minimize response time while increasing bulk
3817 * throughput.
3818 * This functionality is controlled by the InterruptThrottleRate module
3819 * parameter (see igb_param.c)
3820 * NOTE: This function is called only when operating in a multiqueue
3821 * receive environment.
Alexander Duyck047e0032009-10-27 15:49:27 +00003822 * @q_vector: pointer to q_vector
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003823 **/
Alexander Duyck047e0032009-10-27 15:49:27 +00003824static void igb_update_ring_itr(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08003825{
Alexander Duyck047e0032009-10-27 15:49:27 +00003826 int new_val = q_vector->itr_val;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003827 int avg_wire_size = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +00003828 struct igb_adapter *adapter = q_vector->adapter;
Eric Dumazet12dcd862010-10-15 17:27:10 +00003829 struct igb_ring *ring;
3830 unsigned int packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08003831
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003832 /* For non-gigabit speeds, just fix the interrupt rate at 4000
3833 * ints/sec - ITR timer value of 120 ticks.
3834 */
3835 if (adapter->link_speed != SPEED_1000) {
Alexander Duyck047e0032009-10-27 15:49:27 +00003836 new_val = 976;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003837 goto set_itr_val;
3838 }
Alexander Duyck047e0032009-10-27 15:49:27 +00003839
Eric Dumazet12dcd862010-10-15 17:27:10 +00003840 ring = q_vector->rx_ring;
3841 if (ring) {
3842 packets = ACCESS_ONCE(ring->total_packets);
3843
3844 if (packets)
3845 avg_wire_size = ring->total_bytes / packets;
Alexander Duyck047e0032009-10-27 15:49:27 +00003846 }
3847
Eric Dumazet12dcd862010-10-15 17:27:10 +00003848 ring = q_vector->tx_ring;
3849 if (ring) {
3850 packets = ACCESS_ONCE(ring->total_packets);
3851
3852 if (packets)
3853 avg_wire_size = max_t(u32, avg_wire_size,
3854 ring->total_bytes / packets);
Alexander Duyck047e0032009-10-27 15:49:27 +00003855 }
3856
3857 /* if avg_wire_size isn't set no work was done */
3858 if (!avg_wire_size)
3859 goto clear_counts;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003860
3861 /* Add 24 bytes to size to account for CRC, preamble, and gap */
3862 avg_wire_size += 24;
3863
3864 /* Don't starve jumbo frames */
3865 avg_wire_size = min(avg_wire_size, 3000);
3866
3867 /* Give a little boost to mid-size frames */
3868 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
3869 new_val = avg_wire_size / 3;
3870 else
3871 new_val = avg_wire_size / 2;
3872
Nick Nunleyabe1c362010-02-17 01:03:19 +00003873 /* when in itr mode 3 do not exceed 20K ints/sec */
3874 if (adapter->rx_itr_setting == 3 && new_val < 196)
3875 new_val = 196;
3876
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003877set_itr_val:
Alexander Duyck047e0032009-10-27 15:49:27 +00003878 if (new_val != q_vector->itr_val) {
3879 q_vector->itr_val = new_val;
3880 q_vector->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08003881 }
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003882clear_counts:
Alexander Duyck047e0032009-10-27 15:49:27 +00003883 if (q_vector->rx_ring) {
3884 q_vector->rx_ring->total_bytes = 0;
3885 q_vector->rx_ring->total_packets = 0;
3886 }
3887 if (q_vector->tx_ring) {
3888 q_vector->tx_ring->total_bytes = 0;
3889 q_vector->tx_ring->total_packets = 0;
3890 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003891}
3892
3893/**
3894 * igb_update_itr - update the dynamic ITR value based on statistics
3895 * Stores a new ITR value based on packets and byte
3896 * counts during the last interrupt. The advantage of per interrupt
3897 * computation is faster updates and more accurate ITR for the current
3898 * traffic pattern. Constants in this function were computed
3899 * based on theoretical maximum wire speed and thresholds were set based
3900 * on testing data as well as attempting to minimize response time
3901 * while increasing bulk throughput.
3902 * this functionality is controlled by the InterruptThrottleRate module
3903 * parameter (see igb_param.c)
3904 * NOTE: These calculations are only valid when operating in a single-
3905 * queue environment.
3906 * @adapter: pointer to adapter
Alexander Duyck047e0032009-10-27 15:49:27 +00003907 * @itr_setting: current q_vector->itr_val
Auke Kok9d5c8242008-01-24 02:22:38 -08003908 * @packets: the number of packets during this measurement interval
3909 * @bytes: the number of bytes during this measurement interval
3910 **/
3911static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
3912 int packets, int bytes)
3913{
3914 unsigned int retval = itr_setting;
3915
3916 if (packets == 0)
3917 goto update_itr_done;
3918
3919 switch (itr_setting) {
3920 case lowest_latency:
3921 /* handle TSO and jumbo frames */
3922 if (bytes/packets > 8000)
3923 retval = bulk_latency;
3924 else if ((packets < 5) && (bytes > 512))
3925 retval = low_latency;
3926 break;
3927 case low_latency: /* 50 usec aka 20000 ints/s */
3928 if (bytes > 10000) {
3929 /* this if handles the TSO accounting */
3930 if (bytes/packets > 8000) {
3931 retval = bulk_latency;
3932 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
3933 retval = bulk_latency;
3934 } else if ((packets > 35)) {
3935 retval = lowest_latency;
3936 }
3937 } else if (bytes/packets > 2000) {
3938 retval = bulk_latency;
3939 } else if (packets <= 2 && bytes < 512) {
3940 retval = lowest_latency;
3941 }
3942 break;
3943 case bulk_latency: /* 250 usec aka 4000 ints/s */
3944 if (bytes > 25000) {
3945 if (packets > 35)
3946 retval = low_latency;
Alexander Duyck1e5c3d22009-02-12 18:17:21 +00003947 } else if (bytes < 1500) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003948 retval = low_latency;
3949 }
3950 break;
3951 }
3952
3953update_itr_done:
3954 return retval;
3955}
3956
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003957static void igb_set_itr(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08003958{
Alexander Duyck047e0032009-10-27 15:49:27 +00003959 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08003960 u16 current_itr;
Alexander Duyck047e0032009-10-27 15:49:27 +00003961 u32 new_itr = q_vector->itr_val;
Auke Kok9d5c8242008-01-24 02:22:38 -08003962
3963 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
3964 if (adapter->link_speed != SPEED_1000) {
3965 current_itr = 0;
3966 new_itr = 4000;
3967 goto set_itr_now;
3968 }
3969
3970 adapter->rx_itr = igb_update_itr(adapter,
3971 adapter->rx_itr,
Alexander Duyck3025a442010-02-17 01:02:39 +00003972 q_vector->rx_ring->total_packets,
3973 q_vector->rx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08003974
Alexander Duyck047e0032009-10-27 15:49:27 +00003975 adapter->tx_itr = igb_update_itr(adapter,
3976 adapter->tx_itr,
Alexander Duyck3025a442010-02-17 01:02:39 +00003977 q_vector->tx_ring->total_packets,
3978 q_vector->tx_ring->total_bytes);
Alexander Duyck047e0032009-10-27 15:49:27 +00003979 current_itr = max(adapter->rx_itr, adapter->tx_itr);
Auke Kok9d5c8242008-01-24 02:22:38 -08003980
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003981 /* conservative mode (itr 3) eliminates the lowest_latency setting */
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00003982 if (adapter->rx_itr_setting == 3 && current_itr == lowest_latency)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003983 current_itr = low_latency;
3984
Auke Kok9d5c8242008-01-24 02:22:38 -08003985 switch (current_itr) {
3986 /* counts and packets in update_itr are dependent on these numbers */
3987 case lowest_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003988 new_itr = 56; /* aka 70,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003989 break;
3990 case low_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003991 new_itr = 196; /* aka 20,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003992 break;
3993 case bulk_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003994 new_itr = 980; /* aka 4,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003995 break;
3996 default:
3997 break;
3998 }
3999
4000set_itr_now:
Alexander Duyck3025a442010-02-17 01:02:39 +00004001 q_vector->rx_ring->total_bytes = 0;
4002 q_vector->rx_ring->total_packets = 0;
4003 q_vector->tx_ring->total_bytes = 0;
4004 q_vector->tx_ring->total_packets = 0;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07004005
Alexander Duyck047e0032009-10-27 15:49:27 +00004006 if (new_itr != q_vector->itr_val) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004007 /* this attempts to bias the interrupt rate towards Bulk
4008 * by adding intermediate steps when interrupt rate is
4009 * increasing */
Alexander Duyck047e0032009-10-27 15:49:27 +00004010 new_itr = new_itr > q_vector->itr_val ?
4011 max((new_itr * q_vector->itr_val) /
4012 (new_itr + (q_vector->itr_val >> 2)),
4013 new_itr) :
Auke Kok9d5c8242008-01-24 02:22:38 -08004014 new_itr;
4015 /* Don't write the value here; it resets the adapter's
4016 * internal timer, and causes us to delay far longer than
4017 * we should between interrupts. Instead, we write the ITR
4018 * value at the beginning of the next interrupt so the timing
4019 * ends up being correct.
4020 */
Alexander Duyck047e0032009-10-27 15:49:27 +00004021 q_vector->itr_val = new_itr;
4022 q_vector->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08004023 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004024}
4025
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004026void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4027 u32 type_tucmd, u32 mss_l4len_idx)
4028{
4029 struct e1000_adv_tx_context_desc *context_desc;
4030 u16 i = tx_ring->next_to_use;
4031
4032 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4033
4034 i++;
4035 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4036
4037 /* set bits to identify this as an advanced context descriptor */
4038 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4039
4040 /* For 82575, context index must be unique per ring. */
Alexander Duyck866cff02011-08-26 07:45:36 +00004041 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004042 mss_l4len_idx |= tx_ring->reg_idx << 4;
4043
4044 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4045 context_desc->seqnum_seed = 0;
4046 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
4047 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4048}
4049
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004050static int igb_tso(struct igb_ring *tx_ring,
4051 struct igb_tx_buffer *first,
4052 u8 *hdr_len)
Auke Kok9d5c8242008-01-24 02:22:38 -08004053{
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004054 struct sk_buff *skb = first->skb;
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004055 u32 vlan_macip_lens, type_tucmd;
4056 u32 mss_l4len_idx, l4len;
4057
4058 if (!skb_is_gso(skb))
4059 return 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004060
4061 if (skb_header_cloned(skb)) {
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004062 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
Auke Kok9d5c8242008-01-24 02:22:38 -08004063 if (err)
4064 return err;
4065 }
4066
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004067 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4068 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
Auke Kok9d5c8242008-01-24 02:22:38 -08004069
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004070 if (first->protocol == __constant_htons(ETH_P_IP)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004071 struct iphdr *iph = ip_hdr(skb);
4072 iph->tot_len = 0;
4073 iph->check = 0;
4074 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4075 iph->daddr, 0,
4076 IPPROTO_TCP,
4077 0);
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004078 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004079 first->tx_flags |= IGB_TX_FLAGS_TSO |
4080 IGB_TX_FLAGS_CSUM |
4081 IGB_TX_FLAGS_IPV4;
Sridhar Samudrala8e1e8a42010-01-23 02:02:21 -08004082 } else if (skb_is_gso_v6(skb)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004083 ipv6_hdr(skb)->payload_len = 0;
4084 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4085 &ipv6_hdr(skb)->daddr,
4086 0, IPPROTO_TCP, 0);
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004087 first->tx_flags |= IGB_TX_FLAGS_TSO |
4088 IGB_TX_FLAGS_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08004089 }
4090
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004091 /* compute header lengths */
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004092 l4len = tcp_hdrlen(skb);
4093 *hdr_len = skb_transport_offset(skb) + l4len;
Auke Kok9d5c8242008-01-24 02:22:38 -08004094
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004095 /* update gso size and bytecount with header size */
4096 first->gso_segs = skb_shinfo(skb)->gso_segs;
4097 first->bytecount += (first->gso_segs - 1) * *hdr_len;
4098
Auke Kok9d5c8242008-01-24 02:22:38 -08004099 /* MSS L4LEN IDX */
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004100 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4101 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08004102
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004103 /* VLAN MACLEN IPLEN */
4104 vlan_macip_lens = skb_network_header_len(skb);
4105 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004106 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
Auke Kok9d5c8242008-01-24 02:22:38 -08004107
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004108 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
Auke Kok9d5c8242008-01-24 02:22:38 -08004109
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004110 return 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08004111}
4112
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004113static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
Auke Kok9d5c8242008-01-24 02:22:38 -08004114{
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004115 struct sk_buff *skb = first->skb;
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004116 u32 vlan_macip_lens = 0;
4117 u32 mss_l4len_idx = 0;
4118 u32 type_tucmd = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004119
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004120 if (skb->ip_summed != CHECKSUM_PARTIAL) {
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004121 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4122 return;
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004123 } else {
4124 u8 l4_hdr = 0;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004125 switch (first->protocol) {
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004126 case __constant_htons(ETH_P_IP):
4127 vlan_macip_lens |= skb_network_header_len(skb);
4128 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4129 l4_hdr = ip_hdr(skb)->protocol;
4130 break;
4131 case __constant_htons(ETH_P_IPV6):
4132 vlan_macip_lens |= skb_network_header_len(skb);
4133 l4_hdr = ipv6_hdr(skb)->nexthdr;
4134 break;
4135 default:
4136 if (unlikely(net_ratelimit())) {
4137 dev_warn(tx_ring->dev,
4138 "partial checksum but proto=%x!\n",
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004139 first->protocol);
Arthur Jonesfa4a7ef2009-03-21 16:55:07 -07004140 }
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004141 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08004142 }
4143
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004144 switch (l4_hdr) {
4145 case IPPROTO_TCP:
4146 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4147 mss_l4len_idx = tcp_hdrlen(skb) <<
4148 E1000_ADVTXD_L4LEN_SHIFT;
4149 break;
4150 case IPPROTO_SCTP:
4151 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4152 mss_l4len_idx = sizeof(struct sctphdr) <<
4153 E1000_ADVTXD_L4LEN_SHIFT;
4154 break;
4155 case IPPROTO_UDP:
4156 mss_l4len_idx = sizeof(struct udphdr) <<
4157 E1000_ADVTXD_L4LEN_SHIFT;
4158 break;
4159 default:
4160 if (unlikely(net_ratelimit())) {
4161 dev_warn(tx_ring->dev,
4162 "partial checksum but l4 proto=%x!\n",
4163 l4_hdr);
4164 }
4165 break;
4166 }
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004167
4168 /* update TX checksum flag */
4169 first->tx_flags |= IGB_TX_FLAGS_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08004170 }
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004171
4172 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004173 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004174
4175 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
Auke Kok9d5c8242008-01-24 02:22:38 -08004176}
4177
Alexander Duycke032afc2011-08-26 07:44:48 +00004178static __le32 igb_tx_cmd_type(u32 tx_flags)
4179{
4180 /* set type for advanced descriptor with frame checksum insertion */
4181 __le32 cmd_type = cpu_to_le32(E1000_ADVTXD_DTYP_DATA |
4182 E1000_ADVTXD_DCMD_IFCS |
4183 E1000_ADVTXD_DCMD_DEXT);
4184
4185 /* set HW vlan bit if vlan is present */
4186 if (tx_flags & IGB_TX_FLAGS_VLAN)
4187 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_VLE);
4188
4189 /* set timestamp bit if present */
4190 if (tx_flags & IGB_TX_FLAGS_TSTAMP)
4191 cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP);
4192
4193 /* set segmentation bits for TSO */
4194 if (tx_flags & IGB_TX_FLAGS_TSO)
4195 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_TSE);
4196
4197 return cmd_type;
4198}
4199
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004200static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4201 union e1000_adv_tx_desc *tx_desc,
4202 u32 tx_flags, unsigned int paylen)
Alexander Duycke032afc2011-08-26 07:44:48 +00004203{
4204 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4205
4206 /* 82575 requires a unique index per ring if any offload is enabled */
4207 if ((tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_VLAN)) &&
Alexander Duyck866cff02011-08-26 07:45:36 +00004208 test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
Alexander Duycke032afc2011-08-26 07:44:48 +00004209 olinfo_status |= tx_ring->reg_idx << 4;
4210
4211 /* insert L4 checksum */
4212 if (tx_flags & IGB_TX_FLAGS_CSUM) {
4213 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
4214
4215 /* insert IPv4 checksum */
4216 if (tx_flags & IGB_TX_FLAGS_IPV4)
4217 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
4218 }
4219
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004220 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
Alexander Duycke032afc2011-08-26 07:44:48 +00004221}
4222
Alexander Duyckebe42d12011-08-26 07:45:09 +00004223/*
4224 * The largest size we can write to the descriptor is 65535. In order to
4225 * maintain a power of two alignment we have to limit ourselves to 32K.
4226 */
4227#define IGB_MAX_TXD_PWR 15
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004228#define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
Auke Kok9d5c8242008-01-24 02:22:38 -08004229
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004230static void igb_tx_map(struct igb_ring *tx_ring,
4231 struct igb_tx_buffer *first,
Alexander Duyckebe42d12011-08-26 07:45:09 +00004232 const u8 hdr_len)
Auke Kok9d5c8242008-01-24 02:22:38 -08004233{
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004234 struct sk_buff *skb = first->skb;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004235 struct igb_tx_buffer *tx_buffer_info;
4236 union e1000_adv_tx_desc *tx_desc;
4237 dma_addr_t dma;
4238 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
4239 unsigned int data_len = skb->data_len;
4240 unsigned int size = skb_headlen(skb);
4241 unsigned int paylen = skb->len - hdr_len;
4242 __le32 cmd_type;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004243 u32 tx_flags = first->tx_flags;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004244 u16 i = tx_ring->next_to_use;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004245
4246 tx_desc = IGB_TX_DESC(tx_ring, i);
4247
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004248 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, paylen);
Alexander Duyckebe42d12011-08-26 07:45:09 +00004249 cmd_type = igb_tx_cmd_type(tx_flags);
4250
4251 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4252 if (dma_mapping_error(tx_ring->dev, dma))
Alexander Duyck6366ad32009-12-02 16:47:18 +00004253 goto dma_error;
Auke Kok9d5c8242008-01-24 02:22:38 -08004254
Alexander Duyckebe42d12011-08-26 07:45:09 +00004255 /* record length, and DMA address */
4256 first->length = size;
4257 first->dma = dma;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004258 tx_desc->read.buffer_addr = cpu_to_le64(dma);
Alexander Duyck2bbfebe2011-08-26 07:44:59 +00004259
Alexander Duyckebe42d12011-08-26 07:45:09 +00004260 for (;;) {
4261 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4262 tx_desc->read.cmd_type_len =
4263 cmd_type | cpu_to_le32(IGB_MAX_DATA_PER_TXD);
Auke Kok9d5c8242008-01-24 02:22:38 -08004264
Alexander Duyckebe42d12011-08-26 07:45:09 +00004265 i++;
4266 tx_desc++;
4267 if (i == tx_ring->count) {
4268 tx_desc = IGB_TX_DESC(tx_ring, 0);
4269 i = 0;
4270 }
4271
4272 dma += IGB_MAX_DATA_PER_TXD;
4273 size -= IGB_MAX_DATA_PER_TXD;
4274
4275 tx_desc->read.olinfo_status = 0;
4276 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4277 }
4278
4279 if (likely(!data_len))
4280 break;
4281
4282 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
4283
Alexander Duyck65689fe2009-03-20 00:17:43 +00004284 i++;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004285 tx_desc++;
4286 if (i == tx_ring->count) {
4287 tx_desc = IGB_TX_DESC(tx_ring, 0);
Alexander Duyck65689fe2009-03-20 00:17:43 +00004288 i = 0;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004289 }
Alexander Duyck65689fe2009-03-20 00:17:43 +00004290
Alexander Duyckebe42d12011-08-26 07:45:09 +00004291 size = frag->size;
4292 data_len -= size;
4293
4294 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4295 size, DMA_TO_DEVICE);
4296 if (dma_mapping_error(tx_ring->dev, dma))
Alexander Duyck6366ad32009-12-02 16:47:18 +00004297 goto dma_error;
4298
Alexander Duyckebe42d12011-08-26 07:45:09 +00004299 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4300 tx_buffer_info->length = size;
4301 tx_buffer_info->dma = dma;
4302
4303 tx_desc->read.olinfo_status = 0;
4304 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4305
4306 frag++;
Auke Kok9d5c8242008-01-24 02:22:38 -08004307 }
4308
Alexander Duyckebe42d12011-08-26 07:45:09 +00004309 /* write last descriptor with RS and EOP bits */
4310 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IGB_TXD_DCMD);
4311 tx_desc->read.cmd_type_len = cmd_type;
Alexander Duyck8542db02011-08-26 07:44:43 +00004312
4313 /* set the timestamp */
4314 first->time_stamp = jiffies;
4315
Alexander Duyckebe42d12011-08-26 07:45:09 +00004316 /*
4317 * Force memory writes to complete before letting h/w know there
4318 * are new descriptors to fetch. (Only applicable for weak-ordered
4319 * memory model archs, such as IA-64).
4320 *
4321 * We also need this memory barrier to make certain all of the
4322 * status bits have been updated before next_to_watch is written.
4323 */
Auke Kok9d5c8242008-01-24 02:22:38 -08004324 wmb();
4325
Alexander Duyckebe42d12011-08-26 07:45:09 +00004326 /* set next_to_watch value indicating a packet is present */
4327 first->next_to_watch = tx_desc;
4328
4329 i++;
4330 if (i == tx_ring->count)
4331 i = 0;
4332
Auke Kok9d5c8242008-01-24 02:22:38 -08004333 tx_ring->next_to_use = i;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004334
Alexander Duyckfce99e32009-10-27 15:51:27 +00004335 writel(i, tx_ring->tail);
Alexander Duyckebe42d12011-08-26 07:45:09 +00004336
Auke Kok9d5c8242008-01-24 02:22:38 -08004337 /* we need this if more than one processor can write to our tail
4338 * at a time, it syncronizes IO on IA64/Altix systems */
4339 mmiowb();
Alexander Duyckebe42d12011-08-26 07:45:09 +00004340
4341 return;
4342
4343dma_error:
4344 dev_err(tx_ring->dev, "TX DMA map failed\n");
4345
4346 /* clear dma mappings for failed tx_buffer_info map */
4347 for (;;) {
4348 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4349 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4350 if (tx_buffer_info == first)
4351 break;
4352 if (i == 0)
4353 i = tx_ring->count;
4354 i--;
4355 }
4356
4357 tx_ring->next_to_use = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08004358}
4359
Alexander Duyck6ad4edf2011-08-26 07:45:26 +00004360static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
Auke Kok9d5c8242008-01-24 02:22:38 -08004361{
Alexander Duycke694e962009-10-27 15:53:06 +00004362 struct net_device *netdev = tx_ring->netdev;
4363
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004364 netif_stop_subqueue(netdev, tx_ring->queue_index);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004365
Auke Kok9d5c8242008-01-24 02:22:38 -08004366 /* Herbert's original patch had:
4367 * smp_mb__after_netif_stop_queue();
4368 * but since that doesn't exist yet, just open code it. */
4369 smp_mb();
4370
4371 /* We need to check again in a case another CPU has just
4372 * made room available. */
Alexander Duyckc493ea42009-03-20 00:16:50 +00004373 if (igb_desc_unused(tx_ring) < size)
Auke Kok9d5c8242008-01-24 02:22:38 -08004374 return -EBUSY;
4375
4376 /* A reprieve! */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004377 netif_wake_subqueue(netdev, tx_ring->queue_index);
Eric Dumazet12dcd862010-10-15 17:27:10 +00004378
4379 u64_stats_update_begin(&tx_ring->tx_syncp2);
4380 tx_ring->tx_stats.restart_queue2++;
4381 u64_stats_update_end(&tx_ring->tx_syncp2);
4382
Auke Kok9d5c8242008-01-24 02:22:38 -08004383 return 0;
4384}
4385
Alexander Duyck6ad4edf2011-08-26 07:45:26 +00004386static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
Auke Kok9d5c8242008-01-24 02:22:38 -08004387{
Alexander Duyckc493ea42009-03-20 00:16:50 +00004388 if (igb_desc_unused(tx_ring) >= size)
Auke Kok9d5c8242008-01-24 02:22:38 -08004389 return 0;
Alexander Duycke694e962009-10-27 15:53:06 +00004390 return __igb_maybe_stop_tx(tx_ring, size);
Auke Kok9d5c8242008-01-24 02:22:38 -08004391}
4392
Alexander Duyckcd392f52011-08-26 07:43:59 +00004393netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4394 struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08004395{
Alexander Duyck8542db02011-08-26 07:44:43 +00004396 struct igb_tx_buffer *first;
Alexander Duyckebe42d12011-08-26 07:45:09 +00004397 int tso;
Nick Nunley91d4ee32010-02-17 01:04:56 +00004398 u32 tx_flags = 0;
Alexander Duyck31f6adb2011-08-26 07:44:53 +00004399 __be16 protocol = vlan_get_protocol(skb);
Nick Nunley91d4ee32010-02-17 01:04:56 +00004400 u8 hdr_len = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004401
Auke Kok9d5c8242008-01-24 02:22:38 -08004402 /* need: 1 descriptor per page,
4403 * + 2 desc gap to keep tail from touching head,
4404 * + 1 desc for skb->data,
4405 * + 1 desc for context descriptor,
4406 * otherwise try next time */
Alexander Duycke694e962009-10-27 15:53:06 +00004407 if (igb_maybe_stop_tx(tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004408 /* this is a hard error */
Auke Kok9d5c8242008-01-24 02:22:38 -08004409 return NETDEV_TX_BUSY;
4410 }
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004411
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004412 /* record the location of the first descriptor for this packet */
4413 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4414 first->skb = skb;
4415 first->bytecount = skb->len;
4416 first->gso_segs = 1;
4417
Oliver Hartkopp2244d072010-08-17 08:59:14 +00004418 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4419 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004420 tx_flags |= IGB_TX_FLAGS_TSTAMP;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004421 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004422
Jesse Grosseab6d182010-10-20 13:56:03 +00004423 if (vlan_tx_tag_present(skb)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004424 tx_flags |= IGB_TX_FLAGS_VLAN;
4425 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4426 }
4427
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004428 /* record initial flags and protocol */
4429 first->tx_flags = tx_flags;
4430 first->protocol = protocol;
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00004431
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004432 tso = igb_tso(tx_ring, first, &hdr_len);
4433 if (tso < 0)
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004434 goto out_drop;
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004435 else if (!tso)
4436 igb_tx_csum(tx_ring, first);
Auke Kok9d5c8242008-01-24 02:22:38 -08004437
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004438 igb_tx_map(tx_ring, first, hdr_len);
Alexander Duyck85ad76b2009-10-27 15:52:46 +00004439
4440 /* Make sure there is space in the ring for the next send. */
Alexander Duycke694e962009-10-27 15:53:06 +00004441 igb_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 4);
Alexander Duyck85ad76b2009-10-27 15:52:46 +00004442
Auke Kok9d5c8242008-01-24 02:22:38 -08004443 return NETDEV_TX_OK;
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004444
4445out_drop:
Alexander Duyck7af40ad92011-08-26 07:45:15 +00004446 igb_unmap_and_free_tx_resource(tx_ring, first);
4447
Alexander Duyck7d13a7d2011-08-26 07:44:32 +00004448 return NETDEV_TX_OK;
Auke Kok9d5c8242008-01-24 02:22:38 -08004449}
4450
Alexander Duyck1cc3bd82011-08-26 07:44:10 +00004451static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4452 struct sk_buff *skb)
4453{
4454 unsigned int r_idx = skb->queue_mapping;
4455
4456 if (r_idx >= adapter->num_tx_queues)
4457 r_idx = r_idx % adapter->num_tx_queues;
4458
4459 return adapter->tx_ring[r_idx];
4460}
4461
Alexander Duyckcd392f52011-08-26 07:43:59 +00004462static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4463 struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08004464{
4465 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyckb1a436c2009-10-27 15:54:43 +00004466
4467 if (test_bit(__IGB_DOWN, &adapter->state)) {
4468 dev_kfree_skb_any(skb);
4469 return NETDEV_TX_OK;
4470 }
4471
4472 if (skb->len <= 0) {
4473 dev_kfree_skb_any(skb);
4474 return NETDEV_TX_OK;
4475 }
4476
Alexander Duyck1cc3bd82011-08-26 07:44:10 +00004477 /*
4478 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
4479 * in order to meet this minimum size requirement.
4480 */
4481 if (skb->len < 17) {
4482 if (skb_padto(skb, 17))
4483 return NETDEV_TX_OK;
4484 skb->len = 17;
4485 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004486
Alexander Duyck1cc3bd82011-08-26 07:44:10 +00004487 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
Auke Kok9d5c8242008-01-24 02:22:38 -08004488}
4489
4490/**
4491 * igb_tx_timeout - Respond to a Tx Hang
4492 * @netdev: network interface device structure
4493 **/
4494static void igb_tx_timeout(struct net_device *netdev)
4495{
4496 struct igb_adapter *adapter = netdev_priv(netdev);
4497 struct e1000_hw *hw = &adapter->hw;
4498
4499 /* Do the reset outside of interrupt context */
4500 adapter->tx_timeout_count++;
Alexander Duyckf7ba2052009-10-27 23:48:51 +00004501
Alexander Duyck55cac242009-11-19 12:42:21 +00004502 if (hw->mac.type == e1000_82580)
4503 hw->dev_spec._82575.global_device_reset = true;
4504
Auke Kok9d5c8242008-01-24 02:22:38 -08004505 schedule_work(&adapter->reset_task);
Alexander Duyck265de402009-02-06 23:22:52 +00004506 wr32(E1000_EICS,
4507 (adapter->eims_enable_mask & ~adapter->eims_other));
Auke Kok9d5c8242008-01-24 02:22:38 -08004508}
4509
4510static void igb_reset_task(struct work_struct *work)
4511{
4512 struct igb_adapter *adapter;
4513 adapter = container_of(work, struct igb_adapter, reset_task);
4514
Taku Izumic97ec422010-04-27 14:39:30 +00004515 igb_dump(adapter);
4516 netdev_err(adapter->netdev, "Reset adapter\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08004517 igb_reinit_locked(adapter);
4518}
4519
4520/**
Eric Dumazet12dcd862010-10-15 17:27:10 +00004521 * igb_get_stats64 - Get System Network Statistics
Auke Kok9d5c8242008-01-24 02:22:38 -08004522 * @netdev: network interface device structure
Eric Dumazet12dcd862010-10-15 17:27:10 +00004523 * @stats: rtnl_link_stats64 pointer
Auke Kok9d5c8242008-01-24 02:22:38 -08004524 *
Auke Kok9d5c8242008-01-24 02:22:38 -08004525 **/
Eric Dumazet12dcd862010-10-15 17:27:10 +00004526static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4527 struct rtnl_link_stats64 *stats)
Auke Kok9d5c8242008-01-24 02:22:38 -08004528{
Eric Dumazet12dcd862010-10-15 17:27:10 +00004529 struct igb_adapter *adapter = netdev_priv(netdev);
4530
4531 spin_lock(&adapter->stats64_lock);
4532 igb_update_stats(adapter, &adapter->stats64);
4533 memcpy(stats, &adapter->stats64, sizeof(*stats));
4534 spin_unlock(&adapter->stats64_lock);
4535
4536 return stats;
Auke Kok9d5c8242008-01-24 02:22:38 -08004537}
4538
4539/**
4540 * igb_change_mtu - Change the Maximum Transfer Unit
4541 * @netdev: network interface device structure
4542 * @new_mtu: new value for maximum frame size
4543 *
4544 * Returns 0 on success, negative on failure
4545 **/
4546static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4547{
4548 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck090b1792009-10-27 23:51:55 +00004549 struct pci_dev *pdev = adapter->pdev;
Alexander Duyck153285f2011-08-26 07:43:32 +00004550 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
Auke Kok9d5c8242008-01-24 02:22:38 -08004551
Alexander Duyckc809d222009-10-27 23:52:13 +00004552 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
Alexander Duyck090b1792009-10-27 23:51:55 +00004553 dev_err(&pdev->dev, "Invalid MTU setting\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08004554 return -EINVAL;
4555 }
4556
Alexander Duyck153285f2011-08-26 07:43:32 +00004557#define MAX_STD_JUMBO_FRAME_SIZE 9238
Auke Kok9d5c8242008-01-24 02:22:38 -08004558 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
Alexander Duyck090b1792009-10-27 23:51:55 +00004559 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08004560 return -EINVAL;
4561 }
4562
4563 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4564 msleep(1);
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004565
Auke Kok9d5c8242008-01-24 02:22:38 -08004566 /* igb_down has a dependency on max_frame_size */
4567 adapter->max_frame_size = max_frame;
Alexander Duyck559e9c42009-10-27 23:52:50 +00004568
Alexander Duyck4c844852009-10-27 15:52:07 +00004569 if (netif_running(netdev))
4570 igb_down(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08004571
Alexander Duyck090b1792009-10-27 23:51:55 +00004572 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08004573 netdev->mtu, new_mtu);
4574 netdev->mtu = new_mtu;
4575
4576 if (netif_running(netdev))
4577 igb_up(adapter);
4578 else
4579 igb_reset(adapter);
4580
4581 clear_bit(__IGB_RESETTING, &adapter->state);
4582
4583 return 0;
4584}
4585
4586/**
4587 * igb_update_stats - Update the board statistics counters
4588 * @adapter: board private structure
4589 **/
4590
Eric Dumazet12dcd862010-10-15 17:27:10 +00004591void igb_update_stats(struct igb_adapter *adapter,
4592 struct rtnl_link_stats64 *net_stats)
Auke Kok9d5c8242008-01-24 02:22:38 -08004593{
4594 struct e1000_hw *hw = &adapter->hw;
4595 struct pci_dev *pdev = adapter->pdev;
Mitch Williamsfa3d9a62010-03-23 18:34:38 +00004596 u32 reg, mpc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004597 u16 phy_tmp;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004598 int i;
4599 u64 bytes, packets;
Eric Dumazet12dcd862010-10-15 17:27:10 +00004600 unsigned int start;
4601 u64 _bytes, _packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08004602
4603#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4604
4605 /*
4606 * Prevent stats update while adapter is being reset, or if the pci
4607 * connection is down.
4608 */
4609 if (adapter->link_speed == 0)
4610 return;
4611 if (pci_channel_offline(pdev))
4612 return;
4613
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004614 bytes = 0;
4615 packets = 0;
4616 for (i = 0; i < adapter->num_rx_queues; i++) {
4617 u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF;
Alexander Duyck3025a442010-02-17 01:02:39 +00004618 struct igb_ring *ring = adapter->rx_ring[i];
Eric Dumazet12dcd862010-10-15 17:27:10 +00004619
Alexander Duyck3025a442010-02-17 01:02:39 +00004620 ring->rx_stats.drops += rqdpc_tmp;
Alexander Duyck128e45e2009-11-12 18:37:38 +00004621 net_stats->rx_fifo_errors += rqdpc_tmp;
Eric Dumazet12dcd862010-10-15 17:27:10 +00004622
4623 do {
4624 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4625 _bytes = ring->rx_stats.bytes;
4626 _packets = ring->rx_stats.packets;
4627 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4628 bytes += _bytes;
4629 packets += _packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004630 }
4631
Alexander Duyck128e45e2009-11-12 18:37:38 +00004632 net_stats->rx_bytes = bytes;
4633 net_stats->rx_packets = packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004634
4635 bytes = 0;
4636 packets = 0;
4637 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck3025a442010-02-17 01:02:39 +00004638 struct igb_ring *ring = adapter->tx_ring[i];
Eric Dumazet12dcd862010-10-15 17:27:10 +00004639 do {
4640 start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4641 _bytes = ring->tx_stats.bytes;
4642 _packets = ring->tx_stats.packets;
4643 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4644 bytes += _bytes;
4645 packets += _packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004646 }
Alexander Duyck128e45e2009-11-12 18:37:38 +00004647 net_stats->tx_bytes = bytes;
4648 net_stats->tx_packets = packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004649
4650 /* read stats registers */
Auke Kok9d5c8242008-01-24 02:22:38 -08004651 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4652 adapter->stats.gprc += rd32(E1000_GPRC);
4653 adapter->stats.gorc += rd32(E1000_GORCL);
4654 rd32(E1000_GORCH); /* clear GORCL */
4655 adapter->stats.bprc += rd32(E1000_BPRC);
4656 adapter->stats.mprc += rd32(E1000_MPRC);
4657 adapter->stats.roc += rd32(E1000_ROC);
4658
4659 adapter->stats.prc64 += rd32(E1000_PRC64);
4660 adapter->stats.prc127 += rd32(E1000_PRC127);
4661 adapter->stats.prc255 += rd32(E1000_PRC255);
4662 adapter->stats.prc511 += rd32(E1000_PRC511);
4663 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4664 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4665 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4666 adapter->stats.sec += rd32(E1000_SEC);
4667
Mitch Williamsfa3d9a62010-03-23 18:34:38 +00004668 mpc = rd32(E1000_MPC);
4669 adapter->stats.mpc += mpc;
4670 net_stats->rx_fifo_errors += mpc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004671 adapter->stats.scc += rd32(E1000_SCC);
4672 adapter->stats.ecol += rd32(E1000_ECOL);
4673 adapter->stats.mcc += rd32(E1000_MCC);
4674 adapter->stats.latecol += rd32(E1000_LATECOL);
4675 adapter->stats.dc += rd32(E1000_DC);
4676 adapter->stats.rlec += rd32(E1000_RLEC);
4677 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4678 adapter->stats.xontxc += rd32(E1000_XONTXC);
4679 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4680 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4681 adapter->stats.fcruc += rd32(E1000_FCRUC);
4682 adapter->stats.gptc += rd32(E1000_GPTC);
4683 adapter->stats.gotc += rd32(E1000_GOTCL);
4684 rd32(E1000_GOTCH); /* clear GOTCL */
Mitch Williamsfa3d9a62010-03-23 18:34:38 +00004685 adapter->stats.rnbc += rd32(E1000_RNBC);
Auke Kok9d5c8242008-01-24 02:22:38 -08004686 adapter->stats.ruc += rd32(E1000_RUC);
4687 adapter->stats.rfc += rd32(E1000_RFC);
4688 adapter->stats.rjc += rd32(E1000_RJC);
4689 adapter->stats.tor += rd32(E1000_TORH);
4690 adapter->stats.tot += rd32(E1000_TOTH);
4691 adapter->stats.tpr += rd32(E1000_TPR);
4692
4693 adapter->stats.ptc64 += rd32(E1000_PTC64);
4694 adapter->stats.ptc127 += rd32(E1000_PTC127);
4695 adapter->stats.ptc255 += rd32(E1000_PTC255);
4696 adapter->stats.ptc511 += rd32(E1000_PTC511);
4697 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4698 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4699
4700 adapter->stats.mptc += rd32(E1000_MPTC);
4701 adapter->stats.bptc += rd32(E1000_BPTC);
4702
Nick Nunley2d0b0f62010-02-17 01:02:59 +00004703 adapter->stats.tpt += rd32(E1000_TPT);
4704 adapter->stats.colc += rd32(E1000_COLC);
Auke Kok9d5c8242008-01-24 02:22:38 -08004705
4706 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
Nick Nunley43915c7c2010-02-17 01:03:58 +00004707 /* read internal phy specific stats */
4708 reg = rd32(E1000_CTRL_EXT);
4709 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4710 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4711 adapter->stats.tncrs += rd32(E1000_TNCRS);
4712 }
4713
Auke Kok9d5c8242008-01-24 02:22:38 -08004714 adapter->stats.tsctc += rd32(E1000_TSCTC);
4715 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4716
4717 adapter->stats.iac += rd32(E1000_IAC);
4718 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4719 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4720 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4721 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4722 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4723 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4724 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4725 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4726
4727 /* Fill out the OS statistics structure */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004728 net_stats->multicast = adapter->stats.mprc;
4729 net_stats->collisions = adapter->stats.colc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004730
4731 /* Rx Errors */
4732
4733 /* RLEC on some newer hardware can be incorrect so build
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +00004734 * our own version based on RUC and ROC */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004735 net_stats->rx_errors = adapter->stats.rxerrc +
Auke Kok9d5c8242008-01-24 02:22:38 -08004736 adapter->stats.crcerrs + adapter->stats.algnerrc +
4737 adapter->stats.ruc + adapter->stats.roc +
4738 adapter->stats.cexterr;
Alexander Duyck128e45e2009-11-12 18:37:38 +00004739 net_stats->rx_length_errors = adapter->stats.ruc +
4740 adapter->stats.roc;
4741 net_stats->rx_crc_errors = adapter->stats.crcerrs;
4742 net_stats->rx_frame_errors = adapter->stats.algnerrc;
4743 net_stats->rx_missed_errors = adapter->stats.mpc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004744
4745 /* Tx Errors */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004746 net_stats->tx_errors = adapter->stats.ecol +
4747 adapter->stats.latecol;
4748 net_stats->tx_aborted_errors = adapter->stats.ecol;
4749 net_stats->tx_window_errors = adapter->stats.latecol;
4750 net_stats->tx_carrier_errors = adapter->stats.tncrs;
Auke Kok9d5c8242008-01-24 02:22:38 -08004751
4752 /* Tx Dropped needs to be maintained elsewhere */
4753
4754 /* Phy Stats */
4755 if (hw->phy.media_type == e1000_media_type_copper) {
4756 if ((adapter->link_speed == SPEED_1000) &&
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004757 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004758 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
4759 adapter->phy_stats.idle_errors += phy_tmp;
4760 }
4761 }
4762
4763 /* Management Stats */
4764 adapter->stats.mgptc += rd32(E1000_MGTPTC);
4765 adapter->stats.mgprc += rd32(E1000_MGTPRC);
4766 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
Carolyn Wyborny0a915b92011-02-26 07:42:37 +00004767
4768 /* OS2BMC Stats */
4769 reg = rd32(E1000_MANC);
4770 if (reg & E1000_MANC_EN_BMC2OS) {
4771 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
4772 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
4773 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
4774 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
4775 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004776}
4777
Auke Kok9d5c8242008-01-24 02:22:38 -08004778static irqreturn_t igb_msix_other(int irq, void *data)
4779{
Alexander Duyck047e0032009-10-27 15:49:27 +00004780 struct igb_adapter *adapter = data;
Auke Kok9d5c8242008-01-24 02:22:38 -08004781 struct e1000_hw *hw = &adapter->hw;
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004782 u32 icr = rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004783 /* reading ICR causes bit 31 of EICR to be cleared */
Alexander Duyckdda0e082009-02-06 23:19:08 +00004784
Alexander Duyck7f081d42010-01-07 17:41:00 +00004785 if (icr & E1000_ICR_DRSTA)
4786 schedule_work(&adapter->reset_task);
4787
Alexander Duyck047e0032009-10-27 15:49:27 +00004788 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00004789 /* HW is reporting DMA is out of sync */
4790 adapter->stats.doosync++;
Greg Rose13800462010-11-06 02:08:26 +00004791 /* The DMA Out of Sync is also indication of a spoof event
4792 * in IOV mode. Check the Wrong VM Behavior register to
4793 * see if it is really a spoof event. */
4794 igb_check_wvbr(adapter);
Alexander Duyckdda0e082009-02-06 23:19:08 +00004795 }
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004796
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004797 /* Check for a mailbox event */
4798 if (icr & E1000_ICR_VMMB)
4799 igb_msg_task(adapter);
4800
4801 if (icr & E1000_ICR_LSC) {
4802 hw->mac.get_link_status = 1;
4803 /* guard against interrupt when we're going down */
4804 if (!test_bit(__IGB_DOWN, &adapter->state))
4805 mod_timer(&adapter->watchdog_timer, jiffies + 1);
4806 }
4807
Alexander Duyck25568a52009-10-27 23:49:59 +00004808 if (adapter->vfs_allocated_count)
4809 wr32(E1000_IMS, E1000_IMS_LSC |
4810 E1000_IMS_VMMB |
4811 E1000_IMS_DOUTSYNC);
4812 else
4813 wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004814 wr32(E1000_EIMS, adapter->eims_other);
Auke Kok9d5c8242008-01-24 02:22:38 -08004815
4816 return IRQ_HANDLED;
4817}
4818
Alexander Duyck047e0032009-10-27 15:49:27 +00004819static void igb_write_itr(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08004820{
Alexander Duyck26b39272010-02-17 01:00:41 +00004821 struct igb_adapter *adapter = q_vector->adapter;
Alexander Duyck047e0032009-10-27 15:49:27 +00004822 u32 itr_val = q_vector->itr_val & 0x7FFC;
Auke Kok9d5c8242008-01-24 02:22:38 -08004823
Alexander Duyck047e0032009-10-27 15:49:27 +00004824 if (!q_vector->set_itr)
4825 return;
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004826
Alexander Duyck047e0032009-10-27 15:49:27 +00004827 if (!itr_val)
4828 itr_val = 0x4;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004829
Alexander Duyck26b39272010-02-17 01:00:41 +00004830 if (adapter->hw.mac.type == e1000_82575)
4831 itr_val |= itr_val << 16;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004832 else
Alexander Duyck047e0032009-10-27 15:49:27 +00004833 itr_val |= 0x8000000;
4834
4835 writel(itr_val, q_vector->itr_register);
4836 q_vector->set_itr = 0;
4837}
4838
4839static irqreturn_t igb_msix_ring(int irq, void *data)
4840{
4841 struct igb_q_vector *q_vector = data;
4842
4843 /* Write the ITR value calculated from the previous interrupt. */
4844 igb_write_itr(q_vector);
4845
4846 napi_schedule(&q_vector->napi);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004847
Auke Kok9d5c8242008-01-24 02:22:38 -08004848 return IRQ_HANDLED;
4849}
4850
Jeff Kirsher421e02f2008-10-17 11:08:31 -07004851#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +00004852static void igb_update_dca(struct igb_q_vector *q_vector)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004853{
Alexander Duyck047e0032009-10-27 15:49:27 +00004854 struct igb_adapter *adapter = q_vector->adapter;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004855 struct e1000_hw *hw = &adapter->hw;
4856 int cpu = get_cpu();
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004857
Alexander Duyck047e0032009-10-27 15:49:27 +00004858 if (q_vector->cpu == cpu)
4859 goto out_no_update;
4860
4861 if (q_vector->tx_ring) {
4862 int q = q_vector->tx_ring->reg_idx;
4863 u32 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
4864 if (hw->mac.type == e1000_82575) {
4865 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
4866 dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4867 } else {
4868 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
4869 dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4870 E1000_DCA_TXCTRL_CPUID_SHIFT;
4871 }
4872 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
4873 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
4874 }
4875 if (q_vector->rx_ring) {
4876 int q = q_vector->rx_ring->reg_idx;
4877 u32 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
4878 if (hw->mac.type == e1000_82575) {
4879 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
4880 dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4881 } else {
Alexander Duyck2d064c02008-07-08 15:10:12 -07004882 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
Maciej Sosnowski92be7912009-03-13 20:40:21 +00004883 dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
Alexander Duyck2d064c02008-07-08 15:10:12 -07004884 E1000_DCA_RXCTRL_CPUID_SHIFT;
Alexander Duyck2d064c02008-07-08 15:10:12 -07004885 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004886 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
4887 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
4888 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
4889 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004890 }
Alexander Duyck047e0032009-10-27 15:49:27 +00004891 q_vector->cpu = cpu;
4892out_no_update:
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004893 put_cpu();
4894}
4895
4896static void igb_setup_dca(struct igb_adapter *adapter)
4897{
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00004898 struct e1000_hw *hw = &adapter->hw;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004899 int i;
4900
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004901 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004902 return;
4903
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00004904 /* Always use CB2 mode, difference is masked in the CB driver. */
4905 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
4906
Alexander Duyck047e0032009-10-27 15:49:27 +00004907 for (i = 0; i < adapter->num_q_vectors; i++) {
Alexander Duyck26b39272010-02-17 01:00:41 +00004908 adapter->q_vector[i]->cpu = -1;
4909 igb_update_dca(adapter->q_vector[i]);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004910 }
4911}
4912
4913static int __igb_notify_dca(struct device *dev, void *data)
4914{
4915 struct net_device *netdev = dev_get_drvdata(dev);
4916 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck090b1792009-10-27 23:51:55 +00004917 struct pci_dev *pdev = adapter->pdev;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004918 struct e1000_hw *hw = &adapter->hw;
4919 unsigned long event = *(unsigned long *)data;
4920
4921 switch (event) {
4922 case DCA_PROVIDER_ADD:
4923 /* if already enabled, don't do it again */
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004924 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004925 break;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004926 if (dca_add_requester(dev) == 0) {
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08004927 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Alexander Duyck090b1792009-10-27 23:51:55 +00004928 dev_info(&pdev->dev, "DCA enabled\n");
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004929 igb_setup_dca(adapter);
4930 break;
4931 }
4932 /* Fall Through since DCA is disabled. */
4933 case DCA_PROVIDER_REMOVE:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004934 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004935 /* without this a class_device is left
Alexander Duyck047e0032009-10-27 15:49:27 +00004936 * hanging around in the sysfs model */
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004937 dca_remove_requester(dev);
Alexander Duyck090b1792009-10-27 23:51:55 +00004938 dev_info(&pdev->dev, "DCA disabled\n");
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004939 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08004940 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004941 }
4942 break;
4943 }
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08004944
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004945 return 0;
4946}
4947
4948static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
4949 void *p)
4950{
4951 int ret_val;
4952
4953 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
4954 __igb_notify_dca);
4955
4956 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4957}
Jeff Kirsher421e02f2008-10-17 11:08:31 -07004958#endif /* CONFIG_IGB_DCA */
Auke Kok9d5c8242008-01-24 02:22:38 -08004959
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004960static void igb_ping_all_vfs(struct igb_adapter *adapter)
4961{
4962 struct e1000_hw *hw = &adapter->hw;
4963 u32 ping;
4964 int i;
4965
4966 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
4967 ping = E1000_PF_CONTROL_MSG;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004968 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004969 ping |= E1000_VT_MSGTYPE_CTS;
4970 igb_write_mbx(hw, &ping, 1, i);
4971 }
4972}
4973
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004974static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
4975{
4976 struct e1000_hw *hw = &adapter->hw;
4977 u32 vmolr = rd32(E1000_VMOLR(vf));
4978 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
4979
Alexander Duyckd85b90042010-09-22 17:56:20 +00004980 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004981 IGB_VF_FLAG_MULTI_PROMISC);
4982 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
4983
4984 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
4985 vmolr |= E1000_VMOLR_MPME;
Alexander Duyckd85b90042010-09-22 17:56:20 +00004986 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004987 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
4988 } else {
4989 /*
4990 * if we have hashes and we are clearing a multicast promisc
4991 * flag we need to write the hashes to the MTA as this step
4992 * was previously skipped
4993 */
4994 if (vf_data->num_vf_mc_hashes > 30) {
4995 vmolr |= E1000_VMOLR_MPME;
4996 } else if (vf_data->num_vf_mc_hashes) {
4997 int j;
4998 vmolr |= E1000_VMOLR_ROMPE;
4999 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5000 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5001 }
5002 }
5003
5004 wr32(E1000_VMOLR(vf), vmolr);
5005
5006 /* there are flags left unprocessed, likely not supported */
5007 if (*msgbuf & E1000_VT_MSGINFO_MASK)
5008 return -EINVAL;
5009
5010 return 0;
5011
5012}
5013
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005014static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5015 u32 *msgbuf, u32 vf)
5016{
5017 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5018 u16 *hash_list = (u16 *)&msgbuf[1];
5019 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5020 int i;
5021
Alexander Duyck7d5753f2009-10-27 23:47:16 +00005022 /* salt away the number of multicast addresses assigned
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005023 * to this VF for later use to restore when the PF multi cast
5024 * list changes
5025 */
5026 vf_data->num_vf_mc_hashes = n;
5027
Alexander Duyck7d5753f2009-10-27 23:47:16 +00005028 /* only up to 30 hash values supported */
5029 if (n > 30)
5030 n = 30;
5031
5032 /* store the hashes for later use */
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005033 for (i = 0; i < n; i++)
Joe Perchesa419aef2009-08-18 11:18:35 -07005034 vf_data->vf_mc_hashes[i] = hash_list[i];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005035
5036 /* Flush and reset the mta with the new values */
Alexander Duyckff41f8d2009-09-03 14:48:56 +00005037 igb_set_rx_mode(adapter->netdev);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005038
5039 return 0;
5040}
5041
5042static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5043{
5044 struct e1000_hw *hw = &adapter->hw;
5045 struct vf_data_storage *vf_data;
5046 int i, j;
5047
5048 for (i = 0; i < adapter->vfs_allocated_count; i++) {
Alexander Duyck7d5753f2009-10-27 23:47:16 +00005049 u32 vmolr = rd32(E1000_VMOLR(i));
5050 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5051
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005052 vf_data = &adapter->vf_data[i];
Alexander Duyck7d5753f2009-10-27 23:47:16 +00005053
5054 if ((vf_data->num_vf_mc_hashes > 30) ||
5055 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5056 vmolr |= E1000_VMOLR_MPME;
5057 } else if (vf_data->num_vf_mc_hashes) {
5058 vmolr |= E1000_VMOLR_ROMPE;
5059 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5060 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5061 }
5062 wr32(E1000_VMOLR(i), vmolr);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005063 }
5064}
5065
5066static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5067{
5068 struct e1000_hw *hw = &adapter->hw;
5069 u32 pool_mask, reg, vid;
5070 int i;
5071
5072 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5073
5074 /* Find the vlan filter for this id */
5075 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5076 reg = rd32(E1000_VLVF(i));
5077
5078 /* remove the vf from the pool */
5079 reg &= ~pool_mask;
5080
5081 /* if pool is empty then remove entry from vfta */
5082 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5083 (reg & E1000_VLVF_VLANID_ENABLE)) {
5084 reg = 0;
5085 vid = reg & E1000_VLVF_VLANID_MASK;
5086 igb_vfta_set(hw, vid, false);
5087 }
5088
5089 wr32(E1000_VLVF(i), reg);
5090 }
Alexander Duyckae641bd2009-09-03 14:49:33 +00005091
5092 adapter->vf_data[vf].vlans_enabled = 0;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005093}
5094
5095static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5096{
5097 struct e1000_hw *hw = &adapter->hw;
5098 u32 reg, i;
5099
Alexander Duyck51466232009-10-27 23:47:35 +00005100 /* The vlvf table only exists on 82576 hardware and newer */
5101 if (hw->mac.type < e1000_82576)
5102 return -1;
5103
5104 /* we only need to do this if VMDq is enabled */
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005105 if (!adapter->vfs_allocated_count)
5106 return -1;
5107
5108 /* Find the vlan filter for this id */
5109 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5110 reg = rd32(E1000_VLVF(i));
5111 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5112 vid == (reg & E1000_VLVF_VLANID_MASK))
5113 break;
5114 }
5115
5116 if (add) {
5117 if (i == E1000_VLVF_ARRAY_SIZE) {
5118 /* Did not find a matching VLAN ID entry that was
5119 * enabled. Search for a free filter entry, i.e.
5120 * one without the enable bit set
5121 */
5122 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5123 reg = rd32(E1000_VLVF(i));
5124 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5125 break;
5126 }
5127 }
5128 if (i < E1000_VLVF_ARRAY_SIZE) {
5129 /* Found an enabled/available entry */
5130 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5131
5132 /* if !enabled we need to set this up in vfta */
5133 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
Alexander Duyck51466232009-10-27 23:47:35 +00005134 /* add VID to filter table */
5135 igb_vfta_set(hw, vid, true);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005136 reg |= E1000_VLVF_VLANID_ENABLE;
5137 }
Alexander Duyckcad6d052009-03-13 20:41:37 +00005138 reg &= ~E1000_VLVF_VLANID_MASK;
5139 reg |= vid;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005140 wr32(E1000_VLVF(i), reg);
Alexander Duyckae641bd2009-09-03 14:49:33 +00005141
5142 /* do not modify RLPML for PF devices */
5143 if (vf >= adapter->vfs_allocated_count)
5144 return 0;
5145
5146 if (!adapter->vf_data[vf].vlans_enabled) {
5147 u32 size;
5148 reg = rd32(E1000_VMOLR(vf));
5149 size = reg & E1000_VMOLR_RLPML_MASK;
5150 size += 4;
5151 reg &= ~E1000_VMOLR_RLPML_MASK;
5152 reg |= size;
5153 wr32(E1000_VMOLR(vf), reg);
5154 }
Alexander Duyckae641bd2009-09-03 14:49:33 +00005155
Alexander Duyck51466232009-10-27 23:47:35 +00005156 adapter->vf_data[vf].vlans_enabled++;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005157 return 0;
5158 }
5159 } else {
5160 if (i < E1000_VLVF_ARRAY_SIZE) {
5161 /* remove vf from the pool */
5162 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5163 /* if pool is empty then remove entry from vfta */
5164 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5165 reg = 0;
5166 igb_vfta_set(hw, vid, false);
5167 }
5168 wr32(E1000_VLVF(i), reg);
Alexander Duyckae641bd2009-09-03 14:49:33 +00005169
5170 /* do not modify RLPML for PF devices */
5171 if (vf >= adapter->vfs_allocated_count)
5172 return 0;
5173
5174 adapter->vf_data[vf].vlans_enabled--;
5175 if (!adapter->vf_data[vf].vlans_enabled) {
5176 u32 size;
5177 reg = rd32(E1000_VMOLR(vf));
5178 size = reg & E1000_VMOLR_RLPML_MASK;
5179 size -= 4;
5180 reg &= ~E1000_VMOLR_RLPML_MASK;
5181 reg |= size;
5182 wr32(E1000_VMOLR(vf), reg);
5183 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005184 }
5185 }
Williams, Mitch A8151d292010-02-10 01:44:24 +00005186 return 0;
5187}
5188
5189static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5190{
5191 struct e1000_hw *hw = &adapter->hw;
5192
5193 if (vid)
5194 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5195 else
5196 wr32(E1000_VMVIR(vf), 0);
5197}
5198
5199static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5200 int vf, u16 vlan, u8 qos)
5201{
5202 int err = 0;
5203 struct igb_adapter *adapter = netdev_priv(netdev);
5204
5205 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5206 return -EINVAL;
5207 if (vlan || qos) {
5208 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5209 if (err)
5210 goto out;
5211 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5212 igb_set_vmolr(adapter, vf, !vlan);
5213 adapter->vf_data[vf].pf_vlan = vlan;
5214 adapter->vf_data[vf].pf_qos = qos;
5215 dev_info(&adapter->pdev->dev,
5216 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5217 if (test_bit(__IGB_DOWN, &adapter->state)) {
5218 dev_warn(&adapter->pdev->dev,
5219 "The VF VLAN has been set,"
5220 " but the PF device is not up.\n");
5221 dev_warn(&adapter->pdev->dev,
5222 "Bring the PF device up before"
5223 " attempting to use the VF device.\n");
5224 }
5225 } else {
5226 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5227 false, vf);
5228 igb_set_vmvir(adapter, vlan, vf);
5229 igb_set_vmolr(adapter, vf, true);
5230 adapter->vf_data[vf].pf_vlan = 0;
5231 adapter->vf_data[vf].pf_qos = 0;
5232 }
5233out:
5234 return err;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005235}
5236
5237static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5238{
5239 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5240 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5241
5242 return igb_vlvf_set(adapter, vid, add, vf);
5243}
5244
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005245static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005246{
Greg Rose8fa7e0f2010-11-06 05:43:21 +00005247 /* clear flags - except flag that indicates PF has set the MAC */
5248 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005249 adapter->vf_data[vf].last_nack = jiffies;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005250
5251 /* reset offloads to defaults */
Williams, Mitch A8151d292010-02-10 01:44:24 +00005252 igb_set_vmolr(adapter, vf, true);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005253
5254 /* reset vlans for device */
5255 igb_clear_vf_vfta(adapter, vf);
Williams, Mitch A8151d292010-02-10 01:44:24 +00005256 if (adapter->vf_data[vf].pf_vlan)
5257 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5258 adapter->vf_data[vf].pf_vlan,
5259 adapter->vf_data[vf].pf_qos);
5260 else
5261 igb_clear_vf_vfta(adapter, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005262
5263 /* reset multicast table array for vf */
5264 adapter->vf_data[vf].num_vf_mc_hashes = 0;
5265
5266 /* Flush and reset the mta with the new values */
Alexander Duyckff41f8d2009-09-03 14:48:56 +00005267 igb_set_rx_mode(adapter->netdev);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005268}
5269
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005270static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5271{
5272 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5273
5274 /* generate a new mac address as we were hotplug removed/added */
Williams, Mitch A8151d292010-02-10 01:44:24 +00005275 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5276 random_ether_addr(vf_mac);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005277
5278 /* process remaining reset events */
5279 igb_vf_reset(adapter, vf);
5280}
5281
5282static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005283{
5284 struct e1000_hw *hw = &adapter->hw;
5285 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
Alexander Duyckff41f8d2009-09-03 14:48:56 +00005286 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005287 u32 reg, msgbuf[3];
5288 u8 *addr = (u8 *)(&msgbuf[1]);
5289
5290 /* process all the same items cleared in a function level reset */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005291 igb_vf_reset(adapter, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005292
5293 /* set vf mac address */
Alexander Duyck26ad9172009-10-05 06:32:49 +00005294 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005295
5296 /* enable transmit and receive for vf */
5297 reg = rd32(E1000_VFTE);
5298 wr32(E1000_VFTE, reg | (1 << vf));
5299 reg = rd32(E1000_VFRE);
5300 wr32(E1000_VFRE, reg | (1 << vf));
5301
Greg Rose8fa7e0f2010-11-06 05:43:21 +00005302 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005303
5304 /* reply to reset with ack and vf mac address */
5305 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5306 memcpy(addr, vf_mac, 6);
5307 igb_write_mbx(hw, msgbuf, 3, vf);
5308}
5309
5310static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5311{
Greg Rosede42edd2010-07-01 13:39:23 +00005312 /*
5313 * The VF MAC Address is stored in a packed array of bytes
5314 * starting at the second 32 bit word of the msg array
5315 */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005316 unsigned char *addr = (char *)&msg[1];
5317 int err = -1;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005318
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005319 if (is_valid_ether_addr(addr))
5320 err = igb_set_vf_mac(adapter, vf, addr);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005321
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005322 return err;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005323}
5324
5325static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5326{
5327 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005328 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005329 u32 msg = E1000_VT_MSGTYPE_NACK;
5330
5331 /* if device isn't clear to send it shouldn't be reading either */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005332 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5333 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005334 igb_write_mbx(hw, &msg, 1, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005335 vf_data->last_nack = jiffies;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005336 }
5337}
5338
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005339static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005340{
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005341 struct pci_dev *pdev = adapter->pdev;
5342 u32 msgbuf[E1000_VFMAILBOX_SIZE];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005343 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005344 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005345 s32 retval;
5346
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005347 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005348
Alexander Duyckfef45f42009-12-11 22:57:34 -08005349 if (retval) {
5350 /* if receive failed revoke VF CTS stats and restart init */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005351 dev_err(&pdev->dev, "Error receiving message from VF\n");
Alexander Duyckfef45f42009-12-11 22:57:34 -08005352 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5353 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5354 return;
5355 goto out;
5356 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005357
5358 /* this is a message we already processed, do nothing */
5359 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005360 return;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005361
5362 /*
5363 * until the vf completes a reset it should not be
5364 * allowed to start any configuration.
5365 */
5366
5367 if (msgbuf[0] == E1000_VF_RESET) {
5368 igb_vf_reset_msg(adapter, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005369 return;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005370 }
5371
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005372 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
Alexander Duyckfef45f42009-12-11 22:57:34 -08005373 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5374 return;
5375 retval = -1;
5376 goto out;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005377 }
5378
5379 switch ((msgbuf[0] & 0xFFFF)) {
5380 case E1000_VF_SET_MAC_ADDR:
Greg Rosea6b5ea32010-11-06 05:42:59 +00005381 retval = -EINVAL;
5382 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5383 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5384 else
5385 dev_warn(&pdev->dev,
5386 "VF %d attempted to override administratively "
5387 "set MAC address\nReload the VF driver to "
5388 "resume operations\n", vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005389 break;
Alexander Duyck7d5753f2009-10-27 23:47:16 +00005390 case E1000_VF_SET_PROMISC:
5391 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5392 break;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005393 case E1000_VF_SET_MULTICAST:
5394 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5395 break;
5396 case E1000_VF_SET_LPE:
5397 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5398 break;
5399 case E1000_VF_SET_VLAN:
Greg Rosea6b5ea32010-11-06 05:42:59 +00005400 retval = -1;
5401 if (vf_data->pf_vlan)
5402 dev_warn(&pdev->dev,
5403 "VF %d attempted to override administratively "
5404 "set VLAN tag\nReload the VF driver to "
5405 "resume operations\n", vf);
Williams, Mitch A8151d292010-02-10 01:44:24 +00005406 else
5407 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005408 break;
5409 default:
Alexander Duyck090b1792009-10-27 23:51:55 +00005410 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005411 retval = -1;
5412 break;
5413 }
5414
Alexander Duyckfef45f42009-12-11 22:57:34 -08005415 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5416out:
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005417 /* notify the VF of the results of what it sent us */
5418 if (retval)
5419 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5420 else
5421 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5422
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005423 igb_write_mbx(hw, msgbuf, 1, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005424}
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005425
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00005426static void igb_msg_task(struct igb_adapter *adapter)
5427{
5428 struct e1000_hw *hw = &adapter->hw;
5429 u32 vf;
5430
5431 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5432 /* process any reset requests */
5433 if (!igb_check_for_rst(hw, vf))
5434 igb_vf_reset_event(adapter, vf);
5435
5436 /* process any messages pending */
5437 if (!igb_check_for_msg(hw, vf))
5438 igb_rcv_msg_from_vf(adapter, vf);
5439
5440 /* process any acks */
5441 if (!igb_check_for_ack(hw, vf))
5442 igb_rcv_ack_from_vf(adapter, vf);
5443 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005444}
5445
Auke Kok9d5c8242008-01-24 02:22:38 -08005446/**
Alexander Duyck68d480c2009-10-05 06:33:08 +00005447 * igb_set_uta - Set unicast filter table address
5448 * @adapter: board private structure
5449 *
5450 * The unicast table address is a register array of 32-bit registers.
5451 * The table is meant to be used in a way similar to how the MTA is used
5452 * however due to certain limitations in the hardware it is necessary to
Lucas De Marchi25985ed2011-03-30 22:57:33 -03005453 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5454 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
Alexander Duyck68d480c2009-10-05 06:33:08 +00005455 **/
5456static void igb_set_uta(struct igb_adapter *adapter)
5457{
5458 struct e1000_hw *hw = &adapter->hw;
5459 int i;
5460
5461 /* The UTA table only exists on 82576 hardware and newer */
5462 if (hw->mac.type < e1000_82576)
5463 return;
5464
5465 /* we only need to do this if VMDq is enabled */
5466 if (!adapter->vfs_allocated_count)
5467 return;
5468
5469 for (i = 0; i < hw->mac.uta_reg_count; i++)
5470 array_wr32(E1000_UTA, i, ~0);
5471}
5472
5473/**
Auke Kok9d5c8242008-01-24 02:22:38 -08005474 * igb_intr_msi - Interrupt Handler
5475 * @irq: interrupt number
5476 * @data: pointer to a network interface device structure
5477 **/
5478static irqreturn_t igb_intr_msi(int irq, void *data)
5479{
Alexander Duyck047e0032009-10-27 15:49:27 +00005480 struct igb_adapter *adapter = data;
5481 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08005482 struct e1000_hw *hw = &adapter->hw;
5483 /* read ICR disables interrupts using IAM */
5484 u32 icr = rd32(E1000_ICR);
5485
Alexander Duyck047e0032009-10-27 15:49:27 +00005486 igb_write_itr(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08005487
Alexander Duyck7f081d42010-01-07 17:41:00 +00005488 if (icr & E1000_ICR_DRSTA)
5489 schedule_work(&adapter->reset_task);
5490
Alexander Duyck047e0032009-10-27 15:49:27 +00005491 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00005492 /* HW is reporting DMA is out of sync */
5493 adapter->stats.doosync++;
5494 }
5495
Auke Kok9d5c8242008-01-24 02:22:38 -08005496 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5497 hw->mac.get_link_status = 1;
5498 if (!test_bit(__IGB_DOWN, &adapter->state))
5499 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5500 }
5501
Alexander Duyck047e0032009-10-27 15:49:27 +00005502 napi_schedule(&q_vector->napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08005503
5504 return IRQ_HANDLED;
5505}
5506
5507/**
Alexander Duyck4a3c6432009-02-06 23:20:49 +00005508 * igb_intr - Legacy Interrupt Handler
Auke Kok9d5c8242008-01-24 02:22:38 -08005509 * @irq: interrupt number
5510 * @data: pointer to a network interface device structure
5511 **/
5512static irqreturn_t igb_intr(int irq, void *data)
5513{
Alexander Duyck047e0032009-10-27 15:49:27 +00005514 struct igb_adapter *adapter = data;
5515 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08005516 struct e1000_hw *hw = &adapter->hw;
5517 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5518 * need for the IMC write */
5519 u32 icr = rd32(E1000_ICR);
Auke Kok9d5c8242008-01-24 02:22:38 -08005520 if (!icr)
5521 return IRQ_NONE; /* Not our interrupt */
5522
Alexander Duyck047e0032009-10-27 15:49:27 +00005523 igb_write_itr(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08005524
5525 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5526 * not set, then the adapter didn't send an interrupt */
5527 if (!(icr & E1000_ICR_INT_ASSERTED))
5528 return IRQ_NONE;
5529
Alexander Duyck7f081d42010-01-07 17:41:00 +00005530 if (icr & E1000_ICR_DRSTA)
5531 schedule_work(&adapter->reset_task);
5532
Alexander Duyck047e0032009-10-27 15:49:27 +00005533 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00005534 /* HW is reporting DMA is out of sync */
5535 adapter->stats.doosync++;
5536 }
5537
Auke Kok9d5c8242008-01-24 02:22:38 -08005538 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5539 hw->mac.get_link_status = 1;
5540 /* guard against interrupt when we're going down */
5541 if (!test_bit(__IGB_DOWN, &adapter->state))
5542 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5543 }
5544
Alexander Duyck047e0032009-10-27 15:49:27 +00005545 napi_schedule(&q_vector->napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08005546
5547 return IRQ_HANDLED;
5548}
5549
Alexander Duyck047e0032009-10-27 15:49:27 +00005550static inline void igb_ring_irq_enable(struct igb_q_vector *q_vector)
Alexander Duyck46544252009-02-19 20:39:04 -08005551{
Alexander Duyck047e0032009-10-27 15:49:27 +00005552 struct igb_adapter *adapter = q_vector->adapter;
Alexander Duyck46544252009-02-19 20:39:04 -08005553 struct e1000_hw *hw = &adapter->hw;
5554
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00005555 if ((q_vector->rx_ring && (adapter->rx_itr_setting & 3)) ||
5556 (!q_vector->rx_ring && (adapter->tx_itr_setting & 3))) {
Alexander Duyck047e0032009-10-27 15:49:27 +00005557 if (!adapter->msix_entries)
Alexander Duyck46544252009-02-19 20:39:04 -08005558 igb_set_itr(adapter);
5559 else
Alexander Duyck047e0032009-10-27 15:49:27 +00005560 igb_update_ring_itr(q_vector);
Alexander Duyck46544252009-02-19 20:39:04 -08005561 }
5562
5563 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5564 if (adapter->msix_entries)
Alexander Duyck047e0032009-10-27 15:49:27 +00005565 wr32(E1000_EIMS, q_vector->eims_value);
Alexander Duyck46544252009-02-19 20:39:04 -08005566 else
5567 igb_irq_enable(adapter);
5568 }
5569}
5570
Auke Kok9d5c8242008-01-24 02:22:38 -08005571/**
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07005572 * igb_poll - NAPI Rx polling callback
5573 * @napi: napi polling structure
5574 * @budget: count of how many packets we should handle
Auke Kok9d5c8242008-01-24 02:22:38 -08005575 **/
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07005576static int igb_poll(struct napi_struct *napi, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08005577{
Alexander Duyck047e0032009-10-27 15:49:27 +00005578 struct igb_q_vector *q_vector = container_of(napi,
5579 struct igb_q_vector,
5580 napi);
Alexander Duyck16eb8812011-08-26 07:43:54 +00005581 bool clean_complete = true;
Auke Kok9d5c8242008-01-24 02:22:38 -08005582
Jeff Kirsher421e02f2008-10-17 11:08:31 -07005583#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +00005584 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5585 igb_update_dca(q_vector);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07005586#endif
Alexander Duyck047e0032009-10-27 15:49:27 +00005587 if (q_vector->tx_ring)
Alexander Duyck13fde972011-10-05 13:35:24 +00005588 clean_complete = igb_clean_tx_irq(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08005589
Alexander Duyck047e0032009-10-27 15:49:27 +00005590 if (q_vector->rx_ring)
Alexander Duyckcd392f52011-08-26 07:43:59 +00005591 clean_complete &= igb_clean_rx_irq(q_vector, budget);
Alexander Duyck047e0032009-10-27 15:49:27 +00005592
Alexander Duyck16eb8812011-08-26 07:43:54 +00005593 /* If all work not completed, return budget and keep polling */
5594 if (!clean_complete)
5595 return budget;
Auke Kok9d5c8242008-01-24 02:22:38 -08005596
Alexander Duyck46544252009-02-19 20:39:04 -08005597 /* If not enough Rx work done, exit the polling mode */
Alexander Duyck16eb8812011-08-26 07:43:54 +00005598 napi_complete(napi);
5599 igb_ring_irq_enable(q_vector);
Alexander Duyck46544252009-02-19 20:39:04 -08005600
Alexander Duyck16eb8812011-08-26 07:43:54 +00005601 return 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08005602}
Al Viro6d8126f2008-03-16 22:23:24 +00005603
Auke Kok9d5c8242008-01-24 02:22:38 -08005604/**
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005605 * igb_systim_to_hwtstamp - convert system time value to hw timestamp
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005606 * @adapter: board private structure
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005607 * @shhwtstamps: timestamp structure to update
5608 * @regval: unsigned 64bit system time value.
5609 *
5610 * We need to convert the system time value stored in the RX/TXSTMP registers
5611 * into a hwtstamp which can be used by the upper level timestamping functions
5612 */
5613static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
5614 struct skb_shared_hwtstamps *shhwtstamps,
5615 u64 regval)
5616{
5617 u64 ns;
5618
Alexander Duyck55cac242009-11-19 12:42:21 +00005619 /*
5620 * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to
5621 * 24 to match clock shift we setup earlier.
5622 */
5623 if (adapter->hw.mac.type == e1000_82580)
5624 regval <<= IGB_82580_TSYNC_SHIFT;
5625
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005626 ns = timecounter_cyc2time(&adapter->clock, regval);
5627 timecompare_update(&adapter->compare, ns);
5628 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
5629 shhwtstamps->hwtstamp = ns_to_ktime(ns);
5630 shhwtstamps->syststamp = timecompare_transform(&adapter->compare, ns);
5631}
5632
5633/**
5634 * igb_tx_hwtstamp - utility function which checks for TX time stamp
5635 * @q_vector: pointer to q_vector containing needed info
Alexander Duyck06034642011-08-26 07:44:22 +00005636 * @buffer: pointer to igb_tx_buffer structure
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005637 *
5638 * If we were asked to do hardware stamping and such a time stamp is
5639 * available, then it must have been for this skb here because we only
5640 * allow only one such packet into the queue.
5641 */
Alexander Duyck06034642011-08-26 07:44:22 +00005642static void igb_tx_hwtstamp(struct igb_q_vector *q_vector,
5643 struct igb_tx_buffer *buffer_info)
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005644{
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005645 struct igb_adapter *adapter = q_vector->adapter;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005646 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005647 struct skb_shared_hwtstamps shhwtstamps;
5648 u64 regval;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005649
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005650 /* if skb does not support hw timestamp or TX stamp not valid exit */
Alexander Duyck2bbfebe2011-08-26 07:44:59 +00005651 if (likely(!(buffer_info->tx_flags & IGB_TX_FLAGS_TSTAMP)) ||
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005652 !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID))
5653 return;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005654
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005655 regval = rd32(E1000_TXSTMPL);
5656 regval |= (u64)rd32(E1000_TXSTMPH) << 32;
5657
5658 igb_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
Nick Nunley28739572010-05-04 21:58:07 +00005659 skb_tstamp_tx(buffer_info->skb, &shhwtstamps);
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005660}
5661
5662/**
Auke Kok9d5c8242008-01-24 02:22:38 -08005663 * igb_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyck047e0032009-10-27 15:49:27 +00005664 * @q_vector: pointer to q_vector containing needed info
Auke Kok9d5c8242008-01-24 02:22:38 -08005665 * returns true if ring is completely cleaned
5666 **/
Alexander Duyck047e0032009-10-27 15:49:27 +00005667static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08005668{
Alexander Duyck047e0032009-10-27 15:49:27 +00005669 struct igb_adapter *adapter = q_vector->adapter;
5670 struct igb_ring *tx_ring = q_vector->tx_ring;
Alexander Duyck06034642011-08-26 07:44:22 +00005671 struct igb_tx_buffer *tx_buffer;
Alexander Duyck8542db02011-08-26 07:44:43 +00005672 union e1000_adv_tx_desc *tx_desc, *eop_desc;
Auke Kok9d5c8242008-01-24 02:22:38 -08005673 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck13fde972011-10-05 13:35:24 +00005674 unsigned int budget = q_vector->tx_work_limit;
Alexander Duyck8542db02011-08-26 07:44:43 +00005675 unsigned int i = tx_ring->next_to_clean;
Auke Kok9d5c8242008-01-24 02:22:38 -08005676
Alexander Duyck13fde972011-10-05 13:35:24 +00005677 if (test_bit(__IGB_DOWN, &adapter->state))
5678 return true;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08005679
Alexander Duyck06034642011-08-26 07:44:22 +00005680 tx_buffer = &tx_ring->tx_buffer_info[i];
Alexander Duyck13fde972011-10-05 13:35:24 +00005681 tx_desc = IGB_TX_DESC(tx_ring, i);
Alexander Duyck8542db02011-08-26 07:44:43 +00005682 i -= tx_ring->count;
Auke Kok9d5c8242008-01-24 02:22:38 -08005683
Alexander Duyck13fde972011-10-05 13:35:24 +00005684 for (; budget; budget--) {
Alexander Duyck8542db02011-08-26 07:44:43 +00005685 eop_desc = tx_buffer->next_to_watch;
Alexander Duyck13fde972011-10-05 13:35:24 +00005686
Alexander Duyck8542db02011-08-26 07:44:43 +00005687 /* prevent any other reads prior to eop_desc */
5688 rmb();
5689
5690 /* if next_to_watch is not set then there is no work pending */
5691 if (!eop_desc)
5692 break;
Alexander Duyck13fde972011-10-05 13:35:24 +00005693
5694 /* if DD is not set pending work has not been completed */
5695 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5696 break;
5697
Alexander Duyck8542db02011-08-26 07:44:43 +00005698 /* clear next_to_watch to prevent false hangs */
5699 tx_buffer->next_to_watch = NULL;
Alexander Duyck13fde972011-10-05 13:35:24 +00005700
Alexander Duyckebe42d12011-08-26 07:45:09 +00005701 /* update the statistics for this packet */
5702 total_bytes += tx_buffer->bytecount;
5703 total_packets += tx_buffer->gso_segs;
Alexander Duyck13fde972011-10-05 13:35:24 +00005704
Alexander Duyckebe42d12011-08-26 07:45:09 +00005705 /* retrieve hardware timestamp */
5706 igb_tx_hwtstamp(q_vector, tx_buffer);
Auke Kok9d5c8242008-01-24 02:22:38 -08005707
Alexander Duyckebe42d12011-08-26 07:45:09 +00005708 /* free the skb */
5709 dev_kfree_skb_any(tx_buffer->skb);
5710 tx_buffer->skb = NULL;
5711
5712 /* unmap skb header data */
5713 dma_unmap_single(tx_ring->dev,
5714 tx_buffer->dma,
5715 tx_buffer->length,
5716 DMA_TO_DEVICE);
5717
5718 /* clear last DMA location and unmap remaining buffers */
5719 while (tx_desc != eop_desc) {
5720 tx_buffer->dma = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08005721
Alexander Duyck13fde972011-10-05 13:35:24 +00005722 tx_buffer++;
5723 tx_desc++;
Auke Kok9d5c8242008-01-24 02:22:38 -08005724 i++;
Alexander Duyck8542db02011-08-26 07:44:43 +00005725 if (unlikely(!i)) {
5726 i -= tx_ring->count;
Alexander Duyck06034642011-08-26 07:44:22 +00005727 tx_buffer = tx_ring->tx_buffer_info;
Alexander Duyck13fde972011-10-05 13:35:24 +00005728 tx_desc = IGB_TX_DESC(tx_ring, 0);
5729 }
Alexander Duyckebe42d12011-08-26 07:45:09 +00005730
5731 /* unmap any remaining paged data */
5732 if (tx_buffer->dma) {
5733 dma_unmap_page(tx_ring->dev,
5734 tx_buffer->dma,
5735 tx_buffer->length,
5736 DMA_TO_DEVICE);
5737 }
5738 }
5739
5740 /* clear last DMA location */
5741 tx_buffer->dma = 0;
5742
5743 /* move us one more past the eop_desc for start of next pkt */
5744 tx_buffer++;
5745 tx_desc++;
5746 i++;
5747 if (unlikely(!i)) {
5748 i -= tx_ring->count;
5749 tx_buffer = tx_ring->tx_buffer_info;
5750 tx_desc = IGB_TX_DESC(tx_ring, 0);
5751 }
Alexander Duyck0e014cb2008-12-26 01:33:18 -08005752 }
5753
Alexander Duyck8542db02011-08-26 07:44:43 +00005754 i += tx_ring->count;
Auke Kok9d5c8242008-01-24 02:22:38 -08005755 tx_ring->next_to_clean = i;
Alexander Duyck13fde972011-10-05 13:35:24 +00005756 u64_stats_update_begin(&tx_ring->tx_syncp);
5757 tx_ring->tx_stats.bytes += total_bytes;
5758 tx_ring->tx_stats.packets += total_packets;
5759 u64_stats_update_end(&tx_ring->tx_syncp);
5760 tx_ring->total_bytes += total_bytes;
5761 tx_ring->total_packets += total_packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08005762
5763 if (tx_ring->detect_tx_hung) {
Alexander Duyck13fde972011-10-05 13:35:24 +00005764 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck13fde972011-10-05 13:35:24 +00005765
Alexander Duyck8542db02011-08-26 07:44:43 +00005766 eop_desc = tx_buffer->next_to_watch;
Alexander Duyck13fde972011-10-05 13:35:24 +00005767
Auke Kok9d5c8242008-01-24 02:22:38 -08005768 /* Detect a transmit hang in hardware, this serializes the
5769 * check with the clearing of time_stamp and movement of i */
5770 tx_ring->detect_tx_hung = false;
Alexander Duyck8542db02011-08-26 07:44:43 +00005771 if (eop_desc &&
5772 time_after(jiffies, tx_buffer->time_stamp +
Joe Perches8e95a202009-12-03 07:58:21 +00005773 (adapter->tx_timeout_factor * HZ)) &&
5774 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08005775
Auke Kok9d5c8242008-01-24 02:22:38 -08005776 /* detected Tx unit hang */
Alexander Duyck59d71982010-04-27 13:09:25 +00005777 dev_err(tx_ring->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08005778 "Detected Tx Unit Hang\n"
Alexander Duyck2d064c02008-07-08 15:10:12 -07005779 " Tx Queue <%d>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08005780 " TDH <%x>\n"
5781 " TDT <%x>\n"
5782 " next_to_use <%x>\n"
5783 " next_to_clean <%x>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08005784 "buffer_info[next_to_clean]\n"
5785 " time_stamp <%lx>\n"
Alexander Duyck8542db02011-08-26 07:44:43 +00005786 " next_to_watch <%p>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08005787 " jiffies <%lx>\n"
5788 " desc.status <%x>\n",
Alexander Duyck2d064c02008-07-08 15:10:12 -07005789 tx_ring->queue_index,
Alexander Duyck238ac812011-08-26 07:43:48 +00005790 rd32(E1000_TDH(tx_ring->reg_idx)),
Alexander Duyckfce99e32009-10-27 15:51:27 +00005791 readl(tx_ring->tail),
Auke Kok9d5c8242008-01-24 02:22:38 -08005792 tx_ring->next_to_use,
5793 tx_ring->next_to_clean,
Alexander Duyck8542db02011-08-26 07:44:43 +00005794 tx_buffer->time_stamp,
5795 eop_desc,
Auke Kok9d5c8242008-01-24 02:22:38 -08005796 jiffies,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08005797 eop_desc->wb.status);
Alexander Duyck13fde972011-10-05 13:35:24 +00005798 netif_stop_subqueue(tx_ring->netdev,
5799 tx_ring->queue_index);
5800
5801 /* we are about to reset, no point in enabling stuff */
5802 return true;
Auke Kok9d5c8242008-01-24 02:22:38 -08005803 }
5804 }
Alexander Duyck13fde972011-10-05 13:35:24 +00005805
5806 if (unlikely(total_packets &&
5807 netif_carrier_ok(tx_ring->netdev) &&
5808 igb_desc_unused(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
5809 /* Make sure that anybody stopping the queue after this
5810 * sees the new next_to_clean.
5811 */
5812 smp_mb();
5813 if (__netif_subqueue_stopped(tx_ring->netdev,
5814 tx_ring->queue_index) &&
5815 !(test_bit(__IGB_DOWN, &adapter->state))) {
5816 netif_wake_subqueue(tx_ring->netdev,
5817 tx_ring->queue_index);
5818
5819 u64_stats_update_begin(&tx_ring->tx_syncp);
5820 tx_ring->tx_stats.restart_queue++;
5821 u64_stats_update_end(&tx_ring->tx_syncp);
5822 }
5823 }
5824
5825 return !!budget;
Auke Kok9d5c8242008-01-24 02:22:38 -08005826}
5827
Alexander Duyckcd392f52011-08-26 07:43:59 +00005828static inline void igb_rx_checksum(struct igb_ring *ring,
5829 u32 status_err, struct sk_buff *skb)
Auke Kok9d5c8242008-01-24 02:22:38 -08005830{
Eric Dumazetbc8acf22010-09-02 13:07:41 -07005831 skb_checksum_none_assert(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005832
5833 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
Alexander Duyck866cff02011-08-26 07:45:36 +00005834 if (!test_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags) ||
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005835 (status_err & E1000_RXD_STAT_IXSM))
Auke Kok9d5c8242008-01-24 02:22:38 -08005836 return;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005837
Auke Kok9d5c8242008-01-24 02:22:38 -08005838 /* TCP/UDP checksum error bit is set */
5839 if (status_err &
5840 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
Jesse Brandeburgb9473562009-04-27 22:36:13 +00005841 /*
5842 * work around errata with sctp packets where the TCPE aka
5843 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
5844 * packets, (aka let the stack check the crc32c)
5845 */
Alexander Duyck866cff02011-08-26 07:45:36 +00005846 if (!((skb->len == 60) &&
5847 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
Eric Dumazet12dcd862010-10-15 17:27:10 +00005848 u64_stats_update_begin(&ring->rx_syncp);
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00005849 ring->rx_stats.csum_err++;
Eric Dumazet12dcd862010-10-15 17:27:10 +00005850 u64_stats_update_end(&ring->rx_syncp);
5851 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005852 /* let the stack verify checksum errors */
Auke Kok9d5c8242008-01-24 02:22:38 -08005853 return;
5854 }
5855 /* It must be a TCP or UDP packet with a valid checksum */
5856 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
5857 skb->ip_summed = CHECKSUM_UNNECESSARY;
5858
Alexander Duyck59d71982010-04-27 13:09:25 +00005859 dev_dbg(ring->dev, "cksum success: bits %08X\n", status_err);
Auke Kok9d5c8242008-01-24 02:22:38 -08005860}
5861
Nick Nunley757b77e2010-03-26 11:36:47 +00005862static void igb_rx_hwtstamp(struct igb_q_vector *q_vector, u32 staterr,
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005863 struct sk_buff *skb)
5864{
5865 struct igb_adapter *adapter = q_vector->adapter;
5866 struct e1000_hw *hw = &adapter->hw;
5867 u64 regval;
5868
5869 /*
5870 * If this bit is set, then the RX registers contain the time stamp. No
5871 * other packet will be time stamped until we read these registers, so
5872 * read the registers to make them available again. Because only one
5873 * packet can be time stamped at a time, we know that the register
5874 * values must belong to this one here and therefore we don't need to
5875 * compare any of the additional attributes stored for it.
5876 *
Oliver Hartkopp2244d072010-08-17 08:59:14 +00005877 * If nothing went wrong, then it should have a shared tx_flags that we
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005878 * can turn into a skb_shared_hwtstamps.
5879 */
Nick Nunley757b77e2010-03-26 11:36:47 +00005880 if (staterr & E1000_RXDADV_STAT_TSIP) {
5881 u32 *stamp = (u32 *)skb->data;
5882 regval = le32_to_cpu(*(stamp + 2));
5883 regval |= (u64)le32_to_cpu(*(stamp + 3)) << 32;
5884 skb_pull(skb, IGB_TS_HDR_LEN);
5885 } else {
5886 if(!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
5887 return;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005888
Nick Nunley757b77e2010-03-26 11:36:47 +00005889 regval = rd32(E1000_RXSTMPL);
5890 regval |= (u64)rd32(E1000_RXSTMPH) << 32;
5891 }
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005892
5893 igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
5894}
Alexander Duyck44390ca2011-08-26 07:43:38 +00005895static inline u16 igb_get_hlen(union e1000_adv_rx_desc *rx_desc)
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005896{
5897 /* HW will not DMA in data larger than the given buffer, even if it
5898 * parses the (NFS, of course) header to be larger. In that case, it
5899 * fills the header buffer and spills the rest into the page.
5900 */
5901 u16 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
5902 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
Alexander Duyck44390ca2011-08-26 07:43:38 +00005903 if (hlen > IGB_RX_HDR_LEN)
5904 hlen = IGB_RX_HDR_LEN;
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005905 return hlen;
5906}
5907
Alexander Duyckcd392f52011-08-26 07:43:59 +00005908static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08005909{
Alexander Duyck047e0032009-10-27 15:49:27 +00005910 struct igb_ring *rx_ring = q_vector->rx_ring;
Alexander Duyck16eb8812011-08-26 07:43:54 +00005911 union e1000_adv_rx_desc *rx_desc;
5912 const int current_node = numa_node_id();
Auke Kok9d5c8242008-01-24 02:22:38 -08005913 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005914 u32 staterr;
Alexander Duyck16eb8812011-08-26 07:43:54 +00005915 u16 cleaned_count = igb_desc_unused(rx_ring);
5916 u16 i = rx_ring->next_to_clean;
Auke Kok9d5c8242008-01-24 02:22:38 -08005917
Alexander Duyck601369062011-08-26 07:44:05 +00005918 rx_desc = IGB_RX_DESC(rx_ring, i);
Auke Kok9d5c8242008-01-24 02:22:38 -08005919 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
5920
5921 while (staterr & E1000_RXD_STAT_DD) {
Alexander Duyck06034642011-08-26 07:44:22 +00005922 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
Alexander Duyck16eb8812011-08-26 07:43:54 +00005923 struct sk_buff *skb = buffer_info->skb;
5924 union e1000_adv_rx_desc *next_rxd;
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005925
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005926 buffer_info->skb = NULL;
Alexander Duyck16eb8812011-08-26 07:43:54 +00005927 prefetch(skb->data);
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005928
5929 i++;
5930 if (i == rx_ring->count)
5931 i = 0;
Alexander Duyck42d07812009-10-27 23:51:16 +00005932
Alexander Duyck601369062011-08-26 07:44:05 +00005933 next_rxd = IGB_RX_DESC(rx_ring, i);
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005934 prefetch(next_rxd);
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005935
Alexander Duyck16eb8812011-08-26 07:43:54 +00005936 /*
5937 * This memory barrier is needed to keep us from reading
5938 * any other fields out of the rx_desc until we know the
5939 * RXD_STAT_DD bit is set
5940 */
5941 rmb();
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005942
Alexander Duyck16eb8812011-08-26 07:43:54 +00005943 if (!skb_is_nonlinear(skb)) {
5944 __skb_put(skb, igb_get_hlen(rx_desc));
5945 dma_unmap_single(rx_ring->dev, buffer_info->dma,
Alexander Duyck44390ca2011-08-26 07:43:38 +00005946 IGB_RX_HDR_LEN,
Alexander Duyck59d71982010-04-27 13:09:25 +00005947 DMA_FROM_DEVICE);
Jesse Brandeburg91615f72009-06-30 12:45:15 +00005948 buffer_info->dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005949 }
5950
Alexander Duyck16eb8812011-08-26 07:43:54 +00005951 if (rx_desc->wb.upper.length) {
5952 u16 length = le16_to_cpu(rx_desc->wb.upper.length);
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005953
Koki Sanagiaa913402010-04-27 01:01:19 +00005954 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005955 buffer_info->page,
5956 buffer_info->page_offset,
5957 length);
5958
Alexander Duyck16eb8812011-08-26 07:43:54 +00005959 skb->len += length;
5960 skb->data_len += length;
5961 skb->truesize += length;
5962
Alexander Duyckd1eff352009-11-12 18:38:35 +00005963 if ((page_count(buffer_info->page) != 1) ||
5964 (page_to_nid(buffer_info->page) != current_node))
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005965 buffer_info->page = NULL;
5966 else
5967 get_page(buffer_info->page);
Auke Kok9d5c8242008-01-24 02:22:38 -08005968
Alexander Duyck16eb8812011-08-26 07:43:54 +00005969 dma_unmap_page(rx_ring->dev, buffer_info->page_dma,
5970 PAGE_SIZE / 2, DMA_FROM_DEVICE);
5971 buffer_info->page_dma = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08005972 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005973
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005974 if (!(staterr & E1000_RXD_STAT_EOP)) {
Alexander Duyck06034642011-08-26 07:44:22 +00005975 struct igb_rx_buffer *next_buffer;
5976 next_buffer = &rx_ring->rx_buffer_info[i];
Alexander Duyckb2d56532008-11-20 00:47:34 -08005977 buffer_info->skb = next_buffer->skb;
5978 buffer_info->dma = next_buffer->dma;
5979 next_buffer->skb = skb;
5980 next_buffer->dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005981 goto next_desc;
5982 }
Alexander Duyck44390ca2011-08-26 07:43:38 +00005983
Auke Kok9d5c8242008-01-24 02:22:38 -08005984 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
Alexander Duyck16eb8812011-08-26 07:43:54 +00005985 dev_kfree_skb_any(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005986 goto next_desc;
5987 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005988
Nick Nunley757b77e2010-03-26 11:36:47 +00005989 if (staterr & (E1000_RXDADV_STAT_TSIP | E1000_RXDADV_STAT_TS))
5990 igb_rx_hwtstamp(q_vector, staterr, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005991 total_bytes += skb->len;
5992 total_packets++;
5993
Alexander Duyckcd392f52011-08-26 07:43:59 +00005994 igb_rx_checksum(rx_ring, staterr, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005995
Alexander Duyck16eb8812011-08-26 07:43:54 +00005996 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08005997
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00005998 if (staterr & E1000_RXD_STAT_VP) {
5999 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
Alexander Duyck047e0032009-10-27 15:49:27 +00006000
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006001 __vlan_hwaccel_put_tag(skb, vid);
6002 }
6003 napi_gro_receive(&q_vector->napi, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08006004
Alexander Duyck16eb8812011-08-26 07:43:54 +00006005 budget--;
Auke Kok9d5c8242008-01-24 02:22:38 -08006006next_desc:
Alexander Duyck16eb8812011-08-26 07:43:54 +00006007 if (!budget)
6008 break;
6009
6010 cleaned_count++;
Auke Kok9d5c8242008-01-24 02:22:38 -08006011 /* return some buffers to hardware, one at a time is too slow */
6012 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
Alexander Duyckcd392f52011-08-26 07:43:59 +00006013 igb_alloc_rx_buffers(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08006014 cleaned_count = 0;
6015 }
6016
6017 /* use prefetched values */
6018 rx_desc = next_rxd;
Auke Kok9d5c8242008-01-24 02:22:38 -08006019 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
6020 }
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07006021
Auke Kok9d5c8242008-01-24 02:22:38 -08006022 rx_ring->next_to_clean = i;
Eric Dumazet12dcd862010-10-15 17:27:10 +00006023 u64_stats_update_begin(&rx_ring->rx_syncp);
Auke Kok9d5c8242008-01-24 02:22:38 -08006024 rx_ring->rx_stats.packets += total_packets;
6025 rx_ring->rx_stats.bytes += total_bytes;
Eric Dumazet12dcd862010-10-15 17:27:10 +00006026 u64_stats_update_end(&rx_ring->rx_syncp);
Alexander Duyckc023cd82011-08-26 07:43:43 +00006027 rx_ring->total_packets += total_packets;
6028 rx_ring->total_bytes += total_bytes;
6029
6030 if (cleaned_count)
Alexander Duyckcd392f52011-08-26 07:43:59 +00006031 igb_alloc_rx_buffers(rx_ring, cleaned_count);
Alexander Duyckc023cd82011-08-26 07:43:43 +00006032
Alexander Duyck16eb8812011-08-26 07:43:54 +00006033 return !!budget;
Auke Kok9d5c8242008-01-24 02:22:38 -08006034}
6035
Alexander Duyckc023cd82011-08-26 07:43:43 +00006036static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
Alexander Duyck06034642011-08-26 07:44:22 +00006037 struct igb_rx_buffer *bi)
Alexander Duyckc023cd82011-08-26 07:43:43 +00006038{
6039 struct sk_buff *skb = bi->skb;
6040 dma_addr_t dma = bi->dma;
6041
6042 if (dma)
6043 return true;
6044
6045 if (likely(!skb)) {
6046 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6047 IGB_RX_HDR_LEN);
6048 bi->skb = skb;
6049 if (!skb) {
6050 rx_ring->rx_stats.alloc_failed++;
6051 return false;
6052 }
6053
6054 /* initialize skb for ring */
6055 skb_record_rx_queue(skb, rx_ring->queue_index);
6056 }
6057
6058 dma = dma_map_single(rx_ring->dev, skb->data,
6059 IGB_RX_HDR_LEN, DMA_FROM_DEVICE);
6060
6061 if (dma_mapping_error(rx_ring->dev, dma)) {
6062 rx_ring->rx_stats.alloc_failed++;
6063 return false;
6064 }
6065
6066 bi->dma = dma;
6067 return true;
6068}
6069
6070static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
Alexander Duyck06034642011-08-26 07:44:22 +00006071 struct igb_rx_buffer *bi)
Alexander Duyckc023cd82011-08-26 07:43:43 +00006072{
6073 struct page *page = bi->page;
6074 dma_addr_t page_dma = bi->page_dma;
6075 unsigned int page_offset = bi->page_offset ^ (PAGE_SIZE / 2);
6076
6077 if (page_dma)
6078 return true;
6079
6080 if (!page) {
6081 page = netdev_alloc_page(rx_ring->netdev);
6082 bi->page = page;
6083 if (unlikely(!page)) {
6084 rx_ring->rx_stats.alloc_failed++;
6085 return false;
6086 }
6087 }
6088
6089 page_dma = dma_map_page(rx_ring->dev, page,
6090 page_offset, PAGE_SIZE / 2,
6091 DMA_FROM_DEVICE);
6092
6093 if (dma_mapping_error(rx_ring->dev, page_dma)) {
6094 rx_ring->rx_stats.alloc_failed++;
6095 return false;
6096 }
6097
6098 bi->page_dma = page_dma;
6099 bi->page_offset = page_offset;
6100 return true;
6101}
6102
Auke Kok9d5c8242008-01-24 02:22:38 -08006103/**
Alexander Duyckcd392f52011-08-26 07:43:59 +00006104 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
Auke Kok9d5c8242008-01-24 02:22:38 -08006105 * @adapter: address of board private structure
6106 **/
Alexander Duyckcd392f52011-08-26 07:43:59 +00006107void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
Auke Kok9d5c8242008-01-24 02:22:38 -08006108{
Auke Kok9d5c8242008-01-24 02:22:38 -08006109 union e1000_adv_rx_desc *rx_desc;
Alexander Duyck06034642011-08-26 07:44:22 +00006110 struct igb_rx_buffer *bi;
Alexander Duyckc023cd82011-08-26 07:43:43 +00006111 u16 i = rx_ring->next_to_use;
Auke Kok9d5c8242008-01-24 02:22:38 -08006112
Alexander Duyck601369062011-08-26 07:44:05 +00006113 rx_desc = IGB_RX_DESC(rx_ring, i);
Alexander Duyck06034642011-08-26 07:44:22 +00006114 bi = &rx_ring->rx_buffer_info[i];
Alexander Duyckc023cd82011-08-26 07:43:43 +00006115 i -= rx_ring->count;
Auke Kok9d5c8242008-01-24 02:22:38 -08006116
6117 while (cleaned_count--) {
Alexander Duyckc023cd82011-08-26 07:43:43 +00006118 if (!igb_alloc_mapped_skb(rx_ring, bi))
6119 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08006120
Alexander Duyckc023cd82011-08-26 07:43:43 +00006121 /* Refresh the desc even if buffer_addrs didn't change
6122 * because each write-back erases this info. */
6123 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08006124
Alexander Duyckc023cd82011-08-26 07:43:43 +00006125 if (!igb_alloc_mapped_page(rx_ring, bi))
6126 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08006127
Alexander Duyckc023cd82011-08-26 07:43:43 +00006128 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08006129
Alexander Duyckc023cd82011-08-26 07:43:43 +00006130 rx_desc++;
6131 bi++;
Auke Kok9d5c8242008-01-24 02:22:38 -08006132 i++;
Alexander Duyckc023cd82011-08-26 07:43:43 +00006133 if (unlikely(!i)) {
Alexander Duyck601369062011-08-26 07:44:05 +00006134 rx_desc = IGB_RX_DESC(rx_ring, 0);
Alexander Duyck06034642011-08-26 07:44:22 +00006135 bi = rx_ring->rx_buffer_info;
Alexander Duyckc023cd82011-08-26 07:43:43 +00006136 i -= rx_ring->count;
6137 }
6138
6139 /* clear the hdr_addr for the next_to_use descriptor */
6140 rx_desc->read.hdr_addr = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08006141 }
6142
Alexander Duyckc023cd82011-08-26 07:43:43 +00006143 i += rx_ring->count;
6144
Auke Kok9d5c8242008-01-24 02:22:38 -08006145 if (rx_ring->next_to_use != i) {
6146 rx_ring->next_to_use = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08006147
6148 /* Force memory writes to complete before letting h/w
6149 * know there are new descriptors to fetch. (Only
6150 * applicable for weak-ordered memory model archs,
6151 * such as IA-64). */
6152 wmb();
Alexander Duyckfce99e32009-10-27 15:51:27 +00006153 writel(i, rx_ring->tail);
Auke Kok9d5c8242008-01-24 02:22:38 -08006154 }
6155}
6156
6157/**
6158 * igb_mii_ioctl -
6159 * @netdev:
6160 * @ifreq:
6161 * @cmd:
6162 **/
6163static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6164{
6165 struct igb_adapter *adapter = netdev_priv(netdev);
6166 struct mii_ioctl_data *data = if_mii(ifr);
6167
6168 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6169 return -EOPNOTSUPP;
6170
6171 switch (cmd) {
6172 case SIOCGMIIPHY:
6173 data->phy_id = adapter->hw.phy.addr;
6174 break;
6175 case SIOCGMIIREG:
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08006176 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6177 &data->val_out))
Auke Kok9d5c8242008-01-24 02:22:38 -08006178 return -EIO;
6179 break;
6180 case SIOCSMIIREG:
6181 default:
6182 return -EOPNOTSUPP;
6183 }
6184 return 0;
6185}
6186
6187/**
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006188 * igb_hwtstamp_ioctl - control hardware time stamping
6189 * @netdev:
6190 * @ifreq:
6191 * @cmd:
6192 *
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006193 * Outgoing time stamping can be enabled and disabled. Play nice and
6194 * disable it when requested, although it shouldn't case any overhead
6195 * when no packet needs it. At most one packet in the queue may be
6196 * marked for time stamping, otherwise it would be impossible to tell
6197 * for sure to which packet the hardware time stamp belongs.
6198 *
6199 * Incoming time stamping has to be configured via the hardware
6200 * filters. Not all combinations are supported, in particular event
6201 * type has to be specified. Matching the kind of event packet is
6202 * not supported, with the exception of "all V2 events regardless of
6203 * level 2 or 4".
6204 *
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006205 **/
6206static int igb_hwtstamp_ioctl(struct net_device *netdev,
6207 struct ifreq *ifr, int cmd)
6208{
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006209 struct igb_adapter *adapter = netdev_priv(netdev);
6210 struct e1000_hw *hw = &adapter->hw;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006211 struct hwtstamp_config config;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006212 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
6213 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006214 u32 tsync_rx_cfg = 0;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006215 bool is_l4 = false;
6216 bool is_l2 = false;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006217 u32 regval;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006218
6219 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6220 return -EFAULT;
6221
6222 /* reserved for future extensions */
6223 if (config.flags)
6224 return -EINVAL;
6225
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006226 switch (config.tx_type) {
6227 case HWTSTAMP_TX_OFF:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006228 tsync_tx_ctl = 0;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006229 case HWTSTAMP_TX_ON:
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006230 break;
6231 default:
6232 return -ERANGE;
6233 }
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006234
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006235 switch (config.rx_filter) {
6236 case HWTSTAMP_FILTER_NONE:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006237 tsync_rx_ctl = 0;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006238 break;
6239 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
6240 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
6241 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
6242 case HWTSTAMP_FILTER_ALL:
6243 /*
6244 * register TSYNCRXCFG must be set, therefore it is not
6245 * possible to time stamp both Sync and Delay_Req messages
6246 * => fall back to time stamping all packets
6247 */
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006248 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006249 config.rx_filter = HWTSTAMP_FILTER_ALL;
6250 break;
6251 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006252 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006253 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006254 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006255 break;
6256 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006257 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006258 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006259 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006260 break;
6261 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6262 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006263 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006264 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006265 is_l2 = true;
6266 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006267 config.rx_filter = HWTSTAMP_FILTER_SOME;
6268 break;
6269 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6270 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006271 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006272 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006273 is_l2 = true;
6274 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006275 config.rx_filter = HWTSTAMP_FILTER_SOME;
6276 break;
6277 case HWTSTAMP_FILTER_PTP_V2_EVENT:
6278 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6279 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006280 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006281 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006282 is_l2 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006283 break;
6284 default:
6285 return -ERANGE;
6286 }
6287
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006288 if (hw->mac.type == e1000_82575) {
6289 if (tsync_rx_ctl | tsync_tx_ctl)
6290 return -EINVAL;
6291 return 0;
6292 }
6293
Nick Nunley757b77e2010-03-26 11:36:47 +00006294 /*
6295 * Per-packet timestamping only works if all packets are
6296 * timestamped, so enable timestamping in all packets as
6297 * long as one rx filter was configured.
6298 */
6299 if ((hw->mac.type == e1000_82580) && tsync_rx_ctl) {
6300 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
6301 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
6302 }
6303
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006304 /* enable/disable TX */
6305 regval = rd32(E1000_TSYNCTXCTL);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006306 regval &= ~E1000_TSYNCTXCTL_ENABLED;
6307 regval |= tsync_tx_ctl;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006308 wr32(E1000_TSYNCTXCTL, regval);
6309
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006310 /* enable/disable RX */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006311 regval = rd32(E1000_TSYNCRXCTL);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006312 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
6313 regval |= tsync_rx_ctl;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006314 wr32(E1000_TSYNCRXCTL, regval);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006315
6316 /* define which PTP packets are time stamped */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006317 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
6318
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006319 /* define ethertype filter for timestamped packets */
6320 if (is_l2)
6321 wr32(E1000_ETQF(3),
6322 (E1000_ETQF_FILTER_ENABLE | /* enable filter */
6323 E1000_ETQF_1588 | /* enable timestamping */
6324 ETH_P_1588)); /* 1588 eth protocol type */
6325 else
6326 wr32(E1000_ETQF(3), 0);
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006327
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006328#define PTP_PORT 319
6329 /* L4 Queue Filter[3]: filter by destination port and protocol */
6330 if (is_l4) {
6331 u32 ftqf = (IPPROTO_UDP /* UDP */
6332 | E1000_FTQF_VF_BP /* VF not compared */
6333 | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
6334 | E1000_FTQF_MASK); /* mask all inputs */
6335 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006336
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00006337 wr32(E1000_IMIR(3), htons(PTP_PORT));
6338 wr32(E1000_IMIREXT(3),
6339 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
6340 if (hw->mac.type == e1000_82576) {
6341 /* enable source port check */
6342 wr32(E1000_SPQF(3), htons(PTP_PORT));
6343 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
6344 }
6345 wr32(E1000_FTQF(3), ftqf);
6346 } else {
6347 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
6348 }
Patrick Ohly33af6bc2009-02-12 05:03:43 +00006349 wrfl();
6350
6351 adapter->hwtstamp_config = config;
6352
6353 /* clear TX/RX time stamp registers, just to be sure */
6354 regval = rd32(E1000_TXSTMPH);
6355 regval = rd32(E1000_RXSTMPH);
6356
6357 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
6358 -EFAULT : 0;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006359}
6360
6361/**
Auke Kok9d5c8242008-01-24 02:22:38 -08006362 * igb_ioctl -
6363 * @netdev:
6364 * @ifreq:
6365 * @cmd:
6366 **/
6367static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6368{
6369 switch (cmd) {
6370 case SIOCGMIIPHY:
6371 case SIOCGMIIREG:
6372 case SIOCSMIIREG:
6373 return igb_mii_ioctl(netdev, ifr, cmd);
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00006374 case SIOCSHWTSTAMP:
6375 return igb_hwtstamp_ioctl(netdev, ifr, cmd);
Auke Kok9d5c8242008-01-24 02:22:38 -08006376 default:
6377 return -EOPNOTSUPP;
6378 }
6379}
6380
Alexander Duyck009bc062009-07-23 18:08:35 +00006381s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6382{
6383 struct igb_adapter *adapter = hw->back;
6384 u16 cap_offset;
6385
Jon Masonbdaae042011-06-27 07:44:01 +00006386 cap_offset = adapter->pdev->pcie_cap;
Alexander Duyck009bc062009-07-23 18:08:35 +00006387 if (!cap_offset)
6388 return -E1000_ERR_CONFIG;
6389
6390 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
6391
6392 return 0;
6393}
6394
6395s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6396{
6397 struct igb_adapter *adapter = hw->back;
6398 u16 cap_offset;
6399
Jon Masonbdaae042011-06-27 07:44:01 +00006400 cap_offset = adapter->pdev->pcie_cap;
Alexander Duyck009bc062009-07-23 18:08:35 +00006401 if (!cap_offset)
6402 return -E1000_ERR_CONFIG;
6403
6404 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
6405
6406 return 0;
6407}
6408
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006409static void igb_vlan_mode(struct net_device *netdev, u32 features)
Auke Kok9d5c8242008-01-24 02:22:38 -08006410{
6411 struct igb_adapter *adapter = netdev_priv(netdev);
6412 struct e1000_hw *hw = &adapter->hw;
6413 u32 ctrl, rctl;
6414
6415 igb_irq_disable(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08006416
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006417 if (features & NETIF_F_HW_VLAN_RX) {
Auke Kok9d5c8242008-01-24 02:22:38 -08006418 /* enable VLAN tag insert/strip */
6419 ctrl = rd32(E1000_CTRL);
6420 ctrl |= E1000_CTRL_VME;
6421 wr32(E1000_CTRL, ctrl);
6422
Alexander Duyck51466232009-10-27 23:47:35 +00006423 /* Disable CFI check */
Auke Kok9d5c8242008-01-24 02:22:38 -08006424 rctl = rd32(E1000_RCTL);
Auke Kok9d5c8242008-01-24 02:22:38 -08006425 rctl &= ~E1000_RCTL_CFIEN;
6426 wr32(E1000_RCTL, rctl);
Auke Kok9d5c8242008-01-24 02:22:38 -08006427 } else {
6428 /* disable VLAN tag insert/strip */
6429 ctrl = rd32(E1000_CTRL);
6430 ctrl &= ~E1000_CTRL_VME;
6431 wr32(E1000_CTRL, ctrl);
Auke Kok9d5c8242008-01-24 02:22:38 -08006432 }
6433
Alexander Duycke1739522009-02-19 20:39:44 -08006434 igb_rlpml_set(adapter);
6435
Auke Kok9d5c8242008-01-24 02:22:38 -08006436 if (!test_bit(__IGB_DOWN, &adapter->state))
6437 igb_irq_enable(adapter);
6438}
6439
6440static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
6441{
6442 struct igb_adapter *adapter = netdev_priv(netdev);
6443 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006444 int pf_id = adapter->vfs_allocated_count;
Auke Kok9d5c8242008-01-24 02:22:38 -08006445
Alexander Duyck51466232009-10-27 23:47:35 +00006446 /* attempt to add filter to vlvf array */
6447 igb_vlvf_set(adapter, vid, true, pf_id);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006448
Alexander Duyck51466232009-10-27 23:47:35 +00006449 /* add the filter since PF can receive vlans w/o entry in vlvf */
6450 igb_vfta_set(hw, vid, true);
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006451
6452 set_bit(vid, adapter->active_vlans);
Auke Kok9d5c8242008-01-24 02:22:38 -08006453}
6454
6455static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
6456{
6457 struct igb_adapter *adapter = netdev_priv(netdev);
6458 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006459 int pf_id = adapter->vfs_allocated_count;
Alexander Duyck51466232009-10-27 23:47:35 +00006460 s32 err;
Auke Kok9d5c8242008-01-24 02:22:38 -08006461
6462 igb_irq_disable(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08006463
6464 if (!test_bit(__IGB_DOWN, &adapter->state))
6465 igb_irq_enable(adapter);
6466
Alexander Duyck51466232009-10-27 23:47:35 +00006467 /* remove vlan from VLVF table array */
6468 err = igb_vlvf_set(adapter, vid, false, pf_id);
Auke Kok9d5c8242008-01-24 02:22:38 -08006469
Alexander Duyck51466232009-10-27 23:47:35 +00006470 /* if vid was not present in VLVF just remove it from table */
6471 if (err)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006472 igb_vfta_set(hw, vid, false);
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006473
6474 clear_bit(vid, adapter->active_vlans);
Auke Kok9d5c8242008-01-24 02:22:38 -08006475}
6476
6477static void igb_restore_vlan(struct igb_adapter *adapter)
6478{
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006479 u16 vid;
Auke Kok9d5c8242008-01-24 02:22:38 -08006480
Jiri Pirkob2cb09b2011-07-21 03:27:27 +00006481 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6482 igb_vlan_rx_add_vid(adapter->netdev, vid);
Auke Kok9d5c8242008-01-24 02:22:38 -08006483}
6484
David Decotigny14ad2512011-04-27 18:32:43 +00006485int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
Auke Kok9d5c8242008-01-24 02:22:38 -08006486{
Alexander Duyck090b1792009-10-27 23:51:55 +00006487 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08006488 struct e1000_mac_info *mac = &adapter->hw.mac;
6489
6490 mac->autoneg = 0;
6491
David Decotigny14ad2512011-04-27 18:32:43 +00006492 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6493 * for the switch() below to work */
6494 if ((spd & 1) || (dplx & ~1))
6495 goto err_inval;
6496
Carolyn Wybornycd2638a2010-10-12 22:27:02 +00006497 /* Fiber NIC's only allow 1000 Gbps Full duplex */
6498 if ((adapter->hw.phy.media_type == e1000_media_type_internal_serdes) &&
David Decotigny14ad2512011-04-27 18:32:43 +00006499 spd != SPEED_1000 &&
6500 dplx != DUPLEX_FULL)
6501 goto err_inval;
Carolyn Wybornycd2638a2010-10-12 22:27:02 +00006502
David Decotigny14ad2512011-04-27 18:32:43 +00006503 switch (spd + dplx) {
Auke Kok9d5c8242008-01-24 02:22:38 -08006504 case SPEED_10 + DUPLEX_HALF:
6505 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6506 break;
6507 case SPEED_10 + DUPLEX_FULL:
6508 mac->forced_speed_duplex = ADVERTISE_10_FULL;
6509 break;
6510 case SPEED_100 + DUPLEX_HALF:
6511 mac->forced_speed_duplex = ADVERTISE_100_HALF;
6512 break;
6513 case SPEED_100 + DUPLEX_FULL:
6514 mac->forced_speed_duplex = ADVERTISE_100_FULL;
6515 break;
6516 case SPEED_1000 + DUPLEX_FULL:
6517 mac->autoneg = 1;
6518 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
6519 break;
6520 case SPEED_1000 + DUPLEX_HALF: /* not supported */
6521 default:
David Decotigny14ad2512011-04-27 18:32:43 +00006522 goto err_inval;
Auke Kok9d5c8242008-01-24 02:22:38 -08006523 }
6524 return 0;
David Decotigny14ad2512011-04-27 18:32:43 +00006525
6526err_inval:
6527 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
6528 return -EINVAL;
Auke Kok9d5c8242008-01-24 02:22:38 -08006529}
6530
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00006531static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake)
Auke Kok9d5c8242008-01-24 02:22:38 -08006532{
6533 struct net_device *netdev = pci_get_drvdata(pdev);
6534 struct igb_adapter *adapter = netdev_priv(netdev);
6535 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07006536 u32 ctrl, rctl, status;
Auke Kok9d5c8242008-01-24 02:22:38 -08006537 u32 wufc = adapter->wol;
6538#ifdef CONFIG_PM
6539 int retval = 0;
6540#endif
6541
6542 netif_device_detach(netdev);
6543
Alexander Duycka88f10e2008-07-08 15:13:38 -07006544 if (netif_running(netdev))
6545 igb_close(netdev);
6546
Alexander Duyck047e0032009-10-27 15:49:27 +00006547 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08006548
6549#ifdef CONFIG_PM
6550 retval = pci_save_state(pdev);
6551 if (retval)
6552 return retval;
6553#endif
6554
6555 status = rd32(E1000_STATUS);
6556 if (status & E1000_STATUS_LU)
6557 wufc &= ~E1000_WUFC_LNKC;
6558
6559 if (wufc) {
6560 igb_setup_rctl(adapter);
Alexander Duyckff41f8d2009-09-03 14:48:56 +00006561 igb_set_rx_mode(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08006562
6563 /* turn on all-multi mode if wake on multicast is enabled */
6564 if (wufc & E1000_WUFC_MC) {
6565 rctl = rd32(E1000_RCTL);
6566 rctl |= E1000_RCTL_MPE;
6567 wr32(E1000_RCTL, rctl);
6568 }
6569
6570 ctrl = rd32(E1000_CTRL);
6571 /* advertise wake from D3Cold */
6572 #define E1000_CTRL_ADVD3WUC 0x00100000
6573 /* phy power management enable */
6574 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
6575 ctrl |= E1000_CTRL_ADVD3WUC;
6576 wr32(E1000_CTRL, ctrl);
6577
Auke Kok9d5c8242008-01-24 02:22:38 -08006578 /* Allow time for pending master requests to run */
Alexander Duyck330a6d62009-10-27 23:51:35 +00006579 igb_disable_pcie_master(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08006580
6581 wr32(E1000_WUC, E1000_WUC_PME_EN);
6582 wr32(E1000_WUFC, wufc);
Auke Kok9d5c8242008-01-24 02:22:38 -08006583 } else {
6584 wr32(E1000_WUC, 0);
6585 wr32(E1000_WUFC, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08006586 }
6587
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00006588 *enable_wake = wufc || adapter->en_mng_pt;
6589 if (!*enable_wake)
Nick Nunley88a268c2010-02-17 01:01:59 +00006590 igb_power_down_link(adapter);
6591 else
6592 igb_power_up_link(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08006593
6594 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6595 * would have already happened in close and is redundant. */
6596 igb_release_hw_control(adapter);
6597
6598 pci_disable_device(pdev);
6599
Auke Kok9d5c8242008-01-24 02:22:38 -08006600 return 0;
6601}
6602
6603#ifdef CONFIG_PM
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00006604static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
6605{
6606 int retval;
6607 bool wake;
6608
6609 retval = __igb_shutdown(pdev, &wake);
6610 if (retval)
6611 return retval;
6612
6613 if (wake) {
6614 pci_prepare_to_sleep(pdev);
6615 } else {
6616 pci_wake_from_d3(pdev, false);
6617 pci_set_power_state(pdev, PCI_D3hot);
6618 }
6619
6620 return 0;
6621}
6622
Auke Kok9d5c8242008-01-24 02:22:38 -08006623static int igb_resume(struct pci_dev *pdev)
6624{
6625 struct net_device *netdev = pci_get_drvdata(pdev);
6626 struct igb_adapter *adapter = netdev_priv(netdev);
6627 struct e1000_hw *hw = &adapter->hw;
6628 u32 err;
6629
6630 pci_set_power_state(pdev, PCI_D0);
6631 pci_restore_state(pdev);
Nick Nunleyb94f2d72010-02-17 01:02:19 +00006632 pci_save_state(pdev);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09006633
Alexander Duyckaed5dec2009-02-06 23:16:04 +00006634 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08006635 if (err) {
6636 dev_err(&pdev->dev,
6637 "igb: Cannot enable PCI device from suspend\n");
6638 return err;
6639 }
6640 pci_set_master(pdev);
6641
6642 pci_enable_wake(pdev, PCI_D3hot, 0);
6643 pci_enable_wake(pdev, PCI_D3cold, 0);
6644
Alexander Duyck047e0032009-10-27 15:49:27 +00006645 if (igb_init_interrupt_scheme(adapter)) {
Alexander Duycka88f10e2008-07-08 15:13:38 -07006646 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
6647 return -ENOMEM;
Auke Kok9d5c8242008-01-24 02:22:38 -08006648 }
6649
Auke Kok9d5c8242008-01-24 02:22:38 -08006650 igb_reset(adapter);
Alexander Duycka8564f02009-02-06 23:21:10 +00006651
6652 /* let the f/w know that the h/w is now under the control of the
6653 * driver. */
6654 igb_get_hw_control(adapter);
6655
Auke Kok9d5c8242008-01-24 02:22:38 -08006656 wr32(E1000_WUS, ~0);
6657
Alexander Duycka88f10e2008-07-08 15:13:38 -07006658 if (netif_running(netdev)) {
6659 err = igb_open(netdev);
6660 if (err)
6661 return err;
6662 }
Auke Kok9d5c8242008-01-24 02:22:38 -08006663
6664 netif_device_attach(netdev);
6665
Auke Kok9d5c8242008-01-24 02:22:38 -08006666 return 0;
6667}
6668#endif
6669
6670static void igb_shutdown(struct pci_dev *pdev)
6671{
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00006672 bool wake;
6673
6674 __igb_shutdown(pdev, &wake);
6675
6676 if (system_state == SYSTEM_POWER_OFF) {
6677 pci_wake_from_d3(pdev, wake);
6678 pci_set_power_state(pdev, PCI_D3hot);
6679 }
Auke Kok9d5c8242008-01-24 02:22:38 -08006680}
6681
6682#ifdef CONFIG_NET_POLL_CONTROLLER
6683/*
6684 * Polling 'interrupt' - used by things like netconsole to send skbs
6685 * without having to re-enable interrupts. It's not called while
6686 * the interrupt routine is executing.
6687 */
6688static void igb_netpoll(struct net_device *netdev)
6689{
6690 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00006691 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08006692 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08006693
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00006694 if (!adapter->msix_entries) {
Alexander Duyck047e0032009-10-27 15:49:27 +00006695 struct igb_q_vector *q_vector = adapter->q_vector[0];
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00006696 igb_irq_disable(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +00006697 napi_schedule(&q_vector->napi);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00006698 return;
6699 }
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07006700
Alexander Duyck047e0032009-10-27 15:49:27 +00006701 for (i = 0; i < adapter->num_q_vectors; i++) {
6702 struct igb_q_vector *q_vector = adapter->q_vector[i];
6703 wr32(E1000_EIMC, q_vector->eims_value);
6704 napi_schedule(&q_vector->napi);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00006705 }
Auke Kok9d5c8242008-01-24 02:22:38 -08006706}
6707#endif /* CONFIG_NET_POLL_CONTROLLER */
6708
6709/**
6710 * igb_io_error_detected - called when PCI error is detected
6711 * @pdev: Pointer to PCI device
6712 * @state: The current pci connection state
6713 *
6714 * This function is called after a PCI bus error affecting
6715 * this device has been detected.
6716 */
6717static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
6718 pci_channel_state_t state)
6719{
6720 struct net_device *netdev = pci_get_drvdata(pdev);
6721 struct igb_adapter *adapter = netdev_priv(netdev);
6722
6723 netif_device_detach(netdev);
6724
Alexander Duyck59ed6ee2009-06-30 12:46:34 +00006725 if (state == pci_channel_io_perm_failure)
6726 return PCI_ERS_RESULT_DISCONNECT;
6727
Auke Kok9d5c8242008-01-24 02:22:38 -08006728 if (netif_running(netdev))
6729 igb_down(adapter);
6730 pci_disable_device(pdev);
6731
6732 /* Request a slot slot reset. */
6733 return PCI_ERS_RESULT_NEED_RESET;
6734}
6735
6736/**
6737 * igb_io_slot_reset - called after the pci bus has been reset.
6738 * @pdev: Pointer to PCI device
6739 *
6740 * Restart the card from scratch, as if from a cold-boot. Implementation
6741 * resembles the first-half of the igb_resume routine.
6742 */
6743static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
6744{
6745 struct net_device *netdev = pci_get_drvdata(pdev);
6746 struct igb_adapter *adapter = netdev_priv(netdev);
6747 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck40a914f2008-11-27 00:24:37 -08006748 pci_ers_result_t result;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09006749 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08006750
Alexander Duyckaed5dec2009-02-06 23:16:04 +00006751 if (pci_enable_device_mem(pdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08006752 dev_err(&pdev->dev,
6753 "Cannot re-enable PCI device after reset.\n");
Alexander Duyck40a914f2008-11-27 00:24:37 -08006754 result = PCI_ERS_RESULT_DISCONNECT;
6755 } else {
6756 pci_set_master(pdev);
6757 pci_restore_state(pdev);
Nick Nunleyb94f2d72010-02-17 01:02:19 +00006758 pci_save_state(pdev);
Alexander Duyck40a914f2008-11-27 00:24:37 -08006759
6760 pci_enable_wake(pdev, PCI_D3hot, 0);
6761 pci_enable_wake(pdev, PCI_D3cold, 0);
6762
6763 igb_reset(adapter);
6764 wr32(E1000_WUS, ~0);
6765 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9d5c8242008-01-24 02:22:38 -08006766 }
Auke Kok9d5c8242008-01-24 02:22:38 -08006767
Jeff Kirsherea943d42008-12-11 20:34:19 -08006768 err = pci_cleanup_aer_uncorrect_error_status(pdev);
6769 if (err) {
6770 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
6771 "failed 0x%0x\n", err);
6772 /* non-fatal, continue */
6773 }
Auke Kok9d5c8242008-01-24 02:22:38 -08006774
Alexander Duyck40a914f2008-11-27 00:24:37 -08006775 return result;
Auke Kok9d5c8242008-01-24 02:22:38 -08006776}
6777
6778/**
6779 * igb_io_resume - called when traffic can start flowing again.
6780 * @pdev: Pointer to PCI device
6781 *
6782 * This callback is called when the error recovery driver tells us that
6783 * its OK to resume normal operation. Implementation resembles the
6784 * second-half of the igb_resume routine.
6785 */
6786static void igb_io_resume(struct pci_dev *pdev)
6787{
6788 struct net_device *netdev = pci_get_drvdata(pdev);
6789 struct igb_adapter *adapter = netdev_priv(netdev);
6790
Auke Kok9d5c8242008-01-24 02:22:38 -08006791 if (netif_running(netdev)) {
6792 if (igb_up(adapter)) {
6793 dev_err(&pdev->dev, "igb_up failed after reset\n");
6794 return;
6795 }
6796 }
6797
6798 netif_device_attach(netdev);
6799
6800 /* let the f/w know that the h/w is now under the control of the
6801 * driver. */
6802 igb_get_hw_control(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08006803}
6804
Alexander Duyck26ad9172009-10-05 06:32:49 +00006805static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
6806 u8 qsel)
6807{
6808 u32 rar_low, rar_high;
6809 struct e1000_hw *hw = &adapter->hw;
6810
6811 /* HW expects these in little endian so we reverse the byte order
6812 * from network order (big endian) to little endian
6813 */
6814 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
6815 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
6816 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
6817
6818 /* Indicate to hardware the Address is Valid. */
6819 rar_high |= E1000_RAH_AV;
6820
6821 if (hw->mac.type == e1000_82575)
6822 rar_high |= E1000_RAH_POOL_1 * qsel;
6823 else
6824 rar_high |= E1000_RAH_POOL_1 << qsel;
6825
6826 wr32(E1000_RAL(index), rar_low);
6827 wrfl();
6828 wr32(E1000_RAH(index), rar_high);
6829 wrfl();
6830}
6831
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006832static int igb_set_vf_mac(struct igb_adapter *adapter,
6833 int vf, unsigned char *mac_addr)
6834{
6835 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckff41f8d2009-09-03 14:48:56 +00006836 /* VF MAC addresses start at end of receive addresses and moves
6837 * torwards the first, as a result a collision should not be possible */
6838 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006839
Alexander Duyck37680112009-02-19 20:40:30 -08006840 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006841
Alexander Duyck26ad9172009-10-05 06:32:49 +00006842 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006843
6844 return 0;
6845}
6846
Williams, Mitch A8151d292010-02-10 01:44:24 +00006847static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
6848{
6849 struct igb_adapter *adapter = netdev_priv(netdev);
6850 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
6851 return -EINVAL;
6852 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
6853 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
6854 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
6855 " change effective.");
6856 if (test_bit(__IGB_DOWN, &adapter->state)) {
6857 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
6858 " but the PF device is not up.\n");
6859 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
6860 " attempting to use the VF device.\n");
6861 }
6862 return igb_set_vf_mac(adapter, vf, mac);
6863}
6864
Lior Levy17dc5662011-02-08 02:28:46 +00006865static int igb_link_mbps(int internal_link_speed)
6866{
6867 switch (internal_link_speed) {
6868 case SPEED_100:
6869 return 100;
6870 case SPEED_1000:
6871 return 1000;
6872 default:
6873 return 0;
6874 }
6875}
6876
6877static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
6878 int link_speed)
6879{
6880 int rf_dec, rf_int;
6881 u32 bcnrc_val;
6882
6883 if (tx_rate != 0) {
6884 /* Calculate the rate factor values to set */
6885 rf_int = link_speed / tx_rate;
6886 rf_dec = (link_speed - (rf_int * tx_rate));
6887 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
6888
6889 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
6890 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
6891 E1000_RTTBCNRC_RF_INT_MASK);
6892 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
6893 } else {
6894 bcnrc_val = 0;
6895 }
6896
6897 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
6898 wr32(E1000_RTTBCNRC, bcnrc_val);
6899}
6900
6901static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
6902{
6903 int actual_link_speed, i;
6904 bool reset_rate = false;
6905
6906 /* VF TX rate limit was not set or not supported */
6907 if ((adapter->vf_rate_link_speed == 0) ||
6908 (adapter->hw.mac.type != e1000_82576))
6909 return;
6910
6911 actual_link_speed = igb_link_mbps(adapter->link_speed);
6912 if (actual_link_speed != adapter->vf_rate_link_speed) {
6913 reset_rate = true;
6914 adapter->vf_rate_link_speed = 0;
6915 dev_info(&adapter->pdev->dev,
6916 "Link speed has been changed. VF Transmit "
6917 "rate is disabled\n");
6918 }
6919
6920 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6921 if (reset_rate)
6922 adapter->vf_data[i].tx_rate = 0;
6923
6924 igb_set_vf_rate_limit(&adapter->hw, i,
6925 adapter->vf_data[i].tx_rate,
6926 actual_link_speed);
6927 }
6928}
6929
Williams, Mitch A8151d292010-02-10 01:44:24 +00006930static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
6931{
Lior Levy17dc5662011-02-08 02:28:46 +00006932 struct igb_adapter *adapter = netdev_priv(netdev);
6933 struct e1000_hw *hw = &adapter->hw;
6934 int actual_link_speed;
6935
6936 if (hw->mac.type != e1000_82576)
6937 return -EOPNOTSUPP;
6938
6939 actual_link_speed = igb_link_mbps(adapter->link_speed);
6940 if ((vf >= adapter->vfs_allocated_count) ||
6941 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
6942 (tx_rate < 0) || (tx_rate > actual_link_speed))
6943 return -EINVAL;
6944
6945 adapter->vf_rate_link_speed = actual_link_speed;
6946 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
6947 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
6948
6949 return 0;
Williams, Mitch A8151d292010-02-10 01:44:24 +00006950}
6951
6952static int igb_ndo_get_vf_config(struct net_device *netdev,
6953 int vf, struct ifla_vf_info *ivi)
6954{
6955 struct igb_adapter *adapter = netdev_priv(netdev);
6956 if (vf >= adapter->vfs_allocated_count)
6957 return -EINVAL;
6958 ivi->vf = vf;
6959 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
Lior Levy17dc5662011-02-08 02:28:46 +00006960 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
Williams, Mitch A8151d292010-02-10 01:44:24 +00006961 ivi->vlan = adapter->vf_data[vf].pf_vlan;
6962 ivi->qos = adapter->vf_data[vf].pf_qos;
6963 return 0;
6964}
6965
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006966static void igb_vmm_control(struct igb_adapter *adapter)
6967{
6968 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck10d8e902009-10-27 15:54:04 +00006969 u32 reg;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006970
Alexander Duyck52a1dd42010-03-22 14:07:46 +00006971 switch (hw->mac.type) {
6972 case e1000_82575:
6973 default:
6974 /* replication is not supported for 82575 */
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006975 return;
Alexander Duyck52a1dd42010-03-22 14:07:46 +00006976 case e1000_82576:
6977 /* notify HW that the MAC is adding vlan tags */
6978 reg = rd32(E1000_DTXCTL);
6979 reg |= E1000_DTXCTL_VLAN_ADDED;
6980 wr32(E1000_DTXCTL, reg);
6981 case e1000_82580:
6982 /* enable replication vlan tag stripping */
6983 reg = rd32(E1000_RPLOLR);
6984 reg |= E1000_RPLOLR_STRVLAN;
6985 wr32(E1000_RPLOLR, reg);
Alexander Duyckd2ba2ed2010-03-22 14:08:06 +00006986 case e1000_i350:
6987 /* none of the above registers are supported by i350 */
Alexander Duyck52a1dd42010-03-22 14:07:46 +00006988 break;
6989 }
Alexander Duyck10d8e902009-10-27 15:54:04 +00006990
Alexander Duyckd4960302009-10-27 15:53:45 +00006991 if (adapter->vfs_allocated_count) {
6992 igb_vmdq_set_loopback_pf(hw, true);
6993 igb_vmdq_set_replication_pf(hw, true);
Greg Rose13800462010-11-06 02:08:26 +00006994 igb_vmdq_set_anti_spoofing_pf(hw, true,
6995 adapter->vfs_allocated_count);
Alexander Duyckd4960302009-10-27 15:53:45 +00006996 } else {
6997 igb_vmdq_set_loopback_pf(hw, false);
6998 igb_vmdq_set_replication_pf(hw, false);
6999 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08007000}
7001
Auke Kok9d5c8242008-01-24 02:22:38 -08007002/* igb_main.c */