blob: e71bc57a1f3a12d1cbfd8cbe71849499b812e976 [file] [log] [blame]
Selvin Xavier1ac5a402017-02-10 03:19:33 -08001/*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators
37 */
38
39#include <linux/interrupt.h>
40#include <linux/spinlock.h>
41#include <linux/sched.h>
42#include <linux/pci.h>
43
44#include "roce_hsi.h"
45
46#include "qplib_res.h"
47#include "qplib_rcfw.h"
48#include "qplib_sp.h"
49
50const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 0, 0, 0, 0, 0, 0 } };
52
53/* Device */
Devesh Sharma254cd252017-06-29 12:28:16 -070054
55static bool bnxt_qplib_is_atomic_cap(struct bnxt_qplib_rcfw *rcfw)
56{
57 int rc;
58 u16 pcie_ctl2;
59
60 rc = pcie_capability_read_word(rcfw->pdev, PCI_EXP_DEVCTL2,
61 &pcie_ctl2);
62 if (rc)
63 return false;
64 return !!(pcie_ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ);
65}
66
Selvin Xavier2fc68542018-01-11 11:52:08 -050067static void bnxt_qplib_query_version(struct bnxt_qplib_rcfw *rcfw,
68 char *fw_ver)
69{
70 struct cmdq_query_version req;
71 struct creq_query_version_resp resp;
72 u16 cmd_flags = 0;
73 int rc = 0;
74
75 RCFW_CMD_PREP(req, QUERY_VERSION, cmd_flags);
76
77 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
78 (void *)&resp, NULL, 0);
79 if (rc)
80 return;
81 fw_ver[0] = resp.fw_maj;
82 fw_ver[1] = resp.fw_minor;
83 fw_ver[2] = resp.fw_bld;
84 fw_ver[3] = resp.fw_rsvd;
85}
86
Selvin Xavier1ac5a402017-02-10 03:19:33 -080087int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
Selvin Xavierccd9d0d2018-01-11 11:52:07 -050088 struct bnxt_qplib_dev_attr *attr, bool vf)
Selvin Xavier1ac5a402017-02-10 03:19:33 -080089{
90 struct cmdq_query_func req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070091 struct creq_query_func_resp resp;
92 struct bnxt_qplib_rcfw_sbuf *sbuf;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080093 struct creq_query_func_resp_sb *sb;
94 u16 cmd_flags = 0;
95 u32 temp;
96 u8 *tqm_alloc;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070097 int i, rc = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080098
99 RCFW_CMD_PREP(req, QUERY_FUNC, cmd_flags);
100
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700101 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
102 if (!sbuf) {
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800103 dev_err(&rcfw->pdev->dev,
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700104 "QPLIB: SP: QUERY_FUNC alloc side buffer failed");
105 return -ENOMEM;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800106 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700107
108 sb = sbuf->sb;
109 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
110 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
111 (void *)sbuf, 0);
112 if (rc)
113 goto bail;
114
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800115 /* Extract the context from the side buffer */
116 attr->max_qp = le32_to_cpu(sb->max_qp);
Selvin Xavier58d4a672017-06-29 12:28:12 -0700117 /* max_qp value reported by FW for PF doesn't include the QP1 for PF */
Selvin Xavierccd9d0d2018-01-11 11:52:07 -0500118 if (!vf)
119 attr->max_qp += 1;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800120 attr->max_qp_rd_atom =
121 sb->max_qp_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
122 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_rd_atom;
123 attr->max_qp_init_rd_atom =
124 sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
125 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom;
126 attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr);
Eddie Wai9152e0b2017-06-14 03:26:23 -0700127 /*
128 * 128 WQEs needs to be reserved for the HW (8916). Prevent
129 * reporting the max number
130 */
131 attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800132 attr->max_qp_sges = sb->max_sge;
133 attr->max_cq = le32_to_cpu(sb->max_cq);
134 attr->max_cq_wqes = le32_to_cpu(sb->max_cqe);
135 attr->max_cq_sges = attr->max_qp_sges;
136 attr->max_mr = le32_to_cpu(sb->max_mr);
137 attr->max_mw = le32_to_cpu(sb->max_mw);
138
139 attr->max_mr_size = le64_to_cpu(sb->max_mr_size);
140 attr->max_pd = 64 * 1024;
141 attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp);
142 attr->max_ah = le32_to_cpu(sb->max_ah);
143
144 attr->max_fmr = le32_to_cpu(sb->max_fmr);
145 attr->max_map_per_fmr = sb->max_map_per_fmr;
146
147 attr->max_srq = le16_to_cpu(sb->max_srq);
148 attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1;
149 attr->max_srq_sges = sb->max_srq_sge;
150 /* Bono only reports 1 PKEY for now, but it can support > 1 */
151 attr->max_pkey = le32_to_cpu(sb->max_pkeys);
152
153 attr->max_inline_data = le32_to_cpu(sb->max_inline_data);
154 attr->l2_db_size = (sb->l2_db_space_size + 1) * PAGE_SIZE;
155 attr->max_sgid = le32_to_cpu(sb->max_gid);
156
Selvin Xavier2fc68542018-01-11 11:52:08 -0500157 bnxt_qplib_query_version(rcfw, attr->fw_ver);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800158
159 for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) {
160 temp = le32_to_cpu(sb->tqm_alloc_reqs[i]);
161 tqm_alloc = (u8 *)&temp;
162 attr->tqm_alloc_reqs[i * 4] = *tqm_alloc;
163 attr->tqm_alloc_reqs[i * 4 + 1] = *(++tqm_alloc);
164 attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc);
165 attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc);
166 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700167
Devesh Sharma254cd252017-06-29 12:28:16 -0700168 attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700169bail:
170 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
171 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800172}
173
Selvin Xavierccd9d0d2018-01-11 11:52:07 -0500174int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res,
175 struct bnxt_qplib_rcfw *rcfw,
176 struct bnxt_qplib_ctx *ctx)
177{
178 struct cmdq_set_func_resources req;
179 struct creq_set_func_resources_resp resp;
180 u16 cmd_flags = 0;
181 int rc = 0;
182
183 RCFW_CMD_PREP(req, SET_FUNC_RESOURCES, cmd_flags);
184
185 req.number_of_qp = cpu_to_le32(ctx->qpc_count);
186 req.number_of_mrw = cpu_to_le32(ctx->mrw_count);
187 req.number_of_srq = cpu_to_le32(ctx->srqc_count);
188 req.number_of_cq = cpu_to_le32(ctx->cq_count);
189
190 req.max_qp_per_vf = cpu_to_le32(ctx->vf_res.max_qp_per_vf);
191 req.max_mrw_per_vf = cpu_to_le32(ctx->vf_res.max_mrw_per_vf);
192 req.max_srq_per_vf = cpu_to_le32(ctx->vf_res.max_srq_per_vf);
193 req.max_cq_per_vf = cpu_to_le32(ctx->vf_res.max_cq_per_vf);
194 req.max_gid_per_vf = cpu_to_le32(ctx->vf_res.max_gid_per_vf);
195
196 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
197 (void *)&resp,
198 NULL, 0);
199 if (rc) {
200 dev_err(&res->pdev->dev,
201 "QPLIB: Failed to set function resources");
202 }
203 return rc;
204}
205
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800206/* SGID */
207int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
208 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
209 struct bnxt_qplib_gid *gid)
210{
211 if (index > sgid_tbl->max) {
212 dev_err(&res->pdev->dev,
213 "QPLIB: Index %d exceeded SGID table max (%d)",
214 index, sgid_tbl->max);
215 return -EINVAL;
216 }
217 memcpy(gid, &sgid_tbl->tbl[index], sizeof(*gid));
218 return 0;
219}
220
221int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
222 struct bnxt_qplib_gid *gid, bool update)
223{
224 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
225 struct bnxt_qplib_res,
226 sgid_tbl);
227 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
228 int index;
229
230 if (!sgid_tbl) {
231 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
232 return -EINVAL;
233 }
234 /* Do we need a sgid_lock here? */
235 if (!sgid_tbl->active) {
236 dev_err(&res->pdev->dev,
237 "QPLIB: SGID table has no active entries");
238 return -ENOMEM;
239 }
240 for (index = 0; index < sgid_tbl->max; index++) {
241 if (!memcmp(&sgid_tbl->tbl[index], gid, sizeof(*gid)))
242 break;
243 }
244 if (index == sgid_tbl->max) {
245 dev_warn(&res->pdev->dev, "GID not found in the SGID table");
246 return 0;
247 }
248 /* Remove GID from the SGID table */
249 if (update) {
250 struct cmdq_delete_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700251 struct creq_delete_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800252 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700253 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800254
255 RCFW_CMD_PREP(req, DELETE_GID, cmd_flags);
256 if (sgid_tbl->hw_id[index] == 0xFFFF) {
257 dev_err(&res->pdev->dev,
258 "QPLIB: GID entry contains an invalid HW id");
259 return -EINVAL;
260 }
261 req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700262 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
263 (void *)&resp, NULL, 0);
264 if (rc)
265 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800266 }
267 memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
268 sizeof(bnxt_qplib_gid_zero));
Kalesh AP5fac5b12017-06-29 12:28:10 -0700269 sgid_tbl->vlan[index] = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800270 sgid_tbl->active--;
271 dev_dbg(&res->pdev->dev,
272 "QPLIB: SGID deleted hw_id[0x%x] = 0x%x active = 0x%x",
273 index, sgid_tbl->hw_id[index], sgid_tbl->active);
274 sgid_tbl->hw_id[index] = (u16)-1;
275
276 /* unlock */
277 return 0;
278}
279
280int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
281 struct bnxt_qplib_gid *gid, u8 *smac, u16 vlan_id,
282 bool update, u32 *index)
283{
284 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
285 struct bnxt_qplib_res,
286 sgid_tbl);
287 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700288 int i, free_idx;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800289
290 if (!sgid_tbl) {
291 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
292 return -EINVAL;
293 }
294 /* Do we need a sgid_lock here? */
295 if (sgid_tbl->active == sgid_tbl->max) {
296 dev_err(&res->pdev->dev, "QPLIB: SGID table is full");
297 return -ENOMEM;
298 }
299 free_idx = sgid_tbl->max;
300 for (i = 0; i < sgid_tbl->max; i++) {
301 if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid))) {
302 dev_dbg(&res->pdev->dev,
303 "QPLIB: SGID entry already exist in entry %d!",
304 i);
305 *index = i;
306 return -EALREADY;
307 } else if (!memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero,
308 sizeof(bnxt_qplib_gid_zero)) &&
309 free_idx == sgid_tbl->max) {
310 free_idx = i;
311 }
312 }
313 if (free_idx == sgid_tbl->max) {
314 dev_err(&res->pdev->dev,
315 "QPLIB: SGID table is FULL but count is not MAX??");
316 return -ENOMEM;
317 }
318 if (update) {
319 struct cmdq_add_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700320 struct creq_add_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800321 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700322 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800323
324 RCFW_CMD_PREP(req, ADD_GID, cmd_flags);
325
Kalesh AP5fac5b12017-06-29 12:28:10 -0700326 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]);
327 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]);
328 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]);
329 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]);
330 /*
331 * driver should ensure that all RoCE traffic is always VLAN
332 * tagged if RoCE traffic is running on non-zero VLAN ID or
333 * RoCE traffic is running on non-zero Priority.
334 */
335 if ((vlan_id != 0xFFFF) || res->prio) {
336 if (vlan_id != 0xFFFF)
337 req.vlan = cpu_to_le16
338 (vlan_id & CMDQ_ADD_GID_VLAN_VLAN_ID_MASK);
339 req.vlan |= cpu_to_le16
340 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 |
341 CMDQ_ADD_GID_VLAN_VLAN_EN);
342 }
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800343
344 /* MAC in network format */
Kalesh AP5fac5b12017-06-29 12:28:10 -0700345 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]);
346 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]);
347 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800348
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700349 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
350 (void *)&resp, NULL, 0);
351 if (rc)
352 return rc;
353 sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800354 }
355 /* Add GID to the sgid_tbl */
356 memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid));
357 sgid_tbl->active++;
Kalesh AP5fac5b12017-06-29 12:28:10 -0700358 if (vlan_id != 0xFFFF)
359 sgid_tbl->vlan[free_idx] = 1;
360
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800361 dev_dbg(&res->pdev->dev,
362 "QPLIB: SGID added hw_id[0x%x] = 0x%x active = 0x%x",
363 free_idx, sgid_tbl->hw_id[free_idx], sgid_tbl->active);
364
365 *index = free_idx;
366 /* unlock */
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700367 return 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800368}
369
Kalesh AP5fac5b12017-06-29 12:28:10 -0700370int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
371 struct bnxt_qplib_gid *gid, u16 gid_idx,
372 u8 *smac)
373{
374 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
375 struct bnxt_qplib_res,
376 sgid_tbl);
377 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
378 struct creq_modify_gid_resp resp;
379 struct cmdq_modify_gid req;
380 int rc;
381 u16 cmd_flags = 0;
382
383 RCFW_CMD_PREP(req, MODIFY_GID, cmd_flags);
384
385 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]);
386 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]);
387 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]);
388 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]);
389 if (res->prio) {
390 req.vlan |= cpu_to_le16
391 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 |
392 CMDQ_ADD_GID_VLAN_VLAN_EN);
393 }
394
395 /* MAC in network format */
396 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]);
397 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]);
398 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]);
399
400 req.gid_index = cpu_to_le16(gid_idx);
401
402 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
403 (void *)&resp, NULL, 0);
404 return rc;
405}
406
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800407/* pkeys */
408int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res,
409 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index,
410 u16 *pkey)
411{
412 if (index == 0xFFFF) {
413 *pkey = 0xFFFF;
414 return 0;
415 }
416 if (index > pkey_tbl->max) {
417 dev_err(&res->pdev->dev,
418 "QPLIB: Index %d exceeded PKEY table max (%d)",
419 index, pkey_tbl->max);
420 return -EINVAL;
421 }
422 memcpy(pkey, &pkey_tbl->tbl[index], sizeof(*pkey));
423 return 0;
424}
425
426int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res,
427 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
428 bool update)
429{
430 int i, rc = 0;
431
432 if (!pkey_tbl) {
433 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
434 return -EINVAL;
435 }
436
437 /* Do we need a pkey_lock here? */
438 if (!pkey_tbl->active) {
439 dev_err(&res->pdev->dev,
440 "QPLIB: PKEY table has no active entries");
441 return -ENOMEM;
442 }
443 for (i = 0; i < pkey_tbl->max; i++) {
444 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
445 break;
446 }
447 if (i == pkey_tbl->max) {
448 dev_err(&res->pdev->dev,
449 "QPLIB: PKEY 0x%04x not found in the pkey table",
450 *pkey);
451 return -ENOMEM;
452 }
453 memset(&pkey_tbl->tbl[i], 0, sizeof(*pkey));
454 pkey_tbl->active--;
455
456 /* unlock */
457 return rc;
458}
459
460int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res,
461 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
462 bool update)
463{
464 int i, free_idx, rc = 0;
465
466 if (!pkey_tbl) {
467 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
468 return -EINVAL;
469 }
470
471 /* Do we need a pkey_lock here? */
472 if (pkey_tbl->active == pkey_tbl->max) {
473 dev_err(&res->pdev->dev, "QPLIB: PKEY table is full");
474 return -ENOMEM;
475 }
476 free_idx = pkey_tbl->max;
477 for (i = 0; i < pkey_tbl->max; i++) {
478 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
479 return -EALREADY;
480 else if (!pkey_tbl->tbl[i] && free_idx == pkey_tbl->max)
481 free_idx = i;
482 }
483 if (free_idx == pkey_tbl->max) {
484 dev_err(&res->pdev->dev,
485 "QPLIB: PKEY table is FULL but count is not MAX??");
486 return -ENOMEM;
487 }
488 /* Add PKEY to the pkey_tbl */
489 memcpy(&pkey_tbl->tbl[free_idx], pkey, sizeof(*pkey));
490 pkey_tbl->active++;
491
492 /* unlock */
493 return rc;
494}
495
496/* AH */
497int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
498{
499 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
500 struct cmdq_create_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700501 struct creq_create_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800502 u16 cmd_flags = 0;
503 u32 temp32[4];
504 u16 temp16[3];
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700505 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800506
507 RCFW_CMD_PREP(req, CREATE_AH, cmd_flags);
508
509 memcpy(temp32, ah->dgid.data, sizeof(struct bnxt_qplib_gid));
510 req.dgid[0] = cpu_to_le32(temp32[0]);
511 req.dgid[1] = cpu_to_le32(temp32[1]);
512 req.dgid[2] = cpu_to_le32(temp32[2]);
513 req.dgid[3] = cpu_to_le32(temp32[3]);
514
515 req.type = ah->nw_type;
516 req.hop_limit = ah->hop_limit;
517 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[ah->sgid_index]);
518 req.dest_vlan_id_flow_label = cpu_to_le32((ah->flow_label &
519 CMDQ_CREATE_AH_FLOW_LABEL_MASK) |
520 CMDQ_CREATE_AH_DEST_VLAN_ID_MASK);
521 req.pd_id = cpu_to_le32(ah->pd->id);
522 req.traffic_class = ah->traffic_class;
523
524 /* MAC in network format */
525 memcpy(temp16, ah->dmac, 6);
526 req.dest_mac[0] = cpu_to_le16(temp16[0]);
527 req.dest_mac[1] = cpu_to_le16(temp16[1]);
528 req.dest_mac[2] = cpu_to_le16(temp16[2]);
529
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700530 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
531 NULL, 1);
532 if (rc)
533 return rc;
534
535 ah->id = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800536 return 0;
537}
538
539int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
540{
541 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
542 struct cmdq_destroy_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700543 struct creq_destroy_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800544 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700545 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800546
547 /* Clean up the AH table in the device */
548 RCFW_CMD_PREP(req, DESTROY_AH, cmd_flags);
549
550 req.ah_cid = cpu_to_le32(ah->id);
551
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700552 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
553 NULL, 1);
554 if (rc)
555 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800556 return 0;
557}
558
559/* MRW */
560int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
561{
562 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
563 struct cmdq_deallocate_key req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700564 struct creq_deallocate_key_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800565 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700566 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800567
568 if (mrw->lkey == 0xFFFFFFFF) {
569 dev_info(&res->pdev->dev,
570 "QPLIB: SP: Free a reserved lkey MRW");
571 return 0;
572 }
573
574 RCFW_CMD_PREP(req, DEALLOCATE_KEY, cmd_flags);
575
576 req.mrw_flags = mrw->type;
577
578 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
579 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
580 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
581 req.key = cpu_to_le32(mrw->rkey);
582 else
583 req.key = cpu_to_le32(mrw->lkey);
584
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700585 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
586 NULL, 0);
587 if (rc)
588 return rc;
589
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800590 /* Free the qplib's MRW memory */
591 if (mrw->hwq.max_elements)
592 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
593
594 return 0;
595}
596
597int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
598{
599 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
600 struct cmdq_allocate_mrw req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700601 struct creq_allocate_mrw_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800602 u16 cmd_flags = 0;
603 unsigned long tmp;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700604 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800605
606 RCFW_CMD_PREP(req, ALLOCATE_MRW, cmd_flags);
607
608 req.pd_id = cpu_to_le32(mrw->pd->id);
609 req.mrw_flags = mrw->type;
610 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR &&
611 mrw->flags & BNXT_QPLIB_FR_PMR) ||
612 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A ||
613 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)
614 req.access = CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY;
615 tmp = (unsigned long)mrw;
616 req.mrw_handle = cpu_to_le64(tmp);
617
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700618 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
619 (void *)&resp, NULL, 0);
620 if (rc)
621 return rc;
622
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800623 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
624 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
625 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700626 mrw->rkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800627 else
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700628 mrw->lkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800629 return 0;
630}
631
632int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
633 bool block)
634{
635 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
636 struct cmdq_deregister_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700637 struct creq_deregister_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800638 u16 cmd_flags = 0;
639 int rc;
640
641 RCFW_CMD_PREP(req, DEREGISTER_MR, cmd_flags);
642
643 req.lkey = cpu_to_le32(mrw->lkey);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700644 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
645 (void *)&resp, NULL, block);
646 if (rc)
647 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800648
649 /* Free the qplib's MR memory */
650 if (mrw->hwq.max_elements) {
651 mrw->va = 0;
652 mrw->total_size = 0;
653 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
654 }
655
656 return 0;
657}
658
659int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
Somnath Kotur872f3572018-01-11 11:52:09 -0500660 u64 *pbl_tbl, int num_pbls, bool block, u32 buf_pg_size)
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800661{
662 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
663 struct cmdq_register_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700664 struct creq_register_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800665 u16 cmd_flags = 0, level;
666 int pg_ptrs, pages, i, rc;
667 dma_addr_t **pbl_ptr;
668 u32 pg_size;
669
670 if (num_pbls) {
Somnath Kotur872f3572018-01-11 11:52:09 -0500671 /* Allocate memory for the non-leaf pages to store buf ptrs.
672 * Non-leaf pages always uses system PAGE_SIZE
673 */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800674 pg_ptrs = roundup_pow_of_two(num_pbls);
675 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
676 if (!pages)
677 pages++;
678
679 if (pages > MAX_PBL_LVL_1_PGS) {
680 dev_err(&res->pdev->dev, "QPLIB: SP: Reg MR pages ");
681 dev_err(&res->pdev->dev,
682 "requested (0x%x) exceeded max (0x%x)",
683 pages, MAX_PBL_LVL_1_PGS);
684 return -ENOMEM;
685 }
686 /* Free the hwq if it already exist, must be a rereg */
687 if (mr->hwq.max_elements)
688 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
689
690 mr->hwq.max_elements = pages;
Somnath Kotur872f3572018-01-11 11:52:09 -0500691 /* Use system PAGE_SIZE */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800692 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &mr->hwq, NULL, 0,
693 &mr->hwq.max_elements,
694 PAGE_SIZE, 0, PAGE_SIZE,
695 HWQ_TYPE_CTX);
696 if (rc) {
697 dev_err(&res->pdev->dev,
698 "SP: Reg MR memory allocation failed");
699 return -ENOMEM;
700 }
701 /* Write to the hwq */
702 pbl_ptr = (dma_addr_t **)mr->hwq.pbl_ptr;
703 for (i = 0; i < num_pbls; i++)
704 pbl_ptr[PTR_PG(i)][PTR_IDX(i)] =
705 (pbl_tbl[i] & PAGE_MASK) | PTU_PTE_VALID;
706 }
707
708 RCFW_CMD_PREP(req, REGISTER_MR, cmd_flags);
709
710 /* Configure the request */
711 if (mr->hwq.level == PBL_LVL_MAX) {
Somnath Kotur872f3572018-01-11 11:52:09 -0500712 /* No PBL provided, just use system PAGE_SIZE */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800713 level = 0;
714 req.pbl = 0;
715 pg_size = PAGE_SIZE;
716 } else {
717 level = mr->hwq.level + 1;
718 req.pbl = cpu_to_le64(mr->hwq.pbl[PBL_LVL_0].pg_map_arr[0]);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800719 }
Somnath Kotur872f3572018-01-11 11:52:09 -0500720 pg_size = buf_pg_size ? buf_pg_size : PAGE_SIZE;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800721 req.log2_pg_size_lvl = (level << CMDQ_REGISTER_MR_LVL_SFT) |
722 ((ilog2(pg_size) <<
723 CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT) &
724 CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK);
Somnath Kotur872f3572018-01-11 11:52:09 -0500725 req.log2_pbl_pg_size = cpu_to_le16(((ilog2(PAGE_SIZE) <<
726 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_SFT) &
727 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_MASK));
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800728 req.access = (mr->flags & 0xFFFF);
729 req.va = cpu_to_le64(mr->va);
730 req.key = cpu_to_le32(mr->lkey);
731 req.mr_size = cpu_to_le64(mr->total_size);
732
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700733 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
734 (void *)&resp, NULL, block);
735 if (rc)
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800736 goto fail;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700737
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800738 return 0;
739
740fail:
741 if (mr->hwq.max_elements)
742 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
743 return rc;
744}
745
746int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
747 struct bnxt_qplib_frpl *frpl,
748 int max_pg_ptrs)
749{
750 int pg_ptrs, pages, rc;
751
752 /* Re-calculate the max to fit the HWQ allocation model */
753 pg_ptrs = roundup_pow_of_two(max_pg_ptrs);
754 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
755 if (!pages)
756 pages++;
757
758 if (pages > MAX_PBL_LVL_1_PGS)
759 return -ENOMEM;
760
761 frpl->hwq.max_elements = pages;
762 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &frpl->hwq, NULL, 0,
763 &frpl->hwq.max_elements, PAGE_SIZE, 0,
764 PAGE_SIZE, HWQ_TYPE_CTX);
765 if (!rc)
766 frpl->max_pg_ptrs = pg_ptrs;
767
768 return rc;
769}
770
771int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
772 struct bnxt_qplib_frpl *frpl)
773{
774 bnxt_qplib_free_hwq(res->pdev, &frpl->hwq);
775 return 0;
776}
777
778int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids)
779{
780 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
781 struct cmdq_map_tc_to_cos req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700782 struct creq_map_tc_to_cos_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800783 u16 cmd_flags = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800784
785 RCFW_CMD_PREP(req, MAP_TC_TO_COS, cmd_flags);
786 req.cos0 = cpu_to_le16(cids[0]);
787 req.cos1 = cpu_to_le16(cids[1]);
788
Bart Van Assche6dfa8ae2017-10-11 10:48:49 -0700789 bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, NULL,
790 0);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800791 return 0;
792}