blob: dd506c216d8f0ade1f55266591ddce617f9debf3 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
Jerome Glissec507f7e2012-05-09 15:34:58 +020027 * Christian König
Jerome Glisse771fe6b2009-06-05 14:42:42 +020028 */
29#include <linux/seq_file.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090030#include <linux/slab.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020031#include "drmP.h"
32#include "radeon_drm.h"
33#include "radeon_reg.h"
34#include "radeon.h"
35#include "atom.h"
36
Jerome Glissec507f7e2012-05-09 15:34:58 +020037/*
38 * IB.
39 */
40int radeon_debugfs_sa_init(struct radeon_device *rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020041
Jerome Glisse69e130a2011-12-21 12:13:46 -050042int radeon_ib_get(struct radeon_device *rdev, int ring,
Jerome Glissef2e39222012-05-09 15:35:02 +020043 struct radeon_ib *ib, unsigned size)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020044{
Jerome Glissec507f7e2012-05-09 15:34:58 +020045 int r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020046
Jerome Glissef2e39222012-05-09 15:35:02 +020047 r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020048 if (r) {
Jerome Glissec507f7e2012-05-09 15:34:58 +020049 dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
Jerome Glissec507f7e2012-05-09 15:34:58 +020050 return r;
51 }
Jerome Glisseb15ba512011-11-15 11:48:34 -050052
Christian König876dc9f2012-05-08 14:24:01 +020053 ib->ring = ring;
54 ib->fence = NULL;
Jerome Glissef2e39222012-05-09 15:35:02 +020055 ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo);
56 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
57 ib->vm_id = 0;
58 ib->is_const_ib = false;
59 ib->semaphore = NULL;
Jerome Glissec507f7e2012-05-09 15:34:58 +020060
61 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020062}
63
Jerome Glissef2e39222012-05-09 15:35:02 +020064void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020065{
Jerome Glissef2e39222012-05-09 15:35:02 +020066 radeon_semaphore_free(rdev, ib->semaphore, ib->fence);
67 radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence);
68 radeon_fence_unref(&ib->fence);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020069}
70
Jerome Glisse771fe6b2009-06-05 14:42:42 +020071int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
72{
Christian König876dc9f2012-05-08 14:24:01 +020073 struct radeon_ring *ring = &rdev->ring[ib->ring];
Jerome Glisse771fe6b2009-06-05 14:42:42 +020074 int r = 0;
75
Christian Könige32eb502011-10-23 12:56:27 +020076 if (!ib->length_dw || !ring->ready) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +020077 /* TODO: Nothings in the ib we should report. */
Jerome Glissec507f7e2012-05-09 15:34:58 +020078 dev_err(rdev->dev, "couldn't schedule ib\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +020079 return -EINVAL;
80 }
Dave Airlieecb114a2009-09-15 11:12:56 +100081
Dave Airlie6cdf6582009-06-29 18:29:13 +100082 /* 64 dwords should be enough for fence too */
Christian Könige32eb502011-10-23 12:56:27 +020083 r = radeon_ring_lock(rdev, ring, 64);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020084 if (r) {
Jerome Glissec507f7e2012-05-09 15:34:58 +020085 dev_err(rdev->dev, "scheduling IB failed (%d).\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020086 return r;
87 }
Christian König876dc9f2012-05-08 14:24:01 +020088 radeon_ring_ib_execute(rdev, ib->ring, ib);
89 r = radeon_fence_emit(rdev, &ib->fence, ib->ring);
90 if (r) {
91 dev_err(rdev->dev, "failed to emit fence for new IB (%d)\n", r);
92 radeon_ring_unlock_undo(rdev, ring);
93 return r;
94 }
Christian Könige32eb502011-10-23 12:56:27 +020095 radeon_ring_unlock_commit(rdev, ring);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020096 return 0;
97}
98
99int radeon_ib_pool_init(struct radeon_device *rdev)
100{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200101 int r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200102
Jerome Glissec507f7e2012-05-09 15:34:58 +0200103 if (rdev->ib_pool_ready) {
Jerome Glisse9f022dd2009-09-11 15:35:22 +0200104 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200105 }
Jerome Glissec507f7e2012-05-09 15:34:58 +0200106 r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
Christian Königc3b7fe82012-05-09 15:34:56 +0200107 RADEON_IB_POOL_SIZE*64*1024,
108 RADEON_GEM_DOMAIN_GTT);
109 if (r) {
Christian Königc3b7fe82012-05-09 15:34:56 +0200110 return r;
111 }
Jerome Glissec507f7e2012-05-09 15:34:58 +0200112 rdev->ib_pool_ready = true;
113 if (radeon_debugfs_sa_init(rdev)) {
114 dev_err(rdev->dev, "failed to register debugfs file for SA\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200115 }
Jerome Glisseb15ba512011-11-15 11:48:34 -0500116 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200117}
118
119void radeon_ib_pool_fini(struct radeon_device *rdev)
120{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200121 if (rdev->ib_pool_ready) {
122 radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo);
123 rdev->ib_pool_ready = false;
Alex Deucherca2af922010-05-06 11:02:24 -0400124 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200125}
126
Jerome Glisseb15ba512011-11-15 11:48:34 -0500127int radeon_ib_pool_start(struct radeon_device *rdev)
128{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200129 return radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo);
Jerome Glisseb15ba512011-11-15 11:48:34 -0500130}
131
132int radeon_ib_pool_suspend(struct radeon_device *rdev)
133{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200134 return radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo);
Jerome Glisseb15ba512011-11-15 11:48:34 -0500135}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200136
Christian König7bd560e2012-05-02 15:11:12 +0200137int radeon_ib_ring_tests(struct radeon_device *rdev)
138{
139 unsigned i;
140 int r;
141
142 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
143 struct radeon_ring *ring = &rdev->ring[i];
144
145 if (!ring->ready)
146 continue;
147
148 r = radeon_ib_test(rdev, i, ring);
149 if (r) {
150 ring->ready = false;
151
152 if (i == RADEON_RING_TYPE_GFX_INDEX) {
153 /* oh, oh, that's really bad */
154 DRM_ERROR("radeon: failed testing IB on GFX ring (%d).\n", r);
155 rdev->accel_working = false;
156 return r;
157
158 } else {
159 /* still not good, but we can live with it */
160 DRM_ERROR("radeon: failed testing IB on ring %d (%d).\n", i, r);
161 }
162 }
163 }
164 return 0;
165}
166
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200167/*
168 * Ring.
169 */
Jerome Glissec507f7e2012-05-09 15:34:58 +0200170int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
171
172void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
173{
174#if DRM_DEBUG_CODE
175 if (ring->count_dw <= 0) {
176 DRM_ERROR("radeon: writting more dword to ring than expected !\n");
177 }
178#endif
179 ring->ring[ring->wptr++] = v;
180 ring->wptr &= ring->ptr_mask;
181 ring->count_dw--;
182 ring->ring_free_dw--;
183}
184
Christian Könige32eb502011-10-23 12:56:27 +0200185int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)
Christian Königbf852792011-10-13 13:19:22 +0200186{
187 /* r1xx-r5xx only has CP ring */
188 if (rdev->family < CHIP_R600)
189 return RADEON_RING_TYPE_GFX_INDEX;
190
191 if (rdev->family >= CHIP_CAYMAN) {
Christian Könige32eb502011-10-23 12:56:27 +0200192 if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX])
Christian Königbf852792011-10-13 13:19:22 +0200193 return CAYMAN_RING_TYPE_CP1_INDEX;
Christian Könige32eb502011-10-23 12:56:27 +0200194 else if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX])
Christian Königbf852792011-10-13 13:19:22 +0200195 return CAYMAN_RING_TYPE_CP2_INDEX;
196 }
197 return RADEON_RING_TYPE_GFX_INDEX;
198}
199
Christian Könige32eb502011-10-23 12:56:27 +0200200void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200201{
Alex Deucher78c55602011-11-17 14:25:56 -0500202 u32 rptr;
203
Alex Deucher724c80e2010-08-27 18:25:25 -0400204 if (rdev->wb.enabled)
Alex Deucher78c55602011-11-17 14:25:56 -0500205 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
Christian König5596a9d2011-10-13 12:48:45 +0200206 else
Alex Deucher78c55602011-11-17 14:25:56 -0500207 rptr = RREG32(ring->rptr_reg);
208 ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200209 /* This works because ring_size is a power of 2 */
Christian Könige32eb502011-10-23 12:56:27 +0200210 ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
211 ring->ring_free_dw -= ring->wptr;
212 ring->ring_free_dw &= ring->ptr_mask;
213 if (!ring->ring_free_dw) {
214 ring->ring_free_dw = ring->ring_size / 4;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200215 }
216}
217
Christian König7b1f2482011-09-23 15:11:23 +0200218
Christian Könige32eb502011-10-23 12:56:27 +0200219int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200220{
221 int r;
222
223 /* Align requested size with padding so unlock_commit can
224 * pad safely */
Christian Könige32eb502011-10-23 12:56:27 +0200225 ndw = (ndw + ring->align_mask) & ~ring->align_mask;
226 while (ndw > (ring->ring_free_dw - 1)) {
227 radeon_ring_free_size(rdev, ring);
228 if (ndw < ring->ring_free_dw) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200229 break;
230 }
Christian König8a47cc92012-05-09 15:34:48 +0200231 r = radeon_fence_wait_next_locked(rdev, radeon_ring_index(rdev, ring));
Matthew Garrett91700f32010-04-30 15:24:17 -0400232 if (r)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200233 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200234 }
Christian Könige32eb502011-10-23 12:56:27 +0200235 ring->count_dw = ndw;
236 ring->wptr_old = ring->wptr;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200237 return 0;
238}
239
Christian Könige32eb502011-10-23 12:56:27 +0200240int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
Matthew Garrett91700f32010-04-30 15:24:17 -0400241{
242 int r;
243
Christian Königd6999bc2012-05-09 15:34:45 +0200244 mutex_lock(&rdev->ring_lock);
Christian Könige32eb502011-10-23 12:56:27 +0200245 r = radeon_ring_alloc(rdev, ring, ndw);
Matthew Garrett91700f32010-04-30 15:24:17 -0400246 if (r) {
Christian Königd6999bc2012-05-09 15:34:45 +0200247 mutex_unlock(&rdev->ring_lock);
Matthew Garrett91700f32010-04-30 15:24:17 -0400248 return r;
249 }
250 return 0;
251}
252
Christian Könige32eb502011-10-23 12:56:27 +0200253void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200254{
255 unsigned count_dw_pad;
256 unsigned i;
257
258 /* We pad to match fetch size */
Christian Könige32eb502011-10-23 12:56:27 +0200259 count_dw_pad = (ring->align_mask + 1) -
260 (ring->wptr & ring->align_mask);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200261 for (i = 0; i < count_dw_pad; i++) {
Alex Deucher78c55602011-11-17 14:25:56 -0500262 radeon_ring_write(ring, ring->nop);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200263 }
264 DRM_MEMORYBARRIER();
Alex Deucher78c55602011-11-17 14:25:56 -0500265 WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
Christian Könige32eb502011-10-23 12:56:27 +0200266 (void)RREG32(ring->wptr_reg);
Matthew Garrett91700f32010-04-30 15:24:17 -0400267}
268
Christian Könige32eb502011-10-23 12:56:27 +0200269void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)
Matthew Garrett91700f32010-04-30 15:24:17 -0400270{
Christian Könige32eb502011-10-23 12:56:27 +0200271 radeon_ring_commit(rdev, ring);
Christian Königd6999bc2012-05-09 15:34:45 +0200272 mutex_unlock(&rdev->ring_lock);
273}
274
275void radeon_ring_undo(struct radeon_ring *ring)
276{
277 ring->wptr = ring->wptr_old;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200278}
279
Christian Könige32eb502011-10-23 12:56:27 +0200280void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200281{
Christian Königd6999bc2012-05-09 15:34:45 +0200282 radeon_ring_undo(ring);
283 mutex_unlock(&rdev->ring_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200284}
285
Christian König7b9ef162012-05-02 15:11:23 +0200286void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring)
287{
288 int r;
289
Christian König7b9ef162012-05-02 15:11:23 +0200290 radeon_ring_free_size(rdev, ring);
291 if (ring->rptr == ring->wptr) {
292 r = radeon_ring_alloc(rdev, ring, 1);
293 if (!r) {
294 radeon_ring_write(ring, ring->nop);
295 radeon_ring_commit(rdev, ring);
296 }
297 }
Christian König7b9ef162012-05-02 15:11:23 +0200298}
299
Christian König069211e2012-05-02 15:11:20 +0200300void radeon_ring_lockup_update(struct radeon_ring *ring)
301{
302 ring->last_rptr = ring->rptr;
303 ring->last_activity = jiffies;
304}
305
306/**
307 * radeon_ring_test_lockup() - check if ring is lockedup by recording information
308 * @rdev: radeon device structure
309 * @ring: radeon_ring structure holding ring information
310 *
311 * We don't need to initialize the lockup tracking information as we will either
312 * have CP rptr to a different value of jiffies wrap around which will force
313 * initialization of the lockup tracking informations.
314 *
315 * A possible false positivie is if we get call after while and last_cp_rptr ==
316 * the current CP rptr, even if it's unlikely it might happen. To avoid this
317 * if the elapsed time since last call is bigger than 2 second than we return
318 * false and update the tracking information. Due to this the caller must call
319 * radeon_ring_test_lockup several time in less than 2sec for lockup to be reported
320 * the fencing code should be cautious about that.
321 *
322 * Caller should write to the ring to force CP to do something so we don't get
323 * false positive when CP is just gived nothing to do.
324 *
325 **/
326bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
327{
328 unsigned long cjiffies, elapsed;
329 uint32_t rptr;
330
331 cjiffies = jiffies;
332 if (!time_after(cjiffies, ring->last_activity)) {
333 /* likely a wrap around */
334 radeon_ring_lockup_update(ring);
335 return false;
336 }
337 rptr = RREG32(ring->rptr_reg);
338 ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
339 if (ring->rptr != ring->last_rptr) {
340 /* CP is still working no lockup */
341 radeon_ring_lockup_update(ring);
342 return false;
343 }
344 elapsed = jiffies_to_msecs(cjiffies - ring->last_activity);
Christian König3368ff02012-05-02 15:11:21 +0200345 if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
Christian König069211e2012-05-02 15:11:20 +0200346 dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
347 return true;
348 }
349 /* give a chance to the GPU ... */
350 return false;
351}
352
Christian Könige32eb502011-10-23 12:56:27 +0200353int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
Alex Deucher78c55602011-11-17 14:25:56 -0500354 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
355 u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200356{
357 int r;
358
Christian Könige32eb502011-10-23 12:56:27 +0200359 ring->ring_size = ring_size;
360 ring->rptr_offs = rptr_offs;
361 ring->rptr_reg = rptr_reg;
362 ring->wptr_reg = wptr_reg;
Alex Deucher78c55602011-11-17 14:25:56 -0500363 ring->ptr_reg_shift = ptr_reg_shift;
364 ring->ptr_reg_mask = ptr_reg_mask;
365 ring->nop = nop;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200366 /* Allocate ring buffer */
Christian Könige32eb502011-10-23 12:56:27 +0200367 if (ring->ring_obj == NULL) {
368 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400369 RADEON_GEM_DOMAIN_GTT,
370 NULL, &ring->ring_obj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200371 if (r) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100372 dev_err(rdev->dev, "(%d) ring create failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200373 return r;
374 }
Christian Könige32eb502011-10-23 12:56:27 +0200375 r = radeon_bo_reserve(ring->ring_obj, false);
Jerome Glisse4c788672009-11-20 14:29:23 +0100376 if (unlikely(r != 0))
377 return r;
Christian Könige32eb502011-10-23 12:56:27 +0200378 r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
379 &ring->gpu_addr);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200380 if (r) {
Christian Könige32eb502011-10-23 12:56:27 +0200381 radeon_bo_unreserve(ring->ring_obj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100382 dev_err(rdev->dev, "(%d) ring pin failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200383 return r;
384 }
Christian Könige32eb502011-10-23 12:56:27 +0200385 r = radeon_bo_kmap(ring->ring_obj,
386 (void **)&ring->ring);
387 radeon_bo_unreserve(ring->ring_obj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200388 if (r) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100389 dev_err(rdev->dev, "(%d) ring map failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200390 return r;
391 }
392 }
Christian Könige32eb502011-10-23 12:56:27 +0200393 ring->ptr_mask = (ring->ring_size / 4) - 1;
394 ring->ring_free_dw = ring->ring_size / 4;
Christian Königec1a6cc2012-05-02 15:11:11 +0200395 if (radeon_debugfs_ring_init(rdev, ring)) {
396 DRM_ERROR("Failed to register debugfs file for rings !\n");
397 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200398 return 0;
399}
400
Christian Könige32eb502011-10-23 12:56:27 +0200401void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200402{
Jerome Glisse4c788672009-11-20 14:29:23 +0100403 int r;
Alex Deucherca2af922010-05-06 11:02:24 -0400404 struct radeon_bo *ring_obj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100405
Christian Königd6999bc2012-05-09 15:34:45 +0200406 mutex_lock(&rdev->ring_lock);
Christian Könige32eb502011-10-23 12:56:27 +0200407 ring_obj = ring->ring_obj;
Christian Königd6999bc2012-05-09 15:34:45 +0200408 ring->ready = false;
Christian Könige32eb502011-10-23 12:56:27 +0200409 ring->ring = NULL;
410 ring->ring_obj = NULL;
Christian Königd6999bc2012-05-09 15:34:45 +0200411 mutex_unlock(&rdev->ring_lock);
Alex Deucherca2af922010-05-06 11:02:24 -0400412
413 if (ring_obj) {
414 r = radeon_bo_reserve(ring_obj, false);
415 if (likely(r == 0)) {
416 radeon_bo_kunmap(ring_obj);
417 radeon_bo_unpin(ring_obj);
418 radeon_bo_unreserve(ring_obj);
419 }
420 radeon_bo_unref(&ring_obj);
421 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200422}
423
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200424/*
425 * Debugfs info
426 */
427#if defined(CONFIG_DEBUG_FS)
Christian Königaf9720f2011-10-24 17:08:44 +0200428
429static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
430{
431 struct drm_info_node *node = (struct drm_info_node *) m->private;
432 struct drm_device *dev = node->minor->dev;
433 struct radeon_device *rdev = dev->dev_private;
434 int ridx = *(int*)node->info_ent->data;
435 struct radeon_ring *ring = &rdev->ring[ridx];
436 unsigned count, i, j;
437
438 radeon_ring_free_size(rdev, ring);
439 count = (ring->ring_size / 4) - ring->ring_free_dw;
440 seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg));
441 seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg));
442 seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr);
443 seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr);
444 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
445 seq_printf(m, "%u dwords in ring\n", count);
446 i = ring->rptr;
447 for (j = 0; j <= count; j++) {
448 seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]);
449 i = (i + 1) & ring->ptr_mask;
450 }
451 return 0;
452}
453
454static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
455static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
456static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
457
458static struct drm_info_list radeon_debugfs_ring_info_list[] = {
459 {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index},
460 {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index},
461 {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index},
462};
463
Christian König711a9722012-05-09 15:34:51 +0200464static int radeon_debugfs_sa_info(struct seq_file *m, void *data)
465{
466 struct drm_info_node *node = (struct drm_info_node *) m->private;
467 struct drm_device *dev = node->minor->dev;
468 struct radeon_device *rdev = dev->dev_private;
469
Jerome Glissec507f7e2012-05-09 15:34:58 +0200470 radeon_sa_bo_dump_debug_info(&rdev->ring_tmp_bo, m);
Christian König711a9722012-05-09 15:34:51 +0200471
472 return 0;
473
474}
475
476static struct drm_info_list radeon_debugfs_sa_list[] = {
477 {"radeon_sa_info", &radeon_debugfs_sa_info, 0, NULL},
478};
479
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200480#endif
481
Christian Königec1a6cc2012-05-02 15:11:11 +0200482int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
Christian Königaf9720f2011-10-24 17:08:44 +0200483{
484#if defined(CONFIG_DEBUG_FS)
Christian Königec1a6cc2012-05-02 15:11:11 +0200485 unsigned i;
486 for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
487 struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
488 int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
489 unsigned r;
490
491 if (&rdev->ring[ridx] != ring)
492 continue;
493
494 r = radeon_debugfs_add_files(rdev, info, 1);
495 if (r)
496 return r;
497 }
Christian Königaf9720f2011-10-24 17:08:44 +0200498#endif
Christian Königec1a6cc2012-05-02 15:11:11 +0200499 return 0;
Christian Königaf9720f2011-10-24 17:08:44 +0200500}
501
Jerome Glissec507f7e2012-05-09 15:34:58 +0200502int radeon_debugfs_sa_init(struct radeon_device *rdev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200503{
504#if defined(CONFIG_DEBUG_FS)
Jerome Glissec507f7e2012-05-09 15:34:58 +0200505 return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200506#else
507 return 0;
508#endif
509}