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Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001/*
2 * AMD 10Gb Ethernet driver
3 *
4 * This file is available to you under your choice of the following two
5 * licenses:
6 *
7 * License 1: GPLv2
8 *
9 * Copyright (c) 2014 Advanced Micro Devices, Inc.
10 *
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 *
24 * This file incorporates work covered by the following copyright and
25 * permission notice:
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
29 * and you.
30 *
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
43 *
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
55 *
56 *
57 * License 2: Modified BSD
58 *
59 * Copyright (c) 2014 Advanced Micro Devices, Inc.
60 * All rights reserved.
61 *
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83 *
84 * This file incorporates work covered by the following copyright and
85 * permission notice:
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
89 * and you.
90 *
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
100 *
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
103 *
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
115 */
116
117#include <linux/module.h>
118#include <linux/device.h>
119#include <linux/platform_device.h>
120#include <linux/spinlock.h>
121#include <linux/netdevice.h>
122#include <linux/etherdevice.h>
123#include <linux/io.h>
124#include <linux/of.h>
125#include <linux/of_net.h>
126#include <linux/clk.h>
127
128#include "xgbe.h"
129#include "xgbe-common.h"
130
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500131MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
132MODULE_LICENSE("Dual BSD/GPL");
133MODULE_VERSION(XGBE_DRV_VERSION);
134MODULE_DESCRIPTION(XGBE_DRV_DESC);
135
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500136static void xgbe_default_config(struct xgbe_prv_data *pdata)
137{
138 DBGPR("-->xgbe_default_config\n");
139
140 pdata->pblx8 = DMA_PBL_X8_ENABLE;
141 pdata->tx_sf_mode = MTL_TSF_ENABLE;
142 pdata->tx_threshold = MTL_TX_THRESHOLD_64;
143 pdata->tx_pbl = DMA_PBL_16;
144 pdata->tx_osp_mode = DMA_OSP_ENABLE;
145 pdata->rx_sf_mode = MTL_RSF_DISABLE;
146 pdata->rx_threshold = MTL_RX_THRESHOLD_64;
147 pdata->rx_pbl = DMA_PBL_16;
148 pdata->pause_autoneg = 1;
149 pdata->tx_pause = 1;
150 pdata->rx_pause = 1;
Lendacky, Thomas916102c2015-01-16 12:46:45 -0600151 pdata->phy_speed = SPEED_UNKNOWN;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500152 pdata->power_down = 0;
153 pdata->default_autoneg = AUTONEG_ENABLE;
154 pdata->default_speed = SPEED_10000;
155
156 DBGPR("<--xgbe_default_config\n");
157}
158
159static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
160{
161 xgbe_init_function_ptrs_dev(&pdata->hw_if);
162 xgbe_init_function_ptrs_desc(&pdata->desc_if);
163}
164
165static int xgbe_probe(struct platform_device *pdev)
166{
167 struct xgbe_prv_data *pdata;
168 struct xgbe_hw_if *hw_if;
169 struct xgbe_desc_if *desc_if;
170 struct net_device *netdev;
171 struct device *dev = &pdev->dev;
172 struct resource *res;
173 const u8 *mac_addr;
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -0600174 unsigned int i;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500175 int ret;
176
177 DBGPR("--> xgbe_probe\n");
178
179 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),
Lendacky, Thomasd5c48582014-06-09 09:19:32 -0500180 XGBE_MAX_DMA_CHANNELS);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500181 if (!netdev) {
182 dev_err(dev, "alloc_etherdev failed\n");
183 ret = -ENOMEM;
184 goto err_alloc;
185 }
186 SET_NETDEV_DEV(netdev, dev);
187 pdata = netdev_priv(netdev);
188 pdata->netdev = netdev;
189 pdata->pdev = pdev;
190 pdata->dev = dev;
191 platform_set_drvdata(pdev, netdev);
192
193 spin_lock_init(&pdata->lock);
194 mutex_init(&pdata->xpcs_mutex);
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -0600195 mutex_init(&pdata->rss_mutex);
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500196 spin_lock_init(&pdata->tstamp_lock);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500197
198 /* Set and validate the number of descriptors for a ring */
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -0500199 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
200 pdata->tx_desc_count = XGBE_TX_DESC_CNT;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500201 if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) {
202 dev_err(dev, "tx descriptor count (%d) is not valid\n",
203 pdata->tx_desc_count);
204 ret = -EINVAL;
205 goto err_io;
206 }
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -0500207 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);
208 pdata->rx_desc_count = XGBE_RX_DESC_CNT;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500209 if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) {
210 dev_err(dev, "rx descriptor count (%d) is not valid\n",
211 pdata->rx_desc_count);
212 ret = -EINVAL;
213 goto err_io;
214 }
215
216 /* Obtain the system clock setting */
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500217 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
218 if (IS_ERR(pdata->sysclk)) {
219 dev_err(dev, "dma devm_clk_get failed\n");
220 ret = PTR_ERR(pdata->sysclk);
221 goto err_io;
222 }
223
224 /* Obtain the PTP clock setting */
225 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
226 if (IS_ERR(pdata->ptpclk)) {
227 dev_err(dev, "ptp devm_clk_get failed\n");
228 ret = PTR_ERR(pdata->ptpclk);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500229 goto err_io;
230 }
231
232 /* Obtain the mmio areas for the device */
233 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
234 pdata->xgmac_regs = devm_ioremap_resource(dev, res);
235 if (IS_ERR(pdata->xgmac_regs)) {
236 dev_err(dev, "xgmac ioremap failed\n");
237 ret = PTR_ERR(pdata->xgmac_regs);
238 goto err_io;
239 }
240 DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs);
241
242 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
243 pdata->xpcs_regs = devm_ioremap_resource(dev, res);
244 if (IS_ERR(pdata->xpcs_regs)) {
245 dev_err(dev, "xpcs ioremap failed\n");
246 ret = PTR_ERR(pdata->xpcs_regs);
247 goto err_io;
248 }
249 DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs);
250
251 /* Set the DMA mask */
252 if (!dev->dma_mask)
253 dev->dma_mask = &dev->coherent_dma_mask;
Lendacky, Thomasf3d0e782014-08-05 13:30:38 -0500254 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
255 if (ret) {
256 dev_err(dev, "dma_set_mask_and_coherent failed\n");
257 goto err_io;
258 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500259
Lendacky, Thomascfa50c72014-07-02 13:04:57 -0500260 if (of_property_read_bool(dev->of_node, "dma-coherent")) {
261 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
262 pdata->arcache = XGBE_DMA_OS_ARCACHE;
263 pdata->awcache = XGBE_DMA_OS_AWCACHE;
264 } else {
265 pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN;
266 pdata->arcache = XGBE_DMA_SYS_ARCACHE;
267 pdata->awcache = XGBE_DMA_SYS_AWCACHE;
268 }
269
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600270 /* Check for per channel interrupt support */
271 if (of_property_read_bool(dev->of_node, XGBE_DMA_IRQS))
272 pdata->per_channel_irq = 1;
273
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500274 ret = platform_get_irq(pdev, 0);
275 if (ret < 0) {
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600276 dev_err(dev, "platform_get_irq 0 failed\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500277 goto err_io;
278 }
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600279 pdata->dev_irq = ret;
280
281 netdev->irq = pdata->dev_irq;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500282 netdev->base_addr = (unsigned long)pdata->xgmac_regs;
283
284 /* Set all the function pointers */
285 xgbe_init_all_fptrs(pdata);
286 hw_if = &pdata->hw_if;
287 desc_if = &pdata->desc_if;
288
289 /* Issue software reset to device */
290 hw_if->exit(pdata);
291
292 /* Populate the hardware features */
293 xgbe_get_all_hw_features(pdata);
294
295 /* Retrieve the MAC address */
296 mac_addr = of_get_mac_address(dev->of_node);
297 if (!mac_addr) {
298 dev_err(dev, "invalid mac address for this device\n");
299 ret = -EINVAL;
300 goto err_io;
301 }
302 memcpy(netdev->dev_addr, mac_addr, netdev->addr_len);
303
304 /* Retrieve the PHY mode - it must be "xgmii" */
305 pdata->phy_mode = of_get_phy_mode(dev->of_node);
306 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
307 dev_err(dev, "invalid phy-mode specified for this device\n");
308 ret = -EINVAL;
309 goto err_io;
310 }
311
312 /* Set default configuration data */
313 xgbe_default_config(pdata);
314
Lendacky, Thomas853eb162014-07-29 08:57:31 -0500315 /* Calculate the number of Tx and Rx rings to be created
316 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set
317 * the number of Tx queues to the number of Tx channels
318 * enabled
319 * -Rx (DMA) Channels do not map 1-to-1 so use the actual
320 * number of Rx queues
321 */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500322 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(),
323 pdata->hw_feat.tx_ch_cnt);
Lendacky, Thomas853eb162014-07-29 08:57:31 -0500324 pdata->tx_q_count = pdata->tx_ring_count;
Wei Yongjun332cfc82014-07-23 08:59:40 +0800325 ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count);
326 if (ret) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500327 dev_err(dev, "error setting real tx queue count\n");
328 goto err_io;
329 }
330
331 pdata->rx_ring_count = min_t(unsigned int,
332 netif_get_num_default_rss_queues(),
333 pdata->hw_feat.rx_ch_cnt);
Lendacky, Thomas853eb162014-07-29 08:57:31 -0500334 pdata->rx_q_count = pdata->hw_feat.rx_q_cnt;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500335 ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count);
336 if (ret) {
337 dev_err(dev, "error setting real rx queue count\n");
338 goto err_io;
339 }
340
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -0600341 /* Initialize RSS hash key and lookup table */
Eric Dumazetb2306302014-11-16 06:23:06 -0800342 netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key));
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -0600343
344 for (i = 0; i < XGBE_RSS_MAX_TABLE_SIZE; i++)
345 XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH,
346 i % pdata->rx_ring_count);
347
348 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1);
349 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1);
350 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1);
351
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500352 /* Prepare to regsiter with MDIO */
353 pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name);
354 if (!pdata->mii_bus_id) {
355 dev_err(dev, "failed to allocate mii bus id\n");
356 ret = -ENOMEM;
357 goto err_io;
358 }
359 ret = xgbe_mdio_register(pdata);
360 if (ret)
361 goto err_bus_id;
362
Lendacky, Thomasfca2d992014-07-29 08:57:55 -0500363 /* Set device operations */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500364 netdev->netdev_ops = xgbe_get_netdev_ops();
365 netdev->ethtool_ops = xgbe_get_ethtool_ops();
Lendacky, Thomasfca2d992014-07-29 08:57:55 -0500366#ifdef CONFIG_AMD_XGBE_DCB
367 netdev->dcbnl_ops = xgbe_get_dcbnl_ops();
368#endif
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500369
370 /* Set device features */
371 netdev->hw_features = NETIF_F_SG |
372 NETIF_F_IP_CSUM |
373 NETIF_F_IPV6_CSUM |
374 NETIF_F_RXCSUM |
375 NETIF_F_TSO |
376 NETIF_F_TSO6 |
377 NETIF_F_GRO |
378 NETIF_F_HW_VLAN_CTAG_RX |
Lendacky, Thomas801c62d2014-06-24 16:19:24 -0500379 NETIF_F_HW_VLAN_CTAG_TX |
380 NETIF_F_HW_VLAN_CTAG_FILTER;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500381
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -0600382 if (pdata->hw_feat.rss)
383 netdev->hw_features |= NETIF_F_RXHASH;
384
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500385 netdev->vlan_features |= NETIF_F_SG |
386 NETIF_F_IP_CSUM |
387 NETIF_F_IPV6_CSUM |
388 NETIF_F_TSO |
389 NETIF_F_TSO6;
390
391 netdev->features |= netdev->hw_features;
392 pdata->netdev_features = netdev->features;
393
Lendacky, Thomasb85e4d82014-06-24 16:19:29 -0500394 netdev->priv_flags |= IFF_UNICAST_FLT;
395
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500396 xgbe_init_rx_coalesce(pdata);
397 xgbe_init_tx_coalesce(pdata);
398
399 netif_carrier_off(netdev);
400 ret = register_netdev(netdev);
401 if (ret) {
402 dev_err(dev, "net device registration failed\n");
403 goto err_reg_netdev;
404 }
405
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500406 xgbe_ptp_register(pdata);
407
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500408 xgbe_debugfs_init(pdata);
409
410 netdev_notice(netdev, "net device enabled\n");
411
412 DBGPR("<-- xgbe_probe\n");
413
414 return 0;
415
416err_reg_netdev:
417 xgbe_mdio_unregister(pdata);
418
419err_bus_id:
420 kfree(pdata->mii_bus_id);
421
422err_io:
423 free_netdev(netdev);
424
425err_alloc:
426 dev_notice(dev, "net device not enabled\n");
427
428 return ret;
429}
430
431static int xgbe_remove(struct platform_device *pdev)
432{
433 struct net_device *netdev = platform_get_drvdata(pdev);
434 struct xgbe_prv_data *pdata = netdev_priv(netdev);
435
436 DBGPR("-->xgbe_remove\n");
437
438 xgbe_debugfs_exit(pdata);
439
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500440 xgbe_ptp_unregister(pdata);
441
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500442 unregister_netdev(netdev);
443
444 xgbe_mdio_unregister(pdata);
445
446 kfree(pdata->mii_bus_id);
447
448 free_netdev(netdev);
449
450 DBGPR("<--xgbe_remove\n");
451
452 return 0;
453}
454
455#ifdef CONFIG_PM
456static int xgbe_suspend(struct device *dev)
457{
458 struct net_device *netdev = dev_get_drvdata(dev);
459 int ret;
460
461 DBGPR("-->xgbe_suspend\n");
462
463 if (!netif_running(netdev)) {
464 DBGPR("<--xgbe_dev_suspend\n");
465 return -EINVAL;
466 }
467
468 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
469
470 DBGPR("<--xgbe_suspend\n");
471
472 return ret;
473}
474
475static int xgbe_resume(struct device *dev)
476{
477 struct net_device *netdev = dev_get_drvdata(dev);
478 int ret;
479
480 DBGPR("-->xgbe_resume\n");
481
482 if (!netif_running(netdev)) {
483 DBGPR("<--xgbe_dev_resume\n");
484 return -EINVAL;
485 }
486
487 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
488
489 DBGPR("<--xgbe_resume\n");
490
491 return ret;
492}
493#endif /* CONFIG_PM */
494
495static const struct of_device_id xgbe_of_match[] = {
496 { .compatible = "amd,xgbe-seattle-v1a", },
497 {},
498};
499
500MODULE_DEVICE_TABLE(of, xgbe_of_match);
501static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
502
503static struct platform_driver xgbe_driver = {
504 .driver = {
505 .name = "amd-xgbe",
506 .of_match_table = xgbe_of_match,
507 .pm = &xgbe_pm_ops,
508 },
509 .probe = xgbe_probe,
510 .remove = xgbe_remove,
511};
512
513module_platform_driver(xgbe_driver);