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Catalin Marinas0aea86a2012-03-05 11:49:32 +00001/*
2 * Based on arch/arm/include/asm/uaccess.h
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18#ifndef __ASM_UACCESS_H
19#define __ASM_UACCESS_H
20
Catalin Marinasbd389672016-07-01 14:58:21 +010021#include <asm/alternative.h>
Catalin Marinas4b65a5d2016-07-01 16:53:00 +010022#include <asm/kernel-pgtable.h>
Catalin Marinasbd389672016-07-01 14:58:21 +010023#include <asm/sysreg.h>
24
Catalin Marinas0aea86a2012-03-05 11:49:32 +000025/*
26 * User space memory access functions
27 */
Andre Przywara87261d12016-10-19 14:40:54 +010028#include <linux/bitops.h>
Yang Shibffe1ba2016-06-08 14:40:56 -070029#include <linux/kasan-checks.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000030#include <linux/string.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000031
James Morse338d4f42015-07-22 19:05:54 +010032#include <asm/cpufeature.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000033#include <asm/ptrace.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000034#include <asm/memory.h>
35#include <asm/compiler.h>
Al Viro46583932016-12-25 14:00:03 -050036#include <asm/extable.h>
Catalin Marinas0aea86a2012-03-05 11:49:32 +000037
38#define KERNEL_DS (-1UL)
39#define get_ds() (KERNEL_DS)
40
41#define USER_DS TASK_SIZE_64
42#define get_fs() (current_thread_info()->addr_limit)
43
44static inline void set_fs(mm_segment_t fs)
45{
46 current_thread_info()->addr_limit = fs;
James Morse57f49592016-02-05 14:58:48 +000047
48 /*
49 * Enable/disable UAO so that copy_to_user() etc can access
50 * kernel memory with the unprivileged instructions.
51 */
52 if (IS_ENABLED(CONFIG_ARM64_UAO) && fs == KERNEL_DS)
53 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
54 else
55 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO,
56 CONFIG_ARM64_UAO));
Catalin Marinas0aea86a2012-03-05 11:49:32 +000057}
58
Michael S. Tsirkin967f0e52015-01-06 15:11:13 +020059#define segment_eq(a, b) ((a) == (b))
Catalin Marinas0aea86a2012-03-05 11:49:32 +000060
61/*
Catalin Marinas0aea86a2012-03-05 11:49:32 +000062 * Test whether a block of memory is a valid user space address.
63 * Returns 1 if the range is valid, 0 otherwise.
64 *
65 * This is equivalent to the following test:
Christopher Covington31b1e942014-03-19 16:29:37 +000066 * (u65)addr + (u65)size <= current->addr_limit
Catalin Marinas0aea86a2012-03-05 11:49:32 +000067 *
68 * This needs 65-bit arithmetic.
69 */
70#define __range_ok(addr, size) \
71({ \
72 unsigned long flag, roksum; \
73 __chk_user_ptr(addr); \
Christopher Covington31b1e942014-03-19 16:29:37 +000074 asm("adds %1, %1, %3; ccmp %1, %4, #2, cc; cset %0, ls" \
Catalin Marinas0aea86a2012-03-05 11:49:32 +000075 : "=&r" (flag), "=&r" (roksum) \
76 : "1" (addr), "Ir" (size), \
77 "r" (current_thread_info()->addr_limit) \
78 : "cc"); \
79 flag; \
80})
81
Andre Przywara87261d12016-10-19 14:40:54 +010082/*
83 * When dealing with data aborts or instruction traps we may end up with
84 * a tagged userland pointer. Clear the tag to get a sane pointer to pass
85 * on to access_ok(), for instance.
86 */
87#define untagged_addr(addr) sign_extend64(addr, 55)
88
Catalin Marinas0aea86a2012-03-05 11:49:32 +000089#define access_ok(type, addr, size) __range_ok(addr, size)
Will Deacon12a0ef72013-11-06 17:20:22 +000090#define user_addr_max get_fs
Catalin Marinas0aea86a2012-03-05 11:49:32 +000091
Ard Biesheuvel6c94f272016-01-01 15:02:12 +010092#define _ASM_EXTABLE(from, to) \
93 " .pushsection __ex_table, \"a\"\n" \
94 " .align 3\n" \
95 " .long (" #from " - .), (" #to " - .)\n" \
96 " .popsection\n"
97
Catalin Marinas0aea86a2012-03-05 11:49:32 +000098/*
Catalin Marinasbd389672016-07-01 14:58:21 +010099 * User access enabling/disabling.
100 */
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100101#ifdef CONFIG_ARM64_SW_TTBR0_PAN
102static inline void __uaccess_ttbr0_disable(void)
103{
104 unsigned long ttbr;
105
106 /* reserved_ttbr0 placed at the end of swapper_pg_dir */
107 ttbr = read_sysreg(ttbr1_el1) + SWAPPER_DIR_SIZE;
108 write_sysreg(ttbr, ttbr0_el1);
109 isb();
110}
111
112static inline void __uaccess_ttbr0_enable(void)
113{
114 unsigned long flags;
115
116 /*
117 * Disable interrupts to avoid preemption between reading the 'ttbr0'
118 * variable and the MSR. A context switch could trigger an ASID
119 * roll-over and an update of 'ttbr0'.
120 */
121 local_irq_save(flags);
122 write_sysreg(current_thread_info()->ttbr0, ttbr0_el1);
123 isb();
124 local_irq_restore(flags);
125}
126
127static inline bool uaccess_ttbr0_disable(void)
128{
129 if (!system_uses_ttbr0_pan())
130 return false;
131 __uaccess_ttbr0_disable();
132 return true;
133}
134
135static inline bool uaccess_ttbr0_enable(void)
136{
137 if (!system_uses_ttbr0_pan())
138 return false;
139 __uaccess_ttbr0_enable();
140 return true;
141}
142#else
143static inline bool uaccess_ttbr0_disable(void)
144{
145 return false;
146}
147
148static inline bool uaccess_ttbr0_enable(void)
149{
150 return false;
151}
152#endif
153
Catalin Marinasbd389672016-07-01 14:58:21 +0100154#define __uaccess_disable(alt) \
155do { \
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100156 if (!uaccess_ttbr0_disable()) \
157 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \
158 CONFIG_ARM64_PAN)); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100159} while (0)
160
161#define __uaccess_enable(alt) \
162do { \
Marc Zyngier75037122016-12-12 13:50:26 +0000163 if (!uaccess_ttbr0_enable()) \
Catalin Marinas4b65a5d2016-07-01 16:53:00 +0100164 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \
165 CONFIG_ARM64_PAN)); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100166} while (0)
167
168static inline void uaccess_disable(void)
169{
170 __uaccess_disable(ARM64_HAS_PAN);
171}
172
173static inline void uaccess_enable(void)
174{
175 __uaccess_enable(ARM64_HAS_PAN);
176}
177
178/*
179 * These functions are no-ops when UAO is present.
180 */
181static inline void uaccess_disable_not_uao(void)
182{
183 __uaccess_disable(ARM64_ALT_PAN_NOT_UAO);
184}
185
186static inline void uaccess_enable_not_uao(void)
187{
188 __uaccess_enable(ARM64_ALT_PAN_NOT_UAO);
189}
190
191/*
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000192 * The "__xxx" versions of the user access functions do not verify the address
193 * space - it must have been done previously with a separate "access_ok()"
194 * call.
195 *
196 * The "__xxx_error" versions set the third argument to -EFAULT if an error
197 * occurs, and leave it unchanged on success.
198 */
James Morse57f49592016-02-05 14:58:48 +0000199#define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000200 asm volatile( \
James Morse57f49592016-02-05 14:58:48 +0000201 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
202 alt_instr " " reg "1, [%2]\n", feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000203 "2:\n" \
204 " .section .fixup, \"ax\"\n" \
205 " .align 2\n" \
206 "3: mov %w0, %3\n" \
207 " mov %1, #0\n" \
208 " b 2b\n" \
209 " .previous\n" \
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100210 _ASM_EXTABLE(1b, 3b) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000211 : "+r" (err), "=&r" (x) \
212 : "r" (addr), "i" (-EFAULT))
213
214#define __get_user_err(x, ptr, err) \
215do { \
216 unsigned long __gu_val; \
217 __chk_user_ptr(ptr); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100218 uaccess_enable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000219 switch (sizeof(*(ptr))) { \
220 case 1: \
James Morse57f49592016-02-05 14:58:48 +0000221 __get_user_asm("ldrb", "ldtrb", "%w", __gu_val, (ptr), \
222 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000223 break; \
224 case 2: \
James Morse57f49592016-02-05 14:58:48 +0000225 __get_user_asm("ldrh", "ldtrh", "%w", __gu_val, (ptr), \
226 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000227 break; \
228 case 4: \
James Morse57f49592016-02-05 14:58:48 +0000229 __get_user_asm("ldr", "ldtr", "%w", __gu_val, (ptr), \
230 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000231 break; \
232 case 8: \
James Morse57f49592016-02-05 14:58:48 +0000233 __get_user_asm("ldr", "ldtr", "%", __gu_val, (ptr), \
234 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000235 break; \
236 default: \
237 BUILD_BUG(); \
238 } \
Catalin Marinasbd389672016-07-01 14:58:21 +0100239 uaccess_disable_not_uao(); \
Michael S. Tsirkin58fff512014-12-12 01:56:04 +0200240 (x) = (__force __typeof__(*(ptr)))__gu_val; \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000241} while (0)
242
243#define __get_user(x, ptr) \
244({ \
245 int __gu_err = 0; \
246 __get_user_err((x), (ptr), __gu_err); \
247 __gu_err; \
248})
249
250#define __get_user_error(x, ptr, err) \
251({ \
252 __get_user_err((x), (ptr), (err)); \
253 (void)0; \
254})
255
256#define __get_user_unaligned __get_user
257
258#define get_user(x, ptr) \
259({ \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100260 __typeof__(*(ptr)) __user *__p = (ptr); \
Michael S. Tsirkin56d2ef72013-05-26 17:30:42 +0300261 might_fault(); \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100262 access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
263 __get_user((x), __p) : \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000264 ((x) = 0, -EFAULT); \
265})
266
James Morse57f49592016-02-05 14:58:48 +0000267#define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000268 asm volatile( \
James Morse57f49592016-02-05 14:58:48 +0000269 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
270 alt_instr " " reg "1, [%2]\n", feature) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000271 "2:\n" \
272 " .section .fixup,\"ax\"\n" \
273 " .align 2\n" \
274 "3: mov %w0, %3\n" \
275 " b 2b\n" \
276 " .previous\n" \
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100277 _ASM_EXTABLE(1b, 3b) \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000278 : "+r" (err) \
279 : "r" (x), "r" (addr), "i" (-EFAULT))
280
281#define __put_user_err(x, ptr, err) \
282do { \
283 __typeof__(*(ptr)) __pu_val = (x); \
284 __chk_user_ptr(ptr); \
Catalin Marinasbd389672016-07-01 14:58:21 +0100285 uaccess_enable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000286 switch (sizeof(*(ptr))) { \
287 case 1: \
James Morse57f49592016-02-05 14:58:48 +0000288 __put_user_asm("strb", "sttrb", "%w", __pu_val, (ptr), \
289 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000290 break; \
291 case 2: \
James Morse57f49592016-02-05 14:58:48 +0000292 __put_user_asm("strh", "sttrh", "%w", __pu_val, (ptr), \
293 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000294 break; \
295 case 4: \
James Morse57f49592016-02-05 14:58:48 +0000296 __put_user_asm("str", "sttr", "%w", __pu_val, (ptr), \
297 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000298 break; \
299 case 8: \
James Morse57f49592016-02-05 14:58:48 +0000300 __put_user_asm("str", "sttr", "%", __pu_val, (ptr), \
301 (err), ARM64_HAS_UAO); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000302 break; \
303 default: \
304 BUILD_BUG(); \
305 } \
Catalin Marinasbd389672016-07-01 14:58:21 +0100306 uaccess_disable_not_uao(); \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000307} while (0)
308
309#define __put_user(x, ptr) \
310({ \
311 int __pu_err = 0; \
312 __put_user_err((x), (ptr), __pu_err); \
313 __pu_err; \
314})
315
316#define __put_user_error(x, ptr, err) \
317({ \
318 __put_user_err((x), (ptr), (err)); \
319 (void)0; \
320})
321
322#define __put_user_unaligned __put_user
323
324#define put_user(x, ptr) \
325({ \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100326 __typeof__(*(ptr)) __user *__p = (ptr); \
Michael S. Tsirkin56d2ef72013-05-26 17:30:42 +0300327 might_fault(); \
AKASHI Takahiro1f65c132013-09-24 10:00:50 +0100328 access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
329 __put_user((x), __p) : \
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000330 -EFAULT; \
331})
332
Yang Shibffe1ba2016-06-08 14:40:56 -0700333extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
Al Viro92430da2017-03-21 08:40:57 -0400334#define raw_copy_from_user __arch_copy_from_user
Yang Shibffe1ba2016-06-08 14:40:56 -0700335extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
Al Viro92430da2017-03-21 08:40:57 -0400336#define raw_copy_to_user __arch_copy_to_user
337extern unsigned long __must_check raw_copy_in_user(void __user *to, const void __user *from, unsigned long n);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000338extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);
Al Viro92430da2017-03-21 08:40:57 -0400339#define INLINE_COPY_TO_USER
340#define INLINE_COPY_FROM_USER
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000341
342static inline unsigned long __must_check clear_user(void __user *to, unsigned long n)
343{
344 if (access_ok(VERIFY_WRITE, to, n))
345 n = __clear_user(to, n);
346 return n;
347}
348
Will Deacon12a0ef72013-11-06 17:20:22 +0000349extern long strncpy_from_user(char *dest, const char __user *src, long count);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000350
Will Deacon12a0ef72013-11-06 17:20:22 +0000351extern __must_check long strlen_user(const char __user *str);
352extern __must_check long strnlen_user(const char __user *str, long n);
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000353
Catalin Marinas0aea86a2012-03-05 11:49:32 +0000354#endif /* __ASM_UACCESS_H */