eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 1 | #ifndef __ASM_ARCH_PXA3XX_NAND_H |
| 2 | #define __ASM_ARCH_PXA3XX_NAND_H |
| 3 | |
| 4 | #include <linux/mtd/mtd.h> |
| 5 | #include <linux/mtd/partitions.h> |
| 6 | |
Enrico Scholz | 4303533 | 2008-08-29 12:57:28 +0200 | [diff] [blame] | 7 | struct pxa3xx_nand_timing { |
| 8 | unsigned int tCH; /* Enable signal hold time */ |
| 9 | unsigned int tCS; /* Enable signal setup time */ |
| 10 | unsigned int tWH; /* ND_nWE high duration */ |
| 11 | unsigned int tWP; /* ND_nWE pulse time */ |
| 12 | unsigned int tRH; /* ND_nRE high duration */ |
| 13 | unsigned int tRP; /* ND_nRE pulse width */ |
| 14 | unsigned int tR; /* ND_nWE high to ND_nRE low for read */ |
| 15 | unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ |
| 16 | unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ |
| 17 | }; |
| 18 | |
Enrico Scholz | 4303533 | 2008-08-29 12:57:28 +0200 | [diff] [blame] | 19 | struct pxa3xx_nand_flash { |
Lei Wen | 4332c11 | 2011-03-03 11:27:01 +0800 | [diff] [blame] | 20 | char *name; |
Lei Wen | c1f8247 | 2010-08-17 13:50:23 +0800 | [diff] [blame] | 21 | uint32_t chip_id; |
| 22 | unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */ |
| 23 | unsigned int page_size; /* Page size in bytes (PAGE_SZ) */ |
| 24 | unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */ |
| 25 | unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */ |
| 26 | unsigned int num_blocks; /* Number of physical blocks in Flash */ |
Enrico Scholz | 4303533 | 2008-08-29 12:57:28 +0200 | [diff] [blame] | 27 | |
Lei Wen | c1f8247 | 2010-08-17 13:50:23 +0800 | [diff] [blame] | 28 | struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ |
Enrico Scholz | 4303533 | 2008-08-29 12:57:28 +0200 | [diff] [blame] | 29 | }; |
| 30 | |
Lei Wen | f3c8cfc | 2011-07-14 20:44:33 -0700 | [diff] [blame] | 31 | /* |
| 32 | * Current pxa3xx_nand controller has two chip select which |
| 33 | * both be workable. |
| 34 | * |
| 35 | * Notice should be taken that: |
| 36 | * When you want to use this feature, you should not enable the |
| 37 | * keep configuration feature, for two chip select could be |
| 38 | * attached with different nand chip. The different page size |
| 39 | * and timing requirement make the keep configuration impossible. |
| 40 | */ |
| 41 | |
| 42 | /* The max num of chip select current support */ |
| 43 | #define NUM_CHIP_SELECT (2) |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 44 | struct pxa3xx_nand_platform_data { |
| 45 | |
| 46 | /* the data flash bus is shared between the Static Memory |
| 47 | * Controller and the Data Flash Controller, the arbiter |
| 48 | * controls the ownership of the bus |
| 49 | */ |
| 50 | int enable_arbiter; |
| 51 | |
Mike Rapoport | f271049 | 2009-02-17 13:54:47 +0200 | [diff] [blame] | 52 | /* allow platform code to keep OBM/bootloader defined NFC config */ |
| 53 | int keep_config; |
| 54 | |
Lei Wen | f3c8cfc | 2011-07-14 20:44:33 -0700 | [diff] [blame] | 55 | /* indicate how many chip selects will be used */ |
| 56 | int num_cs; |
| 57 | |
Ezequiel Garcia | 776f265 | 2013-11-14 18:25:28 -0300 | [diff] [blame] | 58 | /* use an flash-based bad block table */ |
| 59 | bool flash_bbt; |
| 60 | |
Lei Wen | f3c8cfc | 2011-07-14 20:44:33 -0700 | [diff] [blame] | 61 | const struct mtd_partition *parts[NUM_CHIP_SELECT]; |
| 62 | unsigned int nr_parts[NUM_CHIP_SELECT]; |
Enrico Scholz | c8ac3f8 | 2008-08-29 12:59:48 +0200 | [diff] [blame] | 63 | |
Enrico Scholz | c8c17c8 | 2008-08-29 12:59:51 +0200 | [diff] [blame] | 64 | const struct pxa3xx_nand_flash * flash; |
Enrico Scholz | c8ac3f8 | 2008-08-29 12:59:48 +0200 | [diff] [blame] | 65 | size_t num_flash; |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 66 | }; |
Eric Miao | 9ae819a | 2008-06-02 15:22:03 +0800 | [diff] [blame] | 67 | |
| 68 | extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 69 | #endif /* __ASM_ARCH_PXA3XX_NAND_H */ |