arch/arm/boot/dts/armada-370-rd.dts

/*
 * Device Tree file for Marvell Armada 370 Reference Design board
 * (RD-88F6710-A1)
 *
 *  Copied from arch/arm/boot/dts/armada-370-db.dts
 *
 *  Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the default
 * 0xd0000000). The 0xf1000000 is the default used by the recent,
 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
 * boards were delivered with an older version of the bootloader that
 * left internal registers mapped at 0xd0000000. If you are in this
 * situation, you should either update your bootloader (preferred
 * solution) or the below Device Tree should be adjusted.
 */

/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-370.dtsi"

/ {
	model = "Marvell Armada 370 Reference Design";
	compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";

	chosen {
		bootargs = "console=ttyS0,115200 earlyprintk";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>; /* 512 MB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;

		pcie-controller {
			status = "okay";

			/* Internal mini-PCIe connector */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/* Internal mini-PCIe connector */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {
			pinctrl {
				fan_pins: fan-pins {
					marvell,pins = "mpp8";
					marvell,function = "gpio";
				};

				led_pins: led-pins {
					marvell,pins = "mpp32";
					marvell,function = "gpio";
				};
			};

			serial@12000 {
				status = "okay";
			};
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			mdio {
				pinctrl-0 = <&mdio_pins>;
				pinctrl-names = "default";
				phy0: ethernet-phy@0 {
					reg = <0>;
				};
			};

			ethernet@70000 {
				status = "okay";
				phy = <&phy0>;
				phy-mode = "sgmii";
			};
			ethernet@74000 {
				pinctrl-0 = <&ge1_rgmii_pins>;
				pinctrl-names = "default";
				status = "okay";
				phy-mode = "rgmii-id";
				fixed-link {
					   speed = <1000>;
					   full-duplex;
				};
			};

			mvsdio@d4000 {
				pinctrl-0 = <&sdio_pins1>;
				pinctrl-names = "default";
				status = "okay";
				/* No CD or WP GPIOs */
				broken-cd;
			};

			usb@50000 {
				status = "okay";
			};

			usb@51000 {
				status = "okay";
			};

			gpio-keys {
				compatible = "gpio-keys";
				#address-cells = <1>;
				#size-cells = <0>;
				button@1 {
					label = "Software Button";
					linux,code = <KEY_POWER>;
					gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
				};
			};

			gpio-fan {
				compatible = "gpio-fan";
				gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
				gpio-fan,speed-map = <0 0 3000 1>;
				pinctrl-0 = <&fan_pins>;
				pinctrl-names = "default";
			};

			gpio_leds {
				compatible = "gpio-leds";
				pinctrl-names = "default";
				pinctrl-0 = <&led_pins>;

				sw_led {
					label = "370rd:green:sw";
					gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
					default-state = "keep";
				};
			};

			nand@d0000 {
				status = "okay";
				num-cs = <1>;
				marvell,nand-keep-config;
				marvell,nand-enable-arbiter;
				nand-on-flash-bbt;

				partition@0 {
					label = "U-Boot";
					reg = <0 0x800000>;
				};
				partition@800000 {
					label = "Linux";
					reg = <0x800000 0x800000>;
				};
				partition@1000000 {
					label = "Filesystem";
					reg = <0x1000000 0x3f000000>;
				};
			};
		};
	};

	dsa@0 {
		compatible = "marvell,dsa";
		#address-cells = <2>;
		#size-cells = <0>;

		dsa,ethernet = <&eth1>;
		dsa,mii-bus = <&mdio>;

		switch@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x10 0>;	/* MDIO address 16, switch 0 in tree */

			port@0 {
				reg = <0>;
				label = "lan0";
			};

			port@1 {
			       reg = <1>;
			       label = "lan1";
			};

			port@2 {
			       reg = <2>;
			       label = "lan2";
			};

			port@3 {
			       reg = <3>;
			       label = "lan3";
			};

			port@5 {
			      reg = <5>;
			      label = "cpu";
			};
		};
	 };
 };