oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 Hisilicon Limited. |
| 3 | * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the |
| 9 | * OpenIB.org BSD license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or |
| 12 | * without modification, are permitted provided that the following |
| 13 | * conditions are met: |
| 14 | * |
| 15 | * - Redistributions of source code must retain the above |
| 16 | * copyright notice, this list of conditions and the following |
| 17 | * disclaimer. |
| 18 | * |
| 19 | * - Redistributions in binary form must reproduce the above |
| 20 | * copyright notice, this list of conditions and the following |
| 21 | * disclaimer in the documentation and/or other materials |
| 22 | * provided with the distribution. |
| 23 | * |
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 31 | * SOFTWARE. |
| 32 | */ |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 33 | #include <linux/acpi.h> |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 34 | #include <linux/of_platform.h> |
Arnd Bergmann | 3ecc16c | 2017-02-17 15:38:26 +0100 | [diff] [blame] | 35 | #include <linux/module.h> |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 36 | #include <rdma/ib_addr.h> |
| 37 | #include <rdma/ib_smi.h> |
| 38 | #include <rdma/ib_user_verbs.h> |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 39 | #include <rdma/ib_cache.h> |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 40 | #include "hns_roce_common.h" |
| 41 | #include "hns_roce_device.h" |
Leon Romanovsky | 4d40995 | 2016-10-19 20:13:07 +0300 | [diff] [blame] | 42 | #include <rdma/hns-abi.h> |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 43 | #include "hns_roce_hem.h" |
| 44 | |
| 45 | /** |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 46 | * hns_get_gid_index - Get gid index. |
| 47 | * @hr_dev: pointer to structure hns_roce_dev. |
| 48 | * @port: port, value range: 0 ~ MAX |
| 49 | * @gid_index: gid_index, value range: 0 ~ MAX |
| 50 | * Description: |
| 51 | * N ports shared gids, allocation method as follow: |
| 52 | * GID[0][0], GID[1][0],.....GID[N - 1][0], |
| 53 | * GID[0][0], GID[1][0],.....GID[N - 1][0], |
| 54 | * And so on |
| 55 | */ |
| 56 | int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) |
| 57 | { |
| 58 | return gid_index * hr_dev->caps.num_ports + port; |
| 59 | } |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 60 | EXPORT_SYMBOL_GPL(hns_get_gid_index); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 61 | |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 62 | static int hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr) |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 63 | { |
| 64 | u8 phy_port; |
| 65 | u32 i = 0; |
| 66 | |
| 67 | if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM)) |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 68 | return 0; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 69 | |
| 70 | for (i = 0; i < MAC_ADDR_OCTET_NUM; i++) |
| 71 | hr_dev->dev_addr[port][i] = addr[i]; |
| 72 | |
| 73 | phy_port = hr_dev->iboe.phy_port[port]; |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 74 | return hr_dev->hw->set_mac(hr_dev, phy_port, addr); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 75 | } |
| 76 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 77 | static int hns_roce_add_gid(struct ib_device *device, u8 port_num, |
| 78 | unsigned int index, const union ib_gid *gid, |
| 79 | const struct ib_gid_attr *attr, void **context) |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 80 | { |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 81 | struct hns_roce_dev *hr_dev = to_hr_dev(device); |
| 82 | u8 port = port_num - 1; |
| 83 | unsigned long flags; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 84 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 85 | if (port >= hr_dev->caps.num_ports) |
| 86 | return -EINVAL; |
| 87 | |
| 88 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 89 | |
| 90 | hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid); |
| 91 | |
| 92 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 93 | |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | static int hns_roce_del_gid(struct ib_device *device, u8 port_num, |
| 98 | unsigned int index, void **context) |
| 99 | { |
| 100 | struct hns_roce_dev *hr_dev = to_hr_dev(device); |
| 101 | union ib_gid zgid = { {0} }; |
| 102 | u8 port = port_num - 1; |
| 103 | unsigned long flags; |
| 104 | |
| 105 | if (port >= hr_dev->caps.num_ports) |
| 106 | return -EINVAL; |
| 107 | |
| 108 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 109 | |
| 110 | hr_dev->hw->set_gid(hr_dev, port, index, &zgid); |
| 111 | |
| 112 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 113 | |
| 114 | return 0; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port, |
| 118 | unsigned long event) |
| 119 | { |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 120 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 121 | struct net_device *netdev; |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 122 | int ret = 0; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 123 | |
| 124 | netdev = hr_dev->iboe.netdevs[port]; |
| 125 | if (!netdev) { |
| 126 | dev_err(dev, "port(%d) can't find netdev\n", port); |
| 127 | return -ENODEV; |
| 128 | } |
| 129 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 130 | switch (event) { |
| 131 | case NETDEV_UP: |
| 132 | case NETDEV_CHANGE: |
| 133 | case NETDEV_REGISTER: |
| 134 | case NETDEV_CHANGEADDR: |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 135 | ret = hns_roce_set_mac(hr_dev, port, netdev->dev_addr); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 136 | break; |
| 137 | case NETDEV_DOWN: |
| 138 | /* |
Salil | e84e40be | 2016-11-23 19:41:09 +0000 | [diff] [blame] | 139 | * In v1 engine, only support all ports closed together. |
| 140 | */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 141 | break; |
| 142 | default: |
| 143 | dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event)); |
| 144 | break; |
| 145 | } |
| 146 | |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 147 | return ret; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | static int hns_roce_netdev_event(struct notifier_block *self, |
| 151 | unsigned long event, void *ptr) |
| 152 | { |
| 153 | struct net_device *dev = netdev_notifier_info_to_dev(ptr); |
| 154 | struct hns_roce_ib_iboe *iboe = NULL; |
| 155 | struct hns_roce_dev *hr_dev = NULL; |
| 156 | u8 port = 0; |
| 157 | int ret = 0; |
| 158 | |
| 159 | hr_dev = container_of(self, struct hns_roce_dev, iboe.nb); |
| 160 | iboe = &hr_dev->iboe; |
| 161 | |
| 162 | for (port = 0; port < hr_dev->caps.num_ports; port++) { |
| 163 | if (dev == iboe->netdevs[port]) { |
| 164 | ret = handle_en_event(hr_dev, port, event); |
| 165 | if (ret) |
| 166 | return NOTIFY_DONE; |
| 167 | break; |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | return NOTIFY_DONE; |
| 172 | } |
| 173 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 174 | static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev) |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 175 | { |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 176 | int ret; |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 177 | u8 i; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 178 | |
| 179 | for (i = 0; i < hr_dev->caps.num_ports; i++) { |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 180 | if (hr_dev->hw->set_mtu) |
| 181 | hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i], |
| 182 | hr_dev->caps.max_mtu); |
Wei Hu(Xavier) | a74dc41 | 2017-09-29 23:10:09 +0800 | [diff] [blame] | 183 | ret = hns_roce_set_mac(hr_dev, i, |
| 184 | hr_dev->iboe.netdevs[i]->dev_addr); |
| 185 | if (ret) |
| 186 | return ret; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 187 | } |
| 188 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 189 | return 0; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 190 | } |
| 191 | |
| 192 | static int hns_roce_query_device(struct ib_device *ib_dev, |
| 193 | struct ib_device_attr *props, |
| 194 | struct ib_udata *uhw) |
| 195 | { |
| 196 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 197 | |
| 198 | memset(props, 0, sizeof(*props)); |
| 199 | |
| 200 | props->sys_image_guid = hr_dev->sys_image_guid; |
| 201 | props->max_mr_size = (u64)(~(0ULL)); |
| 202 | props->page_size_cap = hr_dev->caps.page_size_cap; |
| 203 | props->vendor_id = hr_dev->vendor_id; |
| 204 | props->vendor_part_id = hr_dev->vendor_part_id; |
| 205 | props->hw_ver = hr_dev->hw_rev; |
| 206 | props->max_qp = hr_dev->caps.num_qps; |
| 207 | props->max_qp_wr = hr_dev->caps.max_wqes; |
| 208 | props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT | |
Lijun Ou | a74aab6 | 2016-09-15 23:48:08 +0100 | [diff] [blame] | 209 | IB_DEVICE_RC_RNR_NAK_GEN; |
Wei Hu(Xavier) | cfc85f3 | 2017-08-30 17:23:04 +0800 | [diff] [blame] | 210 | props->max_sge = max(hr_dev->caps.max_sq_sg, hr_dev->caps.max_rq_sg); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 211 | props->max_sge_rd = 1; |
| 212 | props->max_cq = hr_dev->caps.num_cqs; |
| 213 | props->max_cqe = hr_dev->caps.max_cqes; |
| 214 | props->max_mr = hr_dev->caps.num_mtpts; |
| 215 | props->max_pd = hr_dev->caps.num_pds; |
| 216 | props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma; |
| 217 | props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma; |
| 218 | props->atomic_cap = IB_ATOMIC_NONE; |
| 219 | props->max_pkeys = 1; |
| 220 | props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay; |
| 221 | |
| 222 | return 0; |
| 223 | } |
| 224 | |
Lijun Ou | 2eefca2 | 2016-09-15 23:48:06 +0100 | [diff] [blame] | 225 | static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev, |
| 226 | u8 port_num) |
| 227 | { |
| 228 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 229 | struct net_device *ndev; |
| 230 | |
| 231 | if (port_num < 1 || port_num > hr_dev->caps.num_ports) |
| 232 | return NULL; |
| 233 | |
| 234 | rcu_read_lock(); |
| 235 | |
| 236 | ndev = hr_dev->iboe.netdevs[port_num - 1]; |
| 237 | if (ndev) |
| 238 | dev_hold(ndev); |
| 239 | |
| 240 | rcu_read_unlock(); |
| 241 | return ndev; |
| 242 | } |
| 243 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 244 | static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num, |
| 245 | struct ib_port_attr *props) |
| 246 | { |
| 247 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 248 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 249 | struct net_device *net_dev; |
| 250 | unsigned long flags; |
| 251 | enum ib_mtu mtu; |
| 252 | u8 port; |
| 253 | |
| 254 | assert(port_num > 0); |
| 255 | port = port_num - 1; |
| 256 | |
Or Gerlitz | c4550c6 | 2017-01-24 13:02:39 +0200 | [diff] [blame] | 257 | /* props being zeroed by the caller, avoid zeroing it here */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 258 | |
| 259 | props->max_mtu = hr_dev->caps.max_mtu; |
| 260 | props->gid_tbl_len = hr_dev->caps.gid_table_len[port]; |
| 261 | props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP | |
| 262 | IB_PORT_VENDOR_CLASS_SUP | |
| 263 | IB_PORT_BOOT_MGMT_SUP; |
| 264 | props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN; |
| 265 | props->pkey_tbl_len = 1; |
| 266 | props->active_width = IB_WIDTH_4X; |
| 267 | props->active_speed = 1; |
| 268 | |
| 269 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 270 | |
| 271 | net_dev = hr_dev->iboe.netdevs[port]; |
| 272 | if (!net_dev) { |
| 273 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 274 | dev_err(dev, "find netdev %d failed!\r\n", port); |
| 275 | return -EINVAL; |
| 276 | } |
| 277 | |
| 278 | mtu = iboe_get_mtu(net_dev->mtu); |
| 279 | props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256; |
| 280 | props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ? |
| 281 | IB_PORT_ACTIVE : IB_PORT_DOWN; |
| 282 | props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3; |
| 283 | |
| 284 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 285 | |
| 286 | return 0; |
| 287 | } |
| 288 | |
| 289 | static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device, |
| 290 | u8 port_num) |
| 291 | { |
| 292 | return IB_LINK_LAYER_ETHERNET; |
| 293 | } |
| 294 | |
| 295 | static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index, |
| 296 | union ib_gid *gid) |
| 297 | { |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 298 | return 0; |
| 299 | } |
| 300 | |
| 301 | static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index, |
| 302 | u16 *pkey) |
| 303 | { |
| 304 | *pkey = PKEY_ID; |
| 305 | |
| 306 | return 0; |
| 307 | } |
| 308 | |
| 309 | static int hns_roce_modify_device(struct ib_device *ib_dev, int mask, |
| 310 | struct ib_device_modify *props) |
| 311 | { |
| 312 | unsigned long flags; |
| 313 | |
| 314 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) |
| 315 | return -EOPNOTSUPP; |
| 316 | |
| 317 | if (mask & IB_DEVICE_MODIFY_NODE_DESC) { |
| 318 | spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags); |
| 319 | memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE); |
| 320 | spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags); |
| 321 | } |
| 322 | |
| 323 | return 0; |
| 324 | } |
| 325 | |
| 326 | static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask, |
| 327 | struct ib_port_modify *props) |
| 328 | { |
| 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev, |
| 333 | struct ib_udata *udata) |
| 334 | { |
| 335 | int ret = 0; |
| 336 | struct hns_roce_ucontext *context; |
| 337 | struct hns_roce_ib_alloc_ucontext_resp resp; |
| 338 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 339 | |
| 340 | resp.qp_tab_size = hr_dev->caps.num_qps; |
| 341 | |
| 342 | context = kmalloc(sizeof(*context), GFP_KERNEL); |
| 343 | if (!context) |
| 344 | return ERR_PTR(-ENOMEM); |
| 345 | |
| 346 | ret = hns_roce_uar_alloc(hr_dev, &context->uar); |
| 347 | if (ret) |
| 348 | goto error_fail_uar_alloc; |
| 349 | |
| 350 | ret = ib_copy_to_udata(udata, &resp, sizeof(resp)); |
| 351 | if (ret) |
| 352 | goto error_fail_copy_to_udata; |
| 353 | |
| 354 | return &context->ibucontext; |
| 355 | |
| 356 | error_fail_copy_to_udata: |
| 357 | hns_roce_uar_free(hr_dev, &context->uar); |
| 358 | |
| 359 | error_fail_uar_alloc: |
| 360 | kfree(context); |
| 361 | |
| 362 | return ERR_PTR(ret); |
| 363 | } |
| 364 | |
| 365 | static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext) |
| 366 | { |
| 367 | struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); |
| 368 | |
| 369 | hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar); |
| 370 | kfree(context); |
| 371 | |
| 372 | return 0; |
| 373 | } |
| 374 | |
| 375 | static int hns_roce_mmap(struct ib_ucontext *context, |
| 376 | struct vm_area_struct *vma) |
| 377 | { |
Wei Hu (Xavier) | 8f3e9f3 | 2016-11-23 19:41:00 +0000 | [diff] [blame] | 378 | struct hns_roce_dev *hr_dev = to_hr_dev(context->device); |
| 379 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 380 | if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0) |
| 381 | return -EINVAL; |
| 382 | |
| 383 | if (vma->vm_pgoff == 0) { |
| 384 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 385 | if (io_remap_pfn_range(vma, vma->vm_start, |
| 386 | to_hr_ucontext(context)->uar.pfn, |
| 387 | PAGE_SIZE, vma->vm_page_prot)) |
| 388 | return -EAGAIN; |
Wei Hu(Xavier) | 5caad67 | 2017-08-30 17:23:17 +0800 | [diff] [blame] | 389 | } else if (vma->vm_pgoff == 1 && hr_dev->tptr_dma_addr && |
| 390 | hr_dev->tptr_size) { |
Wei Hu (Xavier) | 8f3e9f3 | 2016-11-23 19:41:00 +0000 | [diff] [blame] | 391 | /* vm_pgoff: 1 -- TPTR */ |
| 392 | if (io_remap_pfn_range(vma, vma->vm_start, |
| 393 | hr_dev->tptr_dma_addr >> PAGE_SHIFT, |
| 394 | hr_dev->tptr_size, |
| 395 | vma->vm_page_prot)) |
| 396 | return -EAGAIN; |
| 397 | } else |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 398 | return -EINVAL; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 399 | |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num, |
| 404 | struct ib_port_immutable *immutable) |
| 405 | { |
| 406 | struct ib_port_attr attr; |
| 407 | int ret; |
| 408 | |
Or Gerlitz | c4550c6 | 2017-01-24 13:02:39 +0200 | [diff] [blame] | 409 | immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; |
| 410 | |
| 411 | ret = ib_query_port(ib_dev, port_num, &attr); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 412 | if (ret) |
| 413 | return ret; |
| 414 | |
| 415 | immutable->pkey_tbl_len = attr.pkey_tbl_len; |
| 416 | immutable->gid_tbl_len = attr.gid_tbl_len; |
| 417 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 418 | immutable->max_mad_size = IB_MGMT_MAD_SIZE; |
| 419 | |
| 420 | return 0; |
| 421 | } |
| 422 | |
| 423 | static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev) |
| 424 | { |
| 425 | struct hns_roce_ib_iboe *iboe = &hr_dev->iboe; |
| 426 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 427 | unregister_netdevice_notifier(&iboe->nb); |
| 428 | ib_unregister_device(&hr_dev->ib_dev); |
| 429 | } |
| 430 | |
| 431 | static int hns_roce_register_device(struct hns_roce_dev *hr_dev) |
| 432 | { |
| 433 | int ret; |
| 434 | struct hns_roce_ib_iboe *iboe = NULL; |
| 435 | struct ib_device *ib_dev = NULL; |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 436 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 437 | |
| 438 | iboe = &hr_dev->iboe; |
Lijun Ou | 49fdf6b | 2016-09-20 17:07:02 +0100 | [diff] [blame] | 439 | spin_lock_init(&iboe->lock); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 440 | |
| 441 | ib_dev = &hr_dev->ib_dev; |
Lijun Ou | 3b5184b | 2016-11-29 23:10:30 +0000 | [diff] [blame] | 442 | strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 443 | |
| 444 | ib_dev->owner = THIS_MODULE; |
| 445 | ib_dev->node_type = RDMA_NODE_IB_CA; |
Bart Van Assche | fecd02e | 2017-01-20 13:04:18 -0800 | [diff] [blame] | 446 | ib_dev->dev.parent = dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 447 | |
| 448 | ib_dev->phys_port_cnt = hr_dev->caps.num_ports; |
| 449 | ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey; |
| 450 | ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors; |
| 451 | ib_dev->uverbs_abi_ver = 1; |
| 452 | ib_dev->uverbs_cmd_mask = |
| 453 | (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) | |
| 454 | (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) | |
| 455 | (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) | |
| 456 | (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) | |
| 457 | (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) | |
| 458 | (1ULL << IB_USER_VERBS_CMD_REG_MR) | |
| 459 | (1ULL << IB_USER_VERBS_CMD_DEREG_MR) | |
| 460 | (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | |
| 461 | (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) | |
| 462 | (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) | |
| 463 | (1ULL << IB_USER_VERBS_CMD_CREATE_QP) | |
| 464 | (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) | |
| 465 | (1ULL << IB_USER_VERBS_CMD_QUERY_QP) | |
| 466 | (1ULL << IB_USER_VERBS_CMD_DESTROY_QP); |
| 467 | |
| 468 | /* HCA||device||port */ |
| 469 | ib_dev->modify_device = hns_roce_modify_device; |
| 470 | ib_dev->query_device = hns_roce_query_device; |
| 471 | ib_dev->query_port = hns_roce_query_port; |
| 472 | ib_dev->modify_port = hns_roce_modify_port; |
| 473 | ib_dev->get_link_layer = hns_roce_get_link_layer; |
Lijun Ou | 2eefca2 | 2016-09-15 23:48:06 +0100 | [diff] [blame] | 474 | ib_dev->get_netdev = hns_roce_get_netdev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 475 | ib_dev->query_gid = hns_roce_query_gid; |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 476 | ib_dev->add_gid = hns_roce_add_gid; |
| 477 | ib_dev->del_gid = hns_roce_del_gid; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 478 | ib_dev->query_pkey = hns_roce_query_pkey; |
| 479 | ib_dev->alloc_ucontext = hns_roce_alloc_ucontext; |
| 480 | ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext; |
| 481 | ib_dev->mmap = hns_roce_mmap; |
| 482 | |
| 483 | /* PD */ |
| 484 | ib_dev->alloc_pd = hns_roce_alloc_pd; |
| 485 | ib_dev->dealloc_pd = hns_roce_dealloc_pd; |
| 486 | |
| 487 | /* AH */ |
| 488 | ib_dev->create_ah = hns_roce_create_ah; |
| 489 | ib_dev->query_ah = hns_roce_query_ah; |
| 490 | ib_dev->destroy_ah = hns_roce_destroy_ah; |
| 491 | |
| 492 | /* QP */ |
| 493 | ib_dev->create_qp = hns_roce_create_qp; |
| 494 | ib_dev->modify_qp = hns_roce_modify_qp; |
| 495 | ib_dev->query_qp = hr_dev->hw->query_qp; |
| 496 | ib_dev->destroy_qp = hr_dev->hw->destroy_qp; |
| 497 | ib_dev->post_send = hr_dev->hw->post_send; |
| 498 | ib_dev->post_recv = hr_dev->hw->post_recv; |
| 499 | |
| 500 | /* CQ */ |
| 501 | ib_dev->create_cq = hns_roce_ib_create_cq; |
oulijun | b156269 | 2017-10-19 11:52:40 +0800 | [diff] [blame] | 502 | ib_dev->modify_cq = hr_dev->hw->modify_cq; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 503 | ib_dev->destroy_cq = hns_roce_ib_destroy_cq; |
| 504 | ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq; |
| 505 | ib_dev->poll_cq = hr_dev->hw->poll_cq; |
| 506 | |
| 507 | /* MR */ |
| 508 | ib_dev->get_dma_mr = hns_roce_get_dma_mr; |
| 509 | ib_dev->reg_user_mr = hns_roce_reg_user_mr; |
| 510 | ib_dev->dereg_mr = hns_roce_dereg_mr; |
Wei Hu(Xavier) | a2c80b7 | 2017-10-26 17:10:23 +0800 | [diff] [blame^] | 511 | if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR) { |
| 512 | ib_dev->rereg_user_mr = hns_roce_rereg_user_mr; |
| 513 | ib_dev->uverbs_cmd_mask |= (1ULL << IB_USER_VERBS_CMD_REREG_MR); |
| 514 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 515 | |
| 516 | /* OTHERS */ |
| 517 | ib_dev->get_port_immutable = hns_roce_port_immutable; |
| 518 | |
| 519 | ret = ib_register_device(ib_dev, NULL); |
| 520 | if (ret) { |
| 521 | dev_err(dev, "ib_register_device failed!\n"); |
| 522 | return ret; |
| 523 | } |
| 524 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 525 | ret = hns_roce_setup_mtu_mac(hr_dev); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 526 | if (ret) { |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 527 | dev_err(dev, "setup_mtu_mac failed!\n"); |
| 528 | goto error_failed_setup_mtu_mac; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 529 | } |
| 530 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 531 | iboe->nb.notifier_call = hns_roce_netdev_event; |
| 532 | ret = register_netdevice_notifier(&iboe->nb); |
| 533 | if (ret) { |
| 534 | dev_err(dev, "register_netdevice_notifier failed!\n"); |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 535 | goto error_failed_setup_mtu_mac; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 536 | } |
| 537 | |
| 538 | return 0; |
| 539 | |
Shaobo Xu | 8254746 | 2016-11-23 19:41:08 +0000 | [diff] [blame] | 540 | error_failed_setup_mtu_mac: |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 541 | ib_unregister_device(ib_dev); |
| 542 | |
| 543 | return ret; |
| 544 | } |
| 545 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 546 | static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) |
| 547 | { |
| 548 | int ret; |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 549 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 550 | |
| 551 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table, |
| 552 | HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz, |
| 553 | hr_dev->caps.num_mtt_segs, 1); |
| 554 | if (ret) { |
| 555 | dev_err(dev, "Failed to init MTT context memory, aborting.\n"); |
| 556 | return ret; |
| 557 | } |
| 558 | |
Shaobo Xu | 9766edc | 2017-08-30 17:23:09 +0800 | [diff] [blame] | 559 | if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) { |
| 560 | ret = hns_roce_init_hem_table(hr_dev, |
| 561 | &hr_dev->mr_table.mtt_cqe_table, |
| 562 | HEM_TYPE_CQE, hr_dev->caps.mtt_entry_sz, |
| 563 | hr_dev->caps.num_cqe_segs, 1); |
| 564 | if (ret) { |
| 565 | dev_err(dev, "Failed to init MTT CQE context memory, aborting.\n"); |
| 566 | goto err_unmap_cqe; |
| 567 | } |
| 568 | } |
| 569 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 570 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table, |
| 571 | HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz, |
| 572 | hr_dev->caps.num_mtpts, 1); |
| 573 | if (ret) { |
| 574 | dev_err(dev, "Failed to init MTPT context memory, aborting.\n"); |
| 575 | goto err_unmap_mtt; |
| 576 | } |
| 577 | |
| 578 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table, |
| 579 | HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz, |
| 580 | hr_dev->caps.num_qps, 1); |
| 581 | if (ret) { |
| 582 | dev_err(dev, "Failed to init QP context memory, aborting.\n"); |
| 583 | goto err_unmap_dmpt; |
| 584 | } |
| 585 | |
| 586 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table, |
| 587 | HEM_TYPE_IRRL, |
| 588 | hr_dev->caps.irrl_entry_sz * |
| 589 | hr_dev->caps.max_qp_init_rdma, |
| 590 | hr_dev->caps.num_qps, 1); |
| 591 | if (ret) { |
| 592 | dev_err(dev, "Failed to init irrl_table memory, aborting.\n"); |
| 593 | goto err_unmap_qp; |
| 594 | } |
| 595 | |
| 596 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table, |
| 597 | HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz, |
| 598 | hr_dev->caps.num_cqs, 1); |
| 599 | if (ret) { |
| 600 | dev_err(dev, "Failed to init CQ context memory, aborting.\n"); |
| 601 | goto err_unmap_irrl; |
| 602 | } |
| 603 | |
| 604 | return 0; |
| 605 | |
| 606 | err_unmap_irrl: |
| 607 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table); |
| 608 | |
| 609 | err_unmap_qp: |
| 610 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table); |
| 611 | |
| 612 | err_unmap_dmpt: |
| 613 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table); |
| 614 | |
| 615 | err_unmap_mtt: |
| 616 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table); |
Shaobo Xu | 9766edc | 2017-08-30 17:23:09 +0800 | [diff] [blame] | 617 | if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) |
| 618 | hns_roce_cleanup_hem_table(hr_dev, |
| 619 | &hr_dev->mr_table.mtt_cqe_table); |
| 620 | |
| 621 | err_unmap_cqe: |
| 622 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 623 | |
| 624 | return ret; |
| 625 | } |
| 626 | |
| 627 | /** |
Salil | e84e40be | 2016-11-23 19:41:09 +0000 | [diff] [blame] | 628 | * hns_roce_setup_hca - setup host channel adapter |
| 629 | * @hr_dev: pointer to hns roce device |
| 630 | * Return : int |
| 631 | */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 632 | static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev) |
| 633 | { |
| 634 | int ret; |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 635 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 636 | |
| 637 | spin_lock_init(&hr_dev->sm_lock); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 638 | spin_lock_init(&hr_dev->bt_cmd_lock); |
| 639 | |
| 640 | ret = hns_roce_init_uar_table(hr_dev); |
| 641 | if (ret) { |
| 642 | dev_err(dev, "Failed to initialize uar table. aborting\n"); |
| 643 | return ret; |
| 644 | } |
| 645 | |
| 646 | ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar); |
| 647 | if (ret) { |
| 648 | dev_err(dev, "Failed to allocate priv_uar.\n"); |
| 649 | goto err_uar_table_free; |
| 650 | } |
| 651 | |
| 652 | ret = hns_roce_init_pd_table(hr_dev); |
| 653 | if (ret) { |
| 654 | dev_err(dev, "Failed to init protected domain table.\n"); |
| 655 | goto err_uar_alloc_free; |
| 656 | } |
| 657 | |
| 658 | ret = hns_roce_init_mr_table(hr_dev); |
| 659 | if (ret) { |
| 660 | dev_err(dev, "Failed to init memory region table.\n"); |
| 661 | goto err_pd_table_free; |
| 662 | } |
| 663 | |
| 664 | ret = hns_roce_init_cq_table(hr_dev); |
| 665 | if (ret) { |
| 666 | dev_err(dev, "Failed to init completion queue table.\n"); |
| 667 | goto err_mr_table_free; |
| 668 | } |
| 669 | |
| 670 | ret = hns_roce_init_qp_table(hr_dev); |
| 671 | if (ret) { |
| 672 | dev_err(dev, "Failed to init queue pair table.\n"); |
| 673 | goto err_cq_table_free; |
| 674 | } |
| 675 | |
| 676 | return 0; |
| 677 | |
| 678 | err_cq_table_free: |
| 679 | hns_roce_cleanup_cq_table(hr_dev); |
| 680 | |
| 681 | err_mr_table_free: |
| 682 | hns_roce_cleanup_mr_table(hr_dev); |
| 683 | |
| 684 | err_pd_table_free: |
| 685 | hns_roce_cleanup_pd_table(hr_dev); |
| 686 | |
| 687 | err_uar_alloc_free: |
| 688 | hns_roce_uar_free(hr_dev, &hr_dev->priv_uar); |
| 689 | |
| 690 | err_uar_table_free: |
| 691 | hns_roce_cleanup_uar_table(hr_dev); |
| 692 | return ret; |
| 693 | } |
| 694 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 695 | int hns_roce_init(struct hns_roce_dev *hr_dev) |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 696 | { |
| 697 | int ret; |
Wei Hu(Xavier) | 13ca970 | 2017-08-30 17:23:02 +0800 | [diff] [blame] | 698 | struct device *dev = hr_dev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 699 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 700 | if (hr_dev->hw->reset) { |
| 701 | ret = hr_dev->hw->reset(hr_dev, true); |
| 702 | if (ret) { |
| 703 | dev_err(dev, "Reset RoCE engine failed!\n"); |
| 704 | return ret; |
| 705 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 706 | } |
| 707 | |
Wei Hu(Xavier) | a04ff73 | 2017-08-30 17:23:03 +0800 | [diff] [blame] | 708 | if (hr_dev->hw->cmq_init) { |
| 709 | ret = hr_dev->hw->cmq_init(hr_dev); |
| 710 | if (ret) { |
| 711 | dev_err(dev, "Init RoCE Command Queue failed!\n"); |
| 712 | goto error_failed_cmq_init; |
| 713 | } |
| 714 | } |
| 715 | |
Wei Hu(Xavier) | cfc85f3 | 2017-08-30 17:23:04 +0800 | [diff] [blame] | 716 | ret = hr_dev->hw->hw_profile(hr_dev); |
| 717 | if (ret) { |
| 718 | dev_err(dev, "Get RoCE engine profile failed!\n"); |
| 719 | goto error_failed_cmd_init; |
| 720 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 721 | |
| 722 | ret = hns_roce_cmd_init(hr_dev); |
| 723 | if (ret) { |
| 724 | dev_err(dev, "cmd init failed!\n"); |
| 725 | goto error_failed_cmd_init; |
| 726 | } |
| 727 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 728 | if (hr_dev->cmd_mod) { |
| 729 | ret = hns_roce_init_eq_table(hr_dev); |
| 730 | if (ret) { |
| 731 | dev_err(dev, "eq init failed!\n"); |
| 732 | goto error_failed_eq_table; |
| 733 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 734 | } |
| 735 | |
| 736 | if (hr_dev->cmd_mod) { |
| 737 | ret = hns_roce_cmd_use_events(hr_dev); |
| 738 | if (ret) { |
| 739 | dev_err(dev, "Switch to event-driven cmd failed!\n"); |
| 740 | goto error_failed_use_event; |
| 741 | } |
| 742 | } |
| 743 | |
| 744 | ret = hns_roce_init_hem(hr_dev); |
| 745 | if (ret) { |
| 746 | dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n"); |
| 747 | goto error_failed_init_hem; |
| 748 | } |
| 749 | |
| 750 | ret = hns_roce_setup_hca(hr_dev); |
| 751 | if (ret) { |
| 752 | dev_err(dev, "setup hca failed!\n"); |
| 753 | goto error_failed_setup_hca; |
| 754 | } |
| 755 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 756 | if (hr_dev->hw->hw_init) { |
| 757 | ret = hr_dev->hw->hw_init(hr_dev); |
| 758 | if (ret) { |
| 759 | dev_err(dev, "hw_init failed!\n"); |
| 760 | goto error_failed_engine_init; |
| 761 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 762 | } |
| 763 | |
| 764 | ret = hns_roce_register_device(hr_dev); |
| 765 | if (ret) |
| 766 | goto error_failed_register_device; |
| 767 | |
| 768 | return 0; |
| 769 | |
| 770 | error_failed_register_device: |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 771 | if (hr_dev->hw->hw_exit) |
| 772 | hr_dev->hw->hw_exit(hr_dev); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 773 | |
| 774 | error_failed_engine_init: |
| 775 | hns_roce_cleanup_bitmap(hr_dev); |
| 776 | |
| 777 | error_failed_setup_hca: |
| 778 | hns_roce_cleanup_hem(hr_dev); |
| 779 | |
| 780 | error_failed_init_hem: |
| 781 | if (hr_dev->cmd_mod) |
| 782 | hns_roce_cmd_use_polling(hr_dev); |
| 783 | |
| 784 | error_failed_use_event: |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 785 | if (hr_dev->cmd_mod) |
| 786 | hns_roce_cleanup_eq_table(hr_dev); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 787 | |
| 788 | error_failed_eq_table: |
| 789 | hns_roce_cmd_cleanup(hr_dev); |
| 790 | |
| 791 | error_failed_cmd_init: |
Wei Hu(Xavier) | a04ff73 | 2017-08-30 17:23:03 +0800 | [diff] [blame] | 792 | if (hr_dev->hw->cmq_exit) |
| 793 | hr_dev->hw->cmq_exit(hr_dev); |
| 794 | |
| 795 | error_failed_cmq_init: |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 796 | if (hr_dev->hw->reset) { |
| 797 | ret = hr_dev->hw->reset(hr_dev, false); |
| 798 | if (ret) |
| 799 | dev_err(dev, "Dereset RoCE engine failed!\n"); |
| 800 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 801 | |
| 802 | return ret; |
| 803 | } |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 804 | EXPORT_SYMBOL_GPL(hns_roce_init); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 805 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 806 | void hns_roce_exit(struct hns_roce_dev *hr_dev) |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 807 | { |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 808 | hns_roce_unregister_device(hr_dev); |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 809 | if (hr_dev->hw->hw_exit) |
| 810 | hr_dev->hw->hw_exit(hr_dev); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 811 | hns_roce_cleanup_bitmap(hr_dev); |
| 812 | hns_roce_cleanup_hem(hr_dev); |
| 813 | |
| 814 | if (hr_dev->cmd_mod) |
| 815 | hns_roce_cmd_use_polling(hr_dev); |
| 816 | |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 817 | if (hr_dev->cmd_mod) |
| 818 | hns_roce_cleanup_eq_table(hr_dev); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 819 | hns_roce_cmd_cleanup(hr_dev); |
Wei Hu(Xavier) | a04ff73 | 2017-08-30 17:23:03 +0800 | [diff] [blame] | 820 | if (hr_dev->hw->cmq_exit) |
| 821 | hr_dev->hw->cmq_exit(hr_dev); |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 822 | if (hr_dev->hw->reset) |
| 823 | hr_dev->hw->reset(hr_dev, false); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 824 | } |
Wei Hu(Xavier) | 08805fd | 2017-08-30 17:22:59 +0800 | [diff] [blame] | 825 | EXPORT_SYMBOL_GPL(hns_roce_exit); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 826 | |
| 827 | MODULE_LICENSE("Dual BSD/GPL"); |
| 828 | MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>"); |
| 829 | MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>"); |
| 830 | MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>"); |
| 831 | MODULE_DESCRIPTION("HNS RoCE Driver"); |