blob: 77cdc21e28d7795920c40fcaa44618fd956953d5 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045
46static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020047static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030048
Kalle Valo5e3dd152013-06-12 20:52:10 +030049static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
50{
51 int size;
52
53 /*
54 * It is expected that the host CPU will typically be able to
55 * service the rx indication from one A-MPDU before the rx
56 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
57 * later. However, the rx ring should be sized very conservatively,
58 * to accomodate the worst reasonable delay before the host CPU
59 * services a rx indication interrupt.
60 *
61 * The rx ring need not be kept full of empty buffers. In theory,
62 * the htt host SW can dynamically track the low-water mark in the
63 * rx ring, and dynamically adjust the level to which the rx ring
64 * is filled with empty buffers, to dynamically meet the desired
65 * low-water mark.
66 *
67 * In contrast, it's difficult to resize the rx ring itself, once
68 * it's in use. Thus, the ring itself should be sized very
69 * conservatively, while the degree to which the ring is filled
70 * with empty buffers should be sized moderately conservatively.
71 */
72
73 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
74 size =
75 htt->max_throughput_mbps +
76 1000 /
77 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
78
79 if (size < HTT_RX_RING_SIZE_MIN)
80 size = HTT_RX_RING_SIZE_MIN;
81
82 if (size > HTT_RX_RING_SIZE_MAX)
83 size = HTT_RX_RING_SIZE_MAX;
84
85 size = roundup_pow_of_two(size);
86
87 return size;
88}
89
90static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
91{
92 int size;
93
94 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
95 size =
96 htt->max_throughput_mbps *
97 1000 /
98 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
99
100 /*
101 * Make sure the fill level is at least 1 less than the ring size.
102 * Leaving 1 element empty allows the SW to easily distinguish
103 * between a full ring vs. an empty ring.
104 */
105 if (size >= htt->rx_ring.size)
106 size = htt->rx_ring.size - 1;
107
108 return size;
109}
110
111static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
112{
113 struct sk_buff *skb;
114 struct ath10k_skb_cb *cb;
115 int i;
116
117 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
118 skb = htt->rx_ring.netbufs_ring[i];
119 cb = ATH10K_SKB_CB(skb);
120 dma_unmap_single(htt->ar->dev, cb->paddr,
121 skb->len + skb_tailroom(skb),
122 DMA_FROM_DEVICE);
123 dev_kfree_skb_any(skb);
124 }
125
126 htt->rx_ring.fill_cnt = 0;
127}
128
129static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
130{
131 struct htt_rx_desc *rx_desc;
132 struct sk_buff *skb;
133 dma_addr_t paddr;
134 int ret = 0, idx;
135
136 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
137 while (num > 0) {
138 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
139 if (!skb) {
140 ret = -ENOMEM;
141 goto fail;
142 }
143
144 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
145 skb_pull(skb,
146 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
147 skb->data);
148
149 /* Clear rx_desc attention word before posting to Rx ring */
150 rx_desc = (struct htt_rx_desc *)skb->data;
151 rx_desc->attention.flags = __cpu_to_le32(0);
152
153 paddr = dma_map_single(htt->ar->dev, skb->data,
154 skb->len + skb_tailroom(skb),
155 DMA_FROM_DEVICE);
156
157 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
158 dev_kfree_skb_any(skb);
159 ret = -ENOMEM;
160 goto fail;
161 }
162
163 ATH10K_SKB_CB(skb)->paddr = paddr;
164 htt->rx_ring.netbufs_ring[idx] = skb;
165 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
166 htt->rx_ring.fill_cnt++;
167
168 num--;
169 idx++;
170 idx &= htt->rx_ring.size_mask;
171 }
172
173fail:
174 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
175 return ret;
176}
177
178static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
179{
180 lockdep_assert_held(&htt->rx_ring.lock);
181 return __ath10k_htt_rx_ring_fill_n(htt, num);
182}
183
184static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
185{
Michal Kazior6e712d42013-09-24 10:18:36 +0200186 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187
Michal Kazior6e712d42013-09-24 10:18:36 +0200188 /* Refilling the whole RX ring buffer proves to be a bad idea. The
189 * reason is RX may take up significant amount of CPU cycles and starve
190 * other tasks, e.g. TX on an ethernet device while acting as a bridge
191 * with ath10k wlan interface. This ended up with very poor performance
192 * once CPU the host system was overwhelmed with RX on ath10k.
193 *
194 * By limiting the number of refills the replenishing occurs
195 * progressively. This in turns makes use of the fact tasklets are
196 * processed in FIFO order. This means actual RX processing can starve
197 * out refilling. If there's not enough buffers on RX ring FW will not
198 * report RX until it is refilled with enough buffers. This
199 * automatically balances load wrt to CPU power.
200 *
201 * This probably comes at a cost of lower maximum throughput but
202 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200204 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
205 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
206 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
208 if (ret == -ENOMEM) {
209 /*
210 * Failed to fill it to the desired level -
211 * we'll start a timer and try again next time.
212 * As long as enough buffers are left in the ring for
213 * another A-MPDU rx, no special recovery is needed.
214 */
215 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
216 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200217 } else if (num_deficit > 0) {
218 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 }
220 spin_unlock_bh(&htt->rx_ring.lock);
221}
222
223static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
224{
225 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
274 int idx;
275 struct sk_buff *msdu;
276
Michal Kazior45967082014-02-27 18:50:05 +0200277 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300278
Michal Kazior8d60ee82014-02-27 18:50:05 +0200279 if (htt->rx_ring.fill_cnt == 0) {
280 ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
281 return NULL;
282 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283
284 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
285 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300286 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287
288 idx++;
289 idx &= htt->rx_ring.size_mask;
290 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
291 htt->rx_ring.fill_cnt--;
292
Kalle Valo5e3dd152013-06-12 20:52:10 +0300293 return msdu;
294}
295
296static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
297{
298 struct sk_buff *next;
299
300 while (skb) {
301 next = skb->next;
302 dev_kfree_skb_any(skb);
303 skb = next;
304 }
305}
306
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100307/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300308static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
309 u8 **fw_desc, int *fw_desc_len,
310 struct sk_buff **head_msdu,
311 struct sk_buff **tail_msdu)
312{
313 int msdu_len, msdu_chaining = 0;
314 struct sk_buff *msdu;
315 struct htt_rx_desc *rx_desc;
316
Michal Kazior45967082014-02-27 18:50:05 +0200317 lockdep_assert_held(&htt->rx_ring.lock);
318
Kalle Valo5e3dd152013-06-12 20:52:10 +0300319 if (htt->rx_confused) {
320 ath10k_warn("htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100321 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300322 }
323
324 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
325 while (msdu) {
326 int last_msdu, msdu_len_invalid, msdu_chained;
327
328 dma_unmap_single(htt->ar->dev,
329 ATH10K_SKB_CB(msdu)->paddr,
330 msdu->len + skb_tailroom(msdu),
331 DMA_FROM_DEVICE);
332
Ben Greear75fb2f92014-02-05 13:58:34 -0800333 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300334 msdu->data, msdu->len + skb_tailroom(msdu));
335
336 rx_desc = (struct htt_rx_desc *)msdu->data;
337
338 /* FIXME: we must report msdu payload since this is what caller
339 * expects now */
340 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
341 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
342
343 /*
344 * Sanity check - confirm the HW is finished filling in the
345 * rx data.
346 * If the HW and SW are working correctly, then it's guaranteed
347 * that the HW's MAC DMA is done before this point in the SW.
348 * To prevent the case that we handle a stale Rx descriptor,
349 * just assert for now until we have a way to recover.
350 */
351 if (!(__le32_to_cpu(rx_desc->attention.flags)
352 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
353 ath10k_htt_rx_free_msdu_chain(*head_msdu);
354 *head_msdu = NULL;
355 msdu = NULL;
356 ath10k_err("htt rx stopped. cannot recover\n");
357 htt->rx_confused = true;
358 break;
359 }
360
361 /*
362 * Copy the FW rx descriptor for this MSDU from the rx
363 * indication message into the MSDU's netbuf. HL uses the
364 * same rx indication message definition as LL, and simply
365 * appends new info (fields from the HW rx desc, and the
366 * MSDU payload itself). So, the offset into the rx
367 * indication message only has to account for the standard
368 * offset of the per-MSDU FW rx desc info within the
369 * message, and how many bytes of the per-MSDU FW rx desc
370 * info have already been consumed. (And the endianness of
371 * the host, since for a big-endian host, the rx ind
372 * message contents, including the per-MSDU rx desc bytes,
373 * were byteswapped during upload.)
374 */
375 if (*fw_desc_len > 0) {
376 rx_desc->fw_desc.info0 = **fw_desc;
377 /*
378 * The target is expected to only provide the basic
379 * per-MSDU rx descriptors. Just to be sure, verify
380 * that the target has not attached extension data
381 * (e.g. LRO flow ID).
382 */
383
384 /* or more, if there's extension data */
385 (*fw_desc)++;
386 (*fw_desc_len)--;
387 } else {
388 /*
389 * When an oversized AMSDU happened, FW will lost
390 * some of MSDU status - in this case, the FW
391 * descriptors provided will be less than the
392 * actual MSDUs inside this MPDU. Mark the FW
393 * descriptors so that it will still deliver to
394 * upper stack, if no CRC error for this MPDU.
395 *
396 * FIX THIS - the FW descriptors are actually for
397 * MSDUs in the end of this A-MSDU instead of the
398 * beginning.
399 */
400 rx_desc->fw_desc.info0 = 0;
401 }
402
403 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
404 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
405 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
406 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
407 RX_MSDU_START_INFO0_MSDU_LENGTH);
408 msdu_chained = rx_desc->frag_info.ring2_more_count;
409
410 if (msdu_len_invalid)
411 msdu_len = 0;
412
413 skb_trim(msdu, 0);
414 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
415 msdu_len -= msdu->len;
416
417 /* FIXME: Do chained buffers include htt_rx_desc or not? */
418 while (msdu_chained--) {
419 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
420
421 dma_unmap_single(htt->ar->dev,
422 ATH10K_SKB_CB(next)->paddr,
423 next->len + skb_tailroom(next),
424 DMA_FROM_DEVICE);
425
Ben Greear75fb2f92014-02-05 13:58:34 -0800426 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
427 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300428 next->len + skb_tailroom(next));
429
430 skb_trim(next, 0);
431 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
432 msdu_len -= next->len;
433
434 msdu->next = next;
435 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300436 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300437 }
438
Kalle Valo5e3dd152013-06-12 20:52:10 +0300439 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
440 RX_MSDU_END_INFO0_LAST_MSDU;
441
442 if (last_msdu) {
443 msdu->next = NULL;
444 break;
445 } else {
446 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
447 msdu->next = next;
448 msdu = next;
449 }
450 }
451 *tail_msdu = msdu;
452
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100453 if (*head_msdu == NULL)
454 msdu_chaining = -1;
455
Kalle Valo5e3dd152013-06-12 20:52:10 +0300456 /*
457 * Don't refill the ring yet.
458 *
459 * First, the elements popped here are still in use - it is not
460 * safe to overwrite them until the matching call to
461 * mpdu_desc_list_next. Second, for efficiency it is preferable to
462 * refill the rx ring with 1 PPDU's worth of rx buffers (something
463 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
464 * (something like 3 buffers). Consequently, we'll rely on the txrx
465 * SW to tell us when it is done pulling all the PPDU's rx buffers
466 * out of the rx ring, and then refill it just once.
467 */
468
469 return msdu_chaining;
470}
471
Michal Kazior6e712d42013-09-24 10:18:36 +0200472static void ath10k_htt_rx_replenish_task(unsigned long ptr)
473{
474 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
475 ath10k_htt_rx_msdu_buff_replenish(htt);
476}
477
Michal Kazior95bf21f2014-05-16 17:15:39 +0300478int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300479{
480 dma_addr_t paddr;
481 void *vaddr;
482 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
483
484 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
485 if (!is_power_of_2(htt->rx_ring.size)) {
486 ath10k_warn("htt rx ring size is not power of 2\n");
487 return -EINVAL;
488 }
489
490 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
491
492 /*
493 * Set the initial value for the level to which the rx ring
494 * should be filled, based on the max throughput and the
495 * worst likely latency for the host to fill the rx ring
496 * with new buffers. In theory, this fill level can be
497 * dynamically adjusted from the initial value set here, to
498 * reflect the actual host latency rather than a
499 * conservative assumption about the host latency.
500 */
501 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
502
503 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300504 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300505 GFP_KERNEL);
506 if (!htt->rx_ring.netbufs_ring)
507 goto err_netbuf;
508
509 vaddr = dma_alloc_coherent(htt->ar->dev,
510 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
511 &paddr, GFP_DMA);
512 if (!vaddr)
513 goto err_dma_ring;
514
515 htt->rx_ring.paddrs_ring = vaddr;
516 htt->rx_ring.base_paddr = paddr;
517
518 vaddr = dma_alloc_coherent(htt->ar->dev,
519 sizeof(*htt->rx_ring.alloc_idx.vaddr),
520 &paddr, GFP_DMA);
521 if (!vaddr)
522 goto err_dma_idx;
523
524 htt->rx_ring.alloc_idx.vaddr = vaddr;
525 htt->rx_ring.alloc_idx.paddr = paddr;
526 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
527 *htt->rx_ring.alloc_idx.vaddr = 0;
528
529 /* Initialize the Rx refill retry timer */
530 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
531
532 spin_lock_init(&htt->rx_ring.lock);
533
534 htt->rx_ring.fill_cnt = 0;
535 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
536 goto err_fill_ring;
537
Michal Kazior6e712d42013-09-24 10:18:36 +0200538 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
539 (unsigned long)htt);
540
Michal Kazior6c5151a2014-02-27 18:50:04 +0200541 skb_queue_head_init(&htt->tx_compl_q);
542 skb_queue_head_init(&htt->rx_compl_q);
543
544 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
545 (unsigned long)htt);
546
Kalle Valoaad0b652013-09-08 17:56:02 +0300547 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300548 htt->rx_ring.size, htt->rx_ring.fill_level);
549 return 0;
550
551err_fill_ring:
552 ath10k_htt_rx_ring_free(htt);
553 dma_free_coherent(htt->ar->dev,
554 sizeof(*htt->rx_ring.alloc_idx.vaddr),
555 htt->rx_ring.alloc_idx.vaddr,
556 htt->rx_ring.alloc_idx.paddr);
557err_dma_idx:
558 dma_free_coherent(htt->ar->dev,
559 (htt->rx_ring.size *
560 sizeof(htt->rx_ring.paddrs_ring)),
561 htt->rx_ring.paddrs_ring,
562 htt->rx_ring.base_paddr);
563err_dma_ring:
564 kfree(htt->rx_ring.netbufs_ring);
565err_netbuf:
566 return -ENOMEM;
567}
568
569static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
570{
571 switch (type) {
572 case HTT_RX_MPDU_ENCRYPT_WEP40:
573 case HTT_RX_MPDU_ENCRYPT_WEP104:
574 return 4;
575 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
576 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
577 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
578 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
579 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
580 return 8;
581 case HTT_RX_MPDU_ENCRYPT_NONE:
582 return 0;
583 }
584
585 ath10k_warn("unknown encryption type %d\n", type);
586 return 0;
587}
588
589static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
590{
591 switch (type) {
592 case HTT_RX_MPDU_ENCRYPT_NONE:
593 case HTT_RX_MPDU_ENCRYPT_WEP40:
594 case HTT_RX_MPDU_ENCRYPT_WEP104:
595 case HTT_RX_MPDU_ENCRYPT_WEP128:
596 case HTT_RX_MPDU_ENCRYPT_WAPI:
597 return 0;
598 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
599 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
600 return 4;
601 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
602 return 8;
603 }
604
605 ath10k_warn("unknown encryption type %d\n", type);
606 return 0;
607}
608
609/* Applies for first msdu in chain, before altering it. */
610static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
611{
612 struct htt_rx_desc *rxd;
613 enum rx_msdu_decap_format fmt;
614
615 rxd = (void *)skb->data - sizeof(*rxd);
616 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
617 RX_MSDU_START_INFO1_DECAP_FORMAT);
618
619 if (fmt == RX_MSDU_DECAP_RAW)
620 return (void *)skb->data;
621 else
622 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
623}
624
625/* This function only applies for first msdu in an msdu chain */
626static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
627{
628 if (ieee80211_is_data_qos(hdr->frame_control)) {
629 u8 *qc = ieee80211_get_qos_ctl(hdr);
630 if (qc[0] & 0x80)
631 return true;
632 }
633 return false;
634}
635
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300636struct rfc1042_hdr {
637 u8 llc_dsap;
638 u8 llc_ssap;
639 u8 llc_ctrl;
640 u8 snap_oui[3];
641 __be16 snap_type;
642} __packed;
643
644struct amsdu_subframe_hdr {
645 u8 dst[ETH_ALEN];
646 u8 src[ETH_ALEN];
647 __be16 len;
648} __packed;
649
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100650static const u8 rx_legacy_rate_idx[] = {
651 3, /* 0x00 - 11Mbps */
652 2, /* 0x01 - 5.5Mbps */
653 1, /* 0x02 - 2Mbps */
654 0, /* 0x03 - 1Mbps */
655 3, /* 0x04 - 11Mbps */
656 2, /* 0x05 - 5.5Mbps */
657 1, /* 0x06 - 2Mbps */
658 0, /* 0x07 - 1Mbps */
659 10, /* 0x08 - 48Mbps */
660 8, /* 0x09 - 24Mbps */
661 6, /* 0x0A - 12Mbps */
662 4, /* 0x0B - 6Mbps */
663 11, /* 0x0C - 54Mbps */
664 9, /* 0x0D - 36Mbps */
665 7, /* 0x0E - 18Mbps */
666 5, /* 0x0F - 9Mbps */
667};
668
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100669static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100670 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100671 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100672 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100673{
674 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100675 u8 preamble = 0;
676
677 /* Check if valid fields */
678 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
679 return;
680
681 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
682
683 switch (preamble) {
684 case HTT_RX_LEGACY:
685 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
686 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
687 rate_idx = 0;
688
689 if (rate < 0x08 || rate > 0x0F)
690 break;
691
692 switch (band) {
693 case IEEE80211_BAND_2GHZ:
694 if (cck)
695 rate &= ~BIT(3);
696 rate_idx = rx_legacy_rate_idx[rate];
697 break;
698 case IEEE80211_BAND_5GHZ:
699 rate_idx = rx_legacy_rate_idx[rate];
700 /* We are using same rate table registering
701 HW - ath10k_rates[]. In case of 5GHz skip
702 CCK rates, so -4 here */
703 rate_idx -= 4;
704 break;
705 default:
706 break;
707 }
708
709 status->rate_idx = rate_idx;
710 break;
711 case HTT_RX_HT:
712 case HTT_RX_HT_WITH_TXBF:
713 /* HT-SIG - Table 20-11 in info1 and info2 */
714 mcs = info1 & 0x1F;
715 nss = mcs >> 3;
716 bw = (info1 >> 7) & 1;
717 sgi = (info2 >> 7) & 1;
718
719 status->rate_idx = mcs;
720 status->flag |= RX_FLAG_HT;
721 if (sgi)
722 status->flag |= RX_FLAG_SHORT_GI;
723 if (bw)
724 status->flag |= RX_FLAG_40MHZ;
725 break;
726 case HTT_RX_VHT:
727 case HTT_RX_VHT_WITH_TXBF:
728 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
729 TODO check this */
730 mcs = (info2 >> 4) & 0x0F;
731 nss = ((info1 >> 10) & 0x07) + 1;
732 bw = info1 & 3;
733 sgi = info2 & 1;
734
735 status->rate_idx = mcs;
736 status->vht_nss = nss;
737
738 if (sgi)
739 status->flag |= RX_FLAG_SHORT_GI;
740
741 switch (bw) {
742 /* 20MHZ */
743 case 0:
744 break;
745 /* 40MHZ */
746 case 1:
747 status->flag |= RX_FLAG_40MHZ;
748 break;
749 /* 80MHZ */
750 case 2:
751 status->vht_flag |= RX_VHT_FLAG_80MHZ;
752 }
753
754 status->flag |= RX_FLAG_VHT;
755 break;
756 default:
757 break;
758 }
759}
760
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100761static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100762 struct ieee80211_rx_status *rx_status,
763 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300764 enum htt_rx_mpdu_encrypt_type enctype,
765 enum rx_msdu_decap_format fmt,
766 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100767{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100768 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100769
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300770 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
771 RX_FLAG_IV_STRIPPED |
772 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100773
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300774 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100775 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300776
777 /*
778 * There's no explicit rx descriptor flag to indicate whether a given
779 * frame has been decrypted or not. We're forced to use the decap
780 * format as an implicit indication. However fragmentation rx is always
781 * raw and it probably never reports undecrypted raws.
782 *
783 * This makes sure sniffed frames are reported as-is without stripping
784 * the protected flag.
785 */
786 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
787 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100788
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100789 rx_status->flag |= RX_FLAG_DECRYPTED |
790 RX_FLAG_IV_STRIPPED |
791 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100792 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
793 ~IEEE80211_FCTL_PROTECTED);
794}
795
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100796static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
797 struct ieee80211_rx_status *status)
798{
799 struct ieee80211_channel *ch;
800
801 spin_lock_bh(&ar->data_lock);
802 ch = ar->scan_channel;
803 if (!ch)
804 ch = ar->rx_channel;
805 spin_unlock_bh(&ar->data_lock);
806
807 if (!ch)
808 return false;
809
810 status->band = ch->band;
811 status->freq = ch->center_freq;
812
813 return true;
814}
815
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100816static void ath10k_process_rx(struct ath10k *ar,
817 struct ieee80211_rx_status *rx_status,
818 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100819{
820 struct ieee80211_rx_status *status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100821
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100822 status = IEEE80211_SKB_RXCB(skb);
823 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100824
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100825 ath10k_dbg(ATH10K_DBG_DATA,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100826 "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100827 skb,
828 skb->len,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100829 status->flag == 0 ? "legacy" : "",
830 status->flag & RX_FLAG_HT ? "ht" : "",
831 status->flag & RX_FLAG_VHT ? "vht" : "",
832 status->flag & RX_FLAG_40MHZ ? "40" : "",
833 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
834 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
835 status->rate_idx,
836 status->vht_nss,
837 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100838 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100839 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
840 !!(status->flag & RX_FLAG_MMIC_ERROR));
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100841 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100842 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100843
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100844 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100845}
846
Michal Kaziord960c362014-02-25 09:29:57 +0200847static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
848{
849 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
850 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
851}
852
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300853static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100854 struct ieee80211_rx_status *rx_status,
855 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300856{
857 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100858 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300859 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300860 enum rx_msdu_decap_format fmt;
861 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300862 struct ieee80211_hdr *hdr;
Michal Kazior784f69d2013-09-26 10:12:23 +0300863 u8 hdr_buf[64], addr[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300864 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300865
866 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300867 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
868 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
869
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300870 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
871 hdr_len = ieee80211_hdrlen(hdr->frame_control);
872 memcpy(hdr_buf, hdr, hdr_len);
873 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300874
Kalle Valo5e3dd152013-06-12 20:52:10 +0300875 first = skb;
876 while (skb) {
877 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300878 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300879
880 rxd = (void *)skb->data - sizeof(*rxd);
881 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300882 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300883 decap_hdr = (void *)rxd->rx_hdr_status;
884
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300885 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
886
887 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300888 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300889 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
890 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
891 4);
892 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300893 }
894
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300895 switch (fmt) {
896 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300897 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300898 skb_trim(skb, skb->len - FCS_LEN);
899 break;
900 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300901 /* pull decapped header and copy DA */
902 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200903 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300904 memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
905 skb_pull(skb, hdr_len);
906
907 /* push original 802.11 header */
908 hdr = (struct ieee80211_hdr *)hdr_buf;
909 hdr_len = ieee80211_hdrlen(hdr->frame_control);
910 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
911
912 /* original A-MSDU header has the bit set but we're
913 * not including A-MSDU subframe header */
914 hdr = (struct ieee80211_hdr *)skb->data;
915 qos = ieee80211_get_qos_ctl(hdr);
916 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
917
918 /* original 802.11 header has a different DA */
919 memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300920 break;
921 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300922 /* strip ethernet header and insert decapped 802.11
923 * header, amsdu subframe header and rfc1042 header */
924
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300925 len = 0;
926 len += sizeof(struct rfc1042_hdr);
927 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200928
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300929 skb_pull(skb, sizeof(struct ethhdr));
930 memcpy(skb_push(skb, len), decap_hdr, len);
931 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
932 break;
933 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300934 /* insert decapped 802.11 header making a singly
935 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300936 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
937 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300938 }
939
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100940 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300941 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
942 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300943 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100944 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300945
Kalle Valo652de352013-11-13 15:23:30 +0200946 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100947 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100948 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100949 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +0200950
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100951 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300952 }
953
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300954 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
955 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300956}
957
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100958static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
959 struct ieee80211_rx_status *rx_status,
960 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300961{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300962 struct htt_rx_desc *rxd;
963 struct ieee80211_hdr *hdr;
964 enum rx_msdu_decap_format fmt;
965 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300966 int hdr_len;
967 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300968
969 /* This shouldn't happen. If it does than it may be a FW bug. */
970 if (skb->next) {
Ben Greear75fb2f92014-02-05 13:58:34 -0800971 ath10k_warn("htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300972 ath10k_htt_rx_free_msdu_chain(skb->next);
973 skb->next = NULL;
974 }
975
976 rxd = (void *)skb->data - sizeof(*rxd);
977 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
978 RX_MSDU_START_INFO1_DECAP_FORMAT);
979 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
980 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300981 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
982 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300983
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300984 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
985
Kalle Valo5e3dd152013-06-12 20:52:10 +0300986 switch (fmt) {
987 case RX_MSDU_DECAP_RAW:
988 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300989 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300990 break;
991 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300992 /* Pull decapped header */
993 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200994 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300995 skb_pull(skb, hdr_len);
996
997 /* Push original header */
998 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
999 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1000 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001001 break;
1002 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001003 /* strip ethernet header and insert decapped 802.11 header and
1004 * rfc1042 header */
1005
1006 rfc1042 = hdr;
1007 rfc1042 += roundup(hdr_len, 4);
1008 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
1009
1010 skb_pull(skb, sizeof(struct ethhdr));
1011 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1012 rfc1042, sizeof(struct rfc1042_hdr));
1013 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001014 break;
1015 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001016 /* remove A-MSDU subframe header and insert
1017 * decapped 802.11 header. rfc1042 header is already there */
1018
1019 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1020 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001021 break;
1022 }
1023
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001024 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001025
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001026 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001027}
1028
Michal Kazior605f81a2013-07-31 10:47:56 +02001029static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1030{
1031 struct htt_rx_desc *rxd;
1032 u32 flags, info;
1033 bool is_ip4, is_ip6;
1034 bool is_tcp, is_udp;
1035 bool ip_csum_ok, tcpudp_csum_ok;
1036
1037 rxd = (void *)skb->data - sizeof(*rxd);
1038 flags = __le32_to_cpu(rxd->attention.flags);
1039 info = __le32_to_cpu(rxd->msdu_start.info1);
1040
1041 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1042 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1043 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1044 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1045 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1046 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1047
1048 if (!is_ip4 && !is_ip6)
1049 return CHECKSUM_NONE;
1050 if (!is_tcp && !is_udp)
1051 return CHECKSUM_NONE;
1052 if (!ip_csum_ok)
1053 return CHECKSUM_NONE;
1054 if (!tcpudp_csum_ok)
1055 return CHECKSUM_NONE;
1056
1057 return CHECKSUM_UNNECESSARY;
1058}
1059
Ben Greearbfa35362014-03-03 14:07:09 -08001060static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1061{
1062 struct sk_buff *next = msdu_head->next;
1063 struct sk_buff *to_free = next;
1064 int space;
1065 int total_len = 0;
1066
1067 /* TODO: Might could optimize this by using
1068 * skb_try_coalesce or similar method to
1069 * decrease copying, or maybe get mac80211 to
1070 * provide a way to just receive a list of
1071 * skb?
1072 */
1073
1074 msdu_head->next = NULL;
1075
1076 /* Allocate total length all at once. */
1077 while (next) {
1078 total_len += next->len;
1079 next = next->next;
1080 }
1081
1082 space = total_len - skb_tailroom(msdu_head);
1083 if ((space > 0) &&
1084 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1085 /* TODO: bump some rx-oom error stat */
1086 /* put it back together so we can free the
1087 * whole list at once.
1088 */
1089 msdu_head->next = to_free;
1090 return -1;
1091 }
1092
1093 /* Walk list again, copying contents into
1094 * msdu_head
1095 */
1096 next = to_free;
1097 while (next) {
1098 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1099 next->len);
1100 next = next->next;
1101 }
1102
1103 /* If here, we have consolidated skb. Free the
1104 * fragments and pass the main skb on up the
1105 * stack.
1106 */
1107 ath10k_htt_rx_free_msdu_chain(to_free);
1108 return 0;
1109}
1110
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001111static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1112 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001113 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001114 bool channel_set,
1115 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001116{
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001117 if (head->len == 0) {
1118 ath10k_dbg(ATH10K_DBG_HTT,
1119 "htt rx dropping due to zero-len\n");
1120 return false;
1121 }
1122
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001123 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001124 ath10k_dbg(ATH10K_DBG_HTT,
1125 "htt rx dropping due to decrypt-err\n");
1126 return false;
1127 }
1128
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001129 if (!channel_set) {
1130 ath10k_warn("no channel configured; ignoring frame!\n");
1131 return false;
1132 }
1133
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001134 /* Skip mgmt frames while we handle this in WMI */
1135 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001136 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001137 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1138 return false;
1139 }
1140
1141 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1142 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1143 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001144 !htt->ar->monitor_started) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001145 ath10k_dbg(ATH10K_DBG_HTT,
1146 "htt rx ignoring frame w/ status %d\n",
1147 status);
1148 return false;
1149 }
1150
1151 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1152 ath10k_dbg(ATH10K_DBG_HTT,
1153 "htt rx CAC running\n");
1154 return false;
1155 }
1156
1157 return true;
1158}
1159
Kalle Valo5e3dd152013-06-12 20:52:10 +03001160static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1161 struct htt_rx_indication *rx)
1162{
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001163 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001164 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001165 struct htt_rx_desc *rxd;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001166 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001167 struct ieee80211_hdr *hdr;
1168 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001169 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001170 int fw_desc_len;
1171 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001172 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001173 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001174 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001175
Michal Kazior45967082014-02-27 18:50:05 +02001176 lockdep_assert_held(&htt->rx_ring.lock);
1177
Kalle Valo5e3dd152013-06-12 20:52:10 +03001178 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1179 fw_desc = (u8 *)&rx->fw_desc;
1180
1181 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1182 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1183 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1184
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001185 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001186 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1187 memset(rx_status, 0, sizeof(*rx_status));
1188 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1189 rx->ppdu.combined_rssi;
1190 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001191
1192 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1193 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001194 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1195 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001196 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001197
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001198 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001199
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001200 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001201 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001202 rx->ppdu.info0,
1203 __le32_to_cpu(rx->ppdu.info1),
1204 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001205 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001206 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001207
Kalle Valo5e3dd152013-06-12 20:52:10 +03001208 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1209 rx, sizeof(*rx) +
1210 (sizeof(struct htt_rx_indication_mpdu_range) *
1211 num_mpdu_ranges));
1212
1213 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001214 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001215
1216 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1217 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001218
1219 msdu_head = NULL;
1220 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001221 ret = ath10k_htt_rx_amsdu_pop(htt,
1222 &fw_desc,
1223 &fw_desc_len,
1224 &msdu_head,
1225 &msdu_tail);
1226
1227 if (ret < 0) {
1228 ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
1229 ret);
1230 ath10k_htt_rx_free_msdu_chain(msdu_head);
1231 continue;
1232 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001233
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001234 rxd = container_of((void *)msdu_head->data,
1235 struct htt_rx_desc,
1236 msdu_payload);
1237 attention = __le32_to_cpu(rxd->attention.flags);
1238
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001239 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001240 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001241 channel_set,
1242 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001243 ath10k_htt_rx_free_msdu_chain(msdu_head);
1244 continue;
1245 }
1246
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001247 if (ret > 0 &&
1248 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001249 ath10k_htt_rx_free_msdu_chain(msdu_head);
1250 continue;
1251 }
1252
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001253 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001254 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001255 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001256 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001257
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001258 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001259 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001260 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001261 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001262
Kalle Valo5e3dd152013-06-12 20:52:10 +03001263 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1264
1265 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001266 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001267 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001268 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001269 }
1270 }
1271
Michal Kazior6e712d42013-09-24 10:18:36 +02001272 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001273}
1274
1275static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1276 struct htt_rx_fragment_indication *frag)
1277{
1278 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001279 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001280 struct htt_rx_desc *rxd;
1281 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001282 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001283 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001284 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001285 bool tkip_mic_err;
1286 bool decrypt_err;
1287 u8 *fw_desc;
1288 int fw_desc_len, hdrlen, paramlen;
1289 int trim;
1290
1291 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1292 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1293
1294 msdu_head = NULL;
1295 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001296
1297 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001298 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
1299 &msdu_head, &msdu_tail);
Michal Kazior45967082014-02-27 18:50:05 +02001300 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001301
1302 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1303
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001304 if (ret) {
1305 ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
1306 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001307 ath10k_htt_rx_free_msdu_chain(msdu_head);
1308 return;
1309 }
1310
1311 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001312 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001313
1314 hdr = (struct ieee80211_hdr *)msdu_head->data;
1315 rxd = (void *)msdu_head->data - sizeof(*rxd);
1316 tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
1317 RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1318 decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
1319 RX_ATTENTION_FLAGS_DECRYPT_ERR);
1320 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1321 RX_MSDU_START_INFO1_DECAP_FORMAT);
1322
1323 if (fmt != RX_MSDU_DECAP_RAW) {
1324 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1325 dev_kfree_skb_any(msdu_head);
1326 goto end;
1327 }
1328
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001329 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1330 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001331 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1332 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001333 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001334
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001335 if (tkip_mic_err)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001336 ath10k_warn("tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001337
1338 if (decrypt_err) {
1339 ath10k_warn("decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001340 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001341 goto end;
1342 }
1343
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001344 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001345 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001346 paramlen = ath10k_htt_rx_crypto_param_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001347
1348 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001349 memmove((void *)msdu_head->data + paramlen,
1350 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001351 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001352 skb_pull(msdu_head, paramlen);
1353 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001354 }
1355
1356 /* remove trailing FCS */
1357 trim = 4;
1358
1359 /* remove crypto trailer */
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001360 trim += ath10k_htt_rx_crypto_tail_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001361
1362 /* last fragment of TKIP frags has MIC */
1363 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001364 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001365 trim += 8;
1366
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001367 if (trim > msdu_head->len) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001368 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001369 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001370 goto end;
1371 }
1372
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001373 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001374
Ben Greear75fb2f92014-02-05 13:58:34 -08001375 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001376 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001377 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001378
1379end:
1380 if (fw_desc_len > 0) {
1381 ath10k_dbg(ATH10K_DBG_HTT,
1382 "expecting more fragmented rx in one indication %d\n",
1383 fw_desc_len);
1384 }
1385}
1386
Michal Kazior6c5151a2014-02-27 18:50:04 +02001387static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1388 struct sk_buff *skb)
1389{
1390 struct ath10k_htt *htt = &ar->htt;
1391 struct htt_resp *resp = (struct htt_resp *)skb->data;
1392 struct htt_tx_done tx_done = {};
1393 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1394 __le16 msdu_id;
1395 int i;
1396
Michal Kazior45967082014-02-27 18:50:05 +02001397 lockdep_assert_held(&htt->tx_lock);
1398
Michal Kazior6c5151a2014-02-27 18:50:04 +02001399 switch (status) {
1400 case HTT_DATA_TX_STATUS_NO_ACK:
1401 tx_done.no_ack = true;
1402 break;
1403 case HTT_DATA_TX_STATUS_OK:
1404 break;
1405 case HTT_DATA_TX_STATUS_DISCARD:
1406 case HTT_DATA_TX_STATUS_POSTPONE:
1407 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1408 tx_done.discard = true;
1409 break;
1410 default:
1411 ath10k_warn("unhandled tx completion status %d\n", status);
1412 tx_done.discard = true;
1413 break;
1414 }
1415
1416 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1417 resp->data_tx_completion.num_msdus);
1418
1419 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1420 msdu_id = resp->data_tx_completion.msdus[i];
1421 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1422 ath10k_txrx_tx_unref(htt, &tx_done);
1423 }
1424}
1425
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001426static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1427{
1428 struct htt_rx_addba *ev = &resp->rx_addba;
1429 struct ath10k_peer *peer;
1430 struct ath10k_vif *arvif;
1431 u16 info0, tid, peer_id;
1432
1433 info0 = __le16_to_cpu(ev->info0);
1434 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1435 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1436
1437 ath10k_dbg(ATH10K_DBG_HTT,
1438 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1439 tid, peer_id, ev->window_size);
1440
1441 spin_lock_bh(&ar->data_lock);
1442 peer = ath10k_peer_find_by_id(ar, peer_id);
1443 if (!peer) {
1444 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1445 peer_id);
1446 spin_unlock_bh(&ar->data_lock);
1447 return;
1448 }
1449
1450 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1451 if (!arvif) {
1452 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1453 peer->vdev_id);
1454 spin_unlock_bh(&ar->data_lock);
1455 return;
1456 }
1457
1458 ath10k_dbg(ATH10K_DBG_HTT,
1459 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1460 peer->addr, tid, ev->window_size);
1461
1462 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1463 spin_unlock_bh(&ar->data_lock);
1464}
1465
1466static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1467{
1468 struct htt_rx_delba *ev = &resp->rx_delba;
1469 struct ath10k_peer *peer;
1470 struct ath10k_vif *arvif;
1471 u16 info0, tid, peer_id;
1472
1473 info0 = __le16_to_cpu(ev->info0);
1474 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1475 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1476
1477 ath10k_dbg(ATH10K_DBG_HTT,
1478 "htt rx delba tid %hu peer_id %hu\n",
1479 tid, peer_id);
1480
1481 spin_lock_bh(&ar->data_lock);
1482 peer = ath10k_peer_find_by_id(ar, peer_id);
1483 if (!peer) {
1484 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1485 peer_id);
1486 spin_unlock_bh(&ar->data_lock);
1487 return;
1488 }
1489
1490 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1491 if (!arvif) {
1492 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1493 peer->vdev_id);
1494 spin_unlock_bh(&ar->data_lock);
1495 return;
1496 }
1497
1498 ath10k_dbg(ATH10K_DBG_HTT,
1499 "htt rx stop rx ba session sta %pM tid %hu\n",
1500 peer->addr, tid);
1501
1502 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1503 spin_unlock_bh(&ar->data_lock);
1504}
1505
Kalle Valo5e3dd152013-06-12 20:52:10 +03001506void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1507{
Michal Kazioredb82362013-07-05 16:15:14 +03001508 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001509 struct htt_resp *resp = (struct htt_resp *)skb->data;
1510
1511 /* confirm alignment */
1512 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1513 ath10k_warn("unaligned htt message, expect trouble\n");
1514
Ben Greear75fb2f92014-02-05 13:58:34 -08001515 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001516 resp->hdr.msg_type);
1517 switch (resp->hdr.msg_type) {
1518 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1519 htt->target_version_major = resp->ver_resp.major;
1520 htt->target_version_minor = resp->ver_resp.minor;
1521 complete(&htt->target_version_received);
1522 break;
1523 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001524 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001525 spin_lock_bh(&htt->rx_ring.lock);
1526 __skb_queue_tail(&htt->rx_compl_q, skb);
1527 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001528 tasklet_schedule(&htt->txrx_compl_task);
1529 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001530 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1531 struct htt_peer_map_event ev = {
1532 .vdev_id = resp->peer_map.vdev_id,
1533 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1534 };
1535 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1536 ath10k_peer_map_event(htt, &ev);
1537 break;
1538 }
1539 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1540 struct htt_peer_unmap_event ev = {
1541 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1542 };
1543 ath10k_peer_unmap_event(htt, &ev);
1544 break;
1545 }
1546 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1547 struct htt_tx_done tx_done = {};
1548 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1549
1550 tx_done.msdu_id =
1551 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1552
1553 switch (status) {
1554 case HTT_MGMT_TX_STATUS_OK:
1555 break;
1556 case HTT_MGMT_TX_STATUS_RETRY:
1557 tx_done.no_ack = true;
1558 break;
1559 case HTT_MGMT_TX_STATUS_DROP:
1560 tx_done.discard = true;
1561 break;
1562 }
1563
Michal Kazior6c5151a2014-02-27 18:50:04 +02001564 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001565 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001566 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001567 break;
1568 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001569 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1570 spin_lock_bh(&htt->tx_lock);
1571 __skb_queue_tail(&htt->tx_compl_q, skb);
1572 spin_unlock_bh(&htt->tx_lock);
1573 tasklet_schedule(&htt->txrx_compl_task);
1574 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001575 case HTT_T2H_MSG_TYPE_SEC_IND: {
1576 struct ath10k *ar = htt->ar;
1577 struct htt_security_indication *ev = &resp->security_indication;
1578
1579 ath10k_dbg(ATH10K_DBG_HTT,
1580 "sec ind peer_id %d unicast %d type %d\n",
1581 __le16_to_cpu(ev->peer_id),
1582 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1583 MS(ev->flags, HTT_SECURITY_TYPE));
1584 complete(&ar->install_key_done);
1585 break;
1586 }
1587 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1588 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1589 skb->data, skb->len);
1590 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1591 break;
1592 }
1593 case HTT_T2H_MSG_TYPE_TEST:
1594 /* FIX THIS */
1595 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001596 case HTT_T2H_MSG_TYPE_STATS_CONF:
Kalle Valoa9bf0502013-09-03 11:43:55 +03001597 trace_ath10k_htt_stats(skb->data, skb->len);
1598 break;
1599 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001600 /* Firmware can return tx frames if it's unable to fully
1601 * process them and suspects host may be able to fix it. ath10k
1602 * sends all tx frames as already inspected so this shouldn't
1603 * happen unless fw has a bug.
1604 */
1605 ath10k_warn("received an unexpected htt tx inspect event\n");
1606 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001607 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001608 ath10k_htt_rx_addba(ar, resp);
1609 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001610 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001611 ath10k_htt_rx_delba(ar, resp);
1612 break;
1613 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1614 /* Ignore this event because mac80211 takes care of Rx
1615 * aggregation reordering.
1616 */
1617 break;
1618 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001619 default:
1620 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1621 resp->hdr.msg_type);
1622 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1623 skb->data, skb->len);
1624 break;
1625 };
1626
1627 /* Free the indication buffer */
1628 dev_kfree_skb_any(skb);
1629}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001630
1631static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1632{
1633 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1634 struct htt_resp *resp;
1635 struct sk_buff *skb;
1636
Michal Kazior45967082014-02-27 18:50:05 +02001637 spin_lock_bh(&htt->tx_lock);
1638 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001639 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1640 dev_kfree_skb_any(skb);
1641 }
Michal Kazior45967082014-02-27 18:50:05 +02001642 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001643
Michal Kazior45967082014-02-27 18:50:05 +02001644 spin_lock_bh(&htt->rx_ring.lock);
1645 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001646 resp = (struct htt_resp *)skb->data;
1647 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1648 dev_kfree_skb_any(skb);
1649 }
Michal Kazior45967082014-02-27 18:50:05 +02001650 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001651}