Maxime Ripard | db84c03 | 2012-08-31 16:00:41 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Free Electrons |
| 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License |
| 6 | * Version 2 or later at the following locations: |
| 7 | * |
| 8 | * http://www.opensource.org/licenses/gpl-license.html |
| 9 | * http://www.gnu.org/copyleft/gpl.html |
| 10 | */ |
| 11 | |
| 12 | /* |
| 13 | * The CFA-10049 is an expansion board for the CFA-10036 module, thus we |
| 14 | * need to include the CFA-10036 DTS. |
| 15 | */ |
| 16 | /include/ "imx28-cfa10036.dts" |
| 17 | |
| 18 | / { |
| 19 | model = "Crystalfontz CFA-10049 Board"; |
| 20 | compatible = "crystalfontz,cfa10049", "crystalfontz,cfa10036", "fsl,imx28"; |
| 21 | |
| 22 | apb@80000000 { |
Maxime Ripard | 223d1f9 | 2012-09-04 10:44:03 +0200 | [diff] [blame] | 23 | apbh@80000000 { |
| 24 | pinctrl@80018000 { |
Maxime Ripard | 24196d5 | 2012-11-03 16:59:08 +0100 | [diff] [blame] | 25 | pinctrl-names = "default", "default"; |
Maxime Ripard | 5b615fb | 2012-11-20 15:33:35 +0100 | [diff] [blame] | 26 | pinctrl-1 = <&hog_pins_cfa10049 |
| 27 | &hog_pins_cfa10049_pullup>; |
Maxime Ripard | 24196d5 | 2012-11-03 16:59:08 +0100 | [diff] [blame] | 28 | |
| 29 | hog_pins_cfa10049: hog-10049@0 { |
| 30 | reg = <0>; |
| 31 | fsl,pinmux-ids = < |
| 32 | 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ |
| 33 | 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ |
| 34 | 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ |
| 35 | 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 36 | 0x3173 /* MX28_PAD_LCD_RESET__GPIO_3_23 */ |
Maxime Ripard | 24196d5 | 2012-11-03 16:59:08 +0100 | [diff] [blame] | 37 | >; |
| 38 | fsl,drive-strength = <0>; |
| 39 | fsl,voltage = <1>; |
| 40 | fsl,pull-up = <0>; |
| 41 | }; |
| 42 | |
Maxime Ripard | 5b615fb | 2012-11-20 15:33:35 +0100 | [diff] [blame] | 43 | hog_pins_cfa10049_pullup: hog-10049-pullup@0 { |
| 44 | reg = <0>; |
| 45 | fsl,pinmux-ids = < |
| 46 | 0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */ |
Maxime Ripard | 0943b96 | 2013-01-31 11:00:24 +0100 | [diff] [blame] | 47 | 0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */ |
| 48 | 0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */ |
Maxime Ripard | a640cf6 | 2013-01-31 11:00:23 +0100 | [diff] [blame] | 49 | 0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */ |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 50 | 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ |
Maxime Ripard | 5b615fb | 2012-11-20 15:33:35 +0100 | [diff] [blame] | 51 | >; |
| 52 | fsl,drive-strength = <0>; |
| 53 | fsl,voltage = <1>; |
| 54 | fsl,pull-up = <1>; |
| 55 | }; |
| 56 | |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 57 | spi2_pins_cfa10049: spi2-cfa10049@0 { |
| 58 | reg = <0>; |
| 59 | fsl,pinmux-ids = < |
| 60 | 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ |
| 61 | 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ |
| 62 | 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ |
| 63 | >; |
| 64 | fsl,drive-strength = <1>; |
| 65 | fsl,voltage = <1>; |
| 66 | fsl,pull-up = <1>; |
| 67 | }; |
| 68 | |
Maxime Ripard | 223d1f9 | 2012-09-04 10:44:03 +0200 | [diff] [blame] | 69 | spi3_pins_cfa10049: spi3-cfa10049@0 { |
| 70 | reg = <0>; |
| 71 | fsl,pinmux-ids = < |
Maxime Ripard | 7ecc70a | 2013-01-25 09:39:35 +0100 | [diff] [blame] | 72 | 0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */ |
| 73 | 0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */ |
| 74 | 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */ |
| 75 | 0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */ |
| 76 | 0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */ |
Maxime Ripard | 223d1f9 | 2012-09-04 10:44:03 +0200 | [diff] [blame] | 77 | >; |
| 78 | fsl,drive-strength = <1>; |
| 79 | fsl,voltage = <1>; |
| 80 | fsl,pull-up = <1>; |
| 81 | }; |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 82 | |
| 83 | lcdif_18bit_pins_cfa10049: lcdif-18bit@0 { |
| 84 | reg = <0>; |
| 85 | fsl,pinmux-ids = < |
| 86 | 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ |
| 87 | 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ |
| 88 | 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ |
| 89 | 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ |
| 90 | 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ |
| 91 | 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ |
| 92 | 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ |
| 93 | 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ |
| 94 | 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ |
| 95 | 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ |
| 96 | 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ |
| 97 | 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ |
| 98 | 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ |
| 99 | 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ |
| 100 | 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ |
| 101 | 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ |
| 102 | 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ |
| 103 | 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ |
| 104 | >; |
| 105 | fsl,drive-strength = <0>; |
| 106 | fsl,voltage = <1>; |
| 107 | fsl,pull-up = <0>; |
| 108 | }; |
| 109 | |
| 110 | lcdif_pins_cfa10049: lcdif-evk@0 { |
| 111 | reg = <0>; |
| 112 | fsl,pinmux-ids = < |
| 113 | 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ |
| 114 | 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ |
| 115 | 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ |
| 116 | 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ |
| 117 | >; |
| 118 | fsl,drive-strength = <0>; |
| 119 | fsl,voltage = <1>; |
| 120 | fsl,pull-up = <0>; |
| 121 | }; |
Alexandre Belloni | 7d40340 | 2013-03-29 19:46:41 +0100 | [diff] [blame] | 122 | |
| 123 | w1_gpio_pins: w1-gpio@0 { |
| 124 | reg = <0>; |
| 125 | fsl,pinmux-ids = < |
| 126 | 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ |
| 127 | >; |
| 128 | fsl,drive-strength = <1>; |
| 129 | fsl,voltage = <1>; |
| 130 | fsl,pull-up = <0>; /* 0 will enable the keeper */ |
| 131 | }; |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 132 | }; |
| 133 | |
| 134 | lcdif@80030000 { |
| 135 | pinctrl-names = "default"; |
| 136 | pinctrl-0 = <&lcdif_18bit_pins_cfa10049 |
| 137 | &lcdif_pins_cfa10049>; |
Shawn Guo | 0d9f821 | 2013-03-14 11:37:15 +0800 | [diff] [blame] | 138 | display = <&display>; |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 139 | status = "okay"; |
Shawn Guo | 0d9f821 | 2013-03-14 11:37:15 +0800 | [diff] [blame] | 140 | |
| 141 | display: display { |
| 142 | bits-per-pixel = <32>; |
| 143 | bus-width = <18>; |
| 144 | |
| 145 | display-timings { |
| 146 | native-mode = <&timing0>; |
| 147 | timing0: timing0 { |
| 148 | clock-frequency = <9216000>; |
| 149 | hactive = <320>; |
| 150 | vactive = <480>; |
| 151 | hback-porch = <2>; |
| 152 | hfront-porch = <2>; |
| 153 | vback-porch = <2>; |
| 154 | vfront-porch = <2>; |
| 155 | hsync-len = <15>; |
| 156 | vsync-len = <15>; |
| 157 | hsync-active = <0>; |
| 158 | vsync-active = <0>; |
| 159 | de-active = <1>; |
| 160 | pixelclk-active = <1>; |
| 161 | }; |
| 162 | }; |
| 163 | }; |
Maxime Ripard | 223d1f9 | 2012-09-04 10:44:03 +0200 | [diff] [blame] | 164 | }; |
Maxime Ripard | 223d1f9 | 2012-09-04 10:44:03 +0200 | [diff] [blame] | 165 | }; |
| 166 | |
Maxime Ripard | db84c03 | 2012-08-31 16:00:41 +0200 | [diff] [blame] | 167 | apbx@80040000 { |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 168 | pwm: pwm@80064000 { |
| 169 | pinctrl-names = "default", "default"; |
| 170 | pinctrl-1 = <&pwm3_pins_b>; |
| 171 | status = "okay"; |
| 172 | }; |
| 173 | |
Maxime Ripard | db84c03 | 2012-08-31 16:00:41 +0200 | [diff] [blame] | 174 | i2c1: i2c@8005a000 { |
| 175 | pinctrl-names = "default"; |
| 176 | pinctrl-0 = <&i2c1_pins_a>; |
| 177 | status = "okay"; |
| 178 | }; |
Maxime Ripard | 186e3d9 | 2012-09-03 16:15:25 +0200 | [diff] [blame] | 179 | |
Maxime Ripard | 06e9eff | 2012-10-25 18:23:54 +0200 | [diff] [blame] | 180 | i2cmux { |
| 181 | compatible = "i2c-mux-gpio"; |
| 182 | #address-cells = <1>; |
| 183 | #size-cells = <0>; |
| 184 | mux-gpios = <&gpio1 22 0 &gpio1 23 0>; |
| 185 | i2c-parent = <&i2c1>; |
| 186 | |
| 187 | i2c@0 { |
| 188 | reg = <0>; |
| 189 | }; |
| 190 | |
| 191 | i2c@1 { |
| 192 | reg = <1>; |
| 193 | }; |
| 194 | |
| 195 | i2c@2 { |
| 196 | reg = <2>; |
| 197 | }; |
| 198 | |
| 199 | i2c@3 { |
| 200 | reg = <3>; |
Maxime Ripard | 5b615fb | 2012-11-20 15:33:35 +0100 | [diff] [blame] | 201 | #address-cells = <1>; |
| 202 | #size-cells = <0>; |
| 203 | |
| 204 | pca9555: pca9555@20 { |
| 205 | compatible = "nxp,pca9555"; |
| 206 | interrupt-parent = <&gpio2>; |
| 207 | interrupts = <19 0x2>; |
| 208 | gpio-controller; |
| 209 | #gpio-cells = <2>; |
| 210 | interrupt-controller; |
| 211 | #interrupt-cells = <2>; |
| 212 | reg = <0x20>; |
| 213 | }; |
Maxime Ripard | 06e9eff | 2012-10-25 18:23:54 +0200 | [diff] [blame] | 214 | }; |
| 215 | }; |
| 216 | |
Maxime Ripard | 186e3d9 | 2012-09-03 16:15:25 +0200 | [diff] [blame] | 217 | usbphy1: usbphy@8007e000 { |
| 218 | status = "okay"; |
| 219 | }; |
Alexandre Belloni | ac77bc2 | 2013-04-05 14:33:02 +0200 | [diff] [blame^] | 220 | |
| 221 | lradc@80050000 { |
| 222 | status = "okay"; |
| 223 | fsl,lradc-touchscreen-wires = <4>; |
| 224 | }; |
Maxime Ripard | 186e3d9 | 2012-09-03 16:15:25 +0200 | [diff] [blame] | 225 | }; |
| 226 | }; |
| 227 | |
| 228 | ahb@80080000 { |
| 229 | usb1: usb@80090000 { |
| 230 | vbus-supply = <®_usb1_vbus>; |
| 231 | pinctrl-0 = <&usbphy1_pins_a>; |
| 232 | pinctrl-names = "default"; |
| 233 | status = "okay"; |
| 234 | }; |
| 235 | }; |
| 236 | |
| 237 | regulators { |
| 238 | compatible = "simple-bus"; |
| 239 | |
| 240 | reg_usb1_vbus: usb1_vbus { |
| 241 | compatible = "regulator-fixed"; |
| 242 | regulator-name = "usb1_vbus"; |
| 243 | regulator-min-microvolt = <5000000>; |
| 244 | regulator-max-microvolt = <5000000>; |
| 245 | gpio = <&gpio0 7 1>; |
Maxime Ripard | db84c03 | 2012-08-31 16:00:41 +0200 | [diff] [blame] | 246 | }; |
| 247 | }; |
Maxime Ripard | 8eec4b3 | 2012-10-07 10:36:28 +0800 | [diff] [blame] | 248 | |
| 249 | ahb@80080000 { |
| 250 | mac0: ethernet@800f0000 { |
| 251 | phy-mode = "rmii"; |
| 252 | pinctrl-names = "default"; |
| 253 | pinctrl-0 = <&mac0_pins_a>; |
| 254 | phy-reset-gpios = <&gpio2 21 0>; |
| 255 | phy-reset-duration = <100>; |
| 256 | status = "okay"; |
| 257 | }; |
| 258 | }; |
Maxime Ripard | 7ecc70a | 2013-01-25 09:39:35 +0100 | [diff] [blame] | 259 | |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 260 | spi2 { |
| 261 | compatible = "spi-gpio"; |
| 262 | pinctrl-names = "default"; |
| 263 | pinctrl-0 = <&spi2_pins_cfa10049>; |
| 264 | status = "okay"; |
| 265 | gpio-sck = <&gpio2 16 0>; |
| 266 | gpio-mosi = <&gpio2 17 0>; |
| 267 | gpio-miso = <&gpio2 18 0>; |
| 268 | cs-gpios = <&gpio3 23 0>; |
| 269 | num-chipselects = <1>; |
| 270 | #address-cells = <1>; |
| 271 | #size-cells = <0>; |
| 272 | |
| 273 | hx8357: hx8357@0 { |
| 274 | compatible = "himax,hx8357b", "himax,hx8357"; |
| 275 | reg = <0>; |
| 276 | spi-max-frequency = <100000>; |
| 277 | spi-cpol; |
| 278 | spi-cpha; |
| 279 | gpios-reset = <&gpio3 30 0>; |
| 280 | im-gpios = <&gpio5 4 0 &gpio5 5 0 &gpio5 6 0>; |
| 281 | }; |
| 282 | }; |
| 283 | |
Maxime Ripard | 7ecc70a | 2013-01-25 09:39:35 +0100 | [diff] [blame] | 284 | spi3 { |
| 285 | compatible = "spi-gpio"; |
| 286 | pinctrl-names = "default"; |
| 287 | pinctrl-0 = <&spi3_pins_cfa10049>; |
| 288 | status = "okay"; |
| 289 | gpio-sck = <&gpio0 24 0>; |
| 290 | gpio-mosi = <&gpio0 28 0>; |
| 291 | cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>; |
| 292 | num-chipselects = <3>; |
| 293 | #address-cells = <1>; |
| 294 | #size-cells = <0>; |
| 295 | |
| 296 | gpio5: gpio5@0 { |
| 297 | compatible = "fairchild,74hc595"; |
| 298 | gpio-controller; |
| 299 | #gpio-cells = <2>; |
| 300 | reg = <0>; |
| 301 | registers-number = <2>; |
| 302 | spi-max-frequency = <100000>; |
| 303 | }; |
| 304 | |
| 305 | gpio6: gpio6@1 { |
| 306 | compatible = "fairchild,74hc595"; |
| 307 | gpio-controller; |
| 308 | #gpio-cells = <2>; |
| 309 | reg = <1>; |
| 310 | registers-number = <4>; |
| 311 | spi-max-frequency = <100000>; |
| 312 | }; |
| 313 | |
| 314 | dac0: dh2228@2 { |
| 315 | compatible = "rohm,dh2228fv"; |
| 316 | reg = <2>; |
| 317 | spi-max-frequency = <100000>; |
| 318 | }; |
| 319 | }; |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 320 | |
Maxime Ripard | a640cf6 | 2013-01-31 11:00:23 +0100 | [diff] [blame] | 321 | gpio_keys { |
| 322 | compatible = "gpio-keys"; |
| 323 | #address-cells = <1>; |
| 324 | #size-cells = <0>; |
| 325 | |
| 326 | rotary_button { |
| 327 | label = "rotary_button"; |
| 328 | gpios = <&gpio3 26 1>; |
| 329 | debounce-interval = <10>; |
| 330 | linux,code = <28>; |
| 331 | }; |
| 332 | }; |
| 333 | |
Maxime Ripard | 0943b96 | 2013-01-31 11:00:24 +0100 | [diff] [blame] | 334 | rotary { |
| 335 | compatible = "rotary-encoder"; |
| 336 | gpios = <&gpio3 24 1>, <&gpio3 25 1>; |
| 337 | linux,axis = <1>; /* REL_Y */ |
| 338 | rotary-encoder,relative-axis; |
| 339 | }; |
| 340 | |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 341 | backlight { |
| 342 | compatible = "pwm-backlight"; |
| 343 | pwms = <&pwm 3 5000000>; |
| 344 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 345 | default-brightness-level = <6>; |
Alexandre Belloni | 7d40340 | 2013-03-29 19:46:41 +0100 | [diff] [blame] | 346 | |
| 347 | }; |
| 348 | |
| 349 | onewire@0 { |
| 350 | compatible = "w1-gpio"; |
| 351 | pinctrl-names = "default"; |
| 352 | pinctrl-0 = <&w1_gpio_pins>; |
| 353 | status = "okay"; |
| 354 | gpios = <&gpio1 21 0>; |
Maxime Ripard | 1fe4274 | 2013-01-25 09:54:07 +0100 | [diff] [blame] | 355 | }; |
Maxime Ripard | db84c03 | 2012-08-31 16:00:41 +0200 | [diff] [blame] | 356 | }; |