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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Terje Bergstrom4231c6b2013-03-22 16:34:05 +020010#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000012
Thierry Redinge1e90642013-09-24 13:59:01 +020013#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
Mikko Perttunenad926012016-12-14 13:16:11 +020015#include <linux/iova.h>
Thierry Redingfb36d0ee2015-04-27 15:12:39 +020016#include <linux/of_gpio.h>
Thierry Redinge1e90642013-09-24 13:59:01 +020017
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018#include <drm/drmP.h>
19#include <drm/drm_crtc_helper.h>
20#include <drm/drm_edid.h>
Laurent Pinchart93382032016-11-28 20:51:09 +020021#include <drm/drm_encoder.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000022#include <drm/drm_fb_helper.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000023#include <drm/drm_fixed.h>
24
Thierry Redingc134f012014-06-03 14:48:12 +020025#include "gem.h"
26
Stephen Warrenca480802013-11-06 16:20:54 -070027struct reset_control;
28
Arto Merilainende2ba662013-03-22 16:34:08 +020029struct tegra_fb {
30 struct drm_framebuffer base;
31 struct tegra_bo **planes;
32 unsigned int num_planes;
33};
34
Archit Tanejab110ef32015-10-27 13:40:59 +053035#ifdef CONFIG_DRM_FBDEV_EMULATION
Arto Merilainende2ba662013-03-22 16:34:08 +020036struct tegra_fbdev {
37 struct drm_fb_helper base;
38 struct tegra_fb *fb;
39};
Thierry Reding60c2f702013-10-31 13:28:50 +010040#endif
Arto Merilainende2ba662013-03-22 16:34:08 +020041
Thierry Reding386a2a72013-09-24 13:22:17 +020042struct tegra_drm {
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000043 struct drm_device *drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000044
Thierry Redingdf06b752014-06-26 21:41:53 +020045 struct iommu_domain *domain;
Thierry Reding347ad49d2017-03-09 20:04:56 +010046 struct mutex mm_lock;
Thierry Redingdf06b752014-06-26 21:41:53 +020047 struct drm_mm mm;
48
Mikko Perttunenad926012016-12-14 13:16:11 +020049 struct {
50 struct iova_domain domain;
51 unsigned long shift;
52 unsigned long limit;
53 } carveout;
54
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000055 struct mutex clients_lock;
56 struct list_head clients;
57
Archit Tanejab110ef32015-10-27 13:40:59 +053058#ifdef CONFIG_DRM_FBDEV_EMULATION
Arto Merilainende2ba662013-03-22 16:34:08 +020059 struct tegra_fbdev *fbdev;
Thierry Reding60c2f702013-10-31 13:28:50 +010060#endif
Thierry Redingd1f3e1e2014-07-11 08:29:14 +020061
62 unsigned int pitch_align;
Thierry Reding1503ca42014-11-24 17:41:23 +010063
64 struct {
65 struct drm_atomic_state *state;
66 struct work_struct work;
67 struct mutex lock;
68 } commit;
Thierry Reding986c58d2015-08-11 13:11:49 +020069
70 struct drm_atomic_state *state;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000071};
72
Thierry Reding53fa7f72013-09-24 15:35:40 +020073struct tegra_drm_client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000074
Thierry Redingc88c3632013-09-26 16:08:22 +020075struct tegra_drm_context {
Thierry Reding53fa7f72013-09-24 15:35:40 +020076 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020077 struct host1x_channel *channel;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +010078 unsigned int id;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020079};
80
Thierry Reding53fa7f72013-09-24 15:35:40 +020081struct tegra_drm_client_ops {
82 int (*open_channel)(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020083 struct tegra_drm_context *context);
84 void (*close_channel)(struct tegra_drm_context *context);
Thierry Redingc40f0f12013-10-10 11:00:33 +020085 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
Thierry Redingc88c3632013-09-26 16:08:22 +020086 int (*submit)(struct tegra_drm_context *context,
Terje Bergstromd43f81c2013-03-22 16:34:09 +020087 struct drm_tegra_submit *args, struct drm_device *drm,
88 struct drm_file *file);
89};
90
Thierry Redingc40f0f12013-10-10 11:00:33 +020091int tegra_drm_submit(struct tegra_drm_context *context,
92 struct drm_tegra_submit *args, struct drm_device *drm,
93 struct drm_file *file);
94
Thierry Reding53fa7f72013-09-24 15:35:40 +020095struct tegra_drm_client {
96 struct host1x_client base;
Thierry Reding776dc382013-10-14 14:43:22 +020097 struct list_head list;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000098
Thierry Reding53fa7f72013-09-24 15:35:40 +020099 const struct tegra_drm_client_ops *ops;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000100};
101
Thierry Reding53fa7f72013-09-24 15:35:40 +0200102static inline struct tegra_drm_client *
Thierry Reding776dc382013-10-14 14:43:22 +0200103host1x_to_drm_client(struct host1x_client *client)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200104{
105 return container_of(client, struct tegra_drm_client, base);
106}
107
Thierry Reding688c59a2014-04-16 09:54:21 +0200108int tegra_drm_register_client(struct tegra_drm *tegra,
109 struct tegra_drm_client *client);
110int tegra_drm_unregister_client(struct tegra_drm *tegra,
111 struct tegra_drm_client *client);
Thierry Reding776dc382013-10-14 14:43:22 +0200112
Thierry Reding688c59a2014-04-16 09:54:21 +0200113int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
114int tegra_drm_exit(struct tegra_drm *tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000115
Mikko Perttunenad926012016-12-14 13:16:11 +0200116void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *iova);
117void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
118 dma_addr_t iova);
119
Thierry Reding8620fc62013-12-12 11:03:59 +0100120struct tegra_dc_soc_info;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000121struct tegra_output;
122
Thierry Reding791ddb12015-07-28 21:27:05 +0200123struct tegra_dc_stats {
124 unsigned long frames;
125 unsigned long vblank;
126 unsigned long underflow;
127 unsigned long overflow;
128};
129
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000130struct tegra_dc {
Thierry Reding776dc382013-10-14 14:43:22 +0200131 struct host1x_client client;
Thierry Reding42e9ce02015-01-28 14:43:05 +0100132 struct host1x_syncpt *syncpt;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000133 struct device *dev;
Thierry Redingd18d3032013-09-26 16:09:19 +0200134 spinlock_t lock;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000135
136 struct drm_crtc base;
Jon Hunter70293ed2016-02-11 18:03:22 +0000137 unsigned int powergate;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000138 int pipe;
139
140 struct clk *clk;
Stephen Warrenca480802013-11-06 16:20:54 -0700141 struct reset_control *rst;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000142 void __iomem *regs;
143 int irq;
144
145 struct tegra_output *rgb;
146
Thierry Reding791ddb12015-07-28 21:27:05 +0200147 struct tegra_dc_stats stats;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000148 struct list_head list;
149
150 struct drm_info_list *debugfs_files;
151 struct drm_minor *minor;
152 struct dentry *debugfs;
Thierry Reding3c03c462012-11-28 12:00:18 +0100153
154 /* page-flip handling */
155 struct drm_pending_vblank_event *event;
Thierry Reding8620fc62013-12-12 11:03:59 +0100156
157 const struct tegra_dc_soc_info *soc;
Thierry Redingdf06b752014-06-26 21:41:53 +0200158
159 struct iommu_domain *domain;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000160};
161
Thierry Reding53fa7f72013-09-24 15:35:40 +0200162static inline struct tegra_dc *
Thierry Reding776dc382013-10-14 14:43:22 +0200163host1x_client_to_dc(struct host1x_client *client)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000164{
165 return container_of(client, struct tegra_dc, client);
166}
167
168static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
169{
Thierry Reding37826512013-11-08 12:30:37 +0100170 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000171}
172
Thierry Reding03a60562014-10-21 13:48:48 +0200173static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
174 unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000175{
Thierry Reding03a60562014-10-21 13:48:48 +0200176 writel(value, dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000177}
178
Thierry Reding03a60562014-10-21 13:48:48 +0200179static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000180{
Thierry Reding03a60562014-10-21 13:48:48 +0200181 return readl(dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000182}
183
Thierry Redingf34bc782012-11-04 21:47:13 +0100184struct tegra_dc_window {
185 struct {
186 unsigned int x;
187 unsigned int y;
188 unsigned int w;
189 unsigned int h;
190 } src;
191 struct {
192 unsigned int x;
193 unsigned int y;
194 unsigned int w;
195 unsigned int h;
196 } dst;
197 unsigned int bits_per_pixel;
Thierry Redingf34bc782012-11-04 21:47:13 +0100198 unsigned int stride[2];
199 unsigned long base[3];
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200200 bool bottom_up;
Thierry Redingc134f012014-06-03 14:48:12 +0200201
202 struct tegra_bo_tiling tiling;
Thierry Reding8f604f82014-11-28 13:14:55 +0100203 u32 format;
204 u32 swap;
Thierry Redingf34bc782012-11-04 21:47:13 +0100205};
206
207/* from dc.c */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100208u32 tegra_dc_get_vblank_counter(struct tegra_dc *dc);
Thierry Reding688c59a2014-04-16 09:54:21 +0200209void tegra_dc_enable_vblank(struct tegra_dc *dc);
210void tegra_dc_disable_vblank(struct tegra_dc *dc);
Thierry Reding62b9e062014-11-21 17:33:33 +0100211void tegra_dc_commit(struct tegra_dc *dc);
Thierry Redingca915b12014-12-08 16:14:45 +0100212int tegra_dc_state_setup_clock(struct tegra_dc *dc,
213 struct drm_crtc_state *crtc_state,
214 struct clk *clk, unsigned long pclk,
215 unsigned int div);
Thierry Redingf34bc782012-11-04 21:47:13 +0100216
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000217struct tegra_output {
218 struct device_node *of_node;
219 struct device *dev;
220
Thierry Reding9be7d862013-08-30 15:22:36 +0200221 struct drm_panel *panel;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000222 struct i2c_adapter *ddc;
223 const struct edid *edid;
224 unsigned int hpd_irq;
225 int hpd_gpio;
Thierry Redingfb36d0ee2015-04-27 15:12:39 +0200226 enum of_gpio_flags hpd_gpio_flags;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000227
228 struct drm_encoder encoder;
229 struct drm_connector connector;
230};
231
232static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
233{
234 return container_of(e, struct tegra_output, encoder);
235}
236
237static inline struct tegra_output *connector_to_output(struct drm_connector *c)
238{
239 return container_of(c, struct tegra_output, connector);
240}
241
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000242/* from rgb.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200243int tegra_dc_rgb_probe(struct tegra_dc *dc);
244int tegra_dc_rgb_remove(struct tegra_dc *dc);
245int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
246int tegra_dc_rgb_exit(struct tegra_dc *dc);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000247
248/* from output.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200249int tegra_output_probe(struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100250void tegra_output_remove(struct tegra_output *output);
Thierry Reding688c59a2014-04-16 09:54:21 +0200251int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100252void tegra_output_exit(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000253
Thierry Reding132085d2014-11-28 15:38:40 +0100254int tegra_output_connector_get_modes(struct drm_connector *connector);
Thierry Reding132085d2014-11-28 15:38:40 +0100255enum drm_connector_status
256tegra_output_connector_detect(struct drm_connector *connector, bool force);
257void tegra_output_connector_destroy(struct drm_connector *connector);
258
259void tegra_output_encoder_destroy(struct drm_encoder *encoder);
260
Thierry Reding6b6b6042013-11-15 16:06:05 +0100261/* from dpaux.c */
Thierry Reding6b6b6042013-11-15 16:06:05 +0100262struct drm_dp_link;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100263
Thierry Reding9542c232015-07-08 13:39:09 +0200264struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np);
265enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux);
266int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output);
267int drm_dp_aux_detach(struct drm_dp_aux *aux);
268int drm_dp_aux_enable(struct drm_dp_aux *aux);
269int drm_dp_aux_disable(struct drm_dp_aux *aux);
270int drm_dp_aux_prepare(struct drm_dp_aux *aux, u8 encoding);
271int drm_dp_aux_train(struct drm_dp_aux *aux, struct drm_dp_link *link,
272 u8 pattern);
Thierry Reding6b6b6042013-11-15 16:06:05 +0100273
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000274/* from fb.c */
Arto Merilainende2ba662013-03-22 16:34:08 +0200275struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
276 unsigned int index);
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200277bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
Thierry Redingc134f012014-06-03 14:48:12 +0200278int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
279 struct tegra_bo_tiling *tiling);
Thierry Redingf9914212014-11-26 13:03:57 +0100280struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
281 struct drm_file *file,
Ville Syrjälä1eb83452015-11-11 19:11:29 +0200282 const struct drm_mode_fb_cmd2 *cmd);
Thierry Redinge2215322014-06-27 17:19:25 +0200283int tegra_drm_fb_prepare(struct drm_device *drm);
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100284void tegra_drm_fb_free(struct drm_device *drm);
Thierry Reding688c59a2014-04-16 09:54:21 +0200285int tegra_drm_fb_init(struct drm_device *drm);
286void tegra_drm_fb_exit(struct drm_device *drm);
Thierry Reding986c58d2015-08-11 13:11:49 +0200287void tegra_drm_fb_suspend(struct drm_device *drm);
288void tegra_drm_fb_resume(struct drm_device *drm);
Archit Tanejab110ef32015-10-27 13:40:59 +0530289#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding688c59a2014-04-16 09:54:21 +0200290void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
Thierry Redingf9914212014-11-26 13:03:57 +0100291void tegra_fb_output_poll_changed(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100292#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000293
Thierry Reding776dc382013-10-14 14:43:22 +0200294extern struct platform_driver tegra_dc_driver;
295extern struct platform_driver tegra_hdmi_driver;
Thierry Reding473112e2015-09-10 16:07:14 +0200296extern struct platform_driver tegra_dsi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100297extern struct platform_driver tegra_dpaux_driver;
Thierry Reding473112e2015-09-10 16:07:14 +0200298extern struct platform_driver tegra_sor_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200299extern struct platform_driver tegra_gr2d_driver;
Thierry Reding5f60ed02013-02-28 08:08:01 +0100300extern struct platform_driver tegra_gr3d_driver;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000301
Terje Bergstrom4231c6b2013-03-22 16:34:05 +0200302#endif /* HOST1X_DRM_H */