blob: 2caba440316728ec75e1c4f85849978394c7deef [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025
26static char *dev_info = "ath9k";
27
28MODULE_AUTHOR("Atheros Communications");
29MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31MODULE_LICENSE("Dual BSD/GPL");
32
33static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40};
41
42static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44{
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53}
54
55static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57{
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90}
91
92
93static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97{
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133}
134
135static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138{
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200143 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200182 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200187 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700188 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200189 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700207 return 0;
208}
209
210static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
211{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700212 int freeslot;
213
Sujithff9b6622008-08-14 13:27:16 +0530214 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700215 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216}
217
218static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
219{
Sujith60653672008-08-14 13:28:02 +0530220#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700222
223 ht_info->ht_supported = 1;
224 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
Tomas Winkler00c5ae22008-09-03 11:26:42 +0800225 |(u16)IEEE80211_HT_CAP_SM_PS
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700226 |(u16)IEEE80211_HT_CAP_SGI_40
227 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
228
Sujith60653672008-08-14 13:28:02 +0530229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700231 /* setup supported mcs set */
232 memset(ht_info->supp_mcs_set, 0, 16);
233 ht_info->supp_mcs_set[0] = 0xff;
234 ht_info->supp_mcs_set[1] = 0xff;
235 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
236}
237
238static int ath_rate2idx(struct ath_softc *sc, int rate)
239{
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
242
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
245
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
248 break;
249 }
250
251 /*
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
258 */
259 if (i == n_rates)
260 return n_rates - 1;
261 return i;
262}
263
264static void ath9k_rx_prepare(struct ath_softc *sc,
265 struct sk_buff *skb,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
268{
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
271
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
273
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
277 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
281 rx_status->qual = status->rssi * 100 / 64;
282
283 if (status->flags & ATH_RX_MIC_ERROR)
284 rx_status->flag |= RX_FLAG_MMIC_ERROR;
285 if (status->flags & ATH_RX_FCS_ERROR)
286 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
287
288 rx_status->flag |= RX_FLAG_TSFT;
289}
290
291static u8 parse_mpdudensity(u8 mpdudensity)
292{
293 /*
294 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
295 * 0 for no restriction
296 * 1 for 1/4 us
297 * 2 for 1/2 us
298 * 3 for 1 us
299 * 4 for 2 us
300 * 5 for 4 us
301 * 6 for 8 us
302 * 7 for 16 us
303 */
304 switch (mpdudensity) {
305 case 0:
306 return 0;
307 case 1:
308 case 2:
309 case 3:
310 /* Our lower layer calculations limit our precision to
311 1 microsecond */
312 return 1;
313 case 4:
314 return 2;
315 case 5:
316 return 4;
317 case 6:
318 return 8;
319 case 7:
320 return 16;
321 default:
322 return 0;
323 }
324}
325
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530326static void ath9k_ht_conf(struct ath_softc *sc,
327 struct ieee80211_bss_conf *bss_conf)
328{
329#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
330 struct ath_ht_info *ht_info = &sc->sc_ht_info;
331
332 if (bss_conf->assoc_ht) {
333 ht_info->ext_chan_offset =
334 bss_conf->ht_bss_conf->bss_cap &
335 IEEE80211_HT_IE_CHA_SEC_OFFSET;
336
337 if (!(bss_conf->ht_conf->cap &
338 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
339 (bss_conf->ht_bss_conf->bss_cap &
340 IEEE80211_HT_IE_CHA_WIDTH))
341 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
342 else
343 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
344
345 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
346 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
347 bss_conf->ht_conf->ampdu_factor);
348 ht_info->mpdudensity =
349 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
350
351 }
352
353#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
354}
355
356static void ath9k_bss_assoc_info(struct ath_softc *sc,
357 struct ieee80211_bss_conf *bss_conf)
358{
359 struct ieee80211_hw *hw = sc->hw;
360 struct ieee80211_channel *curchan = hw->conf.channel;
361 struct ath_vap *avp;
362 int pos;
363 DECLARE_MAC_BUF(mac);
364
365 if (bss_conf->assoc) {
366 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
367 __func__,
368 bss_conf->aid);
369
370 avp = sc->sc_vaps[0];
371 if (avp == NULL) {
372 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
373 __func__);
374 return;
375 }
376
377 /* New association, store aid */
378 if (avp->av_opmode == ATH9K_M_STA) {
379 sc->sc_curaid = bss_conf->aid;
380 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
381 sc->sc_curaid);
382 }
383
384 /* Configure the beacon */
385 ath_beacon_config(sc, 0);
386 sc->sc_flags |= SC_OP_BEACONS;
387
388 /* Reset rssi stats */
389 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
390 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
391 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
392 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
393
394 /* Update chainmask */
395 ath_update_chainmask(sc, bss_conf->assoc_ht);
396
397 DPRINTF(sc, ATH_DBG_CONFIG,
398 "%s: bssid %s aid 0x%x\n",
399 __func__,
400 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
401
402 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
403 __func__,
404 curchan->center_freq);
405
406 pos = ath_get_channel(sc, curchan);
407 if (pos == -1) {
408 DPRINTF(sc, ATH_DBG_FATAL,
409 "%s: Invalid channel\n", __func__);
410 return;
411 }
412
413 if (hw->conf.ht_conf.ht_supported)
414 sc->sc_ah->ah_channels[pos].chanmode =
415 ath_get_extchanmode(sc, curchan);
416 else
417 sc->sc_ah->ah_channels[pos].chanmode =
418 (curchan->band == IEEE80211_BAND_2GHZ) ?
419 CHANNEL_G : CHANNEL_A;
420
421 /* set h/w channel */
422 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
423 DPRINTF(sc, ATH_DBG_FATAL,
424 "%s: Unable to set channel\n",
425 __func__);
426
427 ath_rate_newstate(sc, avp);
428 /* Update ratectrl about the new state */
429 ath_rc_node_update(hw, avp->rc_node);
430 } else {
431 DPRINTF(sc, ATH_DBG_CONFIG,
432 "%s: Bss Info DISSOC\n", __func__);
433 sc->sc_curaid = 0;
434 }
435}
436
437void ath_get_beaconconfig(struct ath_softc *sc,
438 int if_id,
439 struct ath_beacon_config *conf)
440{
441 struct ieee80211_hw *hw = sc->hw;
442
443 /* fill in beacon config data */
444
445 conf->beacon_interval = hw->conf.beacon_int;
446 conf->listen_interval = 100;
447 conf->dtim_count = 1;
448 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
449}
450
451void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
452 struct ath_xmit_status *tx_status, struct ath_node *an)
453{
454 struct ieee80211_hw *hw = sc->hw;
455 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
456
457 DPRINTF(sc, ATH_DBG_XMIT,
458 "%s: TX complete: skb: %p\n", __func__, skb);
459
460 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
461 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
462 /* free driver's private data area of tx_info */
463 if (tx_info->driver_data[0] != NULL)
464 kfree(tx_info->driver_data[0]);
465 tx_info->driver_data[0] = NULL;
466 }
467
468 if (tx_status->flags & ATH_TX_BAR) {
469 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
470 tx_status->flags &= ~ATH_TX_BAR;
471 }
472
473 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
474 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
475 /* Frame was not ACKed, but an ACK was expected */
476 tx_info->status.excessive_retries = 1;
477 }
478 } else {
479 /* Frame was ACKed */
480 tx_info->flags |= IEEE80211_TX_STAT_ACK;
481 }
482
483 tx_info->status.retry_count = tx_status->retries;
484
485 ieee80211_tx_status(hw, skb);
486 if (an)
487 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
488}
489
490int _ath_rx_indicate(struct ath_softc *sc,
491 struct sk_buff *skb,
492 struct ath_recv_status *status,
493 u16 keyix)
494{
495 struct ieee80211_hw *hw = sc->hw;
496 struct ath_node *an = NULL;
497 struct ieee80211_rx_status rx_status;
498 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
499 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
500 int padsize;
501 enum ATH_RX_TYPE st;
502
503 /* see if any padding is done by the hw and remove it */
504 if (hdrlen & 3) {
505 padsize = hdrlen % 4;
506 memmove(skb->data + padsize, skb->data, hdrlen);
507 skb_pull(skb, padsize);
508 }
509
510 /* Prepare rx status */
511 ath9k_rx_prepare(sc, skb, status, &rx_status);
512
513 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
514 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
515 rx_status.flag |= RX_FLAG_DECRYPTED;
516 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
517 && !(status->flags & ATH_RX_DECRYPT_ERROR)
518 && skb->len >= hdrlen + 4) {
519 keyix = skb->data[hdrlen + 3] >> 6;
520
521 if (test_bit(keyix, sc->sc_keymap))
522 rx_status.flag |= RX_FLAG_DECRYPTED;
523 }
524
525 spin_lock_bh(&sc->node_lock);
526 an = ath_node_find(sc, hdr->addr2);
527 spin_unlock_bh(&sc->node_lock);
528
529 if (an) {
530 ath_rx_input(sc, an,
531 hw->conf.ht_conf.ht_supported,
532 skb, status, &st);
533 }
534 if (!an || (st != ATH_RX_CONSUMED))
535 __ieee80211_rx(hw, skb, &rx_status);
536
537 return 0;
538}
539
540int ath_rx_subframe(struct ath_node *an,
541 struct sk_buff *skb,
542 struct ath_recv_status *status)
543{
544 struct ath_softc *sc = an->an_sc;
545 struct ieee80211_hw *hw = sc->hw;
546 struct ieee80211_rx_status rx_status;
547
548 /* Prepare rx status */
549 ath9k_rx_prepare(sc, skb, status, &rx_status);
550 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
551 rx_status.flag |= RX_FLAG_DECRYPTED;
552
553 __ieee80211_rx(hw, skb, &rx_status);
554
555 return 0;
556}
557
558/********************************/
559/* LED functions */
560/********************************/
561
562static void ath_led_brightness(struct led_classdev *led_cdev,
563 enum led_brightness brightness)
564{
565 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
566 struct ath_softc *sc = led->sc;
567
568 switch (brightness) {
569 case LED_OFF:
570 if (led->led_type == ATH_LED_ASSOC ||
571 led->led_type == ATH_LED_RADIO)
572 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
573 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
574 (led->led_type == ATH_LED_RADIO) ? 1 :
575 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
576 break;
577 case LED_FULL:
578 if (led->led_type == ATH_LED_ASSOC)
579 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
580 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
581 break;
582 default:
583 break;
584 }
585}
586
587static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
588 char *trigger)
589{
590 int ret;
591
592 led->sc = sc;
593 led->led_cdev.name = led->name;
594 led->led_cdev.default_trigger = trigger;
595 led->led_cdev.brightness_set = ath_led_brightness;
596
597 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
598 if (ret)
599 DPRINTF(sc, ATH_DBG_FATAL,
600 "Failed to register led:%s", led->name);
601 else
602 led->registered = 1;
603 return ret;
604}
605
606static void ath_unregister_led(struct ath_led *led)
607{
608 if (led->registered) {
609 led_classdev_unregister(&led->led_cdev);
610 led->registered = 0;
611 }
612}
613
614static void ath_deinit_leds(struct ath_softc *sc)
615{
616 ath_unregister_led(&sc->assoc_led);
617 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
618 ath_unregister_led(&sc->tx_led);
619 ath_unregister_led(&sc->rx_led);
620 ath_unregister_led(&sc->radio_led);
621 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
622}
623
624static void ath_init_leds(struct ath_softc *sc)
625{
626 char *trigger;
627 int ret;
628
629 /* Configure gpio 1 for output */
630 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
631 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
632 /* LED off, active low */
633 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
634
635 trigger = ieee80211_get_radio_led_name(sc->hw);
636 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
637 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
638 ret = ath_register_led(sc, &sc->radio_led, trigger);
639 sc->radio_led.led_type = ATH_LED_RADIO;
640 if (ret)
641 goto fail;
642
643 trigger = ieee80211_get_assoc_led_name(sc->hw);
644 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
645 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
646 ret = ath_register_led(sc, &sc->assoc_led, trigger);
647 sc->assoc_led.led_type = ATH_LED_ASSOC;
648 if (ret)
649 goto fail;
650
651 trigger = ieee80211_get_tx_led_name(sc->hw);
652 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
653 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
654 ret = ath_register_led(sc, &sc->tx_led, trigger);
655 sc->tx_led.led_type = ATH_LED_TX;
656 if (ret)
657 goto fail;
658
659 trigger = ieee80211_get_rx_led_name(sc->hw);
660 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
661 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
662 ret = ath_register_led(sc, &sc->rx_led, trigger);
663 sc->rx_led.led_type = ATH_LED_RX;
664 if (ret)
665 goto fail;
666
667 return;
668
669fail:
670 ath_deinit_leds(sc);
671}
672
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530673#ifdef CONFIG_RFKILL
674/*******************/
675/* Rfkill */
676/*******************/
677
678static void ath_radio_enable(struct ath_softc *sc)
679{
680 struct ath_hal *ah = sc->sc_ah;
681 int status;
682
683 spin_lock_bh(&sc->sc_resetlock);
684 if (!ath9k_hw_reset(ah, ah->ah_curchan,
685 sc->sc_ht_info.tx_chan_width,
686 sc->sc_tx_chainmask,
687 sc->sc_rx_chainmask,
688 sc->sc_ht_extprotspacing,
689 false, &status)) {
690 DPRINTF(sc, ATH_DBG_FATAL,
691 "%s: unable to reset channel %u (%uMhz) "
692 "flags 0x%x hal status %u\n", __func__,
693 ath9k_hw_mhz2ieee(ah,
694 ah->ah_curchan->channel,
695 ah->ah_curchan->channelFlags),
696 ah->ah_curchan->channel,
697 ah->ah_curchan->channelFlags, status);
698 }
699 spin_unlock_bh(&sc->sc_resetlock);
700
701 ath_update_txpow(sc);
702 if (ath_startrecv(sc) != 0) {
703 DPRINTF(sc, ATH_DBG_FATAL,
704 "%s: unable to restart recv logic\n", __func__);
705 return;
706 }
707
708 if (sc->sc_flags & SC_OP_BEACONS)
709 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
710
711 /* Re-Enable interrupts */
712 ath9k_hw_set_interrupts(ah, sc->sc_imask);
713
714 /* Enable LED */
715 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
716 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
717 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
718
719 ieee80211_wake_queues(sc->hw);
720}
721
722static void ath_radio_disable(struct ath_softc *sc)
723{
724 struct ath_hal *ah = sc->sc_ah;
725 int status;
726
727
728 ieee80211_stop_queues(sc->hw);
729
730 /* Disable LED */
731 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
732 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
733
734 /* Disable interrupts */
735 ath9k_hw_set_interrupts(ah, 0);
736
737 ath_draintxq(sc, false); /* clear pending tx frames */
738 ath_stoprecv(sc); /* turn off frame recv */
739 ath_flushrecv(sc); /* flush recv queue */
740
741 spin_lock_bh(&sc->sc_resetlock);
742 if (!ath9k_hw_reset(ah, ah->ah_curchan,
743 sc->sc_ht_info.tx_chan_width,
744 sc->sc_tx_chainmask,
745 sc->sc_rx_chainmask,
746 sc->sc_ht_extprotspacing,
747 false, &status)) {
748 DPRINTF(sc, ATH_DBG_FATAL,
749 "%s: unable to reset channel %u (%uMhz) "
750 "flags 0x%x hal status %u\n", __func__,
751 ath9k_hw_mhz2ieee(ah,
752 ah->ah_curchan->channel,
753 ah->ah_curchan->channelFlags),
754 ah->ah_curchan->channel,
755 ah->ah_curchan->channelFlags, status);
756 }
757 spin_unlock_bh(&sc->sc_resetlock);
758
759 ath9k_hw_phy_disable(ah);
760 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
761}
762
763static bool ath_is_rfkill_set(struct ath_softc *sc)
764{
765 struct ath_hal *ah = sc->sc_ah;
766
767 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
768 ah->ah_rfkill_polarity;
769}
770
771/* h/w rfkill poll function */
772static void ath_rfkill_poll(struct work_struct *work)
773{
774 struct ath_softc *sc = container_of(work, struct ath_softc,
775 rf_kill.rfkill_poll.work);
776 bool radio_on;
777
778 if (sc->sc_flags & SC_OP_INVALID)
779 return;
780
781 radio_on = !ath_is_rfkill_set(sc);
782
783 /*
784 * enable/disable radio only when there is a
785 * state change in RF switch
786 */
787 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
788 enum rfkill_state state;
789
790 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
791 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
792 : RFKILL_STATE_HARD_BLOCKED;
793 } else if (radio_on) {
794 ath_radio_enable(sc);
795 state = RFKILL_STATE_UNBLOCKED;
796 } else {
797 ath_radio_disable(sc);
798 state = RFKILL_STATE_HARD_BLOCKED;
799 }
800
801 if (state == RFKILL_STATE_HARD_BLOCKED)
802 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
803 else
804 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
805
806 rfkill_force_state(sc->rf_kill.rfkill, state);
807 }
808
809 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
810 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
811}
812
813/* s/w rfkill handler */
814static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
815{
816 struct ath_softc *sc = data;
817
818 switch (state) {
819 case RFKILL_STATE_SOFT_BLOCKED:
820 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
821 SC_OP_RFKILL_SW_BLOCKED)))
822 ath_radio_disable(sc);
823 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
824 return 0;
825 case RFKILL_STATE_UNBLOCKED:
826 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
827 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
828 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
829 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
830 "radio as it is disabled by h/w \n");
831 return -EPERM;
832 }
833 ath_radio_enable(sc);
834 }
835 return 0;
836 default:
837 return -EINVAL;
838 }
839}
840
841/* Init s/w rfkill */
842static int ath_init_sw_rfkill(struct ath_softc *sc)
843{
844 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
845 RFKILL_TYPE_WLAN);
846 if (!sc->rf_kill.rfkill) {
847 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
848 return -ENOMEM;
849 }
850
851 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
852 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
853 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
854 sc->rf_kill.rfkill->data = sc;
855 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
856 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
857 sc->rf_kill.rfkill->user_claim_unsupported = 1;
858
859 return 0;
860}
861
862/* Deinitialize rfkill */
863static void ath_deinit_rfkill(struct ath_softc *sc)
864{
865 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
866 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
867
868 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
869 rfkill_unregister(sc->rf_kill.rfkill);
870 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
871 sc->rf_kill.rfkill = NULL;
872 }
873}
874#endif /* CONFIG_RFKILL */
875
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530876static int ath_detach(struct ath_softc *sc)
877{
878 struct ieee80211_hw *hw = sc->hw;
879
880 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
881
882 /* Deinit LED control */
883 ath_deinit_leds(sc);
884
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530885#ifdef CONFIG_RFKILL
886 /* deinit rfkill */
887 ath_deinit_rfkill(sc);
888#endif
889
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530890 /* Unregister hw */
891
892 ieee80211_unregister_hw(hw);
893
894 /* unregister Rate control */
895 ath_rate_control_unregister();
896
897 /* tx/rx cleanup */
898
899 ath_rx_cleanup(sc);
900 ath_tx_cleanup(sc);
901
902 /* Deinit */
903
904 ath_deinit(sc);
905
906 return 0;
907}
908
909static int ath_attach(u16 devid,
910 struct ath_softc *sc)
911{
912 struct ieee80211_hw *hw = sc->hw;
913 int error = 0;
914
915 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
916
917 error = ath_init(devid, sc);
918 if (error != 0)
919 return error;
920
921 /* Init nodes */
922
923 INIT_LIST_HEAD(&sc->node_list);
924 spin_lock_init(&sc->node_lock);
925
926 /* get mac address from hardware and set in mac80211 */
927
928 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
929
930 /* setup channels and rates */
931
932 sc->sbands[IEEE80211_BAND_2GHZ].channels =
933 sc->channels[IEEE80211_BAND_2GHZ];
934 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
935 sc->rates[IEEE80211_BAND_2GHZ];
936 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
937
938 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
939 /* Setup HT capabilities for 2.4Ghz*/
940 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
941
942 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
943 &sc->sbands[IEEE80211_BAND_2GHZ];
944
945 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
946 sc->sbands[IEEE80211_BAND_5GHZ].channels =
947 sc->channels[IEEE80211_BAND_5GHZ];
948 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
949 sc->rates[IEEE80211_BAND_5GHZ];
950 sc->sbands[IEEE80211_BAND_5GHZ].band =
951 IEEE80211_BAND_5GHZ;
952
953 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
954 /* Setup HT capabilities for 5Ghz*/
955 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
956
957 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
958 &sc->sbands[IEEE80211_BAND_5GHZ];
959 }
960
961 /* FIXME: Have to figure out proper hw init values later */
962
963 hw->queues = 4;
964 hw->ampdu_queues = 1;
965
966 /* Register rate control */
967 hw->rate_control_algorithm = "ath9k_rate_control";
968 error = ath_rate_control_register();
969 if (error != 0) {
970 DPRINTF(sc, ATH_DBG_FATAL,
971 "%s: Unable to register rate control "
972 "algorithm:%d\n", __func__, error);
973 ath_rate_control_unregister();
974 goto bad;
975 }
976
977 error = ieee80211_register_hw(hw);
978 if (error != 0) {
979 ath_rate_control_unregister();
980 goto bad;
981 }
982
983 /* Initialize LED control */
984 ath_init_leds(sc);
985
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530986#ifdef CONFIG_RFKILL
987 /* Initialze h/w Rfkill */
988 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
989 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
990
991 /* Initialize s/w rfkill */
992 if (ath_init_sw_rfkill(sc))
993 goto detach;
994#endif
995
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530996 /* initialize tx/rx engine */
997
998 error = ath_tx_init(sc, ATH_TXBUF);
999 if (error != 0)
1000 goto detach;
1001
1002 error = ath_rx_init(sc, ATH_RXBUF);
1003 if (error != 0)
1004 goto detach;
1005
1006 return 0;
1007detach:
1008 ath_detach(sc);
1009bad:
1010 return error;
1011}
1012
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001013static int ath9k_start(struct ieee80211_hw *hw)
1014{
1015 struct ath_softc *sc = hw->priv;
1016 struct ieee80211_channel *curchan = hw->conf.channel;
1017 int error = 0, pos;
1018
1019 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1020 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1021
1022 /* setup initial channel */
1023
1024 pos = ath_get_channel(sc, curchan);
1025 if (pos == -1) {
1026 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1027 return -EINVAL;
1028 }
1029
1030 sc->sc_ah->ah_channels[pos].chanmode =
1031 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1032
1033 /* open ath_dev */
1034 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1035 if (error) {
1036 DPRINTF(sc, ATH_DBG_FATAL,
1037 "%s: Unable to complete ath_open\n", __func__);
1038 return error;
1039 }
1040
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301041#ifdef CONFIG_RFKILL
1042 /* Start rfkill polling */
1043 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1044 queue_delayed_work(sc->hw->workqueue,
1045 &sc->rf_kill.rfkill_poll, 0);
1046
1047 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1048 if (rfkill_register(sc->rf_kill.rfkill)) {
1049 DPRINTF(sc, ATH_DBG_FATAL,
1050 "Unable to register rfkill\n");
1051 rfkill_free(sc->rf_kill.rfkill);
1052
1053 /* Deinitialize the device */
1054 if (sc->pdev->irq)
1055 free_irq(sc->pdev->irq, sc);
1056 ath_detach(sc);
1057 pci_iounmap(sc->pdev, sc->mem);
1058 pci_release_region(sc->pdev, 0);
1059 pci_disable_device(sc->pdev);
1060 ieee80211_free_hw(hw);
1061 return -EIO;
1062 } else {
1063 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1064 }
1065 }
1066#endif
1067
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001068 ieee80211_wake_queues(hw);
1069 return 0;
1070}
1071
1072static int ath9k_tx(struct ieee80211_hw *hw,
1073 struct sk_buff *skb)
1074{
1075 struct ath_softc *sc = hw->priv;
1076 int hdrlen, padsize;
Jouni Malinen147583c2008-08-11 14:01:50 +03001077 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1078
1079 /*
1080 * As a temporary workaround, assign seq# here; this will likely need
1081 * to be cleaned up to work better with Beacon transmission and virtual
1082 * BSSes.
1083 */
1084 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1085 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1086 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1087 sc->seq_no += 0x10;
1088 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1089 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1090 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001091
1092 /* Add the padding after the header if this is not already done */
1093 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1094 if (hdrlen & 3) {
1095 padsize = hdrlen % 4;
1096 if (skb_headroom(skb) < padsize)
1097 return -1;
1098 skb_push(skb, padsize);
1099 memmove(skb->data, skb->data + padsize, hdrlen);
1100 }
1101
1102 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1103 __func__,
1104 skb);
1105
1106 if (ath_tx_start(sc, skb) != 0) {
1107 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1108 dev_kfree_skb_any(skb);
1109 /* FIXME: Check for proper return value from ATH_DEV */
1110 return 0;
1111 }
1112
1113 return 0;
1114}
1115
1116static void ath9k_stop(struct ieee80211_hw *hw)
1117{
1118 struct ath_softc *sc = hw->priv;
1119 int error;
1120
1121 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1122
1123 error = ath_suspend(sc);
1124 if (error)
1125 DPRINTF(sc, ATH_DBG_CONFIG,
1126 "%s: Device is no longer present\n", __func__);
1127
1128 ieee80211_stop_queues(hw);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301129
1130#ifdef CONFIG_RFKILL
1131 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1132 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1133#endif
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001134}
1135
1136static int ath9k_add_interface(struct ieee80211_hw *hw,
1137 struct ieee80211_if_init_conf *conf)
1138{
1139 struct ath_softc *sc = hw->priv;
1140 int error, ic_opmode = 0;
1141
1142 /* Support only vap for now */
1143
1144 if (sc->sc_nvaps)
1145 return -ENOBUFS;
1146
1147 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001148 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001149 ic_opmode = ATH9K_M_STA;
1150 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001151 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001152 ic_opmode = ATH9K_M_IBSS;
1153 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001154 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001155 ic_opmode = ATH9K_M_HOSTAP;
1156 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001157 default:
1158 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001159 "%s: Interface type %d not yet supported\n",
1160 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001161 return -EOPNOTSUPP;
1162 }
1163
1164 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1165 __func__,
1166 ic_opmode);
1167
1168 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1169 if (error) {
1170 DPRINTF(sc, ATH_DBG_FATAL,
1171 "%s: Unable to attach vap, error: %d\n",
1172 __func__, error);
1173 return error;
1174 }
1175
1176 return 0;
1177}
1178
1179static void ath9k_remove_interface(struct ieee80211_hw *hw,
1180 struct ieee80211_if_init_conf *conf)
1181{
1182 struct ath_softc *sc = hw->priv;
1183 struct ath_vap *avp;
1184 int error;
1185
1186 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1187
1188 avp = sc->sc_vaps[0];
1189 if (avp == NULL) {
1190 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1191 __func__);
1192 return;
1193 }
1194
1195#ifdef CONFIG_SLOW_ANT_DIV
1196 ath_slow_ant_div_stop(&sc->sc_antdiv);
1197#endif
1198
1199 /* Update ratectrl */
1200 ath_rate_newstate(sc, avp);
1201
1202 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301203 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1204 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001205 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1206 ath_beacon_return(sc, avp);
1207 }
1208
1209 /* Set interrupt mask */
1210 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1211 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
Sujith672840a2008-08-11 14:05:08 +05301212 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001213
1214 error = ath_vap_detach(sc, 0);
1215 if (error)
1216 DPRINTF(sc, ATH_DBG_FATAL,
1217 "%s: Unable to detach vap, error: %d\n",
1218 __func__, error);
1219}
1220
1221static int ath9k_config(struct ieee80211_hw *hw,
1222 struct ieee80211_conf *conf)
1223{
1224 struct ath_softc *sc = hw->priv;
1225 struct ieee80211_channel *curchan = hw->conf.channel;
1226 int pos;
1227
1228 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1229 __func__,
1230 curchan->center_freq);
1231
1232 pos = ath_get_channel(sc, curchan);
1233 if (pos == -1) {
1234 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1235 return -EINVAL;
1236 }
1237
1238 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301239 (curchan->band == IEEE80211_BAND_2GHZ) ?
1240 CHANNEL_G : CHANNEL_A;
1241
1242 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
1243 sc->sc_ah->ah_channels[pos].chanmode =
1244 ath_get_extchanmode(sc, curchan);
1245
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001246 sc->sc_config.txpowlimit = 2 * conf->power_level;
1247
1248 /* set h/w channel */
1249 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1250 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1251 __func__);
1252
1253 return 0;
1254}
1255
1256static int ath9k_config_interface(struct ieee80211_hw *hw,
1257 struct ieee80211_vif *vif,
1258 struct ieee80211_if_conf *conf)
1259{
1260 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001261 struct ath_hal *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001262 struct ath_vap *avp;
1263 u32 rfilt = 0;
1264 int error, i;
1265 DECLARE_MAC_BUF(mac);
1266
1267 avp = sc->sc_vaps[0];
1268 if (avp == NULL) {
1269 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1270 __func__);
1271 return -EINVAL;
1272 }
1273
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001274 /* TODO: Need to decide which hw opmode to use for multi-interface
1275 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001276 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001277 ah->ah_opmode != ATH9K_M_HOSTAP) {
1278 ah->ah_opmode = ATH9K_M_HOSTAP;
1279 ath9k_hw_setopmode(ah);
1280 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1281 /* Request full reset to get hw opmode changed properly */
1282 sc->sc_flags |= SC_OP_FULL_RESET;
1283 }
1284
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001285 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1286 !is_zero_ether_addr(conf->bssid)) {
1287 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001288 case NL80211_IFTYPE_STATION:
1289 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001290 /* Update ratectrl about the new state */
1291 ath_rate_newstate(sc, avp);
1292
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001293 /* Set BSSID */
1294 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1295 sc->sc_curaid = 0;
1296 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1297 sc->sc_curaid);
1298
1299 /* Set aggregation protection mode parameters */
1300 sc->sc_config.ath_aggr_prot = 0;
1301
1302 /*
1303 * Reset our TSF so that its value is lower than the
1304 * beacon that we are trying to catch.
1305 * Only then hw will update its TSF register with the
1306 * new beacon. Reset the TSF before setting the BSSID
1307 * to avoid allowing in any frames that would update
1308 * our TSF only to have us clear it
1309 * immediately thereafter.
1310 */
1311 ath9k_hw_reset_tsf(sc->sc_ah);
1312
1313 /* Disable BMISS interrupt when we're not associated */
1314 ath9k_hw_set_interrupts(sc->sc_ah,
1315 sc->sc_imask &
1316 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1317 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1318
1319 DPRINTF(sc, ATH_DBG_CONFIG,
1320 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
1321 __func__, rfilt,
1322 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
1323
1324 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301325 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001326
1327 break;
1328 default:
1329 break;
1330 }
1331 }
1332
1333 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001334 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1335 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001336 /*
1337 * Allocate and setup the beacon frame.
1338 *
1339 * Stop any previous beacon DMA. This may be
1340 * necessary, for example, when an ibss merge
1341 * causes reconfiguration; we may be called
1342 * with beacon transmission active.
1343 */
1344 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1345
1346 error = ath_beacon_alloc(sc, 0);
1347 if (error != 0)
1348 return error;
1349
1350 ath_beacon_sync(sc, 0);
1351 }
1352
1353 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Johannes Berg05c914f2008-09-11 00:01:58 +02001354 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001355 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1356 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1357 ath9k_hw_keysetmac(sc->sc_ah,
1358 (u16)i,
1359 sc->sc_curbssid);
1360 }
1361
1362 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001363 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001364 ath_update_chainmask(sc, 0);
1365
1366 return 0;
1367}
1368
1369#define SUPPORTED_FILTERS \
1370 (FIF_PROMISC_IN_BSS | \
1371 FIF_ALLMULTI | \
1372 FIF_CONTROL | \
1373 FIF_OTHER_BSS | \
1374 FIF_BCN_PRBRESP_PROMISC | \
1375 FIF_FCSFAIL)
1376
Sujith7dcfdcd2008-08-11 14:03:13 +05301377/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001378static void ath9k_configure_filter(struct ieee80211_hw *hw,
1379 unsigned int changed_flags,
1380 unsigned int *total_flags,
1381 int mc_count,
1382 struct dev_mc_list *mclist)
1383{
1384 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301385 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001386
1387 changed_flags &= SUPPORTED_FILTERS;
1388 *total_flags &= SUPPORTED_FILTERS;
1389
Sujith7dcfdcd2008-08-11 14:03:13 +05301390 sc->rx_filter = *total_flags;
1391 rfilt = ath_calcrxfilter(sc);
1392 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1393
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001394 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1395 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301396 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001397 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301398
1399 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1400 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001401}
1402
1403static void ath9k_sta_notify(struct ieee80211_hw *hw,
1404 struct ieee80211_vif *vif,
1405 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001406 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001407{
1408 struct ath_softc *sc = hw->priv;
1409 struct ath_node *an;
1410 unsigned long flags;
1411 DECLARE_MAC_BUF(mac);
1412
1413 spin_lock_irqsave(&sc->node_lock, flags);
Johannes Berg17741cd2008-09-11 00:02:02 +02001414 an = ath_node_find(sc, sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001415 spin_unlock_irqrestore(&sc->node_lock, flags);
1416
1417 switch (cmd) {
1418 case STA_NOTIFY_ADD:
1419 spin_lock_irqsave(&sc->node_lock, flags);
1420 if (!an) {
Johannes Berg17741cd2008-09-11 00:02:02 +02001421 ath_node_attach(sc, sta->addr, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001422 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
Johannes Berg17741cd2008-09-11 00:02:02 +02001423 __func__, print_mac(mac, sta->addr));
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001424 } else {
Johannes Berg17741cd2008-09-11 00:02:02 +02001425 ath_node_get(sc, sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001426 }
1427 spin_unlock_irqrestore(&sc->node_lock, flags);
1428 break;
1429 case STA_NOTIFY_REMOVE:
1430 if (!an)
1431 DPRINTF(sc, ATH_DBG_FATAL,
1432 "%s: Removal of a non-existent node\n",
1433 __func__);
1434 else {
1435 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1436 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
1437 __func__,
Johannes Berg17741cd2008-09-11 00:02:02 +02001438 print_mac(mac, sta->addr));
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001439 }
1440 break;
1441 default:
1442 break;
1443 }
1444}
1445
1446static int ath9k_conf_tx(struct ieee80211_hw *hw,
1447 u16 queue,
1448 const struct ieee80211_tx_queue_params *params)
1449{
1450 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301451 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001452 int ret = 0, qnum;
1453
1454 if (queue >= WME_NUM_AC)
1455 return 0;
1456
1457 qi.tqi_aifs = params->aifs;
1458 qi.tqi_cwmin = params->cw_min;
1459 qi.tqi_cwmax = params->cw_max;
1460 qi.tqi_burstTime = params->txop;
1461 qnum = ath_get_hal_qnum(queue, sc);
1462
1463 DPRINTF(sc, ATH_DBG_CONFIG,
1464 "%s: Configure tx [queue/halq] [%d/%d], "
1465 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1466 __func__,
1467 queue,
1468 qnum,
1469 params->aifs,
1470 params->cw_min,
1471 params->cw_max,
1472 params->txop);
1473
1474 ret = ath_txq_update(sc, qnum, &qi);
1475 if (ret)
1476 DPRINTF(sc, ATH_DBG_FATAL,
1477 "%s: TXQ Update failed\n", __func__);
1478
1479 return ret;
1480}
1481
1482static int ath9k_set_key(struct ieee80211_hw *hw,
1483 enum set_key_cmd cmd,
1484 const u8 *local_addr,
1485 const u8 *addr,
1486 struct ieee80211_key_conf *key)
1487{
1488 struct ath_softc *sc = hw->priv;
1489 int ret = 0;
1490
1491 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1492
1493 switch (cmd) {
1494 case SET_KEY:
1495 ret = ath_key_config(sc, addr, key);
1496 if (!ret) {
1497 set_bit(key->keyidx, sc->sc_keymap);
1498 key->hw_key_idx = key->keyidx;
1499 /* push IV and Michael MIC generation to stack */
1500 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301501 if (key->alg == ALG_TKIP)
1502 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001503 }
1504 break;
1505 case DISABLE_KEY:
1506 ath_key_delete(sc, key);
1507 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001508 break;
1509 default:
1510 ret = -EINVAL;
1511 }
1512
1513 return ret;
1514}
1515
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001516static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1517 struct ieee80211_vif *vif,
1518 struct ieee80211_bss_conf *bss_conf,
1519 u32 changed)
1520{
1521 struct ath_softc *sc = hw->priv;
1522
1523 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1524 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1525 __func__,
1526 bss_conf->use_short_preamble);
1527 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301528 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001529 else
Sujith672840a2008-08-11 14:05:08 +05301530 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001531 }
1532
1533 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1534 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1535 __func__,
1536 bss_conf->use_cts_prot);
1537 if (bss_conf->use_cts_prot &&
1538 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301539 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001540 else
Sujith672840a2008-08-11 14:05:08 +05301541 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001542 }
1543
1544 if (changed & BSS_CHANGED_HT) {
1545 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
1546 __func__,
1547 bss_conf->assoc_ht);
1548 ath9k_ht_conf(sc, bss_conf);
1549 }
1550
1551 if (changed & BSS_CHANGED_ASSOC) {
1552 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1553 __func__,
1554 bss_conf->assoc);
1555 ath9k_bss_assoc_info(sc, bss_conf);
1556 }
1557}
1558
1559static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1560{
1561 u64 tsf;
1562 struct ath_softc *sc = hw->priv;
1563 struct ath_hal *ah = sc->sc_ah;
1564
1565 tsf = ath9k_hw_gettsf64(ah);
1566
1567 return tsf;
1568}
1569
1570static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1571{
1572 struct ath_softc *sc = hw->priv;
1573 struct ath_hal *ah = sc->sc_ah;
1574
1575 ath9k_hw_reset_tsf(ah);
1576}
1577
1578static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1579 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001580 struct ieee80211_sta *sta,
1581 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001582{
1583 struct ath_softc *sc = hw->priv;
1584 int ret = 0;
1585
1586 switch (action) {
1587 case IEEE80211_AMPDU_RX_START:
Johannes Berg17741cd2008-09-11 00:02:02 +02001588 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001589 if (ret < 0)
1590 DPRINTF(sc, ATH_DBG_FATAL,
1591 "%s: Unable to start RX aggregation\n",
1592 __func__);
1593 break;
1594 case IEEE80211_AMPDU_RX_STOP:
Johannes Berg17741cd2008-09-11 00:02:02 +02001595 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001596 if (ret < 0)
1597 DPRINTF(sc, ATH_DBG_FATAL,
1598 "%s: Unable to stop RX aggregation\n",
1599 __func__);
1600 break;
1601 case IEEE80211_AMPDU_TX_START:
Johannes Berg17741cd2008-09-11 00:02:02 +02001602 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001603 if (ret < 0)
1604 DPRINTF(sc, ATH_DBG_FATAL,
1605 "%s: Unable to start TX aggregation\n",
1606 __func__);
1607 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001608 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001609 break;
1610 case IEEE80211_AMPDU_TX_STOP:
Johannes Berg17741cd2008-09-11 00:02:02 +02001611 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001612 if (ret < 0)
1613 DPRINTF(sc, ATH_DBG_FATAL,
1614 "%s: Unable to stop TX aggregation\n",
1615 __func__);
1616
Johannes Berg17741cd2008-09-11 00:02:02 +02001617 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001618 break;
1619 default:
1620 DPRINTF(sc, ATH_DBG_FATAL,
1621 "%s: Unknown AMPDU action\n", __func__);
1622 }
1623
1624 return ret;
1625}
1626
1627static struct ieee80211_ops ath9k_ops = {
1628 .tx = ath9k_tx,
1629 .start = ath9k_start,
1630 .stop = ath9k_stop,
1631 .add_interface = ath9k_add_interface,
1632 .remove_interface = ath9k_remove_interface,
1633 .config = ath9k_config,
1634 .config_interface = ath9k_config_interface,
1635 .configure_filter = ath9k_configure_filter,
1636 .get_stats = NULL,
1637 .sta_notify = ath9k_sta_notify,
1638 .conf_tx = ath9k_conf_tx,
1639 .get_tx_stats = NULL,
1640 .bss_info_changed = ath9k_bss_info_changed,
1641 .set_tim = NULL,
1642 .set_key = ath9k_set_key,
1643 .hw_scan = NULL,
1644 .get_tkip_seq = NULL,
1645 .set_rts_threshold = NULL,
1646 .set_frag_threshold = NULL,
1647 .set_retry_limit = NULL,
1648 .get_tsf = ath9k_get_tsf,
1649 .reset_tsf = ath9k_reset_tsf,
1650 .tx_last_beacon = NULL,
1651 .ampdu_action = ath9k_ampdu_action
1652};
1653
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001654static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1655{
1656 void __iomem *mem;
1657 struct ath_softc *sc;
1658 struct ieee80211_hw *hw;
1659 const char *athname;
1660 u8 csz;
1661 u32 val;
1662 int ret = 0;
1663
1664 if (pci_enable_device(pdev))
1665 return -EIO;
1666
1667 /* XXX 32-bit addressing only */
1668 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1669 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1670 ret = -ENODEV;
1671 goto bad;
1672 }
1673
1674 /*
1675 * Cache line size is used to size and align various
1676 * structures used to communicate with the hardware.
1677 */
1678 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1679 if (csz == 0) {
1680 /*
1681 * Linux 2.4.18 (at least) writes the cache line size
1682 * register as a 16-bit wide register which is wrong.
1683 * We must have this setup properly for rx buffer
1684 * DMA to work so force a reasonable value here if it
1685 * comes up zero.
1686 */
1687 csz = L1_CACHE_BYTES / sizeof(u32);
1688 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1689 }
1690 /*
1691 * The default setting of latency timer yields poor results,
1692 * set it to the value used by other systems. It may be worth
1693 * tweaking this setting more.
1694 */
1695 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1696
1697 pci_set_master(pdev);
1698
1699 /*
1700 * Disable the RETRY_TIMEOUT register (0x41) to keep
1701 * PCI Tx retries from interfering with C3 CPU state.
1702 */
1703 pci_read_config_dword(pdev, 0x40, &val);
1704 if ((val & 0x0000ff00) != 0)
1705 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1706
1707 ret = pci_request_region(pdev, 0, "ath9k");
1708 if (ret) {
1709 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1710 ret = -ENODEV;
1711 goto bad;
1712 }
1713
1714 mem = pci_iomap(pdev, 0, 0);
1715 if (!mem) {
1716 printk(KERN_ERR "PCI memory map error\n") ;
1717 ret = -EIO;
1718 goto bad1;
1719 }
1720
1721 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1722 if (hw == NULL) {
1723 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1724 goto bad2;
1725 }
1726
Sujith19b73c72008-08-14 13:28:20 +05301727 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
Jouni Malinene022edb2008-08-22 17:31:33 +03001728 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
Sujith19b73c72008-08-14 13:28:20 +05301729 IEEE80211_HW_SIGNAL_DBM |
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001730 IEEE80211_HW_NOISE_DBM;
1731
Luis R. Rodriguezf59ac042008-08-29 16:26:43 -07001732 hw->wiphy->interface_modes =
1733 BIT(NL80211_IFTYPE_AP) |
1734 BIT(NL80211_IFTYPE_STATION) |
1735 BIT(NL80211_IFTYPE_ADHOC);
1736
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001737 SET_IEEE80211_DEV(hw, &pdev->dev);
1738 pci_set_drvdata(pdev, hw);
1739
1740 sc = hw->priv;
1741 sc->hw = hw;
1742 sc->pdev = pdev;
1743 sc->mem = mem;
1744
1745 if (ath_attach(id->device, sc) != 0) {
1746 ret = -ENODEV;
1747 goto bad3;
1748 }
1749
1750 /* setup interrupt service routine */
1751
1752 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1753 printk(KERN_ERR "%s: request_irq failed\n",
1754 wiphy_name(hw->wiphy));
1755 ret = -EIO;
1756 goto bad4;
1757 }
1758
1759 athname = ath9k_hw_probe(id->vendor, id->device);
1760
1761 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1762 wiphy_name(hw->wiphy),
1763 athname ? athname : "Atheros ???",
1764 (unsigned long)mem, pdev->irq);
1765
1766 return 0;
1767bad4:
1768 ath_detach(sc);
1769bad3:
1770 ieee80211_free_hw(hw);
1771bad2:
1772 pci_iounmap(pdev, mem);
1773bad1:
1774 pci_release_region(pdev, 0);
1775bad:
1776 pci_disable_device(pdev);
1777 return ret;
1778}
1779
1780static void ath_pci_remove(struct pci_dev *pdev)
1781{
1782 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1783 struct ath_softc *sc = hw->priv;
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301784 enum ath9k_int status;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001785
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301786 if (pdev->irq) {
1787 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1788 /* clear the ISR */
1789 ath9k_hw_getisr(sc->sc_ah, &status);
David S. Millerb262e602008-10-01 06:12:56 -07001790 sc->sc_flags |= SC_OP_INVALID;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001791 free_irq(pdev->irq, sc);
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301792 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001793 ath_detach(sc);
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301794
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001795 pci_iounmap(pdev, sc->mem);
1796 pci_release_region(pdev, 0);
1797 pci_disable_device(pdev);
1798 ieee80211_free_hw(hw);
1799}
1800
1801#ifdef CONFIG_PM
1802
1803static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1804{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301805 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1806 struct ath_softc *sc = hw->priv;
1807
1808 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301809
1810#ifdef CONFIG_RFKILL
1811 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1812 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1813#endif
1814
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001815 pci_save_state(pdev);
1816 pci_disable_device(pdev);
1817 pci_set_power_state(pdev, 3);
1818
1819 return 0;
1820}
1821
1822static int ath_pci_resume(struct pci_dev *pdev)
1823{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301824 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1825 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001826 u32 val;
1827 int err;
1828
1829 err = pci_enable_device(pdev);
1830 if (err)
1831 return err;
1832 pci_restore_state(pdev);
1833 /*
1834 * Suspend/Resume resets the PCI configuration space, so we have to
1835 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1836 * PCI Tx retries from interfering with C3 CPU state
1837 */
1838 pci_read_config_dword(pdev, 0x40, &val);
1839 if ((val & 0x0000ff00) != 0)
1840 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1841
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301842 /* Enable LED */
1843 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1844 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1845 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1846
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301847#ifdef CONFIG_RFKILL
1848 /*
1849 * check the h/w rfkill state on resume
1850 * and start the rfkill poll timer
1851 */
1852 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1853 queue_delayed_work(sc->hw->workqueue,
1854 &sc->rf_kill.rfkill_poll, 0);
1855#endif
1856
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001857 return 0;
1858}
1859
1860#endif /* CONFIG_PM */
1861
1862MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1863
1864static struct pci_driver ath_pci_driver = {
1865 .name = "ath9k",
1866 .id_table = ath_pci_id_table,
1867 .probe = ath_pci_probe,
1868 .remove = ath_pci_remove,
1869#ifdef CONFIG_PM
1870 .suspend = ath_pci_suspend,
1871 .resume = ath_pci_resume,
1872#endif /* CONFIG_PM */
1873};
1874
1875static int __init init_ath_pci(void)
1876{
1877 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1878
1879 if (pci_register_driver(&ath_pci_driver) < 0) {
1880 printk(KERN_ERR
1881 "ath_pci: No devices found, driver not installed.\n");
1882 pci_unregister_driver(&ath_pci_driver);
1883 return -ENODEV;
1884 }
1885
1886 return 0;
1887}
1888module_init(init_ath_pci);
1889
1890static void __exit exit_ath_pci(void)
1891{
1892 pci_unregister_driver(&ath_pci_driver);
1893 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1894}
1895module_exit(exit_ath_pci);