Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Distributed Switch Architecture loopback driver |
| 3 | * |
| 4 | * Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/netdevice.h> |
| 14 | #include <linux/phy.h> |
| 15 | #include <linux/phy_fixed.h> |
| 16 | #include <linux/export.h> |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 17 | #include <linux/ethtool.h> |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 18 | #include <linux/workqueue.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/if_bridge.h> |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 21 | #include <net/dsa.h> |
| 22 | |
| 23 | #include "dsa_loop.h" |
| 24 | |
| 25 | struct dsa_loop_vlan { |
| 26 | u16 members; |
| 27 | u16 untagged; |
| 28 | }; |
| 29 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 30 | struct dsa_loop_mib_entry { |
| 31 | char name[ETH_GSTRING_LEN]; |
| 32 | unsigned long val; |
| 33 | }; |
| 34 | |
| 35 | enum dsa_loop_mib_counters { |
| 36 | DSA_LOOP_PHY_READ_OK, |
| 37 | DSA_LOOP_PHY_READ_ERR, |
| 38 | DSA_LOOP_PHY_WRITE_OK, |
| 39 | DSA_LOOP_PHY_WRITE_ERR, |
| 40 | __DSA_LOOP_CNT_MAX, |
| 41 | }; |
| 42 | |
| 43 | static struct dsa_loop_mib_entry dsa_loop_mibs[] = { |
| 44 | [DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", }, |
| 45 | [DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", }, |
| 46 | [DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", }, |
| 47 | [DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", }, |
| 48 | }; |
| 49 | |
| 50 | struct dsa_loop_port { |
| 51 | struct dsa_loop_mib_entry mib[__DSA_LOOP_CNT_MAX]; |
| 52 | }; |
| 53 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 54 | #define DSA_LOOP_VLANS 5 |
| 55 | |
| 56 | struct dsa_loop_priv { |
| 57 | struct mii_bus *bus; |
| 58 | unsigned int port_base; |
| 59 | struct dsa_loop_vlan vlans[DSA_LOOP_VLANS]; |
| 60 | struct net_device *netdev; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 61 | struct dsa_loop_port ports[DSA_MAX_PORTS]; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 62 | u16 pvid; |
| 63 | }; |
| 64 | |
| 65 | static struct phy_device *phydevs[PHY_MAX_ADDR]; |
| 66 | |
Florian Fainelli | 5ed4e3e | 2017-11-10 15:22:52 -0800 | [diff] [blame] | 67 | static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds, |
| 68 | int port) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 69 | { |
| 70 | dev_dbg(ds->dev, "%s\n", __func__); |
| 71 | |
| 72 | return DSA_TAG_PROTO_NONE; |
| 73 | } |
| 74 | |
| 75 | static int dsa_loop_setup(struct dsa_switch *ds) |
| 76 | { |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 77 | struct dsa_loop_priv *ps = ds->priv; |
| 78 | unsigned int i; |
| 79 | |
| 80 | for (i = 0; i < ds->num_ports; i++) |
| 81 | memcpy(ps->ports[i].mib, dsa_loop_mibs, |
| 82 | sizeof(dsa_loop_mibs)); |
| 83 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 84 | dev_dbg(ds->dev, "%s\n", __func__); |
| 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | |
Andrew Lunn | 88c0605 | 2018-03-01 02:02:27 +0100 | [diff] [blame] | 89 | static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port) |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 90 | { |
| 91 | return __DSA_LOOP_CNT_MAX; |
| 92 | } |
| 93 | |
| 94 | static void dsa_loop_get_strings(struct dsa_switch *ds, int port, uint8_t *data) |
| 95 | { |
| 96 | struct dsa_loop_priv *ps = ds->priv; |
| 97 | unsigned int i; |
| 98 | |
| 99 | for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) |
| 100 | memcpy(data + i * ETH_GSTRING_LEN, |
| 101 | ps->ports[port].mib[i].name, ETH_GSTRING_LEN); |
| 102 | } |
| 103 | |
| 104 | static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port, |
| 105 | uint64_t *data) |
| 106 | { |
| 107 | struct dsa_loop_priv *ps = ds->priv; |
| 108 | unsigned int i; |
| 109 | |
| 110 | for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) |
| 111 | data[i] = ps->ports[port].mib[i].val; |
| 112 | } |
| 113 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 114 | static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum) |
| 115 | { |
| 116 | struct dsa_loop_priv *ps = ds->priv; |
| 117 | struct mii_bus *bus = ps->bus; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 118 | int ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 119 | |
| 120 | dev_dbg(ds->dev, "%s\n", __func__); |
| 121 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 122 | ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); |
| 123 | if (ret < 0) |
| 124 | ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++; |
| 125 | else |
| 126 | ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++; |
| 127 | |
| 128 | return ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | static int dsa_loop_phy_write(struct dsa_switch *ds, int port, |
| 132 | int regnum, u16 value) |
| 133 | { |
| 134 | struct dsa_loop_priv *ps = ds->priv; |
| 135 | struct mii_bus *bus = ps->bus; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 136 | int ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 137 | |
| 138 | dev_dbg(ds->dev, "%s\n", __func__); |
| 139 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 140 | ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); |
| 141 | if (ret < 0) |
| 142 | ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++; |
| 143 | else |
| 144 | ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++; |
| 145 | |
| 146 | return ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port, |
| 150 | struct net_device *bridge) |
| 151 | { |
| 152 | dev_dbg(ds->dev, "%s\n", __func__); |
| 153 | |
| 154 | return 0; |
| 155 | } |
| 156 | |
| 157 | static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port, |
| 158 | struct net_device *bridge) |
| 159 | { |
| 160 | dev_dbg(ds->dev, "%s\n", __func__); |
| 161 | } |
| 162 | |
| 163 | static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port, |
| 164 | u8 state) |
| 165 | { |
| 166 | dev_dbg(ds->dev, "%s\n", __func__); |
| 167 | } |
| 168 | |
| 169 | static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port, |
| 170 | bool vlan_filtering) |
| 171 | { |
| 172 | dev_dbg(ds->dev, "%s\n", __func__); |
| 173 | |
| 174 | return 0; |
| 175 | } |
| 176 | |
Vivien Didelot | 80e0236 | 2017-11-30 11:23:57 -0500 | [diff] [blame] | 177 | static int |
| 178 | dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port, |
| 179 | const struct switchdev_obj_port_vlan *vlan) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 180 | { |
| 181 | struct dsa_loop_priv *ps = ds->priv; |
| 182 | struct mii_bus *bus = ps->bus; |
| 183 | |
| 184 | dev_dbg(ds->dev, "%s\n", __func__); |
| 185 | |
| 186 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 187 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 188 | |
| 189 | if (vlan->vid_end > DSA_LOOP_VLANS) |
| 190 | return -ERANGE; |
| 191 | |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | static void dsa_loop_port_vlan_add(struct dsa_switch *ds, int port, |
Vivien Didelot | 80e0236 | 2017-11-30 11:23:57 -0500 | [diff] [blame] | 196 | const struct switchdev_obj_port_vlan *vlan) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 197 | { |
| 198 | bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; |
| 199 | bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; |
| 200 | struct dsa_loop_priv *ps = ds->priv; |
| 201 | struct mii_bus *bus = ps->bus; |
| 202 | struct dsa_loop_vlan *vl; |
| 203 | u16 vid; |
| 204 | |
| 205 | dev_dbg(ds->dev, "%s\n", __func__); |
| 206 | |
| 207 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 208 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 209 | |
| 210 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { |
| 211 | vl = &ps->vlans[vid]; |
| 212 | |
| 213 | vl->members |= BIT(port); |
| 214 | if (untagged) |
| 215 | vl->untagged |= BIT(port); |
| 216 | else |
| 217 | vl->untagged &= ~BIT(port); |
| 218 | } |
| 219 | |
| 220 | if (pvid) |
| 221 | ps->pvid = vid; |
| 222 | } |
| 223 | |
| 224 | static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port, |
| 225 | const struct switchdev_obj_port_vlan *vlan) |
| 226 | { |
| 227 | bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; |
| 228 | struct dsa_loop_priv *ps = ds->priv; |
| 229 | struct mii_bus *bus = ps->bus; |
| 230 | struct dsa_loop_vlan *vl; |
Florian Fainelli | 5865ccc | 2017-04-05 11:19:30 -0700 | [diff] [blame] | 231 | u16 vid, pvid = ps->pvid; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 232 | |
| 233 | dev_dbg(ds->dev, "%s\n", __func__); |
| 234 | |
| 235 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 236 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 237 | |
| 238 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { |
| 239 | vl = &ps->vlans[vid]; |
| 240 | |
| 241 | vl->members &= ~BIT(port); |
| 242 | if (untagged) |
| 243 | vl->untagged &= ~BIT(port); |
| 244 | |
| 245 | if (pvid == vid) |
| 246 | pvid = 1; |
| 247 | } |
| 248 | ps->pvid = pvid; |
| 249 | |
| 250 | return 0; |
| 251 | } |
| 252 | |
Bhumika Goyal | d78d677 | 2017-08-09 10:34:15 +0530 | [diff] [blame] | 253 | static const struct dsa_switch_ops dsa_loop_driver = { |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 254 | .get_tag_protocol = dsa_loop_get_protocol, |
| 255 | .setup = dsa_loop_setup, |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 256 | .get_strings = dsa_loop_get_strings, |
| 257 | .get_ethtool_stats = dsa_loop_get_ethtool_stats, |
| 258 | .get_sset_count = dsa_loop_get_sset_count, |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 259 | .phy_read = dsa_loop_phy_read, |
| 260 | .phy_write = dsa_loop_phy_write, |
| 261 | .port_bridge_join = dsa_loop_port_bridge_join, |
| 262 | .port_bridge_leave = dsa_loop_port_bridge_leave, |
| 263 | .port_stp_state_set = dsa_loop_port_stp_state_set, |
| 264 | .port_vlan_filtering = dsa_loop_port_vlan_filtering, |
| 265 | .port_vlan_prepare = dsa_loop_port_vlan_prepare, |
| 266 | .port_vlan_add = dsa_loop_port_vlan_add, |
| 267 | .port_vlan_del = dsa_loop_port_vlan_del, |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 268 | }; |
| 269 | |
| 270 | static int dsa_loop_drv_probe(struct mdio_device *mdiodev) |
| 271 | { |
| 272 | struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data; |
| 273 | struct dsa_loop_priv *ps; |
| 274 | struct dsa_switch *ds; |
| 275 | |
| 276 | if (!pdata) |
| 277 | return -ENODEV; |
| 278 | |
| 279 | dev_info(&mdiodev->dev, "%s: 0x%0x\n", |
| 280 | pdata->name, pdata->enabled_ports); |
| 281 | |
| 282 | ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS); |
| 283 | if (!ds) |
| 284 | return -ENOMEM; |
| 285 | |
| 286 | ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL); |
Christophe Jaillet | 8ce7aaa | 2017-05-06 07:29:45 +0200 | [diff] [blame] | 287 | if (!ps) |
| 288 | return -ENOMEM; |
| 289 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 290 | ps->netdev = dev_get_by_name(&init_net, pdata->netdev); |
| 291 | if (!ps->netdev) |
| 292 | return -EPROBE_DEFER; |
| 293 | |
| 294 | pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev; |
| 295 | |
| 296 | ds->dev = &mdiodev->dev; |
| 297 | ds->ops = &dsa_loop_driver; |
| 298 | ds->priv = ps; |
| 299 | ps->bus = mdiodev->bus; |
| 300 | |
| 301 | dev_set_drvdata(&mdiodev->dev, ds); |
| 302 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 303 | return dsa_register_switch(ds); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | static void dsa_loop_drv_remove(struct mdio_device *mdiodev) |
| 307 | { |
| 308 | struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); |
| 309 | struct dsa_loop_priv *ps = ds->priv; |
| 310 | |
| 311 | dsa_unregister_switch(ds); |
| 312 | dev_put(ps->netdev); |
| 313 | } |
| 314 | |
| 315 | static struct mdio_driver dsa_loop_drv = { |
| 316 | .mdiodrv.driver = { |
| 317 | .name = "dsa-loop", |
| 318 | }, |
| 319 | .probe = dsa_loop_drv_probe, |
| 320 | .remove = dsa_loop_drv_remove, |
| 321 | }; |
| 322 | |
| 323 | #define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2) |
| 324 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 325 | static int __init dsa_loop_init(void) |
| 326 | { |
| 327 | struct fixed_phy_status status = { |
| 328 | .link = 1, |
| 329 | .speed = SPEED_100, |
| 330 | .duplex = DUPLEX_FULL, |
| 331 | }; |
| 332 | unsigned int i; |
| 333 | |
| 334 | for (i = 0; i < NUM_FIXED_PHYS; i++) |
| 335 | phydevs[i] = fixed_phy_register(PHY_POLL, &status, -1, NULL); |
| 336 | |
| 337 | return mdio_driver_register(&dsa_loop_drv); |
| 338 | } |
| 339 | module_init(dsa_loop_init); |
| 340 | |
| 341 | static void __exit dsa_loop_exit(void) |
| 342 | { |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 343 | unsigned int i; |
| 344 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 345 | mdio_driver_unregister(&dsa_loop_drv); |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 346 | for (i = 0; i < NUM_FIXED_PHYS; i++) |
Florian Fainelli | 6d9c153 | 2017-09-02 08:56:45 -0700 | [diff] [blame] | 347 | if (!IS_ERR(phydevs[i])) |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 348 | fixed_phy_unregister(phydevs[i]); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 349 | } |
| 350 | module_exit(dsa_loop_exit); |
| 351 | |
| 352 | MODULE_LICENSE("GPL"); |
| 353 | MODULE_AUTHOR("Florian Fainelli"); |
| 354 | MODULE_DESCRIPTION("DSA loopback driver"); |