| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 18 | #include <linux/sysfs.h> |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 19 | #include <linux/delay.h> |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 20 | #include <linux/list.h> |
| 21 | #include <linux/acpi.h> |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 22 | #include <linux/sort.h> |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 23 | #include <linux/io.h> |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 24 | #include <linux/nd.h> |
| Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 26 | #include "nfit.h" |
| 27 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 28 | /* |
| 29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 30 | * irrelevant. |
| 31 | */ |
| Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 33 | |
| Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 34 | static bool force_enable_dimms; |
| 35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 37 | |
| Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 38 | static bool disable_vendor_specific; |
| 39 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 40 | MODULE_PARM_DESC(disable_vendor_specific, |
| Linda Knippers | f2668fa | 2017-03-07 16:35:14 -0500 | [diff] [blame] | 41 | "Limit commands to the publicly specified set"); |
| Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 42 | |
| Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 43 | static unsigned long override_dsm_mask; |
| 44 | module_param(override_dsm_mask, ulong, S_IRUGO); |
| 45 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); |
| 46 | |
| Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 47 | static int default_dsm_family = -1; |
| 48 | module_param(default_dsm_family, int, S_IRUGO); |
| 49 | MODULE_PARM_DESC(default_dsm_family, |
| 50 | "Try this DSM type first when identifying NVDIMM family"); |
| 51 | |
| Dan Williams | bca811a | 2018-04-02 15:28:03 -0700 | [diff] [blame^] | 52 | static bool no_init_ars; |
| 53 | module_param(no_init_ars, bool, 0644); |
| 54 | MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time"); |
| 55 | |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 56 | LIST_HEAD(acpi_descs); |
| 57 | DEFINE_MUTEX(acpi_desc_lock); |
| 58 | |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 59 | static struct workqueue_struct *nfit_wq; |
| 60 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 61 | struct nfit_table_prev { |
| 62 | struct list_head spas; |
| 63 | struct list_head memdevs; |
| 64 | struct list_head dcrs; |
| 65 | struct list_head bdws; |
| 66 | struct list_head idts; |
| 67 | struct list_head flushes; |
| 68 | }; |
| 69 | |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 70 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 71 | |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 72 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 73 | { |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 74 | return &nfit_uuid[id]; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 75 | } |
| Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 76 | EXPORT_SYMBOL(to_nfit_uuid); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 77 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 78 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 79 | struct nvdimm_bus_descriptor *nd_desc) |
| 80 | { |
| 81 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 82 | } |
| 83 | |
| 84 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 85 | { |
| 86 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 87 | |
| 88 | /* |
| 89 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 90 | * acpi_device. |
| 91 | */ |
| 92 | if (!nd_desc->provider_name |
| 93 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 94 | return NULL; |
| 95 | |
| 96 | return to_acpi_device(acpi_desc->dev); |
| 97 | } |
| 98 | |
| Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 99 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 100 | { |
| Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 101 | struct nd_cmd_clear_error *clear_err; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 102 | struct nd_cmd_ars_status *ars_status; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 103 | u16 flags; |
| 104 | |
| 105 | switch (cmd) { |
| 106 | case ND_CMD_ARS_CAP: |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 107 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 108 | return -ENOTTY; |
| 109 | |
| 110 | /* Command failed */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 111 | if (status & 0xffff) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 112 | return -EIO; |
| 113 | |
| 114 | /* No supported scan types for this range */ |
| 115 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 116 | if ((status >> 16 & flags) == 0) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 117 | return -ENOTTY; |
| Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 118 | return 0; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 119 | case ND_CMD_ARS_START: |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 120 | /* ARS is in progress */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 121 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 122 | return -EBUSY; |
| 123 | |
| 124 | /* Command failed */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 125 | if (status & 0xffff) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 126 | return -EIO; |
| Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 127 | return 0; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 128 | case ND_CMD_ARS_STATUS: |
| 129 | ars_status = buf; |
| 130 | /* Command failed */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 131 | if (status & 0xffff) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 132 | return -EIO; |
| 133 | /* Check extended status (Upper two bytes) */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 134 | if (status == NFIT_ARS_STATUS_DONE) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 135 | return 0; |
| 136 | |
| 137 | /* ARS is in progress */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 138 | if (status == NFIT_ARS_STATUS_BUSY) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 139 | return -EBUSY; |
| 140 | |
| 141 | /* No ARS performed for the current boot */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 142 | if (status == NFIT_ARS_STATUS_NONE) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 143 | return -EAGAIN; |
| 144 | |
| 145 | /* |
| 146 | * ARS interrupted, either we overflowed or some other |
| 147 | * agent wants the scan to stop. If we didn't overflow |
| 148 | * then just continue with the returned results. |
| 149 | */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 150 | if (status == NFIT_ARS_STATUS_INTR) { |
| Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 151 | if (ars_status->out_length >= 40 && (ars_status->flags |
| 152 | & NFIT_ARS_F_OVERFLOW)) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 153 | return -ENOSPC; |
| 154 | return 0; |
| 155 | } |
| 156 | |
| 157 | /* Unknown status */ |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 158 | if (status >> 16) |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 159 | return -EIO; |
| Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 160 | return 0; |
| Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 161 | case ND_CMD_CLEAR_ERROR: |
| 162 | clear_err = buf; |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 163 | if (status & 0xffff) |
| Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 164 | return -EIO; |
| 165 | if (!clear_err->cleared) |
| 166 | return -EIO; |
| 167 | if (clear_err->length > clear_err->cleared) |
| 168 | return clear_err->cleared; |
| Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 169 | return 0; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 170 | default: |
| 171 | break; |
| 172 | } |
| 173 | |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 174 | /* all other non-zero status results in an error */ |
| 175 | if (status) |
| 176 | return -EIO; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 177 | return 0; |
| 178 | } |
| 179 | |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 180 | #define ACPI_LABELS_LOCKED 3 |
| 181 | |
| 182 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 183 | u32 status) |
| Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 184 | { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 185 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 186 | |
| Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 187 | switch (cmd) { |
| 188 | case ND_CMD_GET_CONFIG_SIZE: |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 189 | /* |
| 190 | * In the _LSI, _LSR, _LSW case the locked status is |
| 191 | * communicated via the read/write commands |
| 192 | */ |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 193 | if (nfit_mem->has_lsr) |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 194 | break; |
| 195 | |
| Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 196 | if (status >> 16 & ND_CONFIG_LOCKED) |
| 197 | return -EACCES; |
| 198 | break; |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 199 | case ND_CMD_GET_CONFIG_DATA: |
| 200 | if (nfit_mem->has_lsr && status == ACPI_LABELS_LOCKED) |
| 201 | return -EACCES; |
| 202 | break; |
| 203 | case ND_CMD_SET_CONFIG_DATA: |
| 204 | if (nfit_mem->has_lsw && status == ACPI_LABELS_LOCKED) |
| 205 | return -EACCES; |
| 206 | break; |
| Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 207 | default: |
| 208 | break; |
| 209 | } |
| 210 | |
| 211 | /* all other non-zero status results in an error */ |
| 212 | if (status) |
| 213 | return -EIO; |
| 214 | return 0; |
| 215 | } |
| 216 | |
| Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 217 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 218 | u32 status) |
| 219 | { |
| 220 | if (!nvdimm) |
| 221 | return xlat_bus_status(buf, cmd, status); |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 222 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
| 223 | } |
| 224 | |
| 225 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ |
| 226 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) |
| 227 | { |
| 228 | int i; |
| 229 | void *dst; |
| 230 | size_t size = 0; |
| 231 | union acpi_object *buf = NULL; |
| 232 | |
| 233 | if (pkg->type != ACPI_TYPE_PACKAGE) { |
| 234 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 235 | pkg->type); |
| 236 | goto err; |
| 237 | } |
| 238 | |
| 239 | for (i = 0; i < pkg->package.count; i++) { |
| 240 | union acpi_object *obj = &pkg->package.elements[i]; |
| 241 | |
| 242 | if (obj->type == ACPI_TYPE_INTEGER) |
| 243 | size += 4; |
| 244 | else if (obj->type == ACPI_TYPE_BUFFER) |
| 245 | size += obj->buffer.length; |
| 246 | else { |
| 247 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 248 | obj->type); |
| 249 | goto err; |
| 250 | } |
| 251 | } |
| 252 | |
| 253 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); |
| 254 | if (!buf) |
| 255 | goto err; |
| 256 | |
| 257 | dst = buf + 1; |
| 258 | buf->type = ACPI_TYPE_BUFFER; |
| 259 | buf->buffer.length = size; |
| 260 | buf->buffer.pointer = dst; |
| 261 | for (i = 0; i < pkg->package.count; i++) { |
| 262 | union acpi_object *obj = &pkg->package.elements[i]; |
| 263 | |
| 264 | if (obj->type == ACPI_TYPE_INTEGER) { |
| 265 | memcpy(dst, &obj->integer.value, 4); |
| 266 | dst += 4; |
| 267 | } else if (obj->type == ACPI_TYPE_BUFFER) { |
| 268 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); |
| 269 | dst += obj->buffer.length; |
| 270 | } |
| 271 | } |
| 272 | err: |
| 273 | ACPI_FREE(pkg); |
| 274 | return buf; |
| 275 | } |
| 276 | |
| 277 | static union acpi_object *int_to_buf(union acpi_object *integer) |
| 278 | { |
| 279 | union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4); |
| 280 | void *dst = NULL; |
| 281 | |
| 282 | if (!buf) |
| 283 | goto err; |
| 284 | |
| 285 | if (integer->type != ACPI_TYPE_INTEGER) { |
| 286 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 287 | integer->type); |
| 288 | goto err; |
| 289 | } |
| 290 | |
| 291 | dst = buf + 1; |
| 292 | buf->type = ACPI_TYPE_BUFFER; |
| 293 | buf->buffer.length = 4; |
| 294 | buf->buffer.pointer = dst; |
| 295 | memcpy(dst, &integer->integer.value, 4); |
| 296 | err: |
| 297 | ACPI_FREE(integer); |
| 298 | return buf; |
| 299 | } |
| 300 | |
| 301 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, |
| 302 | u32 len, void *data) |
| 303 | { |
| 304 | acpi_status rc; |
| 305 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 306 | struct acpi_object_list input = { |
| 307 | .count = 3, |
| 308 | .pointer = (union acpi_object []) { |
| 309 | [0] = { |
| 310 | .integer.type = ACPI_TYPE_INTEGER, |
| 311 | .integer.value = offset, |
| 312 | }, |
| 313 | [1] = { |
| 314 | .integer.type = ACPI_TYPE_INTEGER, |
| 315 | .integer.value = len, |
| 316 | }, |
| 317 | [2] = { |
| 318 | .buffer.type = ACPI_TYPE_BUFFER, |
| 319 | .buffer.pointer = data, |
| 320 | .buffer.length = len, |
| 321 | }, |
| 322 | }, |
| 323 | }; |
| 324 | |
| 325 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); |
| 326 | if (ACPI_FAILURE(rc)) |
| 327 | return NULL; |
| 328 | return int_to_buf(buf.pointer); |
| 329 | } |
| 330 | |
| 331 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, |
| 332 | u32 len) |
| 333 | { |
| 334 | acpi_status rc; |
| 335 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 336 | struct acpi_object_list input = { |
| 337 | .count = 2, |
| 338 | .pointer = (union acpi_object []) { |
| 339 | [0] = { |
| 340 | .integer.type = ACPI_TYPE_INTEGER, |
| 341 | .integer.value = offset, |
| 342 | }, |
| 343 | [1] = { |
| 344 | .integer.type = ACPI_TYPE_INTEGER, |
| 345 | .integer.value = len, |
| 346 | }, |
| 347 | }, |
| 348 | }; |
| 349 | |
| 350 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); |
| 351 | if (ACPI_FAILURE(rc)) |
| 352 | return NULL; |
| 353 | return pkg_to_buf(buf.pointer); |
| 354 | } |
| 355 | |
| 356 | static union acpi_object *acpi_label_info(acpi_handle handle) |
| 357 | { |
| 358 | acpi_status rc; |
| 359 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 360 | |
| 361 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); |
| 362 | if (ACPI_FAILURE(rc)) |
| 363 | return NULL; |
| 364 | return pkg_to_buf(buf.pointer); |
| Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 365 | } |
| 366 | |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 367 | static u8 nfit_dsm_revid(unsigned family, unsigned func) |
| 368 | { |
| 369 | static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = { |
| 370 | [NVDIMM_FAMILY_INTEL] = { |
| 371 | [NVDIMM_INTEL_GET_MODES] = 2, |
| 372 | [NVDIMM_INTEL_GET_FWINFO] = 2, |
| 373 | [NVDIMM_INTEL_START_FWUPDATE] = 2, |
| 374 | [NVDIMM_INTEL_SEND_FWUPDATE] = 2, |
| 375 | [NVDIMM_INTEL_FINISH_FWUPDATE] = 2, |
| 376 | [NVDIMM_INTEL_QUERY_FWUPDATE] = 2, |
| 377 | [NVDIMM_INTEL_SET_THRESHOLD] = 2, |
| 378 | [NVDIMM_INTEL_INJECT_ERROR] = 2, |
| 379 | }, |
| 380 | }; |
| 381 | u8 id; |
| 382 | |
| 383 | if (family > NVDIMM_FAMILY_MAX) |
| 384 | return 0; |
| 385 | if (func > 31) |
| 386 | return 0; |
| 387 | id = revid_table[family][func]; |
| 388 | if (id == 0) |
| 389 | return 1; /* default */ |
| 390 | return id; |
| 391 | } |
| 392 | |
| Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 393 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
| 394 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 395 | { |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 396 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 397 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 398 | union acpi_object in_obj, in_buf, *out_obj; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 399 | const struct nd_cmd_desc *desc = NULL; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 400 | struct device *dev = acpi_desc->dev; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 401 | struct nd_cmd_pkg *call_pkg = NULL; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 402 | const char *cmd_name, *dimm_name; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 403 | unsigned long cmd_mask, dsm_mask; |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 404 | u32 offset, fw_status = 0; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 405 | acpi_handle handle; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 406 | unsigned int func; |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 407 | const guid_t *guid; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 408 | int rc, i; |
| 409 | |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 410 | func = cmd; |
| 411 | if (cmd == ND_CMD_CALL) { |
| 412 | call_pkg = buf; |
| 413 | func = call_pkg->nd_command; |
| Meng Xu | 9edcad5 | 2017-09-04 11:34:33 -0400 | [diff] [blame] | 414 | |
| 415 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) |
| 416 | if (call_pkg->nd_reserved2[i]) |
| 417 | return -EINVAL; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 418 | } |
| 419 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 420 | if (nvdimm) { |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 421 | struct acpi_device *adev = nfit_mem->adev; |
| 422 | |
| 423 | if (!adev) |
| 424 | return -ENOTTY; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 425 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
| 426 | return -ENOTTY; |
| 427 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 428 | dimm_name = nvdimm_name(nvdimm); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 429 | cmd_name = nvdimm_cmd_name(cmd); |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 430 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 431 | dsm_mask = nfit_mem->dsm_mask; |
| 432 | desc = nd_cmd_dimm_desc(cmd); |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 433 | guid = to_nfit_uuid(nfit_mem->family); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 434 | handle = adev->handle; |
| 435 | } else { |
| 436 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 437 | |
| 438 | cmd_name = nvdimm_bus_cmd_name(cmd); |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 439 | cmd_mask = nd_desc->cmd_mask; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 440 | dsm_mask = cmd_mask; |
| Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 441 | if (cmd == ND_CMD_CALL) |
| 442 | dsm_mask = nd_desc->bus_dsm_mask; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 443 | desc = nd_cmd_bus_desc(cmd); |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 444 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 445 | handle = adev->handle; |
| 446 | dimm_name = "bus"; |
| 447 | } |
| 448 | |
| 449 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 450 | return -ENOTTY; |
| 451 | |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 452 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 453 | return -ENOTTY; |
| 454 | |
| 455 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 456 | in_obj.package.count = 1; |
| 457 | in_obj.package.elements = &in_buf; |
| 458 | in_buf.type = ACPI_TYPE_BUFFER; |
| 459 | in_buf.buffer.pointer = buf; |
| 460 | in_buf.buffer.length = 0; |
| 461 | |
| 462 | /* libnvdimm has already validated the input envelope */ |
| 463 | for (i = 0; i < desc->in_num; i++) |
| 464 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 465 | i, buf); |
| 466 | |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 467 | if (call_pkg) { |
| 468 | /* skip over package wrapper */ |
| 469 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 470 | in_buf.buffer.length = call_pkg->nd_size_in; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 471 | } |
| 472 | |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 473 | dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n", |
| 474 | dimm_name, cmd, func, in_buf.buffer.length); |
| Dan Williams | 7699a6a | 2017-04-28 13:54:30 -0700 | [diff] [blame] | 475 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 476 | in_buf.buffer.pointer, |
| 477 | min_t(u32, 256, in_buf.buffer.length), true); |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 478 | |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 479 | /* call the BIOS, prefer the named methods over _DSM if available */ |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 480 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsr) |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 481 | out_obj = acpi_label_info(handle); |
| Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 482 | else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && nfit_mem->has_lsr) { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 483 | struct nd_cmd_get_config_data_hdr *p = buf; |
| 484 | |
| 485 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); |
| Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 486 | } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA |
| 487 | && nfit_mem->has_lsw) { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 488 | struct nd_cmd_set_config_hdr *p = buf; |
| 489 | |
| 490 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, |
| 491 | p->in_buf); |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 492 | } else { |
| 493 | u8 revid; |
| 494 | |
| Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 495 | if (nvdimm) |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 496 | revid = nfit_dsm_revid(nfit_mem->family, func); |
| 497 | else |
| 498 | revid = 1; |
| 499 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); |
| 500 | } |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 501 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 502 | if (!out_obj) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 503 | dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 504 | return -EINVAL; |
| 505 | } |
| 506 | |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 507 | if (call_pkg) { |
| 508 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 509 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 510 | out_obj->buffer.pointer, |
| 511 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 512 | |
| 513 | ACPI_FREE(out_obj); |
| 514 | /* |
| 515 | * Need to support FW function w/o known size in advance. |
| 516 | * Caller can determine required size based upon nd_fw_size. |
| 517 | * If we return an error (like elsewhere) then caller wouldn't |
| 518 | * be able to rely upon data returned to make calculation. |
| 519 | */ |
| 520 | return 0; |
| 521 | } |
| 522 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 523 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 524 | dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n", |
| 525 | dimm_name, cmd_name, out_obj->type); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 526 | rc = -EINVAL; |
| 527 | goto out; |
| 528 | } |
| 529 | |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 530 | dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name, |
| Dan Williams | 7699a6a | 2017-04-28 13:54:30 -0700 | [diff] [blame] | 531 | cmd_name, out_obj->buffer.length); |
| 532 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, |
| 533 | out_obj->buffer.pointer, |
| 534 | min_t(u32, 128, out_obj->buffer.length), true); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 535 | |
| 536 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 537 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
| Dan Williams | efda1b5d | 2016-12-06 09:10:12 -0800 | [diff] [blame] | 538 | (u32 *) out_obj->buffer.pointer, |
| 539 | out_obj->buffer.length - offset); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 540 | |
| 541 | if (offset + out_size > out_obj->buffer.length) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 542 | dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n", |
| 543 | dimm_name, cmd_name, i); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 544 | break; |
| 545 | } |
| 546 | |
| 547 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 548 | dev_dbg(dev, "%s output overrun cmd: %s field: %d\n", |
| 549 | dimm_name, cmd_name, i); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 550 | rc = -ENXIO; |
| 551 | goto out; |
| 552 | } |
| 553 | memcpy(buf + in_buf.buffer.length + offset, |
| 554 | out_obj->buffer.pointer + offset, out_size); |
| 555 | offset += out_size; |
| 556 | } |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 557 | |
| 558 | /* |
| 559 | * Set fw_status for all the commands with a known format to be |
| 560 | * later interpreted by xlat_status(). |
| 561 | */ |
| Dan Williams | 0e7f074 | 2017-11-12 14:57:09 -0800 | [diff] [blame] | 562 | if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP |
| 563 | && cmd <= ND_CMD_CLEAR_ERROR) |
| 564 | || (nvdimm && cmd >= ND_CMD_SMART |
| 565 | && cmd <= ND_CMD_VENDOR))) |
| Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 566 | fw_status = *(u32 *) out_obj->buffer.pointer; |
| 567 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 568 | if (offset + in_buf.buffer.length < buf_len) { |
| 569 | if (i >= 1) { |
| 570 | /* |
| 571 | * status valid, return the number of bytes left |
| 572 | * unfilled in the output buffer |
| 573 | */ |
| 574 | rc = buf_len - offset - in_buf.buffer.length; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 575 | if (cmd_rc) |
| Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 576 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
| 577 | fw_status); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 578 | } else { |
| 579 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 580 | __func__, dimm_name, cmd_name, buf_len, |
| 581 | offset); |
| 582 | rc = -ENXIO; |
| 583 | } |
| Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 584 | } else { |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 585 | rc = 0; |
| Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 586 | if (cmd_rc) |
| Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 587 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
| Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 588 | } |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 589 | |
| 590 | out: |
| 591 | ACPI_FREE(out_obj); |
| 592 | |
| 593 | return rc; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 594 | } |
| Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 595 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 596 | |
| 597 | static const char *spa_type_name(u16 type) |
| 598 | { |
| 599 | static const char *to_name[] = { |
| 600 | [NFIT_SPA_VOLATILE] = "volatile", |
| 601 | [NFIT_SPA_PM] = "pmem", |
| 602 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 603 | [NFIT_SPA_BDW] = "block-data-window", |
| 604 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 605 | [NFIT_SPA_VCD] = "volatile-cd", |
| 606 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 607 | [NFIT_SPA_PCD] = "persistent-cd", |
| 608 | |
| 609 | }; |
| 610 | |
| 611 | if (type > NFIT_SPA_PCD) |
| 612 | return "unknown"; |
| 613 | |
| 614 | return to_name[type]; |
| 615 | } |
| 616 | |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 617 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 618 | { |
| 619 | int i; |
| 620 | |
| 621 | for (i = 0; i < NFIT_UUID_MAX; i++) |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 622 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 623 | return i; |
| 624 | return -1; |
| 625 | } |
| 626 | |
| 627 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 628 | struct nfit_table_prev *prev, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 629 | struct acpi_nfit_system_address *spa) |
| 630 | { |
| 631 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 632 | struct nfit_spa *nfit_spa; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 633 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 634 | if (spa->header.length != sizeof(*spa)) |
| 635 | return false; |
| 636 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 637 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 638 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 639 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 640 | return true; |
| 641 | } |
| 642 | } |
| 643 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 644 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
| 645 | GFP_KERNEL); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 646 | if (!nfit_spa) |
| 647 | return false; |
| 648 | INIT_LIST_HEAD(&nfit_spa->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 649 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 650 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 651 | dev_dbg(dev, "spa index: %d type: %s\n", |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 652 | spa->range_index, |
| 653 | spa_type_name(nfit_spa_type(spa))); |
| 654 | return true; |
| 655 | } |
| 656 | |
| 657 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 658 | struct nfit_table_prev *prev, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 659 | struct acpi_nfit_memory_map *memdev) |
| 660 | { |
| 661 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 662 | struct nfit_memdev *nfit_memdev; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 663 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 664 | if (memdev->header.length != sizeof(*memdev)) |
| 665 | return false; |
| 666 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 667 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 668 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 669 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 670 | return true; |
| 671 | } |
| 672 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 673 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
| 674 | GFP_KERNEL); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 675 | if (!nfit_memdev) |
| 676 | return false; |
| 677 | INIT_LIST_HEAD(&nfit_memdev->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 678 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 679 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 680 | dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
| 681 | memdev->device_handle, memdev->range_index, |
| Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 682 | memdev->region_index, memdev->flags); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 683 | return true; |
| 684 | } |
| 685 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 686 | /* |
| 687 | * An implementation may provide a truncated control region if no block windows |
| 688 | * are defined. |
| 689 | */ |
| 690 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) |
| 691 | { |
| 692 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, |
| 693 | window_size)) |
| 694 | return 0; |
| 695 | if (dcr->windows) |
| 696 | return sizeof(*dcr); |
| 697 | return offsetof(struct acpi_nfit_control_region, window_size); |
| 698 | } |
| 699 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 700 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 701 | struct nfit_table_prev *prev, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 702 | struct acpi_nfit_control_region *dcr) |
| 703 | { |
| 704 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 705 | struct nfit_dcr *nfit_dcr; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 706 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 707 | if (!sizeof_dcr(dcr)) |
| 708 | return false; |
| 709 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 710 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 711 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 712 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 713 | return true; |
| 714 | } |
| 715 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 716 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
| 717 | GFP_KERNEL); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 718 | if (!nfit_dcr) |
| 719 | return false; |
| 720 | INIT_LIST_HEAD(&nfit_dcr->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 721 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 722 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 723 | dev_dbg(dev, "dcr index: %d windows: %d\n", |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 724 | dcr->region_index, dcr->windows); |
| 725 | return true; |
| 726 | } |
| 727 | |
| 728 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 729 | struct nfit_table_prev *prev, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 730 | struct acpi_nfit_data_region *bdw) |
| 731 | { |
| 732 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 733 | struct nfit_bdw *nfit_bdw; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 734 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 735 | if (bdw->header.length != sizeof(*bdw)) |
| 736 | return false; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 737 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 738 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 739 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 740 | return true; |
| 741 | } |
| 742 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 743 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
| 744 | GFP_KERNEL); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 745 | if (!nfit_bdw) |
| 746 | return false; |
| 747 | INIT_LIST_HEAD(&nfit_bdw->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 748 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 749 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 750 | dev_dbg(dev, "bdw dcr: %d windows: %d\n", |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 751 | bdw->region_index, bdw->windows); |
| 752 | return true; |
| 753 | } |
| 754 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 755 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
| 756 | { |
| 757 | if (idt->header.length < sizeof(*idt)) |
| 758 | return 0; |
| 759 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); |
| 760 | } |
| 761 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 762 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 763 | struct nfit_table_prev *prev, |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 764 | struct acpi_nfit_interleave *idt) |
| 765 | { |
| 766 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 767 | struct nfit_idt *nfit_idt; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 768 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 769 | if (!sizeof_idt(idt)) |
| 770 | return false; |
| 771 | |
| 772 | list_for_each_entry(nfit_idt, &prev->idts, list) { |
| 773 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) |
| 774 | continue; |
| 775 | |
| 776 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 777 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 778 | return true; |
| 779 | } |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 780 | } |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 781 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 782 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
| 783 | GFP_KERNEL); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 784 | if (!nfit_idt) |
| 785 | return false; |
| 786 | INIT_LIST_HEAD(&nfit_idt->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 787 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 788 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 789 | dev_dbg(dev, "idt index: %d num_lines: %d\n", |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 790 | idt->interleave_index, idt->line_count); |
| 791 | return true; |
| 792 | } |
| 793 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 794 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
| 795 | { |
| 796 | if (flush->header.length < sizeof(*flush)) |
| 797 | return 0; |
| 798 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); |
| 799 | } |
| 800 | |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 801 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 802 | struct nfit_table_prev *prev, |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 803 | struct acpi_nfit_flush_address *flush) |
| 804 | { |
| 805 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 806 | struct nfit_flush *nfit_flush; |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 807 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 808 | if (!sizeof_flush(flush)) |
| 809 | return false; |
| 810 | |
| 811 | list_for_each_entry(nfit_flush, &prev->flushes, list) { |
| 812 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) |
| 813 | continue; |
| 814 | |
| 815 | if (memcmp(nfit_flush->flush, flush, |
| 816 | sizeof_flush(flush)) == 0) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 817 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 818 | return true; |
| 819 | } |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 820 | } |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 821 | |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 822 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
| 823 | + sizeof_flush(flush), GFP_KERNEL); |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 824 | if (!nfit_flush) |
| 825 | return false; |
| 826 | INIT_LIST_HEAD(&nfit_flush->list); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 827 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 828 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 829 | dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n", |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 830 | flush->device_handle, flush->hint_count); |
| 831 | return true; |
| 832 | } |
| 833 | |
| Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 834 | static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc, |
| 835 | struct acpi_nfit_capabilities *pcap) |
| 836 | { |
| 837 | struct device *dev = acpi_desc->dev; |
| 838 | u32 mask; |
| 839 | |
| 840 | mask = (1 << (pcap->highest_capability + 1)) - 1; |
| 841 | acpi_desc->platform_cap = pcap->capabilities & mask; |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 842 | dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap); |
| Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 843 | return true; |
| 844 | } |
| 845 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 846 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 847 | struct nfit_table_prev *prev, void *table, const void *end) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 848 | { |
| 849 | struct device *dev = acpi_desc->dev; |
| 850 | struct acpi_nfit_header *hdr; |
| 851 | void *err = ERR_PTR(-ENOMEM); |
| 852 | |
| 853 | if (table >= end) |
| 854 | return NULL; |
| 855 | |
| 856 | hdr = table; |
| Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 857 | if (!hdr->length) { |
| 858 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 859 | hdr->type); |
| 860 | return NULL; |
| 861 | } |
| 862 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 863 | switch (hdr->type) { |
| 864 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 865 | if (!add_spa(acpi_desc, prev, table)) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 866 | return err; |
| 867 | break; |
| 868 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 869 | if (!add_memdev(acpi_desc, prev, table)) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 870 | return err; |
| 871 | break; |
| 872 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 873 | if (!add_dcr(acpi_desc, prev, table)) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 874 | return err; |
| 875 | break; |
| 876 | case ACPI_NFIT_TYPE_DATA_REGION: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 877 | if (!add_bdw(acpi_desc, prev, table)) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 878 | return err; |
| 879 | break; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 880 | case ACPI_NFIT_TYPE_INTERLEAVE: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 881 | if (!add_idt(acpi_desc, prev, table)) |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 882 | return err; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 883 | break; |
| 884 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 885 | if (!add_flush(acpi_desc, prev, table)) |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 886 | return err; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 887 | break; |
| 888 | case ACPI_NFIT_TYPE_SMBIOS: |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 889 | dev_dbg(dev, "smbios\n"); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 890 | break; |
| Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 891 | case ACPI_NFIT_TYPE_CAPABILITIES: |
| 892 | if (!add_platform_cap(acpi_desc, table)) |
| 893 | return err; |
| 894 | break; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 895 | default: |
| 896 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 897 | break; |
| 898 | } |
| 899 | |
| 900 | return table + hdr->length; |
| 901 | } |
| 902 | |
| 903 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 904 | struct nfit_mem *nfit_mem) |
| 905 | { |
| 906 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 907 | u16 dcr = nfit_mem->dcr->region_index; |
| 908 | struct nfit_spa *nfit_spa; |
| 909 | |
| 910 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 911 | u16 range_index = nfit_spa->spa->range_index; |
| 912 | int type = nfit_spa_type(nfit_spa->spa); |
| 913 | struct nfit_memdev *nfit_memdev; |
| 914 | |
| 915 | if (type != NFIT_SPA_BDW) |
| 916 | continue; |
| 917 | |
| 918 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 919 | if (nfit_memdev->memdev->range_index != range_index) |
| 920 | continue; |
| 921 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 922 | continue; |
| 923 | if (nfit_memdev->memdev->region_index != dcr) |
| 924 | continue; |
| 925 | |
| 926 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 927 | return; |
| 928 | } |
| 929 | } |
| 930 | |
| 931 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 932 | nfit_mem->spa_dcr->range_index); |
| 933 | nfit_mem->bdw = NULL; |
| 934 | } |
| 935 | |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 936 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 937 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 938 | { |
| 939 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 940 | struct nfit_memdev *nfit_memdev; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 941 | struct nfit_bdw *nfit_bdw; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 942 | struct nfit_idt *nfit_idt; |
| 943 | u16 idt_idx, range_index; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 944 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 945 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 946 | if (nfit_bdw->bdw->region_index != dcr) |
| 947 | continue; |
| 948 | nfit_mem->bdw = nfit_bdw->bdw; |
| 949 | break; |
| 950 | } |
| 951 | |
| 952 | if (!nfit_mem->bdw) |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 953 | return; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 954 | |
| 955 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 956 | |
| 957 | if (!nfit_mem->spa_bdw) |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 958 | return; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 959 | |
| 960 | range_index = nfit_mem->spa_bdw->range_index; |
| 961 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 962 | if (nfit_memdev->memdev->range_index != range_index || |
| 963 | nfit_memdev->memdev->region_index != dcr) |
| 964 | continue; |
| 965 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 966 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 967 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 968 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 969 | continue; |
| 970 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 971 | break; |
| 972 | } |
| 973 | break; |
| 974 | } |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 975 | } |
| 976 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 977 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 978 | struct acpi_nfit_system_address *spa) |
| 979 | { |
| 980 | struct nfit_mem *nfit_mem, *found; |
| 981 | struct nfit_memdev *nfit_memdev; |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 982 | int type = spa ? nfit_spa_type(spa) : 0; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 983 | |
| 984 | switch (type) { |
| 985 | case NFIT_SPA_DCR: |
| 986 | case NFIT_SPA_PM: |
| 987 | break; |
| 988 | default: |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 989 | if (spa) |
| 990 | return 0; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 991 | } |
| 992 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 993 | /* |
| 994 | * This loop runs in two modes, when a dimm is mapped the loop |
| 995 | * adds memdev associations to an existing dimm, or creates a |
| 996 | * dimm. In the unmapped dimm case this loop sweeps for memdev |
| 997 | * instances with an invalid / zero range_index and adds those |
| 998 | * dimms without spa associations. |
| 999 | */ |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1000 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1001 | struct nfit_flush *nfit_flush; |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1002 | struct nfit_dcr *nfit_dcr; |
| 1003 | u32 device_handle; |
| 1004 | u16 dcr; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1005 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1006 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
| 1007 | continue; |
| 1008 | if (!spa && nfit_memdev->memdev->range_index) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1009 | continue; |
| 1010 | found = NULL; |
| 1011 | dcr = nfit_memdev->memdev->region_index; |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1012 | device_handle = nfit_memdev->memdev->device_handle; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1013 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1014 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 1015 | == device_handle) { |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1016 | found = nfit_mem; |
| 1017 | break; |
| 1018 | } |
| 1019 | |
| 1020 | if (found) |
| 1021 | nfit_mem = found; |
| 1022 | else { |
| 1023 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 1024 | sizeof(*nfit_mem), GFP_KERNEL); |
| 1025 | if (!nfit_mem) |
| 1026 | return -ENOMEM; |
| 1027 | INIT_LIST_HEAD(&nfit_mem->list); |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1028 | nfit_mem->acpi_desc = acpi_desc; |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1029 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 1030 | } |
| 1031 | |
| 1032 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1033 | if (nfit_dcr->dcr->region_index != dcr) |
| 1034 | continue; |
| 1035 | /* |
| 1036 | * Record the control region for the dimm. For |
| 1037 | * the ACPI 6.1 case, where there are separate |
| 1038 | * control regions for the pmem vs blk |
| 1039 | * interfaces, be sure to record the extended |
| 1040 | * blk details. |
| 1041 | */ |
| 1042 | if (!nfit_mem->dcr) |
| 1043 | nfit_mem->dcr = nfit_dcr->dcr; |
| 1044 | else if (nfit_mem->dcr->windows == 0 |
| 1045 | && nfit_dcr->dcr->windows) |
| 1046 | nfit_mem->dcr = nfit_dcr->dcr; |
| 1047 | break; |
| 1048 | } |
| 1049 | |
| Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1050 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
| Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1051 | struct acpi_nfit_flush_address *flush; |
| 1052 | u16 i; |
| 1053 | |
| Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1054 | if (nfit_flush->flush->device_handle != device_handle) |
| 1055 | continue; |
| 1056 | nfit_mem->nfit_flush = nfit_flush; |
| Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1057 | flush = nfit_flush->flush; |
| 1058 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, |
| 1059 | flush->hint_count |
| 1060 | * sizeof(struct resource), GFP_KERNEL); |
| 1061 | if (!nfit_mem->flush_wpq) |
| 1062 | return -ENOMEM; |
| 1063 | for (i = 0; i < flush->hint_count; i++) { |
| 1064 | struct resource *res = &nfit_mem->flush_wpq[i]; |
| 1065 | |
| 1066 | res->start = flush->hint_address[i]; |
| 1067 | res->end = res->start + 8 - 1; |
| 1068 | } |
| Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1069 | break; |
| 1070 | } |
| 1071 | |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1072 | if (dcr && !nfit_mem->dcr) { |
| 1073 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 1074 | spa->range_index, dcr); |
| 1075 | return -ENODEV; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1076 | } |
| 1077 | |
| 1078 | if (type == NFIT_SPA_DCR) { |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1079 | struct nfit_idt *nfit_idt; |
| 1080 | u16 idt_idx; |
| 1081 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1082 | /* multiple dimms may share a SPA when interleaved */ |
| 1083 | nfit_mem->spa_dcr = spa; |
| 1084 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1085 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 1086 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 1087 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 1088 | continue; |
| 1089 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 1090 | break; |
| 1091 | } |
| Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1092 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1093 | } else if (type == NFIT_SPA_PM) { |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1094 | /* |
| 1095 | * A single dimm may belong to multiple SPA-PM |
| 1096 | * ranges, record at least one in addition to |
| 1097 | * any SPA-DCR range. |
| 1098 | */ |
| 1099 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1100 | } else |
| 1101 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1102 | } |
| 1103 | |
| 1104 | return 0; |
| 1105 | } |
| 1106 | |
| 1107 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 1108 | { |
| 1109 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 1110 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 1111 | u32 handleA, handleB; |
| 1112 | |
| 1113 | handleA = __to_nfit_memdev(a)->device_handle; |
| 1114 | handleB = __to_nfit_memdev(b)->device_handle; |
| 1115 | if (handleA < handleB) |
| 1116 | return -1; |
| 1117 | else if (handleA > handleB) |
| 1118 | return 1; |
| 1119 | return 0; |
| 1120 | } |
| 1121 | |
| 1122 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 1123 | { |
| 1124 | struct nfit_spa *nfit_spa; |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1125 | int rc; |
| 1126 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1127 | |
| 1128 | /* |
| 1129 | * For each SPA-DCR or SPA-PMEM address range find its |
| 1130 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 1131 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 1132 | * try to find a SPA-BDW and a corresponding BDW that references |
| 1133 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 1134 | * BDWs are optional. |
| 1135 | */ |
| 1136 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1137 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1138 | if (rc) |
| 1139 | return rc; |
| 1140 | } |
| 1141 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1142 | /* |
| 1143 | * If a DIMM has failed to be mapped into SPA there will be no |
| 1144 | * SPA entries above. Find and register all the unmapped DIMMs |
| 1145 | * for reporting and recovery purposes. |
| 1146 | */ |
| 1147 | rc = __nfit_mem_init(acpi_desc, NULL); |
| 1148 | if (rc) |
| 1149 | return rc; |
| 1150 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1151 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 1152 | |
| 1153 | return 0; |
| 1154 | } |
| 1155 | |
| Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1156 | static ssize_t bus_dsm_mask_show(struct device *dev, |
| 1157 | struct device_attribute *attr, char *buf) |
| 1158 | { |
| 1159 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1160 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1161 | |
| 1162 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); |
| 1163 | } |
| 1164 | static struct device_attribute dev_attr_bus_dsm_mask = |
| 1165 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); |
| 1166 | |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1167 | static ssize_t revision_show(struct device *dev, |
| 1168 | struct device_attribute *attr, char *buf) |
| 1169 | { |
| 1170 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1171 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1172 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1173 | |
| Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 1174 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1175 | } |
| 1176 | static DEVICE_ATTR_RO(revision); |
| 1177 | |
| Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1178 | static ssize_t hw_error_scrub_show(struct device *dev, |
| 1179 | struct device_attribute *attr, char *buf) |
| 1180 | { |
| 1181 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1182 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1183 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1184 | |
| 1185 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); |
| 1186 | } |
| 1187 | |
| 1188 | /* |
| 1189 | * The 'hw_error_scrub' attribute can have the following values written to it: |
| 1190 | * '0': Switch to the default mode where an exception will only insert |
| 1191 | * the address of the memory error into the poison and badblocks lists. |
| 1192 | * '1': Enable a full scrub to happen if an exception for a memory error is |
| 1193 | * received. |
| 1194 | */ |
| 1195 | static ssize_t hw_error_scrub_store(struct device *dev, |
| 1196 | struct device_attribute *attr, const char *buf, size_t size) |
| 1197 | { |
| 1198 | struct nvdimm_bus_descriptor *nd_desc; |
| 1199 | ssize_t rc; |
| 1200 | long val; |
| 1201 | |
| 1202 | rc = kstrtol(buf, 0, &val); |
| 1203 | if (rc) |
| 1204 | return rc; |
| 1205 | |
| 1206 | device_lock(dev); |
| 1207 | nd_desc = dev_get_drvdata(dev); |
| 1208 | if (nd_desc) { |
| 1209 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1210 | |
| 1211 | switch (val) { |
| 1212 | case HW_ERROR_SCRUB_ON: |
| 1213 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; |
| 1214 | break; |
| 1215 | case HW_ERROR_SCRUB_OFF: |
| 1216 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; |
| 1217 | break; |
| 1218 | default: |
| 1219 | rc = -EINVAL; |
| 1220 | break; |
| 1221 | } |
| 1222 | } |
| 1223 | device_unlock(dev); |
| 1224 | if (rc) |
| 1225 | return rc; |
| 1226 | return size; |
| 1227 | } |
| 1228 | static DEVICE_ATTR_RW(hw_error_scrub); |
| 1229 | |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1230 | /* |
| 1231 | * This shows the number of full Address Range Scrubs that have been |
| 1232 | * completed since driver load time. Userspace can wait on this using |
| 1233 | * select/poll etc. A '+' at the end indicates an ARS is in progress |
| 1234 | */ |
| 1235 | static ssize_t scrub_show(struct device *dev, |
| 1236 | struct device_attribute *attr, char *buf) |
| 1237 | { |
| 1238 | struct nvdimm_bus_descriptor *nd_desc; |
| 1239 | ssize_t rc = -ENXIO; |
| 1240 | |
| 1241 | device_lock(dev); |
| 1242 | nd_desc = dev_get_drvdata(dev); |
| 1243 | if (nd_desc) { |
| 1244 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1245 | |
| Dan Williams | 7872713 | 2018-04-02 16:40:04 -0700 | [diff] [blame] | 1246 | mutex_lock(&acpi_desc->init_mutex); |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1247 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 1248 | work_busy(&acpi_desc->dwork.work) |
| Dan Williams | 7872713 | 2018-04-02 16:40:04 -0700 | [diff] [blame] | 1249 | && !acpi_desc->cancel ? "+\n" : "\n"); |
| 1250 | mutex_unlock(&acpi_desc->init_mutex); |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1251 | } |
| 1252 | device_unlock(dev); |
| 1253 | return rc; |
| 1254 | } |
| 1255 | |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1256 | static ssize_t scrub_store(struct device *dev, |
| 1257 | struct device_attribute *attr, const char *buf, size_t size) |
| 1258 | { |
| 1259 | struct nvdimm_bus_descriptor *nd_desc; |
| 1260 | ssize_t rc; |
| 1261 | long val; |
| 1262 | |
| 1263 | rc = kstrtol(buf, 0, &val); |
| 1264 | if (rc) |
| 1265 | return rc; |
| 1266 | if (val != 1) |
| 1267 | return -EINVAL; |
| 1268 | |
| 1269 | device_lock(dev); |
| 1270 | nd_desc = dev_get_drvdata(dev); |
| 1271 | if (nd_desc) { |
| 1272 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1273 | |
| Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 1274 | rc = acpi_nfit_ars_rescan(acpi_desc, 0); |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1275 | } |
| 1276 | device_unlock(dev); |
| 1277 | if (rc) |
| 1278 | return rc; |
| 1279 | return size; |
| 1280 | } |
| 1281 | static DEVICE_ATTR_RW(scrub); |
| 1282 | |
| 1283 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) |
| 1284 | { |
| 1285 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1286 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START |
| 1287 | | 1 << ND_CMD_ARS_STATUS; |
| 1288 | |
| 1289 | return (nd_desc->cmd_mask & mask) == mask; |
| 1290 | } |
| 1291 | |
| 1292 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) |
| 1293 | { |
| 1294 | struct device *dev = container_of(kobj, struct device, kobj); |
| 1295 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1296 | |
| 1297 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) |
| 1298 | return 0; |
| 1299 | return a->mode; |
| 1300 | } |
| 1301 | |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1302 | static struct attribute *acpi_nfit_attributes[] = { |
| 1303 | &dev_attr_revision.attr, |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1304 | &dev_attr_scrub.attr, |
| Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1305 | &dev_attr_hw_error_scrub.attr, |
| Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1306 | &dev_attr_bus_dsm_mask.attr, |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1307 | NULL, |
| 1308 | }; |
| 1309 | |
| Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1310 | static const struct attribute_group acpi_nfit_attribute_group = { |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1311 | .name = "nfit", |
| 1312 | .attrs = acpi_nfit_attributes, |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1313 | .is_visible = nfit_visible, |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1314 | }; |
| 1315 | |
| Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 1316 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
| Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1317 | &nvdimm_bus_attribute_group, |
| 1318 | &acpi_nfit_attribute_group, |
| 1319 | NULL, |
| 1320 | }; |
| 1321 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1322 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 1323 | { |
| 1324 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1325 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1326 | |
| 1327 | return __to_nfit_memdev(nfit_mem); |
| 1328 | } |
| 1329 | |
| 1330 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 1331 | { |
| 1332 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1333 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1334 | |
| 1335 | return nfit_mem->dcr; |
| 1336 | } |
| 1337 | |
| 1338 | static ssize_t handle_show(struct device *dev, |
| 1339 | struct device_attribute *attr, char *buf) |
| 1340 | { |
| 1341 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1342 | |
| 1343 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 1344 | } |
| 1345 | static DEVICE_ATTR_RO(handle); |
| 1346 | |
| 1347 | static ssize_t phys_id_show(struct device *dev, |
| 1348 | struct device_attribute *attr, char *buf) |
| 1349 | { |
| 1350 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1351 | |
| 1352 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 1353 | } |
| 1354 | static DEVICE_ATTR_RO(phys_id); |
| 1355 | |
| 1356 | static ssize_t vendor_show(struct device *dev, |
| 1357 | struct device_attribute *attr, char *buf) |
| 1358 | { |
| 1359 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1360 | |
| Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1361 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1362 | } |
| 1363 | static DEVICE_ATTR_RO(vendor); |
| 1364 | |
| 1365 | static ssize_t rev_id_show(struct device *dev, |
| 1366 | struct device_attribute *attr, char *buf) |
| 1367 | { |
| 1368 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1369 | |
| Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1370 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1371 | } |
| 1372 | static DEVICE_ATTR_RO(rev_id); |
| 1373 | |
| 1374 | static ssize_t device_show(struct device *dev, |
| 1375 | struct device_attribute *attr, char *buf) |
| 1376 | { |
| 1377 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1378 | |
| Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1379 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1380 | } |
| 1381 | static DEVICE_ATTR_RO(device); |
| 1382 | |
| Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1383 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 1384 | struct device_attribute *attr, char *buf) |
| 1385 | { |
| 1386 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1387 | |
| 1388 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 1389 | } |
| 1390 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 1391 | |
| 1392 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 1393 | struct device_attribute *attr, char *buf) |
| 1394 | { |
| 1395 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1396 | |
| 1397 | return sprintf(buf, "0x%04x\n", |
| 1398 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 1399 | } |
| 1400 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 1401 | |
| 1402 | static ssize_t subsystem_device_show(struct device *dev, |
| 1403 | struct device_attribute *attr, char *buf) |
| 1404 | { |
| 1405 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1406 | |
| 1407 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 1408 | } |
| 1409 | static DEVICE_ATTR_RO(subsystem_device); |
| 1410 | |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1411 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 1412 | { |
| 1413 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1414 | int formats = 0; |
| 1415 | |
| 1416 | if (nfit_mem->memdev_pmem) |
| 1417 | formats++; |
| 1418 | if (nfit_mem->memdev_bdw) |
| 1419 | formats++; |
| 1420 | return formats; |
| 1421 | } |
| 1422 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1423 | static ssize_t format_show(struct device *dev, |
| 1424 | struct device_attribute *attr, char *buf) |
| 1425 | { |
| 1426 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1427 | |
| Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1428 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1429 | } |
| 1430 | static DEVICE_ATTR_RO(format); |
| 1431 | |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1432 | static ssize_t format1_show(struct device *dev, |
| 1433 | struct device_attribute *attr, char *buf) |
| 1434 | { |
| 1435 | u32 handle; |
| 1436 | ssize_t rc = -ENXIO; |
| 1437 | struct nfit_mem *nfit_mem; |
| 1438 | struct nfit_memdev *nfit_memdev; |
| 1439 | struct acpi_nfit_desc *acpi_desc; |
| 1440 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1441 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1442 | |
| 1443 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1444 | acpi_desc = nfit_mem->acpi_desc; |
| 1445 | handle = to_nfit_memdev(dev)->device_handle; |
| 1446 | |
| 1447 | /* assumes DIMMs have at most 2 published interface codes */ |
| 1448 | mutex_lock(&acpi_desc->init_mutex); |
| 1449 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1450 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1451 | struct nfit_dcr *nfit_dcr; |
| 1452 | |
| 1453 | if (memdev->device_handle != handle) |
| 1454 | continue; |
| 1455 | |
| 1456 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1457 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 1458 | continue; |
| 1459 | if (nfit_dcr->dcr->code == dcr->code) |
| 1460 | continue; |
| Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1461 | rc = sprintf(buf, "0x%04x\n", |
| 1462 | le16_to_cpu(nfit_dcr->dcr->code)); |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1463 | break; |
| 1464 | } |
| 1465 | if (rc != ENXIO) |
| 1466 | break; |
| 1467 | } |
| 1468 | mutex_unlock(&acpi_desc->init_mutex); |
| 1469 | return rc; |
| 1470 | } |
| 1471 | static DEVICE_ATTR_RO(format1); |
| 1472 | |
| 1473 | static ssize_t formats_show(struct device *dev, |
| 1474 | struct device_attribute *attr, char *buf) |
| 1475 | { |
| 1476 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1477 | |
| 1478 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 1479 | } |
| 1480 | static DEVICE_ATTR_RO(formats); |
| 1481 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1482 | static ssize_t serial_show(struct device *dev, |
| 1483 | struct device_attribute *attr, char *buf) |
| 1484 | { |
| 1485 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1486 | |
| Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1487 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1488 | } |
| 1489 | static DEVICE_ATTR_RO(serial); |
| 1490 | |
| Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1491 | static ssize_t family_show(struct device *dev, |
| 1492 | struct device_attribute *attr, char *buf) |
| 1493 | { |
| 1494 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1495 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1496 | |
| 1497 | if (nfit_mem->family < 0) |
| 1498 | return -ENXIO; |
| 1499 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1500 | } |
| 1501 | static DEVICE_ATTR_RO(family); |
| 1502 | |
| 1503 | static ssize_t dsm_mask_show(struct device *dev, |
| 1504 | struct device_attribute *attr, char *buf) |
| 1505 | { |
| 1506 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1507 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1508 | |
| 1509 | if (nfit_mem->family < 0) |
| 1510 | return -ENXIO; |
| 1511 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1512 | } |
| 1513 | static DEVICE_ATTR_RO(dsm_mask); |
| 1514 | |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1515 | static ssize_t flags_show(struct device *dev, |
| 1516 | struct device_attribute *attr, char *buf) |
| 1517 | { |
| 1518 | u16 flags = to_nfit_memdev(dev)->flags; |
| 1519 | |
| Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1520 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
| Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1521 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1522 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1523 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
| Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1524 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
| Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1525 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
| 1526 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", |
| 1527 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1528 | } |
| 1529 | static DEVICE_ATTR_RO(flags); |
| 1530 | |
| Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1531 | static ssize_t id_show(struct device *dev, |
| 1532 | struct device_attribute *attr, char *buf) |
| 1533 | { |
| 1534 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1535 | |
| 1536 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1537 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", |
| 1538 | be16_to_cpu(dcr->vendor_id), |
| 1539 | dcr->manufacturing_location, |
| 1540 | be16_to_cpu(dcr->manufacturing_date), |
| 1541 | be32_to_cpu(dcr->serial_number)); |
| 1542 | else |
| 1543 | return sprintf(buf, "%04x-%08x\n", |
| 1544 | be16_to_cpu(dcr->vendor_id), |
| 1545 | be32_to_cpu(dcr->serial_number)); |
| 1546 | } |
| 1547 | static DEVICE_ATTR_RO(id); |
| 1548 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1549 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1550 | &dev_attr_handle.attr, |
| 1551 | &dev_attr_phys_id.attr, |
| 1552 | &dev_attr_vendor.attr, |
| 1553 | &dev_attr_device.attr, |
| Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1554 | &dev_attr_rev_id.attr, |
| 1555 | &dev_attr_subsystem_vendor.attr, |
| 1556 | &dev_attr_subsystem_device.attr, |
| 1557 | &dev_attr_subsystem_rev_id.attr, |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1558 | &dev_attr_format.attr, |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1559 | &dev_attr_formats.attr, |
| 1560 | &dev_attr_format1.attr, |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1561 | &dev_attr_serial.attr, |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1562 | &dev_attr_flags.attr, |
| Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1563 | &dev_attr_id.attr, |
| Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1564 | &dev_attr_family.attr, |
| 1565 | &dev_attr_dsm_mask.attr, |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1566 | NULL, |
| 1567 | }; |
| 1568 | |
| 1569 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1570 | struct attribute *a, int n) |
| 1571 | { |
| 1572 | struct device *dev = container_of(kobj, struct device, kobj); |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1573 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1574 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1575 | if (!to_nfit_dcr(dev)) { |
| 1576 | /* Without a dcr only the memdev attributes can be surfaced */ |
| 1577 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr |
| 1578 | || a == &dev_attr_flags.attr |
| 1579 | || a == &dev_attr_family.attr |
| 1580 | || a == &dev_attr_dsm_mask.attr) |
| 1581 | return a->mode; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1582 | return 0; |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1583 | } |
| 1584 | |
| Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1585 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1586 | return 0; |
| 1587 | return a->mode; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1588 | } |
| 1589 | |
| Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1590 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1591 | .name = "nfit", |
| 1592 | .attrs = acpi_nfit_dimm_attributes, |
| 1593 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1594 | }; |
| 1595 | |
| 1596 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1597 | &nvdimm_attribute_group, |
| Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1598 | &nd_device_attribute_group, |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1599 | &acpi_nfit_dimm_attribute_group, |
| 1600 | NULL, |
| 1601 | }; |
| 1602 | |
| 1603 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1604 | u32 device_handle) |
| 1605 | { |
| 1606 | struct nfit_mem *nfit_mem; |
| 1607 | |
| 1608 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1609 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1610 | return nfit_mem->nvdimm; |
| 1611 | |
| 1612 | return NULL; |
| 1613 | } |
| 1614 | |
| Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1615 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1616 | { |
| 1617 | struct nfit_mem *nfit_mem; |
| 1618 | struct acpi_nfit_desc *acpi_desc; |
| 1619 | |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 1620 | dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev), |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1621 | event); |
| 1622 | |
| 1623 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { |
| 1624 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), |
| 1625 | event); |
| 1626 | return; |
| 1627 | } |
| 1628 | |
| 1629 | acpi_desc = dev_get_drvdata(dev->parent); |
| 1630 | if (!acpi_desc) |
| 1631 | return; |
| 1632 | |
| 1633 | /* |
| 1634 | * If we successfully retrieved acpi_desc, then we know nfit_mem data |
| 1635 | * is still valid. |
| 1636 | */ |
| 1637 | nfit_mem = dev_get_drvdata(dev); |
| 1638 | if (nfit_mem && nfit_mem->flags_attr) |
| 1639 | sysfs_notify_dirent(nfit_mem->flags_attr); |
| 1640 | } |
| Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1641 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1642 | |
| 1643 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) |
| 1644 | { |
| 1645 | struct acpi_device *adev = data; |
| 1646 | struct device *dev = &adev->dev; |
| 1647 | |
| 1648 | device_lock(dev->parent); |
| 1649 | __acpi_nvdimm_notify(dev, event); |
| 1650 | device_unlock(dev->parent); |
| 1651 | } |
| 1652 | |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1653 | static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) |
| 1654 | { |
| 1655 | acpi_handle handle; |
| 1656 | acpi_status status; |
| 1657 | |
| 1658 | status = acpi_get_handle(adev->handle, method, &handle); |
| 1659 | |
| 1660 | if (ACPI_SUCCESS(status)) |
| 1661 | return true; |
| 1662 | return false; |
| 1663 | } |
| 1664 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1665 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1666 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1667 | { |
| 1668 | struct acpi_device *adev, *adev_dimm; |
| 1669 | struct device *dev = acpi_desc->dev; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1670 | unsigned long dsm_mask; |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1671 | const guid_t *guid; |
| Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1672 | int i; |
| Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1673 | int family = -1; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1674 | |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1675 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1676 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1677 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1678 | adev = to_acpi_dev(acpi_desc); |
| 1679 | if (!adev) |
| 1680 | return 0; |
| 1681 | |
| 1682 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1683 | nfit_mem->adev = adev_dimm; |
| 1684 | if (!adev_dimm) { |
| 1685 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1686 | device_handle); |
| Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1687 | return force_enable_dimms ? 0 : -ENODEV; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1688 | } |
| 1689 | |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1690 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
| 1691 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { |
| 1692 | dev_err(dev, "%s: notification registration failed\n", |
| 1693 | dev_name(&adev_dimm->dev)); |
| 1694 | return -ENXIO; |
| 1695 | } |
| Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1696 | /* |
| 1697 | * Record nfit_mem for the notification path to track back to |
| 1698 | * the nfit sysfs attributes for this dimm device object. |
| 1699 | */ |
| 1700 | dev_set_drvdata(&adev_dimm->dev, nfit_mem); |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1701 | |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1702 | /* |
| stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1703 | * Until standardization materializes we need to consider 4 |
| Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1704 | * different command sets. Note, that checking for function0 (bit0) |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1705 | * tells us if any commands are reachable through this GUID. |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1706 | */ |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1707 | for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) |
| Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1708 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
| Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1709 | if (family < 0 || i == default_dsm_family) |
| 1710 | family = i; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1711 | |
| 1712 | /* limit the supported commands to those that are publicly documented */ |
| Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1713 | nfit_mem->family = family; |
| Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 1714 | if (override_dsm_mask && !disable_vendor_specific) |
| 1715 | dsm_mask = override_dsm_mask; |
| 1716 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1717 | dsm_mask = NVDIMM_INTEL_CMDMASK; |
| Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1718 | if (disable_vendor_specific) |
| 1719 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
| stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1720 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1721 | dsm_mask = 0x1c3c76; |
| stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1722 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1723 | dsm_mask = 0x1fe; |
| Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1724 | if (disable_vendor_specific) |
| 1725 | dsm_mask &= ~(1 << 8); |
| stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1726 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
| 1727 | dsm_mask = 0xffffffff; |
| Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1728 | } else { |
| Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1729 | dev_dbg(dev, "unknown dimm command family\n"); |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1730 | nfit_mem->family = -1; |
| Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1731 | /* DSMs are optional, continue loading the driver... */ |
| 1732 | return 0; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1733 | } |
| 1734 | |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1735 | guid = to_nfit_uuid(nfit_mem->family); |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1736 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
| Dan Williams | 11e1427 | 2017-10-20 15:39:43 -0700 | [diff] [blame] | 1737 | if (acpi_check_dsm(adev_dimm->handle, guid, |
| 1738 | nfit_dsm_revid(nfit_mem->family, i), |
| 1739 | 1ULL << i)) |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1740 | set_bit(i, &nfit_mem->dsm_mask); |
| 1741 | |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1742 | if (acpi_nvdimm_has_method(adev_dimm, "_LSI") |
| 1743 | && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1744 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1745 | nfit_mem->has_lsr = true; |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1746 | } |
| 1747 | |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1748 | if (nfit_mem->has_lsr && acpi_nvdimm_has_method(adev_dimm, "_LSW")) { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1749 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1750 | nfit_mem->has_lsw = true; |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1751 | } |
| 1752 | |
| Linda Knippers | 60e95f43 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1753 | return 0; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1754 | } |
| 1755 | |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1756 | static void shutdown_dimm_notify(void *data) |
| 1757 | { |
| 1758 | struct acpi_nfit_desc *acpi_desc = data; |
| 1759 | struct nfit_mem *nfit_mem; |
| 1760 | |
| 1761 | mutex_lock(&acpi_desc->init_mutex); |
| 1762 | /* |
| 1763 | * Clear out the nfit_mem->flags_attr and shut down dimm event |
| 1764 | * notifications. |
| 1765 | */ |
| 1766 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1767 | struct acpi_device *adev_dimm = nfit_mem->adev; |
| 1768 | |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1769 | if (nfit_mem->flags_attr) { |
| 1770 | sysfs_put(nfit_mem->flags_attr); |
| 1771 | nfit_mem->flags_attr = NULL; |
| 1772 | } |
| Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1773 | if (adev_dimm) { |
| Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1774 | acpi_remove_notify_handler(adev_dimm->handle, |
| 1775 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); |
| Dan Williams | adf6895 | 2017-11-30 19:42:52 -0800 | [diff] [blame] | 1776 | dev_set_drvdata(&adev_dimm->dev, NULL); |
| 1777 | } |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1778 | } |
| 1779 | mutex_unlock(&acpi_desc->init_mutex); |
| 1780 | } |
| 1781 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1782 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 1783 | { |
| 1784 | struct nfit_mem *nfit_mem; |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1785 | int dimm_count = 0, rc; |
| 1786 | struct nvdimm *nvdimm; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1787 | |
| 1788 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1789 | struct acpi_nfit_flush_address *flush; |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1790 | unsigned long flags = 0, cmd_mask; |
| Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 1791 | struct nfit_memdev *nfit_memdev; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1792 | u32 device_handle; |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1793 | u16 mem_flags; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1794 | |
| 1795 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 1796 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 1797 | if (nvdimm) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1798 | dimm_count++; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1799 | continue; |
| 1800 | } |
| 1801 | |
| 1802 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
| Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 1803 | set_bit(NDD_ALIASING, &flags); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1804 | |
| Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 1805 | /* collate flags across all memdevs for this dimm */ |
| 1806 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1807 | struct acpi_nfit_memory_map *dimm_memdev; |
| 1808 | |
| 1809 | dimm_memdev = __to_nfit_memdev(nfit_mem); |
| 1810 | if (dimm_memdev->device_handle |
| 1811 | != nfit_memdev->memdev->device_handle) |
| 1812 | continue; |
| 1813 | dimm_memdev->flags |= nfit_memdev->memdev->flags; |
| 1814 | } |
| 1815 | |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1816 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
| Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1817 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
| Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 1818 | set_bit(NDD_UNARMED, &flags); |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1819 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1820 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 1821 | if (rc) |
| 1822 | continue; |
| 1823 | |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1824 | /* |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1825 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 1826 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 1827 | * userspace interface. |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1828 | */ |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1829 | cmd_mask = 1UL << ND_CMD_CALL; |
| Dan Williams | b9b1504 | 2017-10-29 12:13:07 -0700 | [diff] [blame] | 1830 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
| 1831 | /* |
| 1832 | * These commands have a 1:1 correspondence |
| 1833 | * between DSM payload and libnvdimm ioctl |
| 1834 | * payload format. |
| 1835 | */ |
| 1836 | cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; |
| 1837 | } |
| Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1838 | |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1839 | if (nfit_mem->has_lsr) { |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1840 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1841 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); |
| Dan Williams | 466d149 | 2018-03-28 10:44:50 -0700 | [diff] [blame] | 1842 | } |
| Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1843 | if (nfit_mem->has_lsw) |
| 1844 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); |
| 1845 | |
| Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1846 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
| 1847 | : NULL; |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1848 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1849 | acpi_nfit_dimm_attribute_groups, |
| Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1850 | flags, cmd_mask, flush ? flush->hint_count : 0, |
| 1851 | nfit_mem->flush_wpq); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1852 | if (!nvdimm) |
| 1853 | return -ENOMEM; |
| 1854 | |
| 1855 | nfit_mem->nvdimm = nvdimm; |
| Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1856 | dimm_count++; |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1857 | |
| 1858 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 1859 | continue; |
| 1860 | |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1861 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n", |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1862 | nvdimm_name(nvdimm), |
| Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1863 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 1864 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 1865 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
| Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1866 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
| 1867 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); |
| Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1868 | |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1869 | } |
| 1870 | |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1871 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
| 1872 | if (rc) |
| 1873 | return rc; |
| 1874 | |
| 1875 | /* |
| 1876 | * Now that dimms are successfully registered, and async registration |
| 1877 | * is flushed, attempt to enable event notification. |
| 1878 | */ |
| 1879 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 1880 | struct kernfs_node *nfit_kernfs; |
| 1881 | |
| 1882 | nvdimm = nfit_mem->nvdimm; |
| Toshi Kani | 23fbd7c | 2018-02-02 14:00:36 -0700 | [diff] [blame] | 1883 | if (!nvdimm) |
| 1884 | continue; |
| 1885 | |
| Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1886 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
| 1887 | if (nfit_kernfs) |
| 1888 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, |
| 1889 | "flags"); |
| 1890 | sysfs_put(nfit_kernfs); |
| 1891 | if (!nfit_mem->flags_attr) |
| 1892 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", |
| 1893 | nvdimm_name(nvdimm)); |
| 1894 | } |
| 1895 | |
| 1896 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, |
| 1897 | acpi_desc); |
| Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1898 | } |
| 1899 | |
| Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1900 | /* |
| 1901 | * These constants are private because there are no kernel consumers of |
| 1902 | * these commands. |
| 1903 | */ |
| 1904 | enum nfit_aux_cmds { |
| 1905 | NFIT_CMD_TRANSLATE_SPA = 5, |
| 1906 | NFIT_CMD_ARS_INJECT_SET = 7, |
| 1907 | NFIT_CMD_ARS_INJECT_CLEAR = 8, |
| 1908 | NFIT_CMD_ARS_INJECT_GET = 9, |
| 1909 | }; |
| 1910 | |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1911 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 1912 | { |
| 1913 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1914 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1915 | struct acpi_device *adev; |
| Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1916 | unsigned long dsm_mask; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1917 | int i; |
| 1918 | |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1919 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
| Yasunori Goto | b37b3fd | 2017-09-22 16:47:40 +0900 | [diff] [blame] | 1920 | nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en; |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1921 | adev = to_acpi_dev(acpi_desc); |
| 1922 | if (!adev) |
| 1923 | return; |
| 1924 | |
| Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 1925 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
| Andy Shevchenko | 94116f8 | 2017-06-05 19:40:46 +0300 | [diff] [blame] | 1926 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
| Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1927 | set_bit(i, &nd_desc->cmd_mask); |
| Jerry Hoemann | 37d7484 | 2017-06-30 20:41:24 -0700 | [diff] [blame] | 1928 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
| Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1929 | |
| 1930 | dsm_mask = |
| 1931 | (1 << ND_CMD_ARS_CAP) | |
| 1932 | (1 << ND_CMD_ARS_START) | |
| 1933 | (1 << ND_CMD_ARS_STATUS) | |
| 1934 | (1 << ND_CMD_CLEAR_ERROR) | |
| 1935 | (1 << NFIT_CMD_TRANSLATE_SPA) | |
| 1936 | (1 << NFIT_CMD_ARS_INJECT_SET) | |
| 1937 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | |
| 1938 | (1 << NFIT_CMD_ARS_INJECT_GET); |
| 1939 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
| 1940 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
| 1941 | set_bit(i, &nd_desc->bus_dsm_mask); |
| Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1942 | } |
| 1943 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1944 | static ssize_t range_index_show(struct device *dev, |
| 1945 | struct device_attribute *attr, char *buf) |
| 1946 | { |
| 1947 | struct nd_region *nd_region = to_nd_region(dev); |
| 1948 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1949 | |
| 1950 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1951 | } |
| 1952 | static DEVICE_ATTR_RO(range_index); |
| 1953 | |
| Dan Williams | a15797f | 2017-08-31 12:53:36 -0700 | [diff] [blame] | 1954 | static ssize_t ecc_unit_size_show(struct device *dev, |
| 1955 | struct device_attribute *attr, char *buf) |
| 1956 | { |
| 1957 | struct nd_region *nd_region = to_nd_region(dev); |
| 1958 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1959 | |
| 1960 | return sprintf(buf, "%d\n", nfit_spa->clear_err_unit); |
| 1961 | } |
| 1962 | static DEVICE_ATTR_RO(ecc_unit_size); |
| 1963 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1964 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1965 | &dev_attr_range_index.attr, |
| Dan Williams | a15797f | 2017-08-31 12:53:36 -0700 | [diff] [blame] | 1966 | &dev_attr_ecc_unit_size.attr, |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1967 | NULL, |
| 1968 | }; |
| 1969 | |
| Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1970 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1971 | .name = "nfit", |
| 1972 | .attrs = acpi_nfit_region_attributes, |
| 1973 | }; |
| 1974 | |
| 1975 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1976 | &nd_region_attribute_group, |
| 1977 | &nd_mapping_attribute_group, |
| Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1978 | &nd_device_attribute_group, |
| Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1979 | &nd_numa_attribute_group, |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1980 | &acpi_nfit_region_attribute_group, |
| 1981 | NULL, |
| 1982 | }; |
| 1983 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1984 | /* enough info to uniquely specify an interleave set */ |
| 1985 | struct nfit_set_info { |
| 1986 | struct nfit_set_info_map { |
| 1987 | u64 region_offset; |
| 1988 | u32 serial_number; |
| 1989 | u32 pad; |
| 1990 | } mapping[0]; |
| 1991 | }; |
| 1992 | |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 1993 | struct nfit_set_info2 { |
| 1994 | struct nfit_set_info_map2 { |
| 1995 | u64 region_offset; |
| 1996 | u32 serial_number; |
| 1997 | u16 vendor_id; |
| 1998 | u16 manufacturing_date; |
| 1999 | u8 manufacturing_location; |
| 2000 | u8 reserved[31]; |
| 2001 | } mapping[0]; |
| 2002 | }; |
| 2003 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2004 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 2005 | { |
| 2006 | return sizeof(struct nfit_set_info) |
| 2007 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 2008 | } |
| 2009 | |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2010 | static size_t sizeof_nfit_set_info2(int num_mappings) |
| 2011 | { |
| 2012 | return sizeof(struct nfit_set_info2) |
| 2013 | + num_mappings * sizeof(struct nfit_set_info_map2); |
| 2014 | } |
| 2015 | |
| Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2016 | static int cmp_map_compat(const void *m0, const void *m1) |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2017 | { |
| 2018 | const struct nfit_set_info_map *map0 = m0; |
| 2019 | const struct nfit_set_info_map *map1 = m1; |
| 2020 | |
| 2021 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 2022 | sizeof(u64)); |
| 2023 | } |
| 2024 | |
| Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2025 | static int cmp_map(const void *m0, const void *m1) |
| 2026 | { |
| 2027 | const struct nfit_set_info_map *map0 = m0; |
| 2028 | const struct nfit_set_info_map *map1 = m1; |
| 2029 | |
| Dan Williams | b03b99a | 2017-03-27 21:53:38 -0700 | [diff] [blame] | 2030 | if (map0->region_offset < map1->region_offset) |
| 2031 | return -1; |
| 2032 | else if (map0->region_offset > map1->region_offset) |
| 2033 | return 1; |
| 2034 | return 0; |
| Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2035 | } |
| 2036 | |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2037 | static int cmp_map2(const void *m0, const void *m1) |
| 2038 | { |
| 2039 | const struct nfit_set_info_map2 *map0 = m0; |
| 2040 | const struct nfit_set_info_map2 *map1 = m1; |
| 2041 | |
| 2042 | if (map0->region_offset < map1->region_offset) |
| 2043 | return -1; |
| 2044 | else if (map0->region_offset > map1->region_offset) |
| 2045 | return 1; |
| 2046 | return 0; |
| 2047 | } |
| 2048 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2049 | /* Retrieve the nth entry referencing this spa */ |
| 2050 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 2051 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 2052 | { |
| 2053 | struct nfit_memdev *nfit_memdev; |
| 2054 | |
| 2055 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 2056 | if (nfit_memdev->memdev->range_index == range_index) |
| 2057 | if (n-- == 0) |
| 2058 | return nfit_memdev->memdev; |
| 2059 | return NULL; |
| 2060 | } |
| 2061 | |
| 2062 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 2063 | struct nd_region_desc *ndr_desc, |
| 2064 | struct acpi_nfit_system_address *spa) |
| 2065 | { |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2066 | struct device *dev = acpi_desc->dev; |
| 2067 | struct nd_interleave_set *nd_set; |
| 2068 | u16 nr = ndr_desc->num_mappings; |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2069 | struct nfit_set_info2 *info2; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2070 | struct nfit_set_info *info; |
| Dan Williams | 8f2bc24 | 2017-06-06 11:39:30 -0700 | [diff] [blame] | 2071 | int i; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2072 | |
| Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2073 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 2074 | if (!nd_set) |
| 2075 | return -ENOMEM; |
| 2076 | ndr_desc->nd_set = nd_set; |
| 2077 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); |
| 2078 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2079 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 2080 | if (!info) |
| 2081 | return -ENOMEM; |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2082 | |
| 2083 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); |
| 2084 | if (!info2) |
| 2085 | return -ENOMEM; |
| 2086 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2087 | for (i = 0; i < nr; i++) { |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2088 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2089 | struct nfit_set_info_map *map = &info->mapping[i]; |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2090 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2091 | struct nvdimm *nvdimm = mapping->nvdimm; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2092 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 2093 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 2094 | spa->range_index, i); |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2095 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2096 | |
| 2097 | if (!memdev || !nfit_mem->dcr) { |
| 2098 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 2099 | return -ENODEV; |
| 2100 | } |
| 2101 | |
| 2102 | map->region_offset = memdev->region_offset; |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2103 | map->serial_number = dcr->serial_number; |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2104 | |
| 2105 | map2->region_offset = memdev->region_offset; |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2106 | map2->serial_number = dcr->serial_number; |
| 2107 | map2->vendor_id = dcr->vendor_id; |
| 2108 | map2->manufacturing_date = dcr->manufacturing_date; |
| 2109 | map2->manufacturing_location = dcr->manufacturing_location; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2110 | } |
| 2111 | |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2112 | /* v1.1 namespaces */ |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2113 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2114 | cmp_map, NULL); |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2115 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2116 | |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2117 | /* v1.2 namespaces */ |
| 2118 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), |
| 2119 | cmp_map2, NULL); |
| 2120 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); |
| 2121 | |
| 2122 | /* support v1.1 namespaces created with the wrong sort order */ |
| Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2123 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2124 | cmp_map_compat, NULL); |
| 2125 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 2126 | |
| Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2127 | /* record the result of the sort for the mapping position */ |
| 2128 | for (i = 0; i < nr; i++) { |
| 2129 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
| 2130 | int j; |
| 2131 | |
| 2132 | for (j = 0; j < nr; j++) { |
| 2133 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; |
| 2134 | struct nvdimm *nvdimm = mapping->nvdimm; |
| 2135 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2136 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
| Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2137 | |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2138 | if (map2->serial_number == dcr->serial_number && |
| 2139 | map2->vendor_id == dcr->vendor_id && |
| 2140 | map2->manufacturing_date == dcr->manufacturing_date && |
| Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2141 | map2->manufacturing_location |
| Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2142 | == dcr->manufacturing_location) { |
| Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2143 | mapping->position = i; |
| 2144 | break; |
| 2145 | } |
| 2146 | } |
| 2147 | } |
| 2148 | |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2149 | ndr_desc->nd_set = nd_set; |
| 2150 | devm_kfree(dev, info); |
| Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2151 | devm_kfree(dev, info2); |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2152 | |
| 2153 | return 0; |
| 2154 | } |
| 2155 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2156 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 2157 | { |
| 2158 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 2159 | u32 sub_line_offset, line_index, line_offset; |
| 2160 | u64 line_no, table_skip_count, table_offset; |
| 2161 | |
| 2162 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 2163 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 2164 | line_offset = idt->line_offset[line_index] |
| 2165 | * mmio->line_size; |
| 2166 | table_offset = table_skip_count * mmio->table_size; |
| 2167 | |
| 2168 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 2169 | } |
| 2170 | |
| Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 2171 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2172 | { |
| 2173 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2174 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
| Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2175 | const u32 STATUS_MASK = 0x80000037; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2176 | |
| 2177 | if (mmio->num_lines) |
| 2178 | offset = to_interleave_offset(offset, mmio); |
| 2179 | |
| Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2180 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2181 | } |
| 2182 | |
| 2183 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 2184 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 2185 | { |
| 2186 | u64 cmd, offset; |
| 2187 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2188 | |
| 2189 | enum { |
| 2190 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 2191 | BCW_LEN_SHIFT = 48, |
| 2192 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 2193 | BCW_CMD_SHIFT = 56, |
| 2194 | }; |
| 2195 | |
| 2196 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 2197 | len = len >> L1_CACHE_SHIFT; |
| 2198 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 2199 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 2200 | |
| 2201 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 2202 | if (mmio->num_lines) |
| 2203 | offset = to_interleave_offset(offset, mmio); |
| 2204 | |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2205 | writeq(cmd, mmio->addr.base + offset); |
| Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2206 | nvdimm_flush(nfit_blk->nd_region); |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2207 | |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2208 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2209 | readq(mmio->addr.base + offset); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2210 | } |
| 2211 | |
| 2212 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 2213 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 2214 | unsigned int lane) |
| 2215 | { |
| 2216 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2217 | unsigned int copied = 0; |
| 2218 | u64 base_offset; |
| 2219 | int rc; |
| 2220 | |
| 2221 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 2222 | + lane * mmio->size; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2223 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 2224 | while (len) { |
| 2225 | unsigned int c; |
| 2226 | u64 offset; |
| 2227 | |
| 2228 | if (mmio->num_lines) { |
| 2229 | u32 line_offset; |
| 2230 | |
| 2231 | offset = to_interleave_offset(base_offset + copied, |
| 2232 | mmio); |
| 2233 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 2234 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 2235 | } else { |
| 2236 | offset = base_offset + nfit_blk->bdw_offset; |
| 2237 | c = len; |
| 2238 | } |
| 2239 | |
| 2240 | if (rw) |
| Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 2241 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2242 | else { |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2243 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
| Robin Murphy | 5deb67f | 2017-08-31 12:27:09 +0100 | [diff] [blame] | 2244 | arch_invalidate_pmem((void __force *) |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2245 | mmio->addr.aperture + offset, c); |
| 2246 | |
| Dan Williams | 6abccd1 | 2017-01-13 14:14:23 -0800 | [diff] [blame] | 2247 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2248 | } |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2249 | |
| 2250 | copied += c; |
| 2251 | len -= c; |
| 2252 | } |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2253 | |
| 2254 | if (rw) |
| Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2255 | nvdimm_flush(nfit_blk->nd_region); |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2256 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2257 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 2258 | return rc; |
| 2259 | } |
| 2260 | |
| 2261 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 2262 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 2263 | { |
| 2264 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 2265 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2266 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 2267 | unsigned int lane, copied = 0; |
| 2268 | int rc = 0; |
| 2269 | |
| 2270 | lane = nd_region_acquire_lane(nd_region); |
| 2271 | while (len) { |
| 2272 | u64 c = min(len, mmio->size); |
| 2273 | |
| 2274 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 2275 | iobuf + copied, c, rw, lane); |
| 2276 | if (rc) |
| 2277 | break; |
| 2278 | |
| 2279 | copied += c; |
| 2280 | len -= c; |
| 2281 | } |
| 2282 | nd_region_release_lane(nd_region, lane); |
| 2283 | |
| 2284 | return rc; |
| 2285 | } |
| 2286 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2287 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 2288 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 2289 | { |
| 2290 | if (idt) { |
| 2291 | mmio->num_lines = idt->line_count; |
| 2292 | mmio->line_size = idt->line_size; |
| 2293 | if (interleave_ways == 0) |
| 2294 | return -ENXIO; |
| 2295 | mmio->table_size = mmio->num_lines * interleave_ways |
| 2296 | * mmio->line_size; |
| 2297 | } |
| 2298 | |
| 2299 | return 0; |
| 2300 | } |
| 2301 | |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2302 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 2303 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 2304 | { |
| 2305 | struct nd_cmd_dimm_flags flags; |
| 2306 | int rc; |
| 2307 | |
| 2308 | memset(&flags, 0, sizeof(flags)); |
| 2309 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2310 | sizeof(flags), NULL); |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2311 | |
| 2312 | if (rc >= 0 && flags.status == 0) |
| 2313 | nfit_blk->dimm_flags = flags.flags; |
| 2314 | else if (rc == -ENOTTY) { |
| 2315 | /* fall back to a conservative default */ |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2316 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2317 | rc = 0; |
| 2318 | } else |
| 2319 | rc = -ENXIO; |
| 2320 | |
| 2321 | return rc; |
| 2322 | } |
| 2323 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2324 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 2325 | struct device *dev) |
| 2326 | { |
| 2327 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2328 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 2329 | struct nfit_blk_mmio *mmio; |
| 2330 | struct nfit_blk *nfit_blk; |
| 2331 | struct nfit_mem *nfit_mem; |
| 2332 | struct nvdimm *nvdimm; |
| 2333 | int rc; |
| 2334 | |
| 2335 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 2336 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2337 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2338 | dev_dbg(dev, "missing%s%s%s\n", |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2339 | nfit_mem ? "" : " nfit_mem", |
| Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 2340 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 2341 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2342 | return -ENXIO; |
| 2343 | } |
| 2344 | |
| 2345 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 2346 | if (!nfit_blk) |
| 2347 | return -ENOMEM; |
| 2348 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 2349 | nfit_blk->nd_region = to_nd_region(dev); |
| 2350 | |
| 2351 | /* map block aperture memory */ |
| 2352 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 2353 | mmio = &nfit_blk->mmio[BDW]; |
| Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2354 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
| Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 2355 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2356 | if (!mmio->addr.base) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2357 | dev_dbg(dev, "%s failed to map bdw\n", |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2358 | nvdimm_name(nvdimm)); |
| 2359 | return -ENOMEM; |
| 2360 | } |
| 2361 | mmio->size = nfit_mem->bdw->size; |
| 2362 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 2363 | mmio->idt = nfit_mem->idt_bdw; |
| 2364 | mmio->spa = nfit_mem->spa_bdw; |
| 2365 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 2366 | nfit_mem->memdev_bdw->interleave_ways); |
| 2367 | if (rc) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2368 | dev_dbg(dev, "%s failed to init bdw interleave\n", |
| 2369 | nvdimm_name(nvdimm)); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2370 | return rc; |
| 2371 | } |
| 2372 | |
| 2373 | /* map block control memory */ |
| 2374 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 2375 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 2376 | mmio = &nfit_blk->mmio[DCR]; |
| Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2377 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
| 2378 | nfit_mem->spa_dcr->length); |
| Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2379 | if (!mmio->addr.base) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2380 | dev_dbg(dev, "%s failed to map dcr\n", |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2381 | nvdimm_name(nvdimm)); |
| 2382 | return -ENOMEM; |
| 2383 | } |
| 2384 | mmio->size = nfit_mem->dcr->window_size; |
| 2385 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 2386 | mmio->idt = nfit_mem->idt_dcr; |
| 2387 | mmio->spa = nfit_mem->spa_dcr; |
| 2388 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 2389 | nfit_mem->memdev_dcr->interleave_ways); |
| 2390 | if (rc) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2391 | dev_dbg(dev, "%s failed to init dcr interleave\n", |
| 2392 | nvdimm_name(nvdimm)); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2393 | return rc; |
| 2394 | } |
| 2395 | |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2396 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 2397 | if (rc < 0) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2398 | dev_dbg(dev, "%s failed get DIMM flags\n", |
| 2399 | nvdimm_name(nvdimm)); |
| Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2400 | return rc; |
| 2401 | } |
| 2402 | |
| Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2403 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2404 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 2405 | |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2406 | if (mmio->line_size == 0) |
| 2407 | return 0; |
| 2408 | |
| 2409 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 2410 | + 8 > mmio->line_size) { |
| 2411 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 2412 | return -ENXIO; |
| 2413 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 2414 | + 8 > mmio->line_size) { |
| 2415 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 2416 | return -ENXIO; |
| 2417 | } |
| 2418 | |
| 2419 | return 0; |
| 2420 | } |
| 2421 | |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2422 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2423 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2424 | { |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2425 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2426 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2427 | int cmd_rc, rc; |
| 2428 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2429 | cmd->address = spa->address; |
| 2430 | cmd->length = spa->length; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2431 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 2432 | sizeof(*cmd), &cmd_rc); |
| 2433 | if (rc < 0) |
| 2434 | return rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2435 | return cmd_rc; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2436 | } |
| 2437 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2438 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2439 | { |
| 2440 | int rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2441 | int cmd_rc; |
| 2442 | struct nd_cmd_ars_start ars_start; |
| 2443 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2444 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2445 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2446 | memset(&ars_start, 0, sizeof(ars_start)); |
| 2447 | ars_start.address = spa->address; |
| 2448 | ars_start.length = spa->length; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2449 | if (test_bit(ARS_SHORT, &nfit_spa->ars_state)) |
| 2450 | ars_start.flags = ND_ARS_RETURN_PREV_DATA; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2451 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 2452 | ars_start.type = ND_ARS_PERSISTENT; |
| 2453 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 2454 | ars_start.type = ND_ARS_VOLATILE; |
| 2455 | else |
| 2456 | return -ENOTTY; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2457 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2458 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2459 | sizeof(ars_start), &cmd_rc); |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2460 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2461 | if (rc < 0) |
| 2462 | return rc; |
| 2463 | return cmd_rc; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2464 | } |
| 2465 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2466 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2467 | { |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2468 | int rc, cmd_rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2469 | struct nd_cmd_ars_start ars_start; |
| 2470 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2471 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2472 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2473 | memset(&ars_start, 0, sizeof(ars_start)); |
| 2474 | ars_start.address = ars_status->restart_address; |
| 2475 | ars_start.length = ars_status->restart_length; |
| 2476 | ars_start.type = ars_status->type; |
| Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 2477 | ars_start.flags = acpi_desc->ars_start_flags; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2478 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2479 | sizeof(ars_start), &cmd_rc); |
| 2480 | if (rc < 0) |
| 2481 | return rc; |
| 2482 | return cmd_rc; |
| 2483 | } |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2484 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2485 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 2486 | { |
| 2487 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2488 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 2489 | int rc, cmd_rc; |
| Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2490 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2491 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2492 | acpi_desc->max_ars, &cmd_rc); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2493 | if (rc < 0) |
| 2494 | return rc; |
| 2495 | return cmd_rc; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2496 | } |
| 2497 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2498 | static void ars_complete(struct acpi_nfit_desc *acpi_desc, |
| 2499 | struct nfit_spa *nfit_spa) |
| 2500 | { |
| 2501 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 2502 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2503 | struct nd_region *nd_region = nfit_spa->nd_region; |
| 2504 | struct device *dev; |
| 2505 | |
| 2506 | if ((ars_status->address >= spa->address && ars_status->address |
| 2507 | < spa->address + spa->length) |
| 2508 | || (ars_status->address < spa->address)) { |
| 2509 | /* |
| 2510 | * Assume that if a scrub starts at an offset from the |
| 2511 | * start of nfit_spa that we are in the continuation |
| 2512 | * case. |
| 2513 | * |
| 2514 | * Otherwise, if the scrub covers the spa range, mark |
| 2515 | * any pending request complete. |
| 2516 | */ |
| 2517 | if (ars_status->address + ars_status->length |
| 2518 | >= spa->address + spa->length) |
| 2519 | /* complete */; |
| 2520 | else |
| 2521 | return; |
| 2522 | } else |
| 2523 | return; |
| 2524 | |
| 2525 | if (test_bit(ARS_DONE, &nfit_spa->ars_state)) |
| 2526 | return; |
| 2527 | |
| 2528 | if (!test_and_clear_bit(ARS_REQ, &nfit_spa->ars_state)) |
| 2529 | return; |
| 2530 | |
| 2531 | if (nd_region) { |
| 2532 | dev = nd_region_dev(nd_region); |
| 2533 | nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON); |
| 2534 | } else |
| 2535 | dev = acpi_desc->dev; |
| 2536 | |
| 2537 | dev_dbg(dev, "ARS: range %d %s complete\n", spa->range_index, |
| 2538 | test_bit(ARS_SHORT, &nfit_spa->ars_state) |
| 2539 | ? "short" : "long"); |
| 2540 | clear_bit(ARS_SHORT, &nfit_spa->ars_state); |
| 2541 | set_bit(ARS_DONE, &nfit_spa->ars_state); |
| 2542 | } |
| 2543 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2544 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc) |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2545 | { |
| Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2546 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2547 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2548 | int rc; |
| 2549 | u32 i; |
| 2550 | |
| Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2551 | /* |
| 2552 | * First record starts at 44 byte offset from the start of the |
| 2553 | * payload. |
| 2554 | */ |
| 2555 | if (ars_status->out_length < 44) |
| 2556 | return 0; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2557 | for (i = 0; i < ars_status->num_records; i++) { |
| Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2558 | /* only process full records */ |
| 2559 | if (ars_status->out_length |
| 2560 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) |
| 2561 | break; |
| Dave Jiang | aa9ad44 | 2017-08-23 12:48:26 -0700 | [diff] [blame] | 2562 | rc = nvdimm_bus_add_badrange(nvdimm_bus, |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2563 | ars_status->records[i].err_address, |
| 2564 | ars_status->records[i].length); |
| 2565 | if (rc) |
| 2566 | return rc; |
| 2567 | } |
| Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2568 | if (i < ars_status->num_records) |
| 2569 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2570 | |
| 2571 | return 0; |
| 2572 | } |
| 2573 | |
| Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2574 | static void acpi_nfit_remove_resource(void *data) |
| 2575 | { |
| 2576 | struct resource *res = data; |
| 2577 | |
| 2578 | remove_resource(res); |
| 2579 | } |
| 2580 | |
| 2581 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 2582 | struct nd_region_desc *ndr_desc) |
| 2583 | { |
| 2584 | struct resource *res, *nd_res = ndr_desc->res; |
| 2585 | int is_pmem, ret; |
| 2586 | |
| 2587 | /* No operation if the region is already registered as PMEM */ |
| 2588 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 2589 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 2590 | if (is_pmem == REGION_INTERSECTS) |
| 2591 | return 0; |
| 2592 | |
| 2593 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 2594 | if (!res) |
| 2595 | return -ENOMEM; |
| 2596 | |
| 2597 | res->name = "Persistent Memory"; |
| 2598 | res->start = nd_res->start; |
| 2599 | res->end = nd_res->end; |
| 2600 | res->flags = IORESOURCE_MEM; |
| 2601 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 2602 | |
| 2603 | ret = insert_resource(&iomem_resource, res); |
| 2604 | if (ret) |
| 2605 | return ret; |
| 2606 | |
| Sajjan, Vikas C | d932dd2 | 2016-07-04 10:02:51 +0530 | [diff] [blame] | 2607 | ret = devm_add_action_or_reset(acpi_desc->dev, |
| 2608 | acpi_nfit_remove_resource, |
| 2609 | res); |
| 2610 | if (ret) |
| Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2611 | return ret; |
| Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2612 | |
| 2613 | return 0; |
| 2614 | } |
| 2615 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2616 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2617 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2618 | struct acpi_nfit_memory_map *memdev, |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2619 | struct nfit_spa *nfit_spa) |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2620 | { |
| 2621 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 2622 | memdev->device_handle); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2623 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2624 | struct nd_blk_region_desc *ndbr_desc; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2625 | struct nfit_mem *nfit_mem; |
| Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2626 | int rc; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2627 | |
| 2628 | if (!nvdimm) { |
| 2629 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 2630 | spa->range_index, memdev->device_handle); |
| 2631 | return -ENODEV; |
| 2632 | } |
| 2633 | |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2634 | mapping->nvdimm = nvdimm; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2635 | switch (nfit_spa_type(spa)) { |
| 2636 | case NFIT_SPA_PM: |
| 2637 | case NFIT_SPA_VOLATILE: |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2638 | mapping->start = memdev->address; |
| 2639 | mapping->size = memdev->region_size; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2640 | break; |
| 2641 | case NFIT_SPA_DCR: |
| 2642 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2643 | if (!nfit_mem || !nfit_mem->bdw) { |
| 2644 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 2645 | spa->range_index, nvdimm_name(nvdimm)); |
| Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2646 | break; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2647 | } |
| 2648 | |
| Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2649 | mapping->size = nfit_mem->bdw->capacity; |
| 2650 | mapping->start = nfit_mem->bdw->start_address; |
| 2651 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2652 | ndr_desc->mapping = mapping; |
| Dan Williams | 0731de4 | 2018-03-21 21:22:34 -0700 | [diff] [blame] | 2653 | ndr_desc->num_mappings = 1; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2654 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 2655 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
| Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2656 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
| Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2657 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
| 2658 | if (rc) |
| 2659 | return rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2660 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 2661 | ndr_desc); |
| 2662 | if (!nfit_spa->nd_region) |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2663 | return -ENOMEM; |
| 2664 | break; |
| 2665 | } |
| 2666 | |
| 2667 | return 0; |
| 2668 | } |
| 2669 | |
| Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2670 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
| 2671 | { |
| 2672 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2673 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2674 | nfit_spa_type(spa) == NFIT_SPA_PDISK || |
| 2675 | nfit_spa_type(spa) == NFIT_SPA_PCD); |
| 2676 | } |
| 2677 | |
| Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 2678 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
| 2679 | { |
| 2680 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2681 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2682 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); |
| 2683 | } |
| 2684 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2685 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 2686 | struct nfit_spa *nfit_spa) |
| 2687 | { |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2688 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2689 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2690 | struct nd_blk_region_desc ndbr_desc; |
| 2691 | struct nd_region_desc *ndr_desc; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2692 | struct nfit_memdev *nfit_memdev; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2693 | struct nvdimm_bus *nvdimm_bus; |
| 2694 | struct resource res; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2695 | int count = 0, rc; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2696 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2697 | if (nfit_spa->nd_region) |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2698 | return 0; |
| 2699 | |
| Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2700 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 2701 | dev_dbg(acpi_desc->dev, "detected invalid spa index\n"); |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2702 | return 0; |
| 2703 | } |
| 2704 | |
| 2705 | memset(&res, 0, sizeof(res)); |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2706 | memset(&mappings, 0, sizeof(mappings)); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2707 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2708 | res.start = spa->address; |
| 2709 | res.end = res.start + spa->length - 1; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2710 | ndr_desc = &ndbr_desc.ndr_desc; |
| 2711 | ndr_desc->res = &res; |
| 2712 | ndr_desc->provider_data = nfit_spa; |
| 2713 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
| Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2714 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 2715 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 2716 | spa->proximity_domain); |
| 2717 | else |
| 2718 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 2719 | |
| Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 2720 | if(acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH) |
| 2721 | set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags); |
| 2722 | |
| Dave Jiang | 30e6d7b | 2018-01-31 12:45:43 -0700 | [diff] [blame] | 2723 | if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH) |
| 2724 | set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags); |
| 2725 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2726 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2727 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2728 | struct nd_mapping_desc *mapping; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2729 | |
| 2730 | if (memdev->range_index != spa->range_index) |
| 2731 | continue; |
| 2732 | if (count >= ND_MAX_MAPPINGS) { |
| 2733 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 2734 | spa->range_index, ND_MAX_MAPPINGS); |
| 2735 | return -ENXIO; |
| 2736 | } |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2737 | mapping = &mappings[count++]; |
| 2738 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2739 | memdev, nfit_spa); |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2740 | if (rc) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2741 | goto out; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2742 | } |
| 2743 | |
| Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2744 | ndr_desc->mapping = mappings; |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2745 | ndr_desc->num_mappings = count; |
| 2746 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2747 | if (rc) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2748 | goto out; |
| Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2749 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2750 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 2751 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
| Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2752 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
| Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2753 | if (rc) { |
| Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2754 | dev_warn(acpi_desc->dev, |
| 2755 | "failed to insert pmem resource to iomem: %d\n", |
| 2756 | rc); |
| Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2757 | goto out; |
| Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2758 | } |
| Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2759 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2760 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2761 | ndr_desc); |
| 2762 | if (!nfit_spa->nd_region) |
| 2763 | rc = -ENOMEM; |
| Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 2764 | } else if (nfit_spa_is_volatile(spa)) { |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2765 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 2766 | ndr_desc); |
| 2767 | if (!nfit_spa->nd_region) |
| 2768 | rc = -ENOMEM; |
| Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2769 | } else if (nfit_spa_is_virtual(spa)) { |
| 2770 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2771 | ndr_desc); |
| 2772 | if (!nfit_spa->nd_region) |
| 2773 | rc = -ENOMEM; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2774 | } |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2775 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2776 | out: |
| 2777 | if (rc) |
| 2778 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 2779 | nfit_spa->spa->range_index); |
| 2780 | return rc; |
| 2781 | } |
| 2782 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2783 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2784 | { |
| 2785 | struct device *dev = acpi_desc->dev; |
| 2786 | struct nd_cmd_ars_status *ars_status; |
| 2787 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2788 | if (acpi_desc->ars_status) { |
| 2789 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2790 | return 0; |
| 2791 | } |
| 2792 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2793 | ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2794 | if (!ars_status) |
| 2795 | return -ENOMEM; |
| 2796 | acpi_desc->ars_status = ars_status; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2797 | return 0; |
| 2798 | } |
| 2799 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2800 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2801 | { |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2802 | int rc; |
| 2803 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2804 | if (ars_status_alloc(acpi_desc)) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2805 | return -ENOMEM; |
| 2806 | |
| 2807 | rc = ars_get_status(acpi_desc); |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2808 | |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2809 | if (rc < 0 && rc != -ENOSPC) |
| 2810 | return rc; |
| 2811 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2812 | if (ars_status_process_records(acpi_desc)) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2813 | return -ENOMEM; |
| 2814 | |
| 2815 | return 0; |
| 2816 | } |
| 2817 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2818 | static int ars_register(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa, |
| 2819 | int *query_rc) |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2820 | { |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2821 | int rc = *query_rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2822 | |
| Dan Williams | bca811a | 2018-04-02 15:28:03 -0700 | [diff] [blame^] | 2823 | if (no_init_ars) |
| 2824 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2825 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2826 | set_bit(ARS_REQ, &nfit_spa->ars_state); |
| 2827 | set_bit(ARS_SHORT, &nfit_spa->ars_state); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2828 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2829 | switch (rc) { |
| 2830 | case 0: |
| 2831 | case -EAGAIN: |
| 2832 | rc = ars_start(acpi_desc, nfit_spa); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2833 | if (rc == -EBUSY) { |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2834 | *query_rc = rc; |
| 2835 | break; |
| 2836 | } else if (rc == 0) { |
| 2837 | rc = acpi_nfit_query_poison(acpi_desc); |
| 2838 | } else { |
| 2839 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2840 | break; |
| 2841 | } |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2842 | if (rc == -EAGAIN) |
| 2843 | clear_bit(ARS_SHORT, &nfit_spa->ars_state); |
| 2844 | else if (rc == 0) |
| 2845 | ars_complete(acpi_desc, nfit_spa); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2846 | break; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2847 | case -EBUSY: |
| 2848 | case -ENOSPC: |
| 2849 | break; |
| 2850 | default: |
| 2851 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
| 2852 | break; |
| 2853 | } |
| 2854 | |
| 2855 | if (test_and_clear_bit(ARS_DONE, &nfit_spa->ars_state)) |
| 2856 | set_bit(ARS_REQ, &nfit_spa->ars_state); |
| 2857 | |
| 2858 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2859 | } |
| 2860 | |
| 2861 | static void ars_complete_all(struct acpi_nfit_desc *acpi_desc) |
| 2862 | { |
| 2863 | struct nfit_spa *nfit_spa; |
| 2864 | |
| 2865 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2866 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
| 2867 | continue; |
| 2868 | ars_complete(acpi_desc, nfit_spa); |
| 2869 | } |
| 2870 | } |
| 2871 | |
| 2872 | static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc, |
| 2873 | int query_rc) |
| 2874 | { |
| 2875 | unsigned int tmo = acpi_desc->scrub_tmo; |
| 2876 | struct device *dev = acpi_desc->dev; |
| 2877 | struct nfit_spa *nfit_spa; |
| 2878 | |
| 2879 | if (acpi_desc->cancel) |
| 2880 | return 0; |
| 2881 | |
| 2882 | if (query_rc == -EBUSY) { |
| 2883 | dev_dbg(dev, "ARS: ARS busy\n"); |
| 2884 | return min(30U * 60U, tmo * 2); |
| 2885 | } |
| 2886 | if (query_rc == -ENOSPC) { |
| 2887 | dev_dbg(dev, "ARS: ARS continue\n"); |
| 2888 | ars_continue(acpi_desc); |
| 2889 | return 1; |
| 2890 | } |
| 2891 | if (query_rc && query_rc != -EAGAIN) { |
| 2892 | unsigned long long addr, end; |
| 2893 | |
| 2894 | addr = acpi_desc->ars_status->address; |
| 2895 | end = addr + acpi_desc->ars_status->length; |
| 2896 | dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end, |
| 2897 | query_rc); |
| 2898 | } |
| 2899 | |
| 2900 | ars_complete_all(acpi_desc); |
| 2901 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2902 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
| 2903 | continue; |
| 2904 | if (test_bit(ARS_REQ, &nfit_spa->ars_state)) { |
| 2905 | int rc = ars_start(acpi_desc, nfit_spa); |
| 2906 | |
| 2907 | clear_bit(ARS_DONE, &nfit_spa->ars_state); |
| 2908 | dev = nd_region_dev(nfit_spa->nd_region); |
| 2909 | dev_dbg(dev, "ARS: range %d ARS start (%d)\n", |
| 2910 | nfit_spa->spa->range_index, rc); |
| 2911 | if (rc == 0 || rc == -EBUSY) |
| 2912 | return 1; |
| 2913 | dev_err(dev, "ARS: range %d ARS failed (%d)\n", |
| 2914 | nfit_spa->spa->range_index, rc); |
| 2915 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
| 2916 | } |
| 2917 | } |
| 2918 | return 0; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2919 | } |
| 2920 | |
| 2921 | static void acpi_nfit_scrub(struct work_struct *work) |
| 2922 | { |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2923 | struct acpi_nfit_desc *acpi_desc; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2924 | unsigned int tmo; |
| 2925 | int query_rc; |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2926 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2927 | acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2928 | mutex_lock(&acpi_desc->init_mutex); |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2929 | query_rc = acpi_nfit_query_poison(acpi_desc); |
| 2930 | tmo = __acpi_nfit_scrub(acpi_desc, query_rc); |
| 2931 | if (tmo) { |
| 2932 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ); |
| 2933 | acpi_desc->scrub_tmo = tmo; |
| 2934 | } else { |
| 2935 | acpi_desc->scrub_count++; |
| 2936 | if (acpi_desc->scrub_count_state) |
| 2937 | sysfs_notify_dirent(acpi_desc->scrub_count_state); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2938 | } |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2939 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
| Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2940 | mutex_unlock(&acpi_desc->init_mutex); |
| 2941 | } |
| 2942 | |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2943 | static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc, |
| 2944 | struct nfit_spa *nfit_spa) |
| 2945 | { |
| 2946 | int type = nfit_spa_type(nfit_spa->spa); |
| 2947 | struct nd_cmd_ars_cap ars_cap; |
| 2948 | int rc; |
| 2949 | |
| 2950 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 2951 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 2952 | if (rc < 0) |
| 2953 | return; |
| 2954 | /* check that the supported scrub types match the spa type */ |
| 2955 | if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16) |
| 2956 | & ND_ARS_VOLATILE) == 0) |
| 2957 | return; |
| 2958 | if (type == NFIT_SPA_PM && ((ars_cap.status >> 16) |
| 2959 | & ND_ARS_PERSISTENT) == 0) |
| 2960 | return; |
| 2961 | |
| 2962 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 2963 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 2964 | acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars); |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2965 | clear_bit(ARS_FAILED, &nfit_spa->ars_state); |
| 2966 | set_bit(ARS_REQ, &nfit_spa->ars_state); |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2967 | } |
| 2968 | |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2969 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 2970 | { |
| 2971 | struct nfit_spa *nfit_spa; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2972 | int rc, query_rc; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2973 | |
| Dan Williams | 8d0d8ed | 2018-04-02 16:49:30 -0700 | [diff] [blame] | 2974 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2975 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
| 2976 | switch (nfit_spa_type(nfit_spa->spa)) { |
| 2977 | case NFIT_SPA_VOLATILE: |
| 2978 | case NFIT_SPA_PM: |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2979 | acpi_nfit_init_ars(acpi_desc, nfit_spa); |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2980 | break; |
| Dan Williams | 459d0dd | 2018-04-05 01:25:02 -0700 | [diff] [blame] | 2981 | } |
| Dan Williams | 8d0d8ed | 2018-04-02 16:49:30 -0700 | [diff] [blame] | 2982 | } |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2983 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 2984 | /* |
| 2985 | * Reap any results that might be pending before starting new |
| 2986 | * short requests. |
| 2987 | */ |
| 2988 | query_rc = acpi_nfit_query_poison(acpi_desc); |
| 2989 | if (query_rc == 0) |
| 2990 | ars_complete_all(acpi_desc); |
| 2991 | |
| 2992 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2993 | switch (nfit_spa_type(nfit_spa->spa)) { |
| 2994 | case NFIT_SPA_VOLATILE: |
| 2995 | case NFIT_SPA_PM: |
| 2996 | /* register regions and kick off initial ARS run */ |
| 2997 | rc = ars_register(acpi_desc, nfit_spa, &query_rc); |
| 2998 | if (rc) |
| 2999 | return rc; |
| 3000 | break; |
| 3001 | case NFIT_SPA_BDW: |
| 3002 | /* nothing to register */ |
| 3003 | break; |
| 3004 | case NFIT_SPA_DCR: |
| 3005 | case NFIT_SPA_VDISK: |
| 3006 | case NFIT_SPA_VCD: |
| 3007 | case NFIT_SPA_PDISK: |
| 3008 | case NFIT_SPA_PCD: |
| 3009 | /* register known regions that don't support ARS */ |
| 3010 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 3011 | if (rc) |
| 3012 | return rc; |
| 3013 | break; |
| 3014 | default: |
| 3015 | /* don't register unknown regions */ |
| 3016 | break; |
| 3017 | } |
| 3018 | |
| 3019 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0); |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3020 | return 0; |
| 3021 | } |
| 3022 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3023 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 3024 | struct nfit_table_prev *prev) |
| 3025 | { |
| 3026 | struct device *dev = acpi_desc->dev; |
| 3027 | |
| 3028 | if (!list_empty(&prev->spas) || |
| 3029 | !list_empty(&prev->memdevs) || |
| 3030 | !list_empty(&prev->dcrs) || |
| 3031 | !list_empty(&prev->bdws) || |
| 3032 | !list_empty(&prev->idts) || |
| 3033 | !list_empty(&prev->flushes)) { |
| 3034 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 3035 | return -ENXIO; |
| 3036 | } |
| 3037 | return 0; |
| 3038 | } |
| 3039 | |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3040 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
| 3041 | { |
| 3042 | struct device *dev = acpi_desc->dev; |
| 3043 | struct kernfs_node *nfit; |
| 3044 | struct device *bus_dev; |
| 3045 | |
| 3046 | if (!ars_supported(acpi_desc->nvdimm_bus)) |
| 3047 | return 0; |
| 3048 | |
| 3049 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 3050 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); |
| 3051 | if (!nfit) { |
| 3052 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); |
| 3053 | return -ENODEV; |
| 3054 | } |
| 3055 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); |
| 3056 | sysfs_put(nfit); |
| 3057 | if (!acpi_desc->scrub_count_state) { |
| 3058 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); |
| 3059 | return -ENODEV; |
| 3060 | } |
| 3061 | |
| 3062 | return 0; |
| 3063 | } |
| 3064 | |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3065 | static void acpi_nfit_unregister(void *data) |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3066 | { |
| 3067 | struct acpi_nfit_desc *acpi_desc = data; |
| 3068 | |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3069 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3070 | } |
| 3071 | |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3072 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3073 | { |
| 3074 | struct device *dev = acpi_desc->dev; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3075 | struct nfit_table_prev prev; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3076 | const void *end; |
| Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3077 | int rc; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3078 | |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3079 | if (!acpi_desc->nvdimm_bus) { |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3080 | acpi_nfit_init_dsms(acpi_desc); |
| 3081 | |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3082 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
| 3083 | &acpi_desc->nd_desc); |
| 3084 | if (!acpi_desc->nvdimm_bus) |
| 3085 | return -ENOMEM; |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3086 | |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3087 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3088 | acpi_desc); |
| 3089 | if (rc) |
| 3090 | return rc; |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3091 | |
| 3092 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); |
| 3093 | if (rc) |
| 3094 | return rc; |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3095 | |
| 3096 | /* register this acpi_desc for mce notifications */ |
| 3097 | mutex_lock(&acpi_desc_lock); |
| 3098 | list_add_tail(&acpi_desc->list, &acpi_descs); |
| 3099 | mutex_unlock(&acpi_desc_lock); |
| Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3100 | } |
| 3101 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3102 | mutex_lock(&acpi_desc->init_mutex); |
| 3103 | |
| 3104 | INIT_LIST_HEAD(&prev.spas); |
| 3105 | INIT_LIST_HEAD(&prev.memdevs); |
| 3106 | INIT_LIST_HEAD(&prev.dcrs); |
| 3107 | INIT_LIST_HEAD(&prev.bdws); |
| 3108 | INIT_LIST_HEAD(&prev.idts); |
| 3109 | INIT_LIST_HEAD(&prev.flushes); |
| 3110 | |
| 3111 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 3112 | acpi_desc->spas.prev); |
| 3113 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 3114 | acpi_desc->memdevs.prev); |
| 3115 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 3116 | acpi_desc->dcrs.prev); |
| 3117 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 3118 | acpi_desc->bdws.prev); |
| 3119 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 3120 | acpi_desc->idts.prev); |
| 3121 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 3122 | acpi_desc->flushes.prev); |
| 3123 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3124 | end = data + sz; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3125 | while (!IS_ERR_OR_NULL(data)) |
| 3126 | data = add_table(acpi_desc, &prev, data, end); |
| 3127 | |
| 3128 | if (IS_ERR(data)) { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3129 | dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data)); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3130 | rc = PTR_ERR(data); |
| 3131 | goto out_unlock; |
| 3132 | } |
| 3133 | |
| 3134 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 3135 | if (rc) |
| 3136 | goto out_unlock; |
| 3137 | |
| Dan Williams | 81ed4e3 | 2016-06-10 18:20:53 -0700 | [diff] [blame] | 3138 | rc = nfit_mem_init(acpi_desc); |
| 3139 | if (rc) |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3140 | goto out_unlock; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3141 | |
| 3142 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 3143 | if (rc) |
| 3144 | goto out_unlock; |
| 3145 | |
| 3146 | rc = acpi_nfit_register_regions(acpi_desc); |
| 3147 | |
| 3148 | out_unlock: |
| 3149 | mutex_unlock(&acpi_desc->init_mutex); |
| 3150 | return rc; |
| 3151 | } |
| 3152 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 3153 | |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3154 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 3155 | { |
| 3156 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 3157 | struct device *dev = acpi_desc->dev; |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3158 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3159 | /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3160 | device_lock(dev); |
| 3161 | device_unlock(dev); |
| 3162 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3163 | /* Bounce the init_mutex to complete initial registration */ |
| Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 3164 | mutex_lock(&acpi_desc->init_mutex); |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3165 | mutex_unlock(&acpi_desc->init_mutex); |
| Dan Williams | e471486 | 2017-02-02 10:31:00 -0800 | [diff] [blame] | 3166 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3167 | return 0; |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3168 | } |
| 3169 | |
| Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3170 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 3171 | struct nvdimm *nvdimm, unsigned int cmd) |
| 3172 | { |
| 3173 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 3174 | |
| 3175 | if (nvdimm) |
| 3176 | return 0; |
| 3177 | if (cmd != ND_CMD_ARS_START) |
| 3178 | return 0; |
| 3179 | |
| 3180 | /* |
| 3181 | * The kernel and userspace may race to initiate a scrub, but |
| 3182 | * the scrub thread is prepared to lose that initial race. It |
| 3183 | * just needs guarantees that any ars it initiates are not |
| 3184 | * interrupted by any intervening start reqeusts from userspace. |
| 3185 | */ |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3186 | if (work_busy(&acpi_desc->dwork.work)) |
| Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3187 | return -EBUSY; |
| 3188 | |
| 3189 | return 0; |
| 3190 | } |
| 3191 | |
| Dan Williams | 14c73f9 | 2018-04-02 15:40:30 -0700 | [diff] [blame] | 3192 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, unsigned long flags) |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3193 | { |
| 3194 | struct device *dev = acpi_desc->dev; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3195 | int scheduled = 0, busy = 0; |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3196 | struct nfit_spa *nfit_spa; |
| 3197 | |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3198 | mutex_lock(&acpi_desc->init_mutex); |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3199 | if (acpi_desc->cancel) { |
| 3200 | mutex_unlock(&acpi_desc->init_mutex); |
| 3201 | return 0; |
| 3202 | } |
| 3203 | |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3204 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3205 | int type = nfit_spa_type(nfit_spa->spa); |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3206 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3207 | if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE) |
| 3208 | continue; |
| 3209 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3210 | continue; |
| 3211 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3212 | if (test_and_set_bit(ARS_REQ, &nfit_spa->ars_state)) |
| 3213 | busy++; |
| 3214 | else { |
| 3215 | if (test_bit(ARS_SHORT, &flags)) |
| 3216 | set_bit(ARS_SHORT, &nfit_spa->ars_state); |
| 3217 | scheduled++; |
| 3218 | } |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3219 | } |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3220 | if (scheduled) { |
| 3221 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0); |
| 3222 | dev_dbg(dev, "ars_scan triggered\n"); |
| 3223 | } |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3224 | mutex_unlock(&acpi_desc->init_mutex); |
| 3225 | |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3226 | if (scheduled) |
| 3227 | return 0; |
| 3228 | if (busy) |
| 3229 | return -EBUSY; |
| 3230 | return -ENOTTY; |
| Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3231 | } |
| 3232 | |
| Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3233 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3234 | { |
| 3235 | struct nvdimm_bus_descriptor *nd_desc; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3236 | |
| 3237 | dev_set_drvdata(dev, acpi_desc); |
| 3238 | acpi_desc->dev = dev; |
| 3239 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 3240 | nd_desc = &acpi_desc->nd_desc; |
| 3241 | nd_desc->provider_name = "ACPI.NFIT"; |
| Dan Williams | bc9775d | 2016-07-21 20:03:19 -0700 | [diff] [blame] | 3242 | nd_desc->module = THIS_MODULE; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3243 | nd_desc->ndctl = acpi_nfit_ctl; |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3244 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
| Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3245 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3246 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 3247 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3248 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 3249 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 3250 | INIT_LIST_HEAD(&acpi_desc->bdws); |
| Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 3251 | INIT_LIST_HEAD(&acpi_desc->idts); |
| Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 3252 | INIT_LIST_HEAD(&acpi_desc->flushes); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3253 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 3254 | INIT_LIST_HEAD(&acpi_desc->dimms); |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3255 | INIT_LIST_HEAD(&acpi_desc->list); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3256 | mutex_init(&acpi_desc->init_mutex); |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3257 | acpi_desc->scrub_tmo = 1; |
| 3258 | INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3259 | } |
| Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3260 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3261 | |
| Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3262 | static void acpi_nfit_put_table(void *table) |
| 3263 | { |
| 3264 | acpi_put_table(table); |
| 3265 | } |
| 3266 | |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3267 | void acpi_nfit_shutdown(void *data) |
| 3268 | { |
| 3269 | struct acpi_nfit_desc *acpi_desc = data; |
| 3270 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 3271 | |
| 3272 | /* |
| 3273 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not |
| 3274 | * race teardown |
| 3275 | */ |
| 3276 | mutex_lock(&acpi_desc_lock); |
| 3277 | list_del(&acpi_desc->list); |
| 3278 | mutex_unlock(&acpi_desc_lock); |
| 3279 | |
| 3280 | mutex_lock(&acpi_desc->init_mutex); |
| 3281 | acpi_desc->cancel = 1; |
| Dan Williams | bc6ba80 | 2018-04-05 16:18:55 -0700 | [diff] [blame] | 3282 | cancel_delayed_work_sync(&acpi_desc->dwork); |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3283 | mutex_unlock(&acpi_desc->init_mutex); |
| 3284 | |
| 3285 | /* |
| 3286 | * Bounce the nvdimm bus lock to make sure any in-flight |
| 3287 | * acpi_nfit_ars_rescan() submissions have had a chance to |
| 3288 | * either submit or see ->cancel set. |
| 3289 | */ |
| 3290 | device_lock(bus_dev); |
| 3291 | device_unlock(bus_dev); |
| 3292 | |
| 3293 | flush_workqueue(nfit_wq); |
| 3294 | } |
| 3295 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); |
| 3296 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3297 | static int acpi_nfit_add(struct acpi_device *adev) |
| 3298 | { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3299 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3300 | struct acpi_nfit_desc *acpi_desc; |
| 3301 | struct device *dev = &adev->dev; |
| 3302 | struct acpi_table_header *tbl; |
| 3303 | acpi_status status = AE_OK; |
| 3304 | acpi_size sz; |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3305 | int rc = 0; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3306 | |
| Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3307 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3308 | if (ACPI_FAILURE(status)) { |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3309 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 3310 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 3311 | return 0; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3312 | } |
| Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3313 | |
| 3314 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); |
| 3315 | if (rc) |
| 3316 | return rc; |
| Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3317 | sz = tbl->length; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3318 | |
| Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3319 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3320 | if (!acpi_desc) |
| 3321 | return -ENOMEM; |
| 3322 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3323 | |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3324 | /* Save the acpi header for exporting the revision via sysfs */ |
| Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3325 | acpi_desc->acpi_header = *tbl; |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3326 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3327 | /* Evaluate _FIT and override with that if present */ |
| 3328 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 3329 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3330 | union acpi_object *obj = buf.pointer; |
| 3331 | |
| 3332 | if (obj->type == ACPI_TYPE_BUFFER) |
| 3333 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3334 | obj->buffer.length); |
| 3335 | else |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3336 | dev_dbg(dev, "invalid type %d, ignoring _FIT\n", |
| 3337 | (int) obj->type); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3338 | kfree(buf.pointer); |
| 3339 | } else |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3340 | /* skip over the lead-in header table */ |
| 3341 | rc = acpi_nfit_init(acpi_desc, (void *) tbl |
| 3342 | + sizeof(struct acpi_table_nfit), |
| 3343 | sz - sizeof(struct acpi_table_nfit)); |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3344 | |
| 3345 | if (rc) |
| 3346 | return rc; |
| 3347 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3348 | } |
| 3349 | |
| 3350 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 3351 | { |
| Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3352 | /* see acpi_nfit_unregister */ |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3353 | return 0; |
| 3354 | } |
| 3355 | |
| Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3356 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3357 | { |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3358 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3359 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3360 | union acpi_object *obj; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3361 | acpi_status status; |
| 3362 | int ret; |
| 3363 | |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3364 | if (!dev->driver) { |
| 3365 | /* dev->driver may be null if we're being removed */ |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3366 | dev_dbg(dev, "no driver found for dev\n"); |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3367 | return; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3368 | } |
| 3369 | |
| 3370 | if (!acpi_desc) { |
| Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3371 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3372 | if (!acpi_desc) |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3373 | return; |
| 3374 | acpi_nfit_desc_init(acpi_desc, dev); |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3375 | } else { |
| 3376 | /* |
| 3377 | * Finish previous registration before considering new |
| 3378 | * regions. |
| 3379 | */ |
| 3380 | flush_workqueue(nfit_wq); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3381 | } |
| 3382 | |
| 3383 | /* Evaluate _FIT */ |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3384 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3385 | if (ACPI_FAILURE(status)) { |
| 3386 | dev_err(dev, "failed to evaluate _FIT\n"); |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3387 | return; |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3388 | } |
| 3389 | |
| Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3390 | obj = buf.pointer; |
| 3391 | if (obj->type == ACPI_TYPE_BUFFER) { |
| Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3392 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3393 | obj->buffer.length); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3394 | if (ret) |
| Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3395 | dev_err(dev, "failed to merge updated NFIT\n"); |
| Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3396 | } else |
| Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3397 | dev_err(dev, "Invalid _FIT\n"); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3398 | kfree(buf.pointer); |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3399 | } |
| Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3400 | |
| 3401 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) |
| 3402 | { |
| 3403 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
| Dan Williams | 14c73f9 | 2018-04-02 15:40:30 -0700 | [diff] [blame] | 3404 | unsigned long flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ? |
| 3405 | 0 : 1 << ARS_SHORT; |
| Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3406 | |
| Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 3407 | acpi_nfit_ars_rescan(acpi_desc, flags); |
| Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3408 | } |
| 3409 | |
| 3410 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) |
| 3411 | { |
| Johannes Thumshirn | b814735 | 2018-03-02 13:20:49 +0100 | [diff] [blame] | 3412 | dev_dbg(dev, "event: 0x%x\n", event); |
| Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3413 | |
| 3414 | switch (event) { |
| 3415 | case NFIT_NOTIFY_UPDATE: |
| 3416 | return acpi_nfit_update_notify(dev, handle); |
| 3417 | case NFIT_NOTIFY_UC_MEMORY_ERROR: |
| 3418 | return acpi_nfit_uc_error_notify(dev, handle); |
| 3419 | default: |
| 3420 | return; |
| 3421 | } |
| 3422 | } |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3423 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3424 | |
| Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3425 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 3426 | { |
| 3427 | device_lock(&adev->dev); |
| 3428 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
| 3429 | device_unlock(&adev->dev); |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3430 | } |
| 3431 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3432 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 3433 | { "ACPI0012", 0 }, |
| 3434 | { "", 0 }, |
| 3435 | }; |
| 3436 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 3437 | |
| 3438 | static struct acpi_driver acpi_nfit_driver = { |
| 3439 | .name = KBUILD_MODNAME, |
| 3440 | .ids = acpi_nfit_ids, |
| 3441 | .ops = { |
| 3442 | .add = acpi_nfit_add, |
| 3443 | .remove = acpi_nfit_remove, |
| Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3444 | .notify = acpi_nfit_notify, |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3445 | }, |
| 3446 | }; |
| 3447 | |
| 3448 | static __init int nfit_init(void) |
| 3449 | { |
| Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3450 | int ret; |
| 3451 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3452 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 3453 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 3454 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 3455 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 3456 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 3457 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 3458 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| Dave Jiang | 06e8ccd | 2018-01-31 12:45:38 -0700 | [diff] [blame] | 3459 | BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3460 | |
| Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 3461 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
| 3462 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); |
| 3463 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); |
| 3464 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); |
| 3465 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); |
| 3466 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); |
| 3467 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); |
| 3468 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); |
| 3469 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); |
| 3470 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); |
| 3471 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 3472 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
| 3473 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3474 | |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3475 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 3476 | if (!nfit_wq) |
| 3477 | return -ENOMEM; |
| 3478 | |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3479 | nfit_mce_register(); |
| Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3480 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
| 3481 | if (ret) { |
| 3482 | nfit_mce_unregister(); |
| 3483 | destroy_workqueue(nfit_wq); |
| 3484 | } |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3485 | |
| Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3486 | return ret; |
| 3487 | |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3488 | } |
| 3489 | |
| 3490 | static __exit void nfit_exit(void) |
| 3491 | { |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3492 | nfit_mce_unregister(); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3493 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
| Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3494 | destroy_workqueue(nfit_wq); |
| Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3495 | WARN_ON(!list_empty(&acpi_descs)); |
| Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3496 | } |
| 3497 | |
| 3498 | module_init(nfit_init); |
| 3499 | module_exit(nfit_exit); |
| 3500 | MODULE_LICENSE("GPL v2"); |
| 3501 | MODULE_AUTHOR("Intel Corporation"); |