blob: 7b802e99851c0124407ca6e681d9b5d834cb9ee2 [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010019#include <linux/errno.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030020#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030021#include <linux/mmc/sdio_func.h>
22#include "core.h"
23#include "cfg80211.h"
24#include "target.h"
25#include "debug.h"
26#include "hif-ops.h"
27
28unsigned int debug_mask;
Kalle Valo003353b0d2011-09-01 10:14:21 +030029static unsigned int testmode;
Kalle Valo8277de12011-11-03 12:18:31 +020030static bool suspend_cutpower;
Kalle Valobdcd8172011-07-18 00:22:30 +030031
32module_param(debug_mask, uint, 0644);
Kalle Valo003353b0d2011-09-01 10:14:21 +030033module_param(testmode, uint, 0644);
Kalle Valo8277de12011-11-03 12:18:31 +020034module_param(suspend_cutpower, bool, 0444);
Kalle Valobdcd8172011-07-18 00:22:30 +030035
Kalle Valo856f4b312011-11-14 19:30:29 +020036static const struct ath6kl_hw hw_list[] = {
37 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020038 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020039 .name = "ar6003 hw 2.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020040 .dataset_patch_addr = 0x57e884,
41 .app_load_addr = 0x543180,
42 .board_ext_data_addr = 0x57e500,
43 .reserved_ram_size = 6912,
Ryan Hsu39586bf2011-12-13 17:11:07 +080044 .refclk_hz = 26000000,
45 .uarttx_pin = 8,
Kalle Valo856f4b312011-11-14 19:30:29 +020046
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020049
Kalle Valoc0038972011-12-16 20:53:31 +020050 .fw = {
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
56 .api2 = ATH6KL_FW_API2_FILE,
57 },
58
Kalle Valod1a94212011-11-14 19:31:23 +020059 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
60 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020061 },
62 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020063 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020064 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +020065 .dataset_patch_addr = 0x57ff74,
66 .app_load_addr = 0x1234,
67 .board_ext_data_addr = 0x542330,
68 .reserved_ram_size = 512,
Ryan Hsu39586bf2011-12-13 17:11:07 +080069 .refclk_hz = 26000000,
70 .uarttx_pin = 8,
Kalle Valod1a94212011-11-14 19:31:23 +020071
Kalle Valoc0038972011-12-16 20:53:31 +020072 .fw = {
73 .dir = AR6003_HW_2_1_1_FW_DIR,
74 .otp = AR6003_HW_2_1_1_OTP_FILE,
75 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
76 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
77 .patch = AR6003_HW_2_1_1_PATCH_FILE,
78 .api2 = ATH6KL_FW_API2_FILE,
79 },
80
Kalle Valod1a94212011-11-14 19:31:23 +020081 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
82 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020083 },
84 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020085 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020086 .name = "ar6004 hw 1.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020087 .dataset_patch_addr = 0x57e884,
88 .app_load_addr = 0x1234,
89 .board_ext_data_addr = 0x437000,
90 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020091 .board_addr = 0x433900,
Ryan Hsu39586bf2011-12-13 17:11:07 +080092 .refclk_hz = 26000000,
93 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +020094
Kalle Valoc0038972011-12-16 20:53:31 +020095 .fw = {
96 .dir = AR6004_HW_1_0_FW_DIR,
97 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
98 .api2 = ATH6KL_FW_API2_FILE,
99 },
100
Kalle Valod1a94212011-11-14 19:31:23 +0200101 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
102 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200103 },
104 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +0200105 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +0200106 .name = "ar6004 hw 1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +0200107 .dataset_patch_addr = 0x57e884,
108 .app_load_addr = 0x1234,
109 .board_ext_data_addr = 0x437000,
110 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +0200111 .board_addr = 0x43d400,
Ryan Hsu39586bf2011-12-13 17:11:07 +0800112 .refclk_hz = 40000000,
113 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +0200114
Kalle Valoc0038972011-12-16 20:53:31 +0200115 .fw = {
116 .dir = AR6004_HW_1_1_FW_DIR,
117 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
118 .api2 = ATH6KL_FW_API2_FILE,
119 },
120
Kalle Valod1a94212011-11-14 19:31:23 +0200121 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
122 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200123 },
124};
125
Kalle Valobdcd8172011-07-18 00:22:30 +0300126/*
127 * Include definitions here that can be used to tune the WLAN module
128 * behavior. Different customers can tune the behavior as per their needs,
129 * here.
130 */
131
132/*
133 * This configuration item enable/disable keepalive support.
134 * Keepalive support: In the absence of any data traffic to AP, null
135 * frames will be sent to the AP at periodic interval, to keep the association
136 * active. This configuration item defines the periodic interval.
137 * Use value of zero to disable keepalive support
138 * Default: 60 seconds
139 */
140#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
141
142/*
143 * This configuration item sets the value of disconnect timeout
144 * Firmware delays sending the disconnec event to the host for this
145 * timeout after is gets disconnected from the current AP.
146 * If the firmware successly roams within the disconnect timeout
147 * it sends a new connect event
148 */
149#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
150
Kalle Valobdcd8172011-07-18 00:22:30 +0300151
Kalle Valobdcd8172011-07-18 00:22:30 +0300152#define ATH6KL_DATA_OFFSET 64
153struct sk_buff *ath6kl_buf_alloc(int size)
154{
155 struct sk_buff *skb;
156 u16 reserved;
157
158 /* Add chacheline space at front and back of buffer */
159 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530160 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300161 skb = dev_alloc_skb(size + reserved);
162
163 if (skb)
164 skb_reserve(skb, reserved - L1_CACHE_BYTES);
165 return skb;
166}
167
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530168void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300169{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530170 vif->ssid_len = 0;
171 memset(vif->ssid, 0, sizeof(vif->ssid));
172
173 vif->dot11_auth_mode = OPEN_AUTH;
174 vif->auth_mode = NONE_AUTH;
175 vif->prwise_crypto = NONE_CRYPT;
176 vif->prwise_crypto_len = 0;
177 vif->grp_crypto = NONE_CRYPT;
178 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530179 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530180 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
181 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530182 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300183}
184
Kalle Valobdcd8172011-07-18 00:22:30 +0300185static int ath6kl_set_host_app_area(struct ath6kl *ar)
186{
187 u32 address, data;
188 struct host_app_area host_app_area;
189
190 /* Fetch the address of the host_app_area_s
191 * instance in the host interest area */
192 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800193 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300194
Kalle Valoaddb44b2011-09-02 10:32:05 +0300195 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300196 return -EIO;
197
Kevin Fang31024d92011-07-11 17:14:13 +0800198 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300199 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300200 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
201 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300202 return -EIO;
203
204 return 0;
205}
206
207static inline void set_ac2_ep_map(struct ath6kl *ar,
208 u8 ac,
209 enum htc_endpoint_id ep)
210{
211 ar->ac2ep_map[ac] = ep;
212 ar->ep2ac_map[ep] = ac;
213}
214
215/* connect to a service */
216static int ath6kl_connectservice(struct ath6kl *ar,
217 struct htc_service_connect_req *con_req,
218 char *desc)
219{
220 int status;
221 struct htc_service_connect_resp response;
222
223 memset(&response, 0, sizeof(response));
224
Kalle Vaload226ec2011-08-10 09:49:12 +0300225 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300226 if (status) {
227 ath6kl_err("failed to connect to %s service status:%d\n",
228 desc, status);
229 return status;
230 }
231
232 switch (con_req->svc_id) {
233 case WMI_CONTROL_SVC:
234 if (test_bit(WMI_ENABLED, &ar->flag))
235 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
236 ar->ctrl_ep = response.endpoint;
237 break;
238 case WMI_DATA_BE_SVC:
239 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
240 break;
241 case WMI_DATA_BK_SVC:
242 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
243 break;
244 case WMI_DATA_VI_SVC:
245 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
246 break;
247 case WMI_DATA_VO_SVC:
248 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
249 break;
250 default:
251 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
252 return -EINVAL;
253 }
254
255 return 0;
256}
257
258static int ath6kl_init_service_ep(struct ath6kl *ar)
259{
260 struct htc_service_connect_req connect;
261
262 memset(&connect, 0, sizeof(connect));
263
264 /* these fields are the same for all service endpoints */
265 connect.ep_cb.rx = ath6kl_rx;
266 connect.ep_cb.rx_refill = ath6kl_rx_refill;
267 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
268
269 /*
270 * Set the max queue depth so that our ath6kl_tx_queue_full handler
271 * gets called.
272 */
273 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
274 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
275 if (!connect.ep_cb.rx_refill_thresh)
276 connect.ep_cb.rx_refill_thresh++;
277
278 /* connect to control service */
279 connect.svc_id = WMI_CONTROL_SVC;
280 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
281 return -EIO;
282
283 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
284
285 /*
286 * Limit the HTC message size on the send path, although e can
287 * receive A-MSDU frames of 4K, we will only send ethernet-sized
288 * (802.3) frames on the send path.
289 */
290 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
291
292 /*
293 * To reduce the amount of committed memory for larger A_MSDU
294 * frames, use the recv-alloc threshold mechanism for larger
295 * packets.
296 */
297 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
298 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
299
300 /*
301 * For the remaining data services set the connection flag to
302 * reduce dribbling, if configured to do so.
303 */
304 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
305 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
306 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
307
308 connect.svc_id = WMI_DATA_BE_SVC;
309
310 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
311 return -EIO;
312
313 /* connect to back-ground map this to WMI LOW_PRI */
314 connect.svc_id = WMI_DATA_BK_SVC;
315 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
316 return -EIO;
317
318 /* connect to Video service, map this to to HI PRI */
319 connect.svc_id = WMI_DATA_VI_SVC;
320 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
321 return -EIO;
322
323 /*
324 * Connect to VO service, this is currently not mapped to a WMI
325 * priority stream due to historical reasons. WMI originally
326 * defined 3 priorities over 3 mailboxes We can change this when
327 * WMI is reworked so that priorities are not dependent on
328 * mailboxes.
329 */
330 connect.svc_id = WMI_DATA_VO_SVC;
331 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
332 return -EIO;
333
334 return 0;
335}
336
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530337void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300338{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530339 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530340 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530341 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530342 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300343}
344
345/*
346 * Set HTC/Mbox operational parameters, this can only be called when the
347 * target is in the BMI phase.
348 */
349static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
350 u8 htc_ctrl_buf)
351{
352 int status;
353 u32 blk_size;
354
355 blk_size = ar->mbox_info.block_size;
356
357 if (htc_ctrl_buf)
358 blk_size |= ((u32)htc_ctrl_buf) << 16;
359
360 /* set the host interest area for the block size */
361 status = ath6kl_bmi_write(ar,
362 ath6kl_get_hi_item_addr(ar,
363 HI_ITEM(hi_mbox_io_block_sz)),
364 (u8 *)&blk_size,
365 4);
366 if (status) {
367 ath6kl_err("bmi_write_memory for IO block size failed\n");
368 goto out;
369 }
370
371 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
372 blk_size,
373 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
374
375 if (mbox_isr_yield_val) {
376 /* set the host interest area for the mbox ISR yield limit */
377 status = ath6kl_bmi_write(ar,
378 ath6kl_get_hi_item_addr(ar,
379 HI_ITEM(hi_mbox_isr_yield_limit)),
380 (u8 *)&mbox_isr_yield_val,
381 4);
382 if (status) {
383 ath6kl_err("bmi_write_memory for yield limit failed\n");
384 goto out;
385 }
386 }
387
388out:
389 return status;
390}
391
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530392static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300393{
394 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300395 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300396
397 /*
398 * Configure the device for rx dot11 header rules. "0,0" are the
399 * default values. Required if checksum offload is needed. Set
400 * RxMetaVersion to 2.
401 */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530402 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300403 ar->rx_meta_ver, 0, 0)) {
404 ath6kl_err("unable to set the rx frame format\n");
405 status = -EIO;
406 }
407
408 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530409 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valobdcd8172011-07-18 00:22:30 +0300410 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
411 ath6kl_err("unable to set power save fail event policy\n");
412 status = -EIO;
413 }
414
415 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530416 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valobdcd8172011-07-18 00:22:30 +0300417 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
418 ath6kl_err("unable to set barker preamble policy\n");
419 status = -EIO;
420 }
421
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530422 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300423 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
424 ath6kl_err("unable to set keep alive interval\n");
425 status = -EIO;
426 }
427
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530428 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300429 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
430 ath6kl_err("unable to set disconnect timeout\n");
431 status = -EIO;
432 }
433
434 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530435 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300436 ath6kl_err("unable to set txop bursting\n");
437 status = -EIO;
438 }
439
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530440 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530441 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300442 P2P_FLAG_CAPABILITIES_REQ |
443 P2P_FLAG_MACADDR_REQ |
444 P2P_FLAG_HMODEL_REQ);
445 if (ret) {
446 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
447 "capabilities (%d) - assuming P2P not "
448 "supported\n", ret);
449 ar->p2p = 0;
450 }
451 }
452
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530453 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300454 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530455 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300456 if (ret) {
457 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
458 "Request reporting (%d)\n", ret);
459 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300460 }
461
Kalle Valobdcd8172011-07-18 00:22:30 +0300462 return status;
463}
464
465int ath6kl_configure_target(struct ath6kl *ar)
466{
467 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530468 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Ryan Hsu39586bf2011-12-13 17:11:07 +0800469 int i, status;
Kalle Valobdcd8172011-07-18 00:22:30 +0300470
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530471 /*
472 * Note: Even though the firmware interface type is
473 * chosen as BSS_STA for all three interfaces, can
474 * be configured to IBSS/AP as long as the fw submode
475 * remains normal mode (0 - AP, STA and IBSS). But
476 * due to an target assert in firmware only one interface is
477 * configured for now.
478 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530479 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300480
Kalle Valo71f96ee2011-11-14 19:31:30 +0200481 for (i = 0; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530482 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
483
484 /*
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530485 * By default, submodes :
486 * vif[0] - AP/STA/IBSS
487 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
488 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530489 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530490
491 for (i = 0; i < ar->max_norm_iface; i++)
492 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
493 (i * HI_OPTION_FW_SUBMODE_BITS);
494
Kalle Valo71f96ee2011-11-14 19:31:30 +0200495 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530496 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
497 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530498
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530499 if (ar->p2p && ar->vif_max == 1)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530500 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530501
Kalle Valobdcd8172011-07-18 00:22:30 +0300502 param = HTC_PROTOCOL_VERSION;
503 if (ath6kl_bmi_write(ar,
504 ath6kl_get_hi_item_addr(ar,
505 HI_ITEM(hi_app_host_interest)),
506 (u8 *)&param, 4) != 0) {
507 ath6kl_err("bmi_write_memory for htc version failed\n");
508 return -EIO;
509 }
510
511 /* set the firmware mode to STA/IBSS/AP */
512 param = 0;
513
514 if (ath6kl_bmi_read(ar,
515 ath6kl_get_hi_item_addr(ar,
516 HI_ITEM(hi_option_flag)),
517 (u8 *)&param, 4) != 0) {
518 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
519 return -EIO;
520 }
521
Kalle Valo71f96ee2011-11-14 19:31:30 +0200522 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530523 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
524 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
525
Kalle Valobdcd8172011-07-18 00:22:30 +0300526 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
527 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
528
529 if (ath6kl_bmi_write(ar,
530 ath6kl_get_hi_item_addr(ar,
531 HI_ITEM(hi_option_flag)),
532 (u8 *)&param,
533 4) != 0) {
534 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
535 return -EIO;
536 }
537
538 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
539
540 /*
541 * Hardcode the address use for the extended board data
542 * Ideally this should be pre-allocate by the OS at boot time
543 * But since it is a new feature and board data is loaded
544 * at init time, we have to workaround this from host.
545 * It is difficult to patch the firmware boot code,
546 * but possible in theory.
547 */
548
Kalle Valo991b27e2011-09-07 10:55:17 +0300549 param = ar->hw.board_ext_data_addr;
550 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300551
Kalle Valo991b27e2011-09-07 10:55:17 +0300552 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
553 HI_ITEM(hi_board_ext_data)),
554 (u8 *)&param, 4) != 0) {
555 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
556 return -EIO;
557 }
558
559 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
560 HI_ITEM(hi_end_ram_reserve_sz)),
561 (u8 *)&ram_reserved_size, 4) != 0) {
562 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
563 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300564 }
565
566 /* set the block size for the target */
567 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
568 /* use default number of control buffers */
569 return -EIO;
570
Ryan Hsu39586bf2011-12-13 17:11:07 +0800571 /* Configure GPIO AR600x UART */
572 param = ar->hw.uarttx_pin;
573 status = ath6kl_bmi_write(ar,
574 ath6kl_get_hi_item_addr(ar,
575 HI_ITEM(hi_dbg_uart_txpin)),
576 (u8 *)&param, 4);
577 if (status)
578 return status;
579
580 /* Configure target refclk_hz */
581 param = ar->hw.refclk_hz;
582 status = ath6kl_bmi_write(ar,
583 ath6kl_get_hi_item_addr(ar,
584 HI_ITEM(hi_refclk_hz)),
585 (u8 *)&param, 4);
586 if (status)
587 return status;
588
Kalle Valobdcd8172011-07-18 00:22:30 +0300589 return 0;
590}
591
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530592void ath6kl_core_free(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300593{
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530594 wiphy_free(ar->wiphy);
Kalle Valobdcd8172011-07-18 00:22:30 +0300595}
596
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530597void ath6kl_core_cleanup(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300598{
Kalle Valob2e75692011-10-27 18:48:14 +0300599 ath6kl_hif_power_off(ar);
600
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530601 destroy_workqueue(ar->ath6kl_wq);
Kalle Valobdcd8172011-07-18 00:22:30 +0300602
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530603 if (ar->htc_target)
604 ath6kl_htc_cleanup(ar->htc_target);
605
606 ath6kl_cookie_cleanup(ar);
607
608 ath6kl_cleanup_amsdu_rxbufs(ar);
609
610 ath6kl_bmi_cleanup(ar);
611
612 ath6kl_debug_cleanup(ar);
613
614 kfree(ar->fw_board);
615 kfree(ar->fw_otp);
616 kfree(ar->fw);
617 kfree(ar->fw_patch);
618
619 ath6kl_deinit_ieee80211_hw(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +0300620}
621
622/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300623static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
624 u8 **fw, size_t *fw_len)
625{
626 const struct firmware *fw_entry;
627 int ret;
628
629 ret = request_firmware(&fw_entry, filename, ar->dev);
630 if (ret)
631 return ret;
632
633 *fw_len = fw_entry->size;
634 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
635
636 if (*fw == NULL)
637 ret = -ENOMEM;
638
639 release_firmware(fw_entry);
640
641 return ret;
642}
643
Sam Leffler92ecbff2011-09-07 10:55:16 +0300644#ifdef CONFIG_OF
Sam Leffler92ecbff2011-09-07 10:55:16 +0300645/*
646 * Check the device tree for a board-id and use it to construct
647 * the pathname to the firmware file. Used (for now) to find a
648 * fallback to the "bdata.bin" file--typically a symlink to the
649 * appropriate board-specific file.
650 */
651static bool check_device_tree(struct ath6kl *ar)
652{
653 static const char *board_id_prop = "atheros,board-id";
654 struct device_node *node;
655 char board_filename[64];
656 const char *board_id;
657 int ret;
658
659 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
660 board_id = of_get_property(node, board_id_prop, NULL);
661 if (board_id == NULL) {
662 ath6kl_warn("No \"%s\" property on %s node.\n",
663 board_id_prop, node->name);
664 continue;
665 }
666 snprintf(board_filename, sizeof(board_filename),
Kalle Valoc0038972011-12-16 20:53:31 +0200667 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
Sam Leffler92ecbff2011-09-07 10:55:16 +0300668
669 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
670 &ar->fw_board_len);
671 if (ret) {
672 ath6kl_err("Failed to get DT board file %s: %d\n",
673 board_filename, ret);
674 continue;
675 }
676 return true;
677 }
678 return false;
679}
680#else
681static bool check_device_tree(struct ath6kl *ar)
682{
683 return false;
684}
685#endif /* CONFIG_OF */
686
Kalle Valobdcd8172011-07-18 00:22:30 +0300687static int ath6kl_fetch_board_file(struct ath6kl *ar)
688{
689 const char *filename;
690 int ret;
691
Kalle Valo772c31e2011-09-07 10:55:16 +0300692 if (ar->fw_board != NULL)
693 return 0;
694
Kalle Valod1a94212011-11-14 19:31:23 +0200695 if (WARN_ON(ar->hw.fw_board == NULL))
696 return -EINVAL;
697
698 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300699
700 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
701 &ar->fw_board_len);
702 if (ret == 0) {
703 /* managed to get proper board file */
704 return 0;
705 }
706
Sam Leffler92ecbff2011-09-07 10:55:16 +0300707 if (check_device_tree(ar)) {
708 /* got board file from device tree */
709 return 0;
710 }
711
Kalle Valobdcd8172011-07-18 00:22:30 +0300712 /* there was no proper board file, try to use default instead */
713 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
714 filename, ret);
715
Kalle Valod1a94212011-11-14 19:31:23 +0200716 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300717
718 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
719 &ar->fw_board_len);
720 if (ret) {
721 ath6kl_err("Failed to get default board file %s: %d\n",
722 filename, ret);
723 return ret;
724 }
725
726 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
727 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
728
729 return 0;
730}
731
Kalle Valo772c31e2011-09-07 10:55:16 +0300732static int ath6kl_fetch_otp_file(struct ath6kl *ar)
733{
Kalle Valoc0038972011-12-16 20:53:31 +0200734 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300735 int ret;
736
737 if (ar->fw_otp != NULL)
738 return 0;
739
Kalle Valoc0038972011-12-16 20:53:31 +0200740 if (ar->hw.fw.otp == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200741 ath6kl_dbg(ATH6KL_DBG_BOOT,
742 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300743 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300744 }
745
Kalle Valoc0038972011-12-16 20:53:31 +0200746 snprintf(filename, sizeof(filename), "%s/%s",
747 ar->hw.fw.dir, ar->hw.fw.otp);
Kalle Valod1a94212011-11-14 19:31:23 +0200748
Kalle Valo772c31e2011-09-07 10:55:16 +0300749 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
750 &ar->fw_otp_len);
751 if (ret) {
752 ath6kl_err("Failed to get OTP file %s: %d\n",
753 filename, ret);
754 return ret;
755 }
756
757 return 0;
758}
759
760static int ath6kl_fetch_fw_file(struct ath6kl *ar)
761{
Kalle Valoc0038972011-12-16 20:53:31 +0200762 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300763 int ret;
764
765 if (ar->fw != NULL)
766 return 0;
767
768 if (testmode) {
Kalle Valoc0038972011-12-16 20:53:31 +0200769 if (ar->hw.fw.tcmd == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200770 ath6kl_warn("testmode not supported\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300771 return -EOPNOTSUPP;
Kalle Valo772c31e2011-09-07 10:55:16 +0300772 }
773
Kalle Valoc0038972011-12-16 20:53:31 +0200774 snprintf(filename, sizeof(filename), "%s/%s",
775 ar->hw.fw.dir, ar->hw.fw.tcmd);
Kalle Valod1a94212011-11-14 19:31:23 +0200776
Kalle Valo772c31e2011-09-07 10:55:16 +0300777 set_bit(TESTMODE, &ar->flag);
778
779 goto get_fw;
780 }
781
Kalle Valoc0038972011-12-16 20:53:31 +0200782 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
783 if (WARN_ON(ar->hw.fw.fw == NULL))
Kalle Valod1a94212011-11-14 19:31:23 +0200784 return -EINVAL;
785
Kalle Valoc0038972011-12-16 20:53:31 +0200786 snprintf(filename, sizeof(filename), "%s/%s",
787 ar->hw.fw.dir, ar->hw.fw.fw);
Kalle Valo772c31e2011-09-07 10:55:16 +0300788
789get_fw:
790 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
791 if (ret) {
792 ath6kl_err("Failed to get firmware file %s: %d\n",
793 filename, ret);
794 return ret;
795 }
796
797 return 0;
798}
799
800static int ath6kl_fetch_patch_file(struct ath6kl *ar)
801{
Kalle Valoc0038972011-12-16 20:53:31 +0200802 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300803 int ret;
804
Kalle Valod1a94212011-11-14 19:31:23 +0200805 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300806 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300807
Kalle Valoc0038972011-12-16 20:53:31 +0200808 if (ar->hw.fw.patch == NULL)
Kalle Valod1a94212011-11-14 19:31:23 +0200809 return 0;
810
Kalle Valoc0038972011-12-16 20:53:31 +0200811 snprintf(filename, sizeof(filename), "%s/%s",
812 ar->hw.fw.dir, ar->hw.fw.patch);
Kalle Valod1a94212011-11-14 19:31:23 +0200813
814 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
815 &ar->fw_patch_len);
816 if (ret) {
817 ath6kl_err("Failed to get patch file %s: %d\n",
818 filename, ret);
819 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300820 }
821
822 return 0;
823}
824
Kalle Valo50d41232011-09-07 10:55:17 +0300825static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300826{
827 int ret;
828
Kalle Valo772c31e2011-09-07 10:55:16 +0300829 ret = ath6kl_fetch_otp_file(ar);
830 if (ret)
831 return ret;
832
833 ret = ath6kl_fetch_fw_file(ar);
834 if (ret)
835 return ret;
836
837 ret = ath6kl_fetch_patch_file(ar);
838 if (ret)
839 return ret;
840
841 return 0;
842}
Kalle Valobdcd8172011-07-18 00:22:30 +0300843
Kalle Valo50d41232011-09-07 10:55:17 +0300844static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
845{
846 size_t magic_len, len, ie_len;
847 const struct firmware *fw;
848 struct ath6kl_fw_ie *hdr;
Kalle Valoc0038972011-12-16 20:53:31 +0200849 char filename[100];
Kalle Valo50d41232011-09-07 10:55:17 +0300850 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300851 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300852 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300853
Kalle Valoc0038972011-12-16 20:53:31 +0200854 if (ar->hw.fw.api2 == NULL)
Kalle Valo50d41232011-09-07 10:55:17 +0300855 return -EOPNOTSUPP;
Kalle Valod1a94212011-11-14 19:31:23 +0200856
Kalle Valoc0038972011-12-16 20:53:31 +0200857 snprintf(filename, sizeof(filename), "%s/%s",
858 ar->hw.fw.dir, ar->hw.fw.api2);
Kalle Valo50d41232011-09-07 10:55:17 +0300859
860 ret = request_firmware(&fw, filename, ar->dev);
861 if (ret)
862 return ret;
863
864 data = fw->data;
865 len = fw->size;
866
867 /* magic also includes the null byte, check that as well */
868 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
869
870 if (len < magic_len) {
871 ret = -EINVAL;
872 goto out;
873 }
874
875 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
876 ret = -EINVAL;
877 goto out;
878 }
879
880 len -= magic_len;
881 data += magic_len;
882
883 /* loop elements */
884 while (len > sizeof(struct ath6kl_fw_ie)) {
885 /* hdr is unaligned! */
886 hdr = (struct ath6kl_fw_ie *) data;
887
888 ie_id = le32_to_cpup(&hdr->id);
889 ie_len = le32_to_cpup(&hdr->len);
890
891 len -= sizeof(*hdr);
892 data += sizeof(*hdr);
893
894 if (len < ie_len) {
895 ret = -EINVAL;
896 goto out;
897 }
898
899 switch (ie_id) {
900 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300901 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300902 ie_len);
903
Kalle Valo50d41232011-09-07 10:55:17 +0300904 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
905
906 if (ar->fw_otp == NULL) {
907 ret = -ENOMEM;
908 goto out;
909 }
910
911 ar->fw_otp_len = ie_len;
912 break;
913 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300914 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300915 ie_len);
916
Kalle Valo50d41232011-09-07 10:55:17 +0300917 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
918
919 if (ar->fw == NULL) {
920 ret = -ENOMEM;
921 goto out;
922 }
923
924 ar->fw_len = ie_len;
925 break;
926 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300927 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300928 ie_len);
929
Kalle Valo50d41232011-09-07 10:55:17 +0300930 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
931
932 if (ar->fw_patch == NULL) {
933 ret = -ENOMEM;
934 goto out;
935 }
936
937 ar->fw_patch_len = ie_len;
938 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300939 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
940 val = (__le32 *) data;
941 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300942
943 ath6kl_dbg(ATH6KL_DBG_BOOT,
944 "found reserved ram size ie 0x%d\n",
945 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300946 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300947 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo277d90f2011-12-13 14:51:58 +0200948 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
949 break;
950
Kalle Valo6bc36432011-09-27 14:31:11 +0300951 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300952 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300953 ie_len);
954
Kalle Valo97e04962011-09-12 13:47:34 +0300955 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
Kalle Valo277d90f2011-12-13 14:51:58 +0200956 index = i / 8;
Kalle Valo97e04962011-09-12 13:47:34 +0300957 bit = i % 8;
958
959 if (data[index] & (1 << bit))
960 __set_bit(i, ar->fw_capabilities);
961 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300962
963 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
964 ar->fw_capabilities,
965 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300966 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300967 case ATH6KL_FW_IE_PATCH_ADDR:
968 if (ie_len != sizeof(*val))
969 break;
970
971 val = (__le32 *) data;
972 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300973
974 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +0200975 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300976 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300977 break;
Kalle Valo03ef0252011-11-14 19:30:47 +0200978 case ATH6KL_FW_IE_BOARD_ADDR:
979 if (ie_len != sizeof(*val))
980 break;
981
982 val = (__le32 *) data;
983 ar->hw.board_addr = le32_to_cpup(val);
984
985 ath6kl_dbg(ATH6KL_DBG_BOOT,
986 "found board address ie 0x%x\n",
987 ar->hw.board_addr);
988 break;
Kalle Valo368b1b02011-11-14 19:31:38 +0200989 case ATH6KL_FW_IE_VIF_MAX:
990 if (ie_len != sizeof(*val))
991 break;
992
993 val = (__le32 *) data;
994 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
995 ATH6KL_VIF_MAX);
996
Vasanthakumar Thiagarajanf1433792011-11-18 10:05:27 +0530997 if (ar->vif_max > 1 && !ar->p2p)
998 ar->max_norm_iface = 2;
999
Kalle Valo368b1b02011-11-14 19:31:38 +02001000 ath6kl_dbg(ATH6KL_DBG_BOOT,
1001 "found vif max ie %d\n", ar->vif_max);
1002 break;
Kalle Valo50d41232011-09-07 10:55:17 +03001003 default:
Kalle Valo6bc36432011-09-27 14:31:11 +03001004 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +03001005 le32_to_cpup(&hdr->id));
1006 break;
1007 }
1008
1009 len -= ie_len;
1010 data += ie_len;
1011 };
1012
1013 ret = 0;
1014out:
1015 release_firmware(fw);
1016
1017 return ret;
1018}
1019
1020static int ath6kl_fetch_firmwares(struct ath6kl *ar)
1021{
1022 int ret;
1023
1024 ret = ath6kl_fetch_board_file(ar);
1025 if (ret)
1026 return ret;
1027
1028 ret = ath6kl_fetch_fw_api2(ar);
Kalle Valo6bc36432011-09-27 14:31:11 +03001029 if (ret == 0) {
1030 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
Kalle Valo50d41232011-09-07 10:55:17 +03001031 return 0;
Kalle Valo6bc36432011-09-27 14:31:11 +03001032 }
Kalle Valo50d41232011-09-07 10:55:17 +03001033
1034 ret = ath6kl_fetch_fw_api1(ar);
1035 if (ret)
1036 return ret;
1037
Kalle Valo6bc36432011-09-27 14:31:11 +03001038 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
1039
Kalle Valo50d41232011-09-07 10:55:17 +03001040 return 0;
1041}
1042
Kalle Valobdcd8172011-07-18 00:22:30 +03001043static int ath6kl_upload_board_file(struct ath6kl *ar)
1044{
1045 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001046 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001047 int ret;
1048
Kalle Valo772c31e2011-09-07 10:55:16 +03001049 if (WARN_ON(ar->fw_board == NULL))
1050 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001051
Kevin Fang31024d92011-07-11 17:14:13 +08001052 /*
1053 * Determine where in Target RAM to write Board Data.
1054 * For AR6004, host determine Target RAM address for
1055 * writing board data.
1056 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001057 if (ar->hw.board_addr != 0) {
1058 board_address = ar->hw.board_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001059 ath6kl_bmi_write(ar,
1060 ath6kl_get_hi_item_addr(ar,
1061 HI_ITEM(hi_board_data)),
1062 (u8 *) &board_address, 4);
1063 } else {
1064 ath6kl_bmi_read(ar,
1065 ath6kl_get_hi_item_addr(ar,
1066 HI_ITEM(hi_board_data)),
1067 (u8 *) &board_address, 4);
1068 }
1069
Kalle Valobdcd8172011-07-18 00:22:30 +03001070 /* determine where in target ram to write extended board data */
1071 ath6kl_bmi_read(ar,
1072 ath6kl_get_hi_item_addr(ar,
1073 HI_ITEM(hi_board_ext_data)),
1074 (u8 *) &board_ext_address, 4);
1075
Kalle Valo50e27402011-11-11 12:18:06 +02001076 if (ar->target_type == TARGET_TYPE_AR6003 &&
1077 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001078 ath6kl_err("Failed to get board file target address.\n");
1079 return -EINVAL;
1080 }
1081
Kevin Fang31024d92011-07-11 17:14:13 +08001082 switch (ar->target_type) {
1083 case TARGET_TYPE_AR6003:
1084 board_data_size = AR6003_BOARD_DATA_SZ;
1085 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1086 break;
1087 case TARGET_TYPE_AR6004:
1088 board_data_size = AR6004_BOARD_DATA_SZ;
1089 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1090 break;
1091 default:
1092 WARN_ON(1);
1093 return -EINVAL;
1094 break;
1095 }
1096
Kalle Valo50e27402011-11-11 12:18:06 +02001097 if (board_ext_address &&
1098 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001099
Kalle Valobdcd8172011-07-18 00:22:30 +03001100 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001101 ath6kl_dbg(ATH6KL_DBG_BOOT,
1102 "writing extended board data to 0x%x (%d B)\n",
1103 board_ext_address, board_ext_data_size);
1104
Kalle Valobdcd8172011-07-18 00:22:30 +03001105 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001106 ar->fw_board + board_data_size,
1107 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001108 if (ret) {
1109 ath6kl_err("Failed to write extended board data: %d\n",
1110 ret);
1111 return ret;
1112 }
1113
1114 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001115 param = (board_ext_data_size << 16) | 1;
1116
Kalle Valobdcd8172011-07-18 00:22:30 +03001117 ath6kl_bmi_write(ar,
1118 ath6kl_get_hi_item_addr(ar,
1119 HI_ITEM(hi_board_ext_data_config)),
1120 (unsigned char *) &param, 4);
1121 }
1122
Kevin Fang31024d92011-07-11 17:14:13 +08001123 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001124 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1125 ret = -EINVAL;
1126 return ret;
1127 }
1128
Kalle Valo6bc36432011-09-27 14:31:11 +03001129 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1130 board_address, board_data_size);
1131
Kalle Valobdcd8172011-07-18 00:22:30 +03001132 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001133 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001134
1135 if (ret) {
1136 ath6kl_err("Board file bmi write failed: %d\n", ret);
1137 return ret;
1138 }
1139
1140 /* record the fact that Board Data IS initialized */
1141 param = 1;
1142 ath6kl_bmi_write(ar,
1143 ath6kl_get_hi_item_addr(ar,
1144 HI_ITEM(hi_board_data_initialized)),
1145 (u8 *)&param, 4);
1146
1147 return ret;
1148}
1149
1150static int ath6kl_upload_otp(struct ath6kl *ar)
1151{
Kalle Valobdcd8172011-07-18 00:22:30 +03001152 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001153 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001154 int ret;
1155
Kalle Valo50e27402011-11-11 12:18:06 +02001156 if (ar->fw_otp == NULL)
1157 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001158
Kalle Valoa01ac412011-09-07 10:55:17 +03001159 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001160
Kalle Valoef548622011-10-01 09:43:09 +03001161 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001162 ar->fw_otp_len);
1163
Kalle Valobdcd8172011-07-18 00:22:30 +03001164 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1165 ar->fw_otp_len);
1166 if (ret) {
1167 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1168 return ret;
1169 }
1170
Kalle Valo639d0b82011-09-12 12:48:09 +03001171 /* read firmware start address */
1172 ret = ath6kl_bmi_read(ar,
1173 ath6kl_get_hi_item_addr(ar,
1174 HI_ITEM(hi_app_start)),
1175 (u8 *) &address, sizeof(address));
1176
1177 if (ret) {
1178 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1179 return ret;
1180 }
1181
Kalle Valobef26a72011-10-12 09:58:28 +03001182 if (ar->hw.app_start_override_addr == 0) {
1183 ar->hw.app_start_override_addr = address;
1184 from_hw = true;
1185 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001186
Kalle Valobef26a72011-10-12 09:58:28 +03001187 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1188 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001189 ar->hw.app_start_override_addr);
1190
Kalle Valobdcd8172011-07-18 00:22:30 +03001191 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001192 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1193 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001194 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001195 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001196
1197 return ret;
1198}
1199
1200static int ath6kl_upload_firmware(struct ath6kl *ar)
1201{
Kalle Valobdcd8172011-07-18 00:22:30 +03001202 u32 address;
1203 int ret;
1204
Kalle Valo772c31e2011-09-07 10:55:16 +03001205 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001206 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001207
Kalle Valoa01ac412011-09-07 10:55:17 +03001208 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001209
Kalle Valoef548622011-10-01 09:43:09 +03001210 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001211 address, ar->fw_len);
1212
Kalle Valobdcd8172011-07-18 00:22:30 +03001213 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1214
1215 if (ret) {
1216 ath6kl_err("Failed to write firmware: %d\n", ret);
1217 return ret;
1218 }
1219
Kevin Fang31024d92011-07-11 17:14:13 +08001220 /*
1221 * Set starting address for firmware
1222 * Don't need to setup app_start override addr on AR6004
1223 */
1224 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001225 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001226 ath6kl_bmi_set_app_start(ar, address);
1227 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001228 return ret;
1229}
1230
1231static int ath6kl_upload_patch(struct ath6kl *ar)
1232{
Kalle Valobdcd8172011-07-18 00:22:30 +03001233 u32 address, param;
1234 int ret;
1235
Kalle Valo50e27402011-11-11 12:18:06 +02001236 if (ar->fw_patch == NULL)
1237 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001238
Kalle Valoa01ac412011-09-07 10:55:17 +03001239 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001240
Kalle Valoef548622011-10-01 09:43:09 +03001241 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001242 address, ar->fw_patch_len);
1243
Kalle Valobdcd8172011-07-18 00:22:30 +03001244 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1245 if (ret) {
1246 ath6kl_err("Failed to write patch file: %d\n", ret);
1247 return ret;
1248 }
1249
1250 param = address;
1251 ath6kl_bmi_write(ar,
1252 ath6kl_get_hi_item_addr(ar,
1253 HI_ITEM(hi_dset_list_head)),
1254 (unsigned char *) &param, 4);
1255
1256 return 0;
1257}
1258
1259static int ath6kl_init_upload(struct ath6kl *ar)
1260{
1261 u32 param, options, sleep, address;
1262 int status = 0;
1263
Kevin Fang31024d92011-07-11 17:14:13 +08001264 if (ar->target_type != TARGET_TYPE_AR6003 &&
1265 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001266 return -EINVAL;
1267
1268 /* temporarily disable system sleep */
1269 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1270 status = ath6kl_bmi_reg_read(ar, address, &param);
1271 if (status)
1272 return status;
1273
1274 options = param;
1275
1276 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1277 status = ath6kl_bmi_reg_write(ar, address, param);
1278 if (status)
1279 return status;
1280
1281 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1282 status = ath6kl_bmi_reg_read(ar, address, &param);
1283 if (status)
1284 return status;
1285
1286 sleep = param;
1287
1288 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1289 status = ath6kl_bmi_reg_write(ar, address, param);
1290 if (status)
1291 return status;
1292
1293 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1294 options, sleep);
1295
1296 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001297 /* no need to control 40/44MHz clock on AR6004 */
1298 if (ar->target_type != TARGET_TYPE_AR6004) {
1299 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1300 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001301
Kevin Fang31024d92011-07-11 17:14:13 +08001302 if (status)
1303 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001304
Kevin Fang31024d92011-07-11 17:14:13 +08001305 /* Run at 80/88MHz by default */
1306 param = SM(CPU_CLOCK_STANDARD, 1);
1307
1308 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1309 status = ath6kl_bmi_reg_write(ar, address, param);
1310 if (status)
1311 return status;
1312 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001313
1314 param = 0;
1315 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1316 param = SM(LPO_CAL_ENABLE, 1);
1317 status = ath6kl_bmi_reg_write(ar, address, param);
1318 if (status)
1319 return status;
1320
1321 /* WAR to avoid SDIO CRC err */
Kalle Valo0d0192ba2011-11-14 19:31:07 +02001322 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001323 ath6kl_err("temporary war to avoid sdio crc error\n");
1324
1325 param = 0x20;
1326
1327 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1328 status = ath6kl_bmi_reg_write(ar, address, param);
1329 if (status)
1330 return status;
1331
1332 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1333 status = ath6kl_bmi_reg_write(ar, address, param);
1334 if (status)
1335 return status;
1336
1337 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1338 status = ath6kl_bmi_reg_write(ar, address, param);
1339 if (status)
1340 return status;
1341
1342 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1343 status = ath6kl_bmi_reg_write(ar, address, param);
1344 if (status)
1345 return status;
1346 }
1347
1348 /* write EEPROM data to Target RAM */
1349 status = ath6kl_upload_board_file(ar);
1350 if (status)
1351 return status;
1352
1353 /* transfer One time Programmable data */
1354 status = ath6kl_upload_otp(ar);
1355 if (status)
1356 return status;
1357
1358 /* Download Target firmware */
1359 status = ath6kl_upload_firmware(ar);
1360 if (status)
1361 return status;
1362
1363 status = ath6kl_upload_patch(ar);
1364 if (status)
1365 return status;
1366
1367 /* Restore system sleep */
1368 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1369 status = ath6kl_bmi_reg_write(ar, address, sleep);
1370 if (status)
1371 return status;
1372
1373 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1374 param = options | 0x20;
1375 status = ath6kl_bmi_reg_write(ar, address, param);
1376 if (status)
1377 return status;
1378
Kalle Valobdcd8172011-07-18 00:22:30 +03001379 return status;
1380}
1381
Kalle Valoa01ac412011-09-07 10:55:17 +03001382static int ath6kl_init_hw_params(struct ath6kl *ar)
1383{
Kalle Valo856f4b312011-11-14 19:30:29 +02001384 const struct ath6kl_hw *hw;
1385 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001386
Kalle Valo856f4b312011-11-14 19:30:29 +02001387 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1388 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001389
Kalle Valo856f4b312011-11-14 19:30:29 +02001390 if (hw->id == ar->version.target_ver)
1391 break;
1392 }
1393
1394 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001395 ath6kl_err("Unsupported hardware version: 0x%x\n",
1396 ar->version.target_ver);
1397 return -EINVAL;
1398 }
1399
Kalle Valo856f4b312011-11-14 19:30:29 +02001400 ar->hw = *hw;
1401
Kalle Valo6bc36432011-09-27 14:31:11 +03001402 ath6kl_dbg(ATH6KL_DBG_BOOT,
1403 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1404 ar->version.target_ver, ar->target_type,
1405 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1406 ath6kl_dbg(ATH6KL_DBG_BOOT,
1407 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1408 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1409 ar->hw.reserved_ram_size);
Ryan Hsu39586bf2011-12-13 17:11:07 +08001410 ath6kl_dbg(ATH6KL_DBG_BOOT,
1411 "refclk_hz %d uarttx_pin %d",
1412 ar->hw.refclk_hz, ar->hw.uarttx_pin);
Kalle Valo6bc36432011-09-27 14:31:11 +03001413
Kalle Valoa01ac412011-09-07 10:55:17 +03001414 return 0;
1415}
1416
Kalle Valo293badf2011-11-14 19:30:54 +02001417static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1418{
1419 switch (type) {
1420 case ATH6KL_HIF_TYPE_SDIO:
1421 return "sdio";
1422 case ATH6KL_HIF_TYPE_USB:
1423 return "usb";
1424 }
1425
1426 return NULL;
1427}
1428
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001429int ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001430{
1431 long timeleft;
1432 int ret, i;
1433
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001434 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1435
Kalle Valo20459ee2011-10-27 18:48:37 +03001436 ret = ath6kl_hif_power_on(ar);
1437 if (ret)
1438 return ret;
1439
1440 ret = ath6kl_configure_target(ar);
1441 if (ret)
1442 goto err_power_off;
1443
1444 ret = ath6kl_init_upload(ar);
1445 if (ret)
1446 goto err_power_off;
1447
1448 /* Do we need to finish the BMI phase */
1449 /* FIXME: return error from ath6kl_bmi_done() */
1450 if (ath6kl_bmi_done(ar)) {
1451 ret = -EIO;
1452 goto err_power_off;
1453 }
1454
1455 /*
1456 * The reason we have to wait for the target here is that the
1457 * driver layer has to init BMI in order to set the host block
1458 * size.
1459 */
1460 if (ath6kl_htc_wait_target(ar->htc_target)) {
1461 ret = -EIO;
1462 goto err_power_off;
1463 }
1464
1465 if (ath6kl_init_service_ep(ar)) {
1466 ret = -EIO;
1467 goto err_cleanup_scatter;
1468 }
1469
1470 /* setup credit distribution */
1471 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1472
1473 /* start HTC */
1474 ret = ath6kl_htc_start(ar->htc_target);
1475 if (ret) {
1476 /* FIXME: call this */
1477 ath6kl_cookie_cleanup(ar);
1478 goto err_cleanup_scatter;
1479 }
1480
1481 /* Wait for Wmi event to be ready */
1482 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1483 test_bit(WMI_READY,
1484 &ar->flag),
1485 WMI_TIMEOUT);
1486
1487 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1488
Kalle Valo293badf2011-11-14 19:30:54 +02001489
1490 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1491 ath6kl_info("%s %s fw %s%s\n",
1492 ar->hw.name,
1493 ath6kl_init_get_hif_name(ar->hif_type),
1494 ar->wiphy->fw_version,
1495 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1496 }
1497
Kalle Valo20459ee2011-10-27 18:48:37 +03001498 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1499 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1500 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1501 ret = -EIO;
1502 goto err_htc_stop;
1503 }
1504
1505 if (!timeleft || signal_pending(current)) {
1506 ath6kl_err("wmi is not ready or wait was interrupted\n");
1507 ret = -EIO;
1508 goto err_htc_stop;
1509 }
1510
1511 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1512
1513 /* communicate the wmi protocol verision to the target */
1514 /* FIXME: return error */
1515 if ((ath6kl_set_host_app_area(ar)) != 0)
1516 ath6kl_err("unable to set the host app area\n");
1517
Kalle Valo71f96ee2011-11-14 19:31:30 +02001518 for (i = 0; i < ar->vif_max; i++) {
Kalle Valo20459ee2011-10-27 18:48:37 +03001519 ret = ath6kl_target_config_wlan_params(ar, i);
1520 if (ret)
1521 goto err_htc_stop;
1522 }
1523
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001524 ar->state = ATH6KL_STATE_ON;
1525
Kalle Valo20459ee2011-10-27 18:48:37 +03001526 return 0;
1527
1528err_htc_stop:
1529 ath6kl_htc_stop(ar->htc_target);
1530err_cleanup_scatter:
1531 ath6kl_hif_cleanup_scatter(ar);
1532err_power_off:
1533 ath6kl_hif_power_off(ar);
1534
1535 return ret;
1536}
1537
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001538int ath6kl_init_hw_stop(struct ath6kl *ar)
1539{
1540 int ret;
1541
1542 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1543
1544 ath6kl_htc_stop(ar->htc_target);
1545
1546 ath6kl_hif_stop(ar);
1547
1548 ath6kl_bmi_reset(ar);
1549
1550 ret = ath6kl_hif_power_off(ar);
1551 if (ret)
1552 ath6kl_warn("failed to power off hif: %d\n", ret);
1553
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001554 ar->state = ATH6KL_STATE_OFF;
1555
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001556 return 0;
1557}
1558
Kalle Valobdcd8172011-07-18 00:22:30 +03001559int ath6kl_core_init(struct ath6kl *ar)
1560{
Kalle Valobdcd8172011-07-18 00:22:30 +03001561 struct ath6kl_bmi_target_info targ_info;
Kalle Valo61448a92011-10-27 18:48:29 +03001562 struct net_device *ndev;
Kalle Valo20459ee2011-10-27 18:48:37 +03001563 int ret = 0, i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001564
1565 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1566 if (!ar->ath6kl_wq)
1567 return -ENOMEM;
1568
1569 ret = ath6kl_bmi_init(ar);
1570 if (ret)
1571 goto err_wq;
1572
Kalle Valo20459ee2011-10-27 18:48:37 +03001573 /*
1574 * Turn on power to get hardware (target) version and leave power
1575 * on delibrately as we will boot the hardware anyway within few
1576 * seconds.
1577 */
Kalle Valob2e75692011-10-27 18:48:14 +03001578 ret = ath6kl_hif_power_on(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001579 if (ret)
1580 goto err_bmi_cleanup;
1581
Kalle Valob2e75692011-10-27 18:48:14 +03001582 ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1583 if (ret)
1584 goto err_power_off;
1585
Kalle Valobdcd8172011-07-18 00:22:30 +03001586 ar->version.target_ver = le32_to_cpu(targ_info.version);
1587 ar->target_type = le32_to_cpu(targ_info.type);
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301588 ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
Kalle Valobdcd8172011-07-18 00:22:30 +03001589
Kalle Valoa01ac412011-09-07 10:55:17 +03001590 ret = ath6kl_init_hw_params(ar);
1591 if (ret)
Kalle Valob2e75692011-10-27 18:48:14 +03001592 goto err_power_off;
Kalle Valoa01ac412011-09-07 10:55:17 +03001593
Kalle Vaload226ec2011-08-10 09:49:12 +03001594 ar->htc_target = ath6kl_htc_create(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001595
1596 if (!ar->htc_target) {
1597 ret = -ENOMEM;
Kalle Valob2e75692011-10-27 18:48:14 +03001598 goto err_power_off;
Kalle Valobdcd8172011-07-18 00:22:30 +03001599 }
1600
Kalle Valo772c31e2011-09-07 10:55:16 +03001601 ret = ath6kl_fetch_firmwares(ar);
1602 if (ret)
1603 goto err_htc_cleanup;
1604
Kalle Valo61448a92011-10-27 18:48:29 +03001605 /* FIXME: we should free all firmwares in the error cases below */
1606
Kalle Valo61448a92011-10-27 18:48:29 +03001607 /* Indicate that WMI is enabled (although not ready yet) */
1608 set_bit(WMI_ENABLED, &ar->flag);
1609 ar->wmi = ath6kl_wmi_init(ar);
1610 if (!ar->wmi) {
1611 ath6kl_err("failed to initialize wmi\n");
1612 ret = -EIO;
1613 goto err_htc_cleanup;
1614 }
1615
1616 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1617
1618 ret = ath6kl_register_ieee80211_hw(ar);
1619 if (ret)
1620 goto err_node_cleanup;
1621
1622 ret = ath6kl_debug_init(ar);
1623 if (ret) {
1624 wiphy_unregister(ar->wiphy);
1625 goto err_node_cleanup;
1626 }
1627
Kalle Valo71f96ee2011-11-14 19:31:30 +02001628 for (i = 0; i < ar->vif_max; i++)
Kalle Valo61448a92011-10-27 18:48:29 +03001629 ar->avail_idx_map |= BIT(i);
1630
1631 rtnl_lock();
1632
1633 /* Add an initial station interface */
1634 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
1635 INFRA_NETWORK);
1636
1637 rtnl_unlock();
1638
1639 if (!ndev) {
1640 ath6kl_err("Failed to instantiate a network device\n");
1641 ret = -ENOMEM;
1642 wiphy_unregister(ar->wiphy);
1643 goto err_debug_init;
1644 }
1645
1646
1647 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
1648 __func__, ndev->name, ndev, ar);
1649
Kalle Valo61448a92011-10-27 18:48:29 +03001650 /* setup access class priority mappings */
1651 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
1652 ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1653 ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1654 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1655
1656 /* give our connected endpoints some buffers */
1657 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1658 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1659
1660 /* allocate some buffers that handle larger AMSDU frames */
1661 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1662
Kalle Valo61448a92011-10-27 18:48:29 +03001663 ath6kl_cookie_init(ar);
1664
Kalle Valo61448a92011-10-27 18:48:29 +03001665 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1666 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1667
Kalle Valo8277de12011-11-03 12:18:31 +02001668 if (suspend_cutpower)
1669 ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
1670
Kalle Valo61448a92011-10-27 18:48:29 +03001671 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
Arik Nemtsovfb943332011-11-08 19:14:08 +02001672 WIPHY_FLAG_HAVE_AP_SME |
Kalle Valo7e95e3652011-12-16 21:10:39 +02001673 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
Arik Nemtsovfb943332011-11-08 19:14:08 +02001674 WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
1675
Kalle Valo10509f92011-12-13 14:52:07 +02001676 if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
1677 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
1678
Arik Nemtsovfb943332011-11-08 19:14:08 +02001679 ar->wiphy->probe_resp_offload =
1680 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
1681 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
1682 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
1683 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
Kalle Valo61448a92011-10-27 18:48:29 +03001684
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001685 set_bit(FIRST_BOOT, &ar->flag);
1686
1687 ret = ath6kl_init_hw_start(ar);
Kalle Valo20459ee2011-10-27 18:48:37 +03001688 if (ret) {
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001689 ath6kl_err("Failed to start hardware: %d\n", ret);
Kalle Valo20459ee2011-10-27 18:48:37 +03001690 goto err_rxbuf_cleanup;
Kalle Valo61448a92011-10-27 18:48:29 +03001691 }
1692
1693 /*
1694 * Set mac address which is received in ready event
1695 * FIXME: Move to ath6kl_interface_add()
1696 */
1697 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
Kalle Valobdcd8172011-07-18 00:22:30 +03001698
Kalle Valobdcd8172011-07-18 00:22:30 +03001699 return ret;
1700
Kalle Valo61448a92011-10-27 18:48:29 +03001701err_rxbuf_cleanup:
1702 ath6kl_htc_flush_rx_buf(ar->htc_target);
1703 ath6kl_cleanup_amsdu_rxbufs(ar);
Kalle Valo61448a92011-10-27 18:48:29 +03001704 rtnl_lock();
1705 ath6kl_deinit_if_data(netdev_priv(ndev));
1706 rtnl_unlock();
1707 wiphy_unregister(ar->wiphy);
1708err_debug_init:
1709 ath6kl_debug_cleanup(ar);
1710err_node_cleanup:
1711 ath6kl_wmi_shutdown(ar->wmi);
1712 clear_bit(WMI_ENABLED, &ar->flag);
1713 ar->wmi = NULL;
Kalle Valobdcd8172011-07-18 00:22:30 +03001714err_htc_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001715 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valob2e75692011-10-27 18:48:14 +03001716err_power_off:
1717 ath6kl_hif_power_off(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001718err_bmi_cleanup:
1719 ath6kl_bmi_cleanup(ar);
1720err_wq:
1721 destroy_workqueue(ar->ath6kl_wq);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301722
Kalle Valobdcd8172011-07-18 00:22:30 +03001723 return ret;
1724}
1725
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301726void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301727{
1728 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1729 bool discon_issued;
1730
1731 netif_stop_queue(vif->ndev);
1732
1733 clear_bit(WLAN_ENABLED, &vif->flags);
1734
1735 if (wmi_ready) {
1736 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1737 test_bit(CONNECT_PEND, &vif->flags);
1738 ath6kl_disconnect(vif);
1739 del_timer(&vif->disconnect_timer);
1740
1741 if (discon_issued)
1742 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1743 (vif->nw_type & AP_NETWORK) ?
1744 bcast_mac : vif->bssid,
1745 0, NULL, 0);
1746 }
1747
1748 if (vif->scan_req) {
1749 cfg80211_scan_done(vif->scan_req, true);
1750 vif->scan_req = NULL;
1751 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301752}
1753
Kalle Valobdcd8172011-07-18 00:22:30 +03001754void ath6kl_stop_txrx(struct ath6kl *ar)
1755{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301756 struct ath6kl_vif *vif, *tmp_vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001757
1758 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1759
1760 if (down_interruptible(&ar->sem)) {
1761 ath6kl_err("down_interruptible failed\n");
1762 return;
1763 }
1764
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301765 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301766 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1767 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301768 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301769 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301770 rtnl_lock();
1771 ath6kl_deinit_if_data(vif);
1772 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301773 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301774 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301775 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001776
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301777 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001778
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301779 /*
1780 * After wmi_shudown all WMI events will be dropped. We
1781 * need to cleanup the buffers allocated in AP mode and
1782 * give disconnect notification to stack, which usually
1783 * happens in the disconnect_event. Simulate the disconnect
1784 * event by calling the function directly. Sometimes
1785 * disconnect_event will be received when the debug logs
1786 * are collected.
1787 */
1788 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001789
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301790 clear_bit(WMI_ENABLED, &ar->flag);
1791 if (ar->htc_target) {
1792 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1793 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001794 }
1795
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301796 /*
1797 * Try to reset the device if we can. The driver may have been
1798 * configure NOT to reset the target during a debug session.
1799 */
1800 ath6kl_dbg(ATH6KL_DBG_TRC,
1801 "attempting to reset target on instance destroy\n");
1802 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001803
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301804 clear_bit(WLAN_ENABLED, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001805}