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gerrit-public.fairphone.software / kernel / msm-5.4 / 72f0271576eeef40c81c2949e0a8abeaef9a7690 / . / drivers / i2c / busses / i2c-designware-core.h
blob: 5a410ef17abd40c0ab7c7ece3ab3fa539adf1f95 [file] [log] [blame]
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]1/*
2 * Synopsys DesignWare I2C adapter driver (master only).
3 *
4 * Based on the TI DAVINCI I2C adapter driver.
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd.
9 *
10 * ----------------------------------------------------------------------------
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]21 * ----------------------------------------------------------------------------
22 *
23 */
24
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]25
26#define DW_IC_CON_MASTER 0x1
27#define DW_IC_CON_SPEED_STD 0x2
28#define DW_IC_CON_SPEED_FAST 0x4
29#define DW_IC_CON_10BITADDR_MASTER 0x10
30#define DW_IC_CON_RESTART_EN 0x20
31#define DW_IC_CON_SLAVE_DISABLE 0x40
32
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]33
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]34/**
35 * struct dw_i2c_dev - private i2c-designware data
36 * @dev: driver model device node
37 * @base: IO registers pointer
38 * @cmd_complete: tx completion indicator
39 * @lock: protect this struct and IO registers
40 * @clk: input reference clock
41 * @cmd_err: run time hadware error code
42 * @msgs: points to an array of messages currently being transfered
43 * @msgs_num: the number of elements in msgs
44 * @msg_write_idx: the element index of the current tx message in the msgs
45 * array
46 * @tx_buf_len: the length of the current tx buffer
47 * @tx_buf: the current tx buffer
48 * @msg_read_idx: the element index of the current rx message in the msgs
49 * array
50 * @rx_buf_len: the length of the current rx buffer
51 * @rx_buf: the current rx buffer
52 * @msg_err: error status of the current transfer
53 * @status: i2c master status, one of STATUS_*
54 * @abort_source: copy of the TX_ABRT_SOURCE register
55 * @irq: interrupt number for the i2c master
56 * @adapter: i2c subsystem adapter node
57 * @tx_fifo_depth: depth of the hardware tx fifo
58 * @rx_fifo_depth: depth of the hardware rx fifo
Josef Ahmade6f34ce2013-04-19 17:28:10 +0100[diff] [blame]59 * @rx_outstanding: current master-rx elements in tx fifo
Mika Westerbergdefc0b22013-08-19 15:07:53 +0300[diff] [blame]60 * @ss_hcnt: standard speed HCNT value
61 * @ss_lcnt: standard speed LCNT value
62 * @fs_hcnt: fast speed HCNT value
63 * @fs_lcnt: fast speed LCNT value
64 *
65 * HCNT and LCNT parameters can be used if the platform knows more accurate
66 * values than the one computed based only on the input clock frequency.
67 * Leave them to be %0 if not used.
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]68 */
69struct dw_i2c_dev {
70 struct device *dev;
71 void __iomem *base;
72 struct completion cmd_complete;
73 struct mutex lock;
74 struct clk *clk;
Dirk Brandewie1d31b582011-10-06 11:26:30 -0700[diff] [blame]75 u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
Dirk Brandewiefe20ff52011-10-06 11:26:35 -0700[diff] [blame]76 struct dw_pci_controller *controller;
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]77 int cmd_err;
78 struct i2c_msg *msgs;
79 int msgs_num;
80 int msg_write_idx;
81 u32 tx_buf_len;
82 u8 *tx_buf;
83 int msg_read_idx;
84 u32 rx_buf_len;
85 u8 *rx_buf;
86 int msg_err;
87 unsigned int status;
88 u32 abort_source;
89 int irq;
Stefan Roesea8a9f3f2012-04-18 15:01:41 +0200[diff] [blame]90 u32 accessor_flags;
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]91 struct i2c_adapter adapter;
Dirk Brandewie2fa83262011-10-06 11:26:31 -0700[diff] [blame]92 u32 functionality;
Dirk Brandewiee18563f2011-10-06 11:26:32 -0700[diff] [blame]93 u32 master_cfg;
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]94 unsigned int tx_fifo_depth;
95 unsigned int rx_fifo_depth;
Josef Ahmade6f34ce2013-04-19 17:28:10 +0100[diff] [blame]96 int rx_outstanding;
Christian Ruppert9803f862013-06-26 10:55:06 +0200[diff] [blame]97 u32 sda_hold_time;
Romain Baeriswyl64682762014-01-20 17:43:43 +0100[diff] [blame]98 u32 sda_falling_time;
99 u32 scl_falling_time;
Mika Westerbergdefc0b22013-08-19 15:07:53 +0300[diff] [blame]100 u16 ss_hcnt;
101 u16 ss_lcnt;
102 u16 fs_hcnt;
103 u16 fs_lcnt;
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]104};
105
Stefan Roesea8a9f3f2012-04-18 15:01:41 +0200[diff] [blame]106#define ACCESS_SWAP 0x00000001
107#define ACCESS_16BIT 0x00000002
108
Dirk Brandewie2373f6b2011-10-29 10:57:23 +0100[diff] [blame]109extern u32 dw_readl(struct dw_i2c_dev *dev, int offset);
110extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset);
111extern int i2c_dw_init(struct dw_i2c_dev *dev);
112extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
113 int num);
114extern u32 i2c_dw_func(struct i2c_adapter *adap);
115extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id);
Dirk Brandewief3fa9f32011-10-06 11:26:34 -0700[diff] [blame]116extern void i2c_dw_enable(struct dw_i2c_dev *dev);
Dirk Brandewie18dbdda2011-10-06 11:26:36 -0700[diff] [blame]117extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev);
Dirk Brandewief3fa9f32011-10-06 11:26:34 -0700[diff] [blame]118extern void i2c_dw_disable(struct dw_i2c_dev *dev);
119extern void i2c_dw_clear_int(struct dw_i2c_dev *dev);
120extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
121extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);