blob: 03057983341f78b251370888095a6c9492112040 [file] [log] [blame]
Selvin Xavier1ac5a402017-02-10 03:19:33 -08001/*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators
37 */
38
39#include <linux/interrupt.h>
40#include <linux/spinlock.h>
41#include <linux/sched.h>
42#include <linux/pci.h>
43
44#include "roce_hsi.h"
45
46#include "qplib_res.h"
47#include "qplib_rcfw.h"
48#include "qplib_sp.h"
49
50const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 0, 0, 0, 0, 0, 0 } };
52
53/* Device */
Devesh Sharma254cd252017-06-29 12:28:16 -070054
Selvin Xavier2fc68542018-01-11 11:52:08 -050055static void bnxt_qplib_query_version(struct bnxt_qplib_rcfw *rcfw,
56 char *fw_ver)
57{
58 struct cmdq_query_version req;
59 struct creq_query_version_resp resp;
60 u16 cmd_flags = 0;
61 int rc = 0;
62
63 RCFW_CMD_PREP(req, QUERY_VERSION, cmd_flags);
64
65 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
66 (void *)&resp, NULL, 0);
67 if (rc)
68 return;
69 fw_ver[0] = resp.fw_maj;
70 fw_ver[1] = resp.fw_minor;
71 fw_ver[2] = resp.fw_bld;
72 fw_ver[3] = resp.fw_rsvd;
73}
74
Selvin Xavier1ac5a402017-02-10 03:19:33 -080075int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
Selvin Xavierccd9d0d2018-01-11 11:52:07 -050076 struct bnxt_qplib_dev_attr *attr, bool vf)
Selvin Xavier1ac5a402017-02-10 03:19:33 -080077{
78 struct cmdq_query_func req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070079 struct creq_query_func_resp resp;
80 struct bnxt_qplib_rcfw_sbuf *sbuf;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080081 struct creq_query_func_resp_sb *sb;
82 u16 cmd_flags = 0;
83 u32 temp;
84 u8 *tqm_alloc;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070085 int i, rc = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080086
87 RCFW_CMD_PREP(req, QUERY_FUNC, cmd_flags);
88
Devesh Sharmacc1ec762017-05-22 03:15:31 -070089 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
90 if (!sbuf) {
Selvin Xavier1ac5a402017-02-10 03:19:33 -080091 dev_err(&rcfw->pdev->dev,
Devesh Sharmacc1ec762017-05-22 03:15:31 -070092 "QPLIB: SP: QUERY_FUNC alloc side buffer failed");
93 return -ENOMEM;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080094 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -070095
96 sb = sbuf->sb;
97 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
98 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
99 (void *)sbuf, 0);
100 if (rc)
101 goto bail;
102
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800103 /* Extract the context from the side buffer */
104 attr->max_qp = le32_to_cpu(sb->max_qp);
Selvin Xavier58d4a672017-06-29 12:28:12 -0700105 /* max_qp value reported by FW for PF doesn't include the QP1 for PF */
Selvin Xavierccd9d0d2018-01-11 11:52:07 -0500106 if (!vf)
107 attr->max_qp += 1;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800108 attr->max_qp_rd_atom =
109 sb->max_qp_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
110 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_rd_atom;
111 attr->max_qp_init_rd_atom =
112 sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
113 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom;
114 attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr);
Eddie Wai9152e0b2017-06-14 03:26:23 -0700115 /*
116 * 128 WQEs needs to be reserved for the HW (8916). Prevent
117 * reporting the max number
118 */
119 attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800120 attr->max_qp_sges = sb->max_sge;
121 attr->max_cq = le32_to_cpu(sb->max_cq);
122 attr->max_cq_wqes = le32_to_cpu(sb->max_cqe);
123 attr->max_cq_sges = attr->max_qp_sges;
124 attr->max_mr = le32_to_cpu(sb->max_mr);
125 attr->max_mw = le32_to_cpu(sb->max_mw);
126
127 attr->max_mr_size = le64_to_cpu(sb->max_mr_size);
128 attr->max_pd = 64 * 1024;
129 attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp);
130 attr->max_ah = le32_to_cpu(sb->max_ah);
131
132 attr->max_fmr = le32_to_cpu(sb->max_fmr);
133 attr->max_map_per_fmr = sb->max_map_per_fmr;
134
135 attr->max_srq = le16_to_cpu(sb->max_srq);
136 attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1;
137 attr->max_srq_sges = sb->max_srq_sge;
138 /* Bono only reports 1 PKEY for now, but it can support > 1 */
139 attr->max_pkey = le32_to_cpu(sb->max_pkeys);
140
141 attr->max_inline_data = le32_to_cpu(sb->max_inline_data);
142 attr->l2_db_size = (sb->l2_db_space_size + 1) * PAGE_SIZE;
143 attr->max_sgid = le32_to_cpu(sb->max_gid);
144
Selvin Xavier2fc68542018-01-11 11:52:08 -0500145 bnxt_qplib_query_version(rcfw, attr->fw_ver);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800146
147 for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) {
148 temp = le32_to_cpu(sb->tqm_alloc_reqs[i]);
149 tqm_alloc = (u8 *)&temp;
150 attr->tqm_alloc_reqs[i * 4] = *tqm_alloc;
151 attr->tqm_alloc_reqs[i * 4 + 1] = *(++tqm_alloc);
152 attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc);
153 attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc);
154 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700155
Devesh Sharma7ff662b2018-02-15 21:20:08 -0800156 attr->is_atomic = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700157bail:
158 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
159 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800160}
161
Selvin Xavierccd9d0d2018-01-11 11:52:07 -0500162int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res,
163 struct bnxt_qplib_rcfw *rcfw,
164 struct bnxt_qplib_ctx *ctx)
165{
166 struct cmdq_set_func_resources req;
167 struct creq_set_func_resources_resp resp;
168 u16 cmd_flags = 0;
169 int rc = 0;
170
171 RCFW_CMD_PREP(req, SET_FUNC_RESOURCES, cmd_flags);
172
173 req.number_of_qp = cpu_to_le32(ctx->qpc_count);
174 req.number_of_mrw = cpu_to_le32(ctx->mrw_count);
175 req.number_of_srq = cpu_to_le32(ctx->srqc_count);
176 req.number_of_cq = cpu_to_le32(ctx->cq_count);
177
178 req.max_qp_per_vf = cpu_to_le32(ctx->vf_res.max_qp_per_vf);
179 req.max_mrw_per_vf = cpu_to_le32(ctx->vf_res.max_mrw_per_vf);
180 req.max_srq_per_vf = cpu_to_le32(ctx->vf_res.max_srq_per_vf);
181 req.max_cq_per_vf = cpu_to_le32(ctx->vf_res.max_cq_per_vf);
182 req.max_gid_per_vf = cpu_to_le32(ctx->vf_res.max_gid_per_vf);
183
184 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
185 (void *)&resp,
186 NULL, 0);
187 if (rc) {
188 dev_err(&res->pdev->dev,
189 "QPLIB: Failed to set function resources");
190 }
191 return rc;
192}
193
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800194/* SGID */
195int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
196 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
197 struct bnxt_qplib_gid *gid)
198{
199 if (index > sgid_tbl->max) {
200 dev_err(&res->pdev->dev,
201 "QPLIB: Index %d exceeded SGID table max (%d)",
202 index, sgid_tbl->max);
203 return -EINVAL;
204 }
205 memcpy(gid, &sgid_tbl->tbl[index], sizeof(*gid));
206 return 0;
207}
208
209int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
210 struct bnxt_qplib_gid *gid, bool update)
211{
212 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
213 struct bnxt_qplib_res,
214 sgid_tbl);
215 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
216 int index;
217
218 if (!sgid_tbl) {
219 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
220 return -EINVAL;
221 }
222 /* Do we need a sgid_lock here? */
223 if (!sgid_tbl->active) {
224 dev_err(&res->pdev->dev,
225 "QPLIB: SGID table has no active entries");
226 return -ENOMEM;
227 }
228 for (index = 0; index < sgid_tbl->max; index++) {
229 if (!memcmp(&sgid_tbl->tbl[index], gid, sizeof(*gid)))
230 break;
231 }
232 if (index == sgid_tbl->max) {
233 dev_warn(&res->pdev->dev, "GID not found in the SGID table");
234 return 0;
235 }
236 /* Remove GID from the SGID table */
237 if (update) {
238 struct cmdq_delete_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700239 struct creq_delete_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800240 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700241 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800242
243 RCFW_CMD_PREP(req, DELETE_GID, cmd_flags);
244 if (sgid_tbl->hw_id[index] == 0xFFFF) {
245 dev_err(&res->pdev->dev,
246 "QPLIB: GID entry contains an invalid HW id");
247 return -EINVAL;
248 }
249 req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700250 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
251 (void *)&resp, NULL, 0);
252 if (rc)
253 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800254 }
255 memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
256 sizeof(bnxt_qplib_gid_zero));
Kalesh AP5fac5b12017-06-29 12:28:10 -0700257 sgid_tbl->vlan[index] = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800258 sgid_tbl->active--;
259 dev_dbg(&res->pdev->dev,
260 "QPLIB: SGID deleted hw_id[0x%x] = 0x%x active = 0x%x",
261 index, sgid_tbl->hw_id[index], sgid_tbl->active);
262 sgid_tbl->hw_id[index] = (u16)-1;
263
264 /* unlock */
265 return 0;
266}
267
268int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
269 struct bnxt_qplib_gid *gid, u8 *smac, u16 vlan_id,
270 bool update, u32 *index)
271{
272 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
273 struct bnxt_qplib_res,
274 sgid_tbl);
275 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700276 int i, free_idx;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800277
278 if (!sgid_tbl) {
279 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
280 return -EINVAL;
281 }
282 /* Do we need a sgid_lock here? */
283 if (sgid_tbl->active == sgid_tbl->max) {
284 dev_err(&res->pdev->dev, "QPLIB: SGID table is full");
285 return -ENOMEM;
286 }
287 free_idx = sgid_tbl->max;
288 for (i = 0; i < sgid_tbl->max; i++) {
289 if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid))) {
290 dev_dbg(&res->pdev->dev,
291 "QPLIB: SGID entry already exist in entry %d!",
292 i);
293 *index = i;
294 return -EALREADY;
295 } else if (!memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero,
296 sizeof(bnxt_qplib_gid_zero)) &&
297 free_idx == sgid_tbl->max) {
298 free_idx = i;
299 }
300 }
301 if (free_idx == sgid_tbl->max) {
302 dev_err(&res->pdev->dev,
303 "QPLIB: SGID table is FULL but count is not MAX??");
304 return -ENOMEM;
305 }
306 if (update) {
307 struct cmdq_add_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700308 struct creq_add_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800309 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700310 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800311
312 RCFW_CMD_PREP(req, ADD_GID, cmd_flags);
313
Kalesh AP5fac5b12017-06-29 12:28:10 -0700314 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]);
315 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]);
316 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]);
317 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]);
318 /*
319 * driver should ensure that all RoCE traffic is always VLAN
320 * tagged if RoCE traffic is running on non-zero VLAN ID or
321 * RoCE traffic is running on non-zero Priority.
322 */
323 if ((vlan_id != 0xFFFF) || res->prio) {
324 if (vlan_id != 0xFFFF)
325 req.vlan = cpu_to_le16
326 (vlan_id & CMDQ_ADD_GID_VLAN_VLAN_ID_MASK);
327 req.vlan |= cpu_to_le16
328 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 |
329 CMDQ_ADD_GID_VLAN_VLAN_EN);
330 }
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800331
332 /* MAC in network format */
Kalesh AP5fac5b12017-06-29 12:28:10 -0700333 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]);
334 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]);
335 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800336
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700337 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
338 (void *)&resp, NULL, 0);
339 if (rc)
340 return rc;
341 sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800342 }
343 /* Add GID to the sgid_tbl */
344 memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid));
345 sgid_tbl->active++;
Kalesh AP5fac5b12017-06-29 12:28:10 -0700346 if (vlan_id != 0xFFFF)
347 sgid_tbl->vlan[free_idx] = 1;
348
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800349 dev_dbg(&res->pdev->dev,
350 "QPLIB: SGID added hw_id[0x%x] = 0x%x active = 0x%x",
351 free_idx, sgid_tbl->hw_id[free_idx], sgid_tbl->active);
352
353 *index = free_idx;
354 /* unlock */
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700355 return 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800356}
357
Kalesh AP5fac5b12017-06-29 12:28:10 -0700358int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
359 struct bnxt_qplib_gid *gid, u16 gid_idx,
360 u8 *smac)
361{
362 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
363 struct bnxt_qplib_res,
364 sgid_tbl);
365 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
366 struct creq_modify_gid_resp resp;
367 struct cmdq_modify_gid req;
368 int rc;
369 u16 cmd_flags = 0;
370
371 RCFW_CMD_PREP(req, MODIFY_GID, cmd_flags);
372
373 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]);
374 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]);
375 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]);
376 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]);
377 if (res->prio) {
378 req.vlan |= cpu_to_le16
379 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 |
380 CMDQ_ADD_GID_VLAN_VLAN_EN);
381 }
382
383 /* MAC in network format */
384 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]);
385 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]);
386 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]);
387
388 req.gid_index = cpu_to_le16(gid_idx);
389
390 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
391 (void *)&resp, NULL, 0);
392 return rc;
393}
394
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800395/* pkeys */
396int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res,
397 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index,
398 u16 *pkey)
399{
400 if (index == 0xFFFF) {
401 *pkey = 0xFFFF;
402 return 0;
403 }
404 if (index > pkey_tbl->max) {
405 dev_err(&res->pdev->dev,
406 "QPLIB: Index %d exceeded PKEY table max (%d)",
407 index, pkey_tbl->max);
408 return -EINVAL;
409 }
410 memcpy(pkey, &pkey_tbl->tbl[index], sizeof(*pkey));
411 return 0;
412}
413
414int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res,
415 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
416 bool update)
417{
418 int i, rc = 0;
419
420 if (!pkey_tbl) {
421 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
422 return -EINVAL;
423 }
424
425 /* Do we need a pkey_lock here? */
426 if (!pkey_tbl->active) {
427 dev_err(&res->pdev->dev,
428 "QPLIB: PKEY table has no active entries");
429 return -ENOMEM;
430 }
431 for (i = 0; i < pkey_tbl->max; i++) {
432 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
433 break;
434 }
435 if (i == pkey_tbl->max) {
436 dev_err(&res->pdev->dev,
437 "QPLIB: PKEY 0x%04x not found in the pkey table",
438 *pkey);
439 return -ENOMEM;
440 }
441 memset(&pkey_tbl->tbl[i], 0, sizeof(*pkey));
442 pkey_tbl->active--;
443
444 /* unlock */
445 return rc;
446}
447
448int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res,
449 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
450 bool update)
451{
452 int i, free_idx, rc = 0;
453
454 if (!pkey_tbl) {
455 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
456 return -EINVAL;
457 }
458
459 /* Do we need a pkey_lock here? */
460 if (pkey_tbl->active == pkey_tbl->max) {
461 dev_err(&res->pdev->dev, "QPLIB: PKEY table is full");
462 return -ENOMEM;
463 }
464 free_idx = pkey_tbl->max;
465 for (i = 0; i < pkey_tbl->max; i++) {
466 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
467 return -EALREADY;
468 else if (!pkey_tbl->tbl[i] && free_idx == pkey_tbl->max)
469 free_idx = i;
470 }
471 if (free_idx == pkey_tbl->max) {
472 dev_err(&res->pdev->dev,
473 "QPLIB: PKEY table is FULL but count is not MAX??");
474 return -ENOMEM;
475 }
476 /* Add PKEY to the pkey_tbl */
477 memcpy(&pkey_tbl->tbl[free_idx], pkey, sizeof(*pkey));
478 pkey_tbl->active++;
479
480 /* unlock */
481 return rc;
482}
483
484/* AH */
485int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
486{
487 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
488 struct cmdq_create_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700489 struct creq_create_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800490 u16 cmd_flags = 0;
491 u32 temp32[4];
492 u16 temp16[3];
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700493 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800494
495 RCFW_CMD_PREP(req, CREATE_AH, cmd_flags);
496
497 memcpy(temp32, ah->dgid.data, sizeof(struct bnxt_qplib_gid));
498 req.dgid[0] = cpu_to_le32(temp32[0]);
499 req.dgid[1] = cpu_to_le32(temp32[1]);
500 req.dgid[2] = cpu_to_le32(temp32[2]);
501 req.dgid[3] = cpu_to_le32(temp32[3]);
502
503 req.type = ah->nw_type;
504 req.hop_limit = ah->hop_limit;
505 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[ah->sgid_index]);
506 req.dest_vlan_id_flow_label = cpu_to_le32((ah->flow_label &
507 CMDQ_CREATE_AH_FLOW_LABEL_MASK) |
508 CMDQ_CREATE_AH_DEST_VLAN_ID_MASK);
509 req.pd_id = cpu_to_le32(ah->pd->id);
510 req.traffic_class = ah->traffic_class;
511
512 /* MAC in network format */
513 memcpy(temp16, ah->dmac, 6);
514 req.dest_mac[0] = cpu_to_le16(temp16[0]);
515 req.dest_mac[1] = cpu_to_le16(temp16[1]);
516 req.dest_mac[2] = cpu_to_le16(temp16[2]);
517
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700518 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
519 NULL, 1);
520 if (rc)
521 return rc;
522
523 ah->id = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800524 return 0;
525}
526
527int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
528{
529 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
530 struct cmdq_destroy_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700531 struct creq_destroy_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800532 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700533 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800534
535 /* Clean up the AH table in the device */
536 RCFW_CMD_PREP(req, DESTROY_AH, cmd_flags);
537
538 req.ah_cid = cpu_to_le32(ah->id);
539
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700540 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
541 NULL, 1);
542 if (rc)
543 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800544 return 0;
545}
546
547/* MRW */
548int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
549{
550 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
551 struct cmdq_deallocate_key req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700552 struct creq_deallocate_key_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800553 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700554 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800555
556 if (mrw->lkey == 0xFFFFFFFF) {
557 dev_info(&res->pdev->dev,
558 "QPLIB: SP: Free a reserved lkey MRW");
559 return 0;
560 }
561
562 RCFW_CMD_PREP(req, DEALLOCATE_KEY, cmd_flags);
563
564 req.mrw_flags = mrw->type;
565
566 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
567 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
568 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
569 req.key = cpu_to_le32(mrw->rkey);
570 else
571 req.key = cpu_to_le32(mrw->lkey);
572
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700573 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
574 NULL, 0);
575 if (rc)
576 return rc;
577
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800578 /* Free the qplib's MRW memory */
579 if (mrw->hwq.max_elements)
580 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
581
582 return 0;
583}
584
585int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
586{
587 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
588 struct cmdq_allocate_mrw req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700589 struct creq_allocate_mrw_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800590 u16 cmd_flags = 0;
591 unsigned long tmp;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700592 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800593
594 RCFW_CMD_PREP(req, ALLOCATE_MRW, cmd_flags);
595
596 req.pd_id = cpu_to_le32(mrw->pd->id);
597 req.mrw_flags = mrw->type;
598 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR &&
599 mrw->flags & BNXT_QPLIB_FR_PMR) ||
600 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A ||
601 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)
602 req.access = CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY;
603 tmp = (unsigned long)mrw;
604 req.mrw_handle = cpu_to_le64(tmp);
605
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700606 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
607 (void *)&resp, NULL, 0);
608 if (rc)
609 return rc;
610
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800611 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
612 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
613 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700614 mrw->rkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800615 else
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700616 mrw->lkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800617 return 0;
618}
619
620int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
621 bool block)
622{
623 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
624 struct cmdq_deregister_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700625 struct creq_deregister_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800626 u16 cmd_flags = 0;
627 int rc;
628
629 RCFW_CMD_PREP(req, DEREGISTER_MR, cmd_flags);
630
631 req.lkey = cpu_to_le32(mrw->lkey);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700632 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
633 (void *)&resp, NULL, block);
634 if (rc)
635 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800636
637 /* Free the qplib's MR memory */
638 if (mrw->hwq.max_elements) {
639 mrw->va = 0;
640 mrw->total_size = 0;
641 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
642 }
643
644 return 0;
645}
646
647int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
Somnath Kotur872f3572018-01-11 11:52:09 -0500648 u64 *pbl_tbl, int num_pbls, bool block, u32 buf_pg_size)
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800649{
650 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
651 struct cmdq_register_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700652 struct creq_register_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800653 u16 cmd_flags = 0, level;
654 int pg_ptrs, pages, i, rc;
655 dma_addr_t **pbl_ptr;
656 u32 pg_size;
657
658 if (num_pbls) {
Somnath Kotur872f3572018-01-11 11:52:09 -0500659 /* Allocate memory for the non-leaf pages to store buf ptrs.
660 * Non-leaf pages always uses system PAGE_SIZE
661 */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800662 pg_ptrs = roundup_pow_of_two(num_pbls);
663 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
664 if (!pages)
665 pages++;
666
667 if (pages > MAX_PBL_LVL_1_PGS) {
668 dev_err(&res->pdev->dev, "QPLIB: SP: Reg MR pages ");
669 dev_err(&res->pdev->dev,
670 "requested (0x%x) exceeded max (0x%x)",
671 pages, MAX_PBL_LVL_1_PGS);
672 return -ENOMEM;
673 }
674 /* Free the hwq if it already exist, must be a rereg */
675 if (mr->hwq.max_elements)
676 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
677
678 mr->hwq.max_elements = pages;
Somnath Kotur872f3572018-01-11 11:52:09 -0500679 /* Use system PAGE_SIZE */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800680 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &mr->hwq, NULL, 0,
681 &mr->hwq.max_elements,
682 PAGE_SIZE, 0, PAGE_SIZE,
683 HWQ_TYPE_CTX);
684 if (rc) {
685 dev_err(&res->pdev->dev,
686 "SP: Reg MR memory allocation failed");
687 return -ENOMEM;
688 }
689 /* Write to the hwq */
690 pbl_ptr = (dma_addr_t **)mr->hwq.pbl_ptr;
691 for (i = 0; i < num_pbls; i++)
692 pbl_ptr[PTR_PG(i)][PTR_IDX(i)] =
693 (pbl_tbl[i] & PAGE_MASK) | PTU_PTE_VALID;
694 }
695
696 RCFW_CMD_PREP(req, REGISTER_MR, cmd_flags);
697
698 /* Configure the request */
699 if (mr->hwq.level == PBL_LVL_MAX) {
Somnath Kotur872f3572018-01-11 11:52:09 -0500700 /* No PBL provided, just use system PAGE_SIZE */
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800701 level = 0;
702 req.pbl = 0;
703 pg_size = PAGE_SIZE;
704 } else {
705 level = mr->hwq.level + 1;
706 req.pbl = cpu_to_le64(mr->hwq.pbl[PBL_LVL_0].pg_map_arr[0]);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800707 }
Somnath Kotur872f3572018-01-11 11:52:09 -0500708 pg_size = buf_pg_size ? buf_pg_size : PAGE_SIZE;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800709 req.log2_pg_size_lvl = (level << CMDQ_REGISTER_MR_LVL_SFT) |
710 ((ilog2(pg_size) <<
711 CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT) &
712 CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK);
Somnath Kotur872f3572018-01-11 11:52:09 -0500713 req.log2_pbl_pg_size = cpu_to_le16(((ilog2(PAGE_SIZE) <<
714 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_SFT) &
715 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_MASK));
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800716 req.access = (mr->flags & 0xFFFF);
717 req.va = cpu_to_le64(mr->va);
718 req.key = cpu_to_le32(mr->lkey);
719 req.mr_size = cpu_to_le64(mr->total_size);
720
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700721 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
722 (void *)&resp, NULL, block);
723 if (rc)
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800724 goto fail;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700725
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800726 return 0;
727
728fail:
729 if (mr->hwq.max_elements)
730 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
731 return rc;
732}
733
734int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
735 struct bnxt_qplib_frpl *frpl,
736 int max_pg_ptrs)
737{
738 int pg_ptrs, pages, rc;
739
740 /* Re-calculate the max to fit the HWQ allocation model */
741 pg_ptrs = roundup_pow_of_two(max_pg_ptrs);
742 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
743 if (!pages)
744 pages++;
745
746 if (pages > MAX_PBL_LVL_1_PGS)
747 return -ENOMEM;
748
749 frpl->hwq.max_elements = pages;
750 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &frpl->hwq, NULL, 0,
751 &frpl->hwq.max_elements, PAGE_SIZE, 0,
752 PAGE_SIZE, HWQ_TYPE_CTX);
753 if (!rc)
754 frpl->max_pg_ptrs = pg_ptrs;
755
756 return rc;
757}
758
759int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
760 struct bnxt_qplib_frpl *frpl)
761{
762 bnxt_qplib_free_hwq(res->pdev, &frpl->hwq);
763 return 0;
764}
765
766int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids)
767{
768 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
769 struct cmdq_map_tc_to_cos req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700770 struct creq_map_tc_to_cos_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800771 u16 cmd_flags = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800772
773 RCFW_CMD_PREP(req, MAP_TC_TO_COS, cmd_flags);
774 req.cos0 = cpu_to_le16(cids[0]);
775 req.cos1 = cpu_to_le16(cids[1]);
776
Bart Van Assche6dfa8ae2017-10-11 10:48:49 -0700777 bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, NULL,
778 0);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800779 return 0;
780}
Selvin Xavier89f81002018-01-11 11:52:10 -0500781
782int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw,
783 struct bnxt_qplib_roce_stats *stats)
784{
785 struct cmdq_query_roce_stats req;
786 struct creq_query_roce_stats_resp resp;
787 struct bnxt_qplib_rcfw_sbuf *sbuf;
788 struct creq_query_roce_stats_resp_sb *sb;
789 u16 cmd_flags = 0;
790 int rc = 0;
791
792 RCFW_CMD_PREP(req, QUERY_ROCE_STATS, cmd_flags);
793
794 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
795 if (!sbuf) {
796 dev_err(&rcfw->pdev->dev,
797 "QPLIB: SP: QUERY_ROCE_STATS alloc side buffer failed");
798 return -ENOMEM;
799 }
800
801 sb = sbuf->sb;
802 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
803 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
804 (void *)sbuf, 0);
805 if (rc)
806 goto bail;
807 /* Extract the context from the side buffer */
808 stats->to_retransmits = le64_to_cpu(sb->to_retransmits);
809 stats->seq_err_naks_rcvd = le64_to_cpu(sb->seq_err_naks_rcvd);
810 stats->max_retry_exceeded = le64_to_cpu(sb->max_retry_exceeded);
811 stats->rnr_naks_rcvd = le64_to_cpu(sb->rnr_naks_rcvd);
812 stats->missing_resp = le64_to_cpu(sb->missing_resp);
813 stats->unrecoverable_err = le64_to_cpu(sb->unrecoverable_err);
814 stats->bad_resp_err = le64_to_cpu(sb->bad_resp_err);
815 stats->local_qp_op_err = le64_to_cpu(sb->local_qp_op_err);
816 stats->local_protection_err = le64_to_cpu(sb->local_protection_err);
817 stats->mem_mgmt_op_err = le64_to_cpu(sb->mem_mgmt_op_err);
818 stats->remote_invalid_req_err = le64_to_cpu(sb->remote_invalid_req_err);
819 stats->remote_access_err = le64_to_cpu(sb->remote_access_err);
820 stats->remote_op_err = le64_to_cpu(sb->remote_op_err);
821 stats->dup_req = le64_to_cpu(sb->dup_req);
822 stats->res_exceed_max = le64_to_cpu(sb->res_exceed_max);
823 stats->res_length_mismatch = le64_to_cpu(sb->res_length_mismatch);
824 stats->res_exceeds_wqe = le64_to_cpu(sb->res_exceeds_wqe);
825 stats->res_opcode_err = le64_to_cpu(sb->res_opcode_err);
826 stats->res_rx_invalid_rkey = le64_to_cpu(sb->res_rx_invalid_rkey);
827 stats->res_rx_domain_err = le64_to_cpu(sb->res_rx_domain_err);
828 stats->res_rx_no_perm = le64_to_cpu(sb->res_rx_no_perm);
829 stats->res_rx_range_err = le64_to_cpu(sb->res_rx_range_err);
830 stats->res_tx_invalid_rkey = le64_to_cpu(sb->res_tx_invalid_rkey);
831 stats->res_tx_domain_err = le64_to_cpu(sb->res_tx_domain_err);
832 stats->res_tx_no_perm = le64_to_cpu(sb->res_tx_no_perm);
833 stats->res_tx_range_err = le64_to_cpu(sb->res_tx_range_err);
834 stats->res_irrq_oflow = le64_to_cpu(sb->res_irrq_oflow);
835 stats->res_unsup_opcode = le64_to_cpu(sb->res_unsup_opcode);
836 stats->res_unaligned_atomic = le64_to_cpu(sb->res_unaligned_atomic);
837 stats->res_rem_inv_err = le64_to_cpu(sb->res_rem_inv_err);
838 stats->res_mem_error = le64_to_cpu(sb->res_mem_error);
839 stats->res_srq_err = le64_to_cpu(sb->res_srq_err);
840 stats->res_cmp_err = le64_to_cpu(sb->res_cmp_err);
841 stats->res_invalid_dup_rkey = le64_to_cpu(sb->res_invalid_dup_rkey);
842 stats->res_wqe_format_err = le64_to_cpu(sb->res_wqe_format_err);
843 stats->res_cq_load_err = le64_to_cpu(sb->res_cq_load_err);
844 stats->res_srq_load_err = le64_to_cpu(sb->res_srq_load_err);
845 stats->res_tx_pci_err = le64_to_cpu(sb->res_tx_pci_err);
846 stats->res_rx_pci_err = le64_to_cpu(sb->res_rx_pci_err);
847bail:
848 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
849 return rc;
850}