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Sean Wangf4ff2572017-07-31 15:36:42 +08001/*
2 * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
3 *
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/input.h>
9#include "mt7623.dtsi"
10#include "mt6323.dtsi"
11
12/ {
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
15
16 aliases {
17 serial2 = &uart2;
18 };
19
20 chosen {
21 stdout-path = "serial2:115200n8";
22 };
23
24 cpus {
25 cpu@0 {
26 proc-supply = <&mt6323_vproc_reg>;
27 };
28
29 cpu@1 {
30 proc-supply = <&mt6323_vproc_reg>;
31 };
32
33 cpu@2 {
34 proc-supply = <&mt6323_vproc_reg>;
35 };
36
37 cpu@3 {
38 proc-supply = <&mt6323_vproc_reg>;
39 };
40 };
41
Sean Wang528a97e2018-02-23 18:16:27 +080042 reg_1p8v: regulator-1p8v {
43 compatible = "regulator-fixed";
44 regulator-name = "fixed-1.8V";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>;
47 regulator-boot-on;
48 regulator-always-on;
49 };
50
Sean Wang0629a012018-02-23 18:16:26 +080051 reg_3p3v: regulator-3p3v {
52 compatible = "regulator-fixed";
53 regulator-name = "fixed-3.3V";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
56 regulator-boot-on;
57 regulator-always-on;
58 };
59
60 reg_5v: regulator-5v {
61 compatible = "regulator-fixed";
62 regulator-name = "fixed-5V";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 regulator-boot-on;
66 regulator-always-on;
67 };
68
Sean Wangf4ff2572017-07-31 15:36:42 +080069 gpio_keys {
70 compatible = "gpio-keys";
71 pinctrl-names = "default";
72 pinctrl-0 = <&key_pins_a>;
73
74 factory {
75 label = "factory";
76 linux,code = <BTN_0>;
77 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
78 };
79
80 wps {
81 label = "wps";
82 linux,code = <KEY_WPS_BUTTON>;
83 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
84 };
85 };
86
87 leds {
88 compatible = "gpio-leds";
89 pinctrl-names = "default";
90 pinctrl-0 = <&led_pins_a>;
91
Ryder Leedfff5692017-08-04 11:59:35 +080092 blue {
93 label = "bpi-r2:pio:blue";
94 gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
Sean Wangf4ff2572017-07-31 15:36:42 +080095 default-state = "off";
96 };
97
98 green {
99 label = "bpi-r2:pio:green";
100 gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
101 default-state = "off";
102 };
103
Ryder Leedfff5692017-08-04 11:59:35 +0800104 red {
105 label = "bpi-r2:pio:red";
106 gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
Sean Wangf4ff2572017-07-31 15:36:42 +0800107 default-state = "off";
108 };
109 };
110
111 memory@80000000 {
112 reg = <0 0x80000000 0 0x40000000>;
113 };
114};
115
116&cir {
117 pinctrl-names = "default";
118 pinctrl-0 = <&cir_pins_a>;
119 status = "okay";
120};
121
122&crypto {
123 status = "okay";
124};
125
126&eth {
127 status = "okay";
Ryder Leedfff5692017-08-04 11:59:35 +0800128
Sean Wangf4ff2572017-07-31 15:36:42 +0800129 gmac0: mac@0 {
130 compatible = "mediatek,eth-mac";
131 reg = <0>;
132 phy-mode = "trgmii";
Ryder Leedfff5692017-08-04 11:59:35 +0800133
Sean Wangf4ff2572017-07-31 15:36:42 +0800134 fixed-link {
135 speed = <1000>;
136 full-duplex;
137 pause;
138 };
139 };
140
141 mdio: mdio-bus {
142 #address-cells = <1>;
143 #size-cells = <0>;
Ryder Leedfff5692017-08-04 11:59:35 +0800144
Sean Wangf4ff2572017-07-31 15:36:42 +0800145 switch@0 {
146 compatible = "mediatek,mt7530";
147 #address-cells = <1>;
148 #size-cells = <0>;
149 reg = <0>;
Sean Wangf4ff2572017-07-31 15:36:42 +0800150 pinctrl-names = "default";
151 reset-gpios = <&pio 33 0>;
152 core-supply = <&mt6323_vpa_reg>;
153 io-supply = <&mt6323_vemc3v3_reg>;
154
155 ports {
156 #address-cells = <1>;
157 #size-cells = <0>;
158 reg = <0>;
Ryder Leedfff5692017-08-04 11:59:35 +0800159
Sean Wangf4ff2572017-07-31 15:36:42 +0800160 port@0 {
161 reg = <0>;
162 label = "wan";
163 };
164
165 port@1 {
166 reg = <1>;
167 label = "lan0";
168 };
169
170 port@2 {
171 reg = <2>;
172 label = "lan1";
173 };
174
175 port@3 {
176 reg = <3>;
177 label = "lan2";
178 };
179
180 port@4 {
181 reg = <4>;
182 label = "lan3";
183 };
184
185 port@6 {
186 reg = <6>;
187 label = "cpu";
188 ethernet = <&gmac0>;
189 phy-mode = "trgmii";
Ryder Leedfff5692017-08-04 11:59:35 +0800190
Sean Wangf4ff2572017-07-31 15:36:42 +0800191 fixed-link {
192 speed = <1000>;
193 full-duplex;
194 };
195 };
196 };
197 };
198 };
199};
200
201&i2c0 {
202 pinctrl-names = "default";
203 pinctrl-0 = <&i2c0_pins_a>;
204 status = "okay";
205};
206
207&i2c1 {
208 pinctrl-names = "default";
209 pinctrl-0 = <&i2c1_pins_a>;
210 status = "okay";
211};
212
Sean Wang0eed8d02017-08-04 11:59:34 +0800213&mmc0 {
214 pinctrl-names = "default", "state_uhs";
215 pinctrl-0 = <&mmc0_pins_default>;
216 pinctrl-1 = <&mmc0_pins_uhs>;
217 status = "okay";
218 bus-width = <8>;
219 max-frequency = <50000000>;
220 cap-mmc-highspeed;
Sean Wang528a97e2018-02-23 18:16:27 +0800221 vmmc-supply = <&reg_3p3v>;
222 vqmmc-supply = <&reg_1p8v>;
Sean Wang0eed8d02017-08-04 11:59:34 +0800223 non-removable;
224};
225
226&mmc1 {
227 pinctrl-names = "default", "state_uhs";
228 pinctrl-0 = <&mmc1_pins_default>;
229 pinctrl-1 = <&mmc1_pins_uhs>;
230 status = "okay";
231 bus-width = <4>;
232 max-frequency = <50000000>;
233 cap-sd-highspeed;
Sean Wangb96a6962017-12-07 14:43:24 +0800234 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
Sean Wang528a97e2018-02-23 18:16:27 +0800235 vmmc-supply = <&reg_3p3v>;
236 vqmmc-supply = <&reg_3p3v>;
Sean Wang0eed8d02017-08-04 11:59:34 +0800237};
238
Sean Wangf4ff2572017-07-31 15:36:42 +0800239&pio {
240 cir_pins_a:cir@0 {
241 pins_cir {
242 pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
243 bias-disable;
244 };
245 };
246
247 i2c0_pins_a: i2c@0 {
248 pins_i2c0 {
249 pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
250 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
251 bias-disable;
252 };
253 };
254
255 i2c1_pins_a: i2c@1 {
256 pin_i2c1 {
257 pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
258 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
259 bias-disable;
260 };
261 };
262
263 i2s0_pins_a: i2s@0 {
264 pin_i2s0 {
265 pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
266 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
267 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
268 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
269 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
270 drive-strength = <MTK_DRIVE_12mA>;
271 bias-pull-down;
272 };
273 };
274
275 i2s1_pins_a: i2s@1 {
276 pin_i2s1 {
277 pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
278 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
279 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
280 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
281 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
282 drive-strength = <MTK_DRIVE_12mA>;
283 bias-pull-down;
284 };
285 };
286
287 key_pins_a: keys@0 {
288 pins_keys {
289 pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
290 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
291 input-enable;
292 };
293 };
294
295 led_pins_a: leds@0 {
296 pins_leds {
297 pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
298 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
299 <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
300 };
301 };
302
303 mmc0_pins_default: mmc0default {
304 pins_cmd_dat {
305 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
306 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
307 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
308 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
309 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
310 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
311 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
312 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
313 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
314 input-enable;
315 bias-pull-up;
316 };
317
318 pins_clk {
319 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
320 bias-pull-down;
321 };
322
323 pins_rst {
324 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
325 bias-pull-up;
326 };
327 };
328
329 mmc0_pins_uhs: mmc0 {
330 pins_cmd_dat {
331 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
332 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
333 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
334 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
335 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
336 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
337 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
338 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
339 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
340 input-enable;
341 drive-strength = <MTK_DRIVE_2mA>;
342 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
343 };
344
345 pins_clk {
346 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
347 drive-strength = <MTK_DRIVE_2mA>;
348 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
349 };
350
351 pins_rst {
352 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
353 bias-pull-up;
354 };
355 };
356
357 mmc1_pins_default: mmc1default {
358 pins_cmd_dat {
359 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
360 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
361 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
362 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
363 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
364 input-enable;
365 drive-strength = <MTK_DRIVE_4mA>;
366 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
367 };
368
369 pins_clk {
370 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
371 bias-pull-down;
372 drive-strength = <MTK_DRIVE_4mA>;
373 };
Sean Wang0eed8d02017-08-04 11:59:34 +0800374
375 pins_wp {
376 pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
377 input-enable;
378 bias-pull-up;
379 };
380
381 pins_insert {
382 pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
383 bias-pull-up;
384 };
Sean Wangf4ff2572017-07-31 15:36:42 +0800385 };
386
387 mmc1_pins_uhs: mmc1 {
388 pins_cmd_dat {
389 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
390 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
391 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
392 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
393 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
394 input-enable;
395 drive-strength = <MTK_DRIVE_4mA>;
396 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
397 };
398
399 pins_clk {
400 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
401 drive-strength = <MTK_DRIVE_4mA>;
402 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
403 };
404 };
405
Sean Wangf4ff2572017-07-31 15:36:42 +0800406 pwm_pins_a: pwm@0 {
407 pins_pwm {
408 pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
409 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
410 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
411 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
412 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
413 };
414 };
415
Ryder Leedfff5692017-08-04 11:59:35 +0800416 spi0_pins_a: spi@0 {
417 pins_spi {
418 pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
419 <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
420 <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
421 <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
422 bias-disable;
423 };
424 };
425
Sean Wangf4ff2572017-07-31 15:36:42 +0800426 uart0_pins_a: uart@0 {
427 pins_dat {
428 pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
429 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
430 };
431 };
432
433 uart1_pins_a: uart@1 {
434 pins_dat {
435 pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
436 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
437 };
438 };
Sean Wangcc2f6522018-02-23 18:16:28 +0800439
440 uart2_pins_a: uart@2 {
441 pins_dat {
442 pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
443 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
444 };
445 };
Sean Wangf4ff2572017-07-31 15:36:42 +0800446};
447
448&pwm {
449 pinctrl-names = "default";
450 pinctrl-0 = <&pwm_pins_a>;
451 status = "okay";
452};
453
454&pwrap {
455 mt6323 {
456 mt6323led: led {
457 compatible = "mediatek,mt6323-led";
458 #address-cells = <1>;
459 #size-cells = <0>;
460
461 led@0 {
462 reg = <0>;
463 label = "bpi-r2:isink:green";
464 default-state = "off";
465 };
Ryder Leedfff5692017-08-04 11:59:35 +0800466
Sean Wangf4ff2572017-07-31 15:36:42 +0800467 led@1 {
468 reg = <1>;
469 label = "bpi-r2:isink:red";
470 default-state = "off";
471 };
Ryder Leedfff5692017-08-04 11:59:35 +0800472
Sean Wangf4ff2572017-07-31 15:36:42 +0800473 led@2 {
474 reg = <2>;
475 label = "bpi-r2:isink:blue";
476 default-state = "off";
477 };
478 };
479 };
480};
481
482&spi0 {
483 pinctrl-names = "default";
484 pinctrl-0 = <&spi0_pins_a>;
485 status = "okay";
486};
487
488&uart0 {
489 pinctrl-names = "default";
490 pinctrl-0 = <&uart0_pins_a>;
Sean Wangcc2f6522018-02-23 18:16:28 +0800491 status = "okay";
Sean Wangf4ff2572017-07-31 15:36:42 +0800492};
493
Sean Wangf4ff2572017-07-31 15:36:42 +0800494&uart1 {
495 pinctrl-names = "default";
496 pinctrl-0 = <&uart1_pins_a>;
Sean Wangcc2f6522018-02-23 18:16:28 +0800497 status = "okay";
Sean Wangf4ff2572017-07-31 15:36:42 +0800498};
499
500&uart2 {
Sean Wangcc2f6522018-02-23 18:16:28 +0800501 pinctrl-names = "default";
502 pinctrl-0 = <&uart2_pins_a>;
Sean Wangf4ff2572017-07-31 15:36:42 +0800503 status = "okay";
504};
505
506&usb1 {
Sean Wang0629a012018-02-23 18:16:26 +0800507 vusb33-supply = <&reg_3p3v>;
508 vbus-supply = <&reg_5v>;
Sean Wangf4ff2572017-07-31 15:36:42 +0800509 status = "okay";
510};
511
512&usb2 {
Sean Wang0629a012018-02-23 18:16:26 +0800513 vusb33-supply = <&reg_3p3v>;
514 vbus-supply = <&reg_5v>;
Sean Wangf4ff2572017-07-31 15:36:42 +0800515 status = "okay";
516};
Ryder Leedfff5692017-08-04 11:59:35 +0800517
518&u3phy1 {
519 status = "okay";
520};
521
522&u3phy2 {
523 status = "okay";
524};
525