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Liviu Dudau71f867e2014-11-11 17:32:11 +00001/*
2 * ARM Ltd. Juno Platform
3 *
4 * Copyright (c) 2013-2014 ARM Ltd.
5 *
6 * This file is licensed under a dual GPLv2 or BSD license.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/interrupt-controller/arm-gic.h>
Sudeep Hollad29e849c2017-01-17 10:20:59 +000012#include "juno-base.dtsi"
Liviu Dudau71f867e2014-11-11 17:32:11 +000013
14/ {
15 model = "ARM Juno development board (r0)";
16 compatible = "arm,juno", "arm,vexpress";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 aliases {
22 serial0 = &soc_uart0;
23 };
24
25 chosen {
Robin Murphye0b21802015-01-22 11:21:32 +000026 stdout-path = "serial0:115200n8";
Liviu Dudau71f867e2014-11-11 17:32:11 +000027 };
28
29 psci {
30 compatible = "arm,psci-0.2";
31 method = "smc";
32 };
33
34 cpus {
35 #address-cells = <2>;
36 #size-cells = <0>;
37
Sudeep Holla050c69e2015-06-03 14:31:49 +010038 cpu-map {
39 cluster0 {
40 core0 {
41 cpu = <&A57_0>;
42 };
43 core1 {
44 cpu = <&A57_1>;
45 };
46 };
47
48 cluster1 {
49 core0 {
50 cpu = <&A53_0>;
51 };
52 core1 {
53 cpu = <&A53_1>;
54 };
55 core2 {
56 cpu = <&A53_2>;
57 };
58 core3 {
59 cpu = <&A53_3>;
60 };
61 };
62 };
63
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +000064 idle-states {
65 entry-method = "arm,psci";
66
67 CPU_SLEEP_0: cpu-sleep-0 {
68 compatible = "arm,idle-state";
69 arm,psci-suspend-param = <0x0010000>;
70 local-timer-stop;
71 entry-latency-us = <300>;
72 exit-latency-us = <1200>;
73 min-residency-us = <2000>;
74 };
75
76 CLUSTER_SLEEP_0: cluster-sleep-0 {
77 compatible = "arm,idle-state";
78 arm,psci-suspend-param = <0x1010000>;
79 local-timer-stop;
Sudeep Holla909e4812016-11-16 17:31:31 +000080 entry-latency-us = <400>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +000081 exit-latency-us = <1200>;
82 min-residency-us = <2500>;
83 };
84 };
85
Liviu Dudau71f867e2014-11-11 17:32:11 +000086 A57_0: cpu@0 {
87 compatible = "arm,cortex-a57","arm,armv8";
88 reg = <0x0 0x0>;
89 device_type = "cpu";
90 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +000091 next-level-cache = <&A57_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +010092 clocks = <&scpi_dvfs 0>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +000093 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +010094 capacity-dmips-mhz = <1024>;
Liviu Dudau71f867e2014-11-11 17:32:11 +000095 };
96
97 A57_1: cpu@1 {
98 compatible = "arm,cortex-a57","arm,armv8";
99 reg = <0x0 0x1>;
100 device_type = "cpu";
101 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +0000102 next-level-cache = <&A57_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +0100103 clocks = <&scpi_dvfs 0>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +0000104 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +0100105 capacity-dmips-mhz = <1024>;
Liviu Dudau71f867e2014-11-11 17:32:11 +0000106 };
107
108 A53_0: cpu@100 {
109 compatible = "arm,cortex-a53","arm,armv8";
110 reg = <0x0 0x100>;
111 device_type = "cpu";
112 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +0000113 next-level-cache = <&A53_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +0100114 clocks = <&scpi_dvfs 1>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +0000115 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +0100116 capacity-dmips-mhz = <578>;
Liviu Dudau71f867e2014-11-11 17:32:11 +0000117 };
118
119 A53_1: cpu@101 {
120 compatible = "arm,cortex-a53","arm,armv8";
121 reg = <0x0 0x101>;
122 device_type = "cpu";
123 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +0000124 next-level-cache = <&A53_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +0100125 clocks = <&scpi_dvfs 1>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +0000126 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +0100127 capacity-dmips-mhz = <578>;
Liviu Dudau71f867e2014-11-11 17:32:11 +0000128 };
129
130 A53_2: cpu@102 {
131 compatible = "arm,cortex-a53","arm,armv8";
132 reg = <0x0 0x102>;
133 device_type = "cpu";
134 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +0000135 next-level-cache = <&A53_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +0100136 clocks = <&scpi_dvfs 1>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +0000137 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +0100138 capacity-dmips-mhz = <578>;
Liviu Dudau71f867e2014-11-11 17:32:11 +0000139 };
140
141 A53_3: cpu@103 {
142 compatible = "arm,cortex-a53","arm,armv8";
143 reg = <0x0 0x103>;
144 device_type = "cpu";
145 enable-method = "psci";
Sudeep Holla7934d692015-01-21 12:02:30 +0000146 next-level-cache = <&A53_L2>;
Sudeep Hollaa7384592015-06-03 14:40:56 +0100147 clocks = <&scpi_dvfs 1>;
Jon Medhurst (Tixy)28e10a82015-12-09 09:40:53 +0000148 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
Juri Lelli4d6815b2016-10-17 16:46:46 +0100149 capacity-dmips-mhz = <578>;
Sudeep Holla7934d692015-01-21 12:02:30 +0000150 };
151
152 A57_L2: l2-cache0 {
153 compatible = "cache";
154 };
155
156 A53_L2: l2-cache1 {
157 compatible = "cache";
Liviu Dudau71f867e2014-11-11 17:32:11 +0000158 };
159 };
160
Mark Rutland01a507a2015-10-02 10:55:06 +0100161 pmu_a57 {
162 compatible = "arm,cortex-a57-pmu";
Will Deacon2b013112015-03-30 10:59:30 +0100163 interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
Mark Rutland01a507a2015-10-02 10:55:06 +0100164 <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>;
165 interrupt-affinity = <&A57_0>,
166 <&A57_1>;
167 };
168
169 pmu_a53 {
170 compatible = "arm,cortex-a53-pmu";
171 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
Liviu Dudau71f867e2014-11-11 17:32:11 +0000172 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
173 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
Will Deacon2b013112015-03-30 10:59:30 +0100174 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
Mark Rutland01a507a2015-10-02 10:55:06 +0100175 interrupt-affinity = <&A53_0>,
Will Deacon2b013112015-03-30 10:59:30 +0100176 <&A53_1>,
177 <&A53_2>,
178 <&A53_3>;
Liviu Dudau71f867e2014-11-11 17:32:11 +0000179 };
Liviu Dudau71f867e2014-11-11 17:32:11 +0000180};
Sudeep Holla3e287cf2016-06-02 10:18:41 +0100181
182&etm0 {
183 cpu = <&A57_0>;
184};
185
186&etm1 {
187 cpu = <&A57_1>;
188};
189
190&etm2 {
191 cpu = <&A53_0>;
192};
193
194&etm3 {
195 cpu = <&A53_1>;
196};
197
198&etm4 {
199 cpu = <&A53_2>;
200};
201
202&etm5 {
203 cpu = <&A53_3>;
204};
Sudeep Holla19ac17c2017-01-12 11:53:35 +0000205
206&etf0_out_port {
207 remote-endpoint = <&replicator_in_port0>;
208};
209
210&replicator_in_port0 {
211 remote-endpoint = <&etf0_out_port>;
212};
Mike Leachcde6f9a2017-01-11 20:44:09 +0000213
214&stm_out_port {
215 remote-endpoint = <&main_funnel_in_port2>;
216};
217
218&main_funnel {
219 ports {
220 port@3 {
221 reg = <2>;
222 main_funnel_in_port2: endpoint {
223 slave-mode;
224 remote-endpoint = <&stm_out_port>;
225 };
226 };
227 };
228};