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gerrit-public.fairphone.software / kernel / msm-5.4 / d2912cb15bdda8ba4a5dd73396ad62641af2f520 / . / arch / powerpc / kvm / e500_emulate.c
blob: 3d0d3ec5be966c62533e96c68039853eb3d32150 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +0200[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]2/*
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]3 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]4 *
5 * Author: Yu Liu, <yu.liu@freescale.com>
6 *
7 * Description:
8 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
9 * by Hollis Blanchard <hollisb@us.ibm.com>.
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]10 */
11
12#include <asm/kvm_ppc.h>
13#include <asm/disassemble.h>
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]14#include <asm/dbell.h>
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]15#include <asm/reg_booke.h>
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]16
17#include "booke.h"
Scott Wood29a5a6f2011-12-20 15:34:29 +0000[diff] [blame]18#include "e500.h"
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]19
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]20#define XOP_DCBTLS 166
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]21#define XOP_MSGSND 206
22#define XOP_MSGCLR 238
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]23#define XOP_MFTMR 366
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]24#define XOP_TLBIVAX 786
25#define XOP_TLBSX 914
26#define XOP_TLBRE 946
27#define XOP_TLBWE 978
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]28#define XOP_TLBILX 18
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]29#define XOP_EHPRIV 270
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]30
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]31#ifdef CONFIG_KVM_E500MC
32static int dbell2prio(ulong param)
33{
34 int msg = param & PPC_DBELL_TYPE_MASK;
35 int prio = -1;
36
37 switch (msg) {
38 case PPC_DBELL_TYPE(PPC_DBELL):
39 prio = BOOKE_IRQPRIO_DBELL;
40 break;
41 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
42 prio = BOOKE_IRQPRIO_DBELL_CRIT;
43 break;
44 default:
45 break;
46 }
47
48 return prio;
49}
50
51static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
52{
Simon Guo1143a702018-05-07 14:20:07 +0800[diff] [blame]53 ulong param = vcpu->arch.regs.gpr[rb];
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]54 int prio = dbell2prio(param);
55
56 if (prio < 0)
57 return EMULATE_FAIL;
58
59 clear_bit(prio, &vcpu->arch.pending_exceptions);
60 return EMULATE_DONE;
61}
62
63static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
64{
Simon Guo1143a702018-05-07 14:20:07 +0800[diff] [blame]65 ulong param = vcpu->arch.regs.gpr[rb];
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]66 int prio = dbell2prio(rb);
67 int pir = param & PPC_DBELL_PIR_MASK;
68 int i;
69 struct kvm_vcpu *cvcpu;
70
71 if (prio < 0)
72 return EMULATE_FAIL;
73
74 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
75 int cpir = cvcpu->arch.shared->pir;
76 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
77 set_bit(prio, &cvcpu->arch.pending_exceptions);
78 kvm_vcpu_kick(cvcpu);
79 }
80 }
81
82 return EMULATE_DONE;
83}
84#endif
85
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]86static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
87 unsigned int inst, int *advance)
88{
89 int emulated = EMULATE_DONE;
90
91 switch (get_oc(inst)) {
92 case EHPRIV_OC_DEBUG:
93 run->exit_reason = KVM_EXIT_DEBUG;
Simon Guo173c5202018-05-07 14:20:08 +0800[diff] [blame]94 run->debug.arch.address = vcpu->arch.regs.nip;
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]95 run->debug.arch.status = 0;
96 kvmppc_account_exit(vcpu, DEBUG_EXITS);
97 emulated = EMULATE_EXIT_USER;
98 *advance = 0;
99 break;
100 default:
101 emulated = EMULATE_FAIL;
102 }
103 return emulated;
104}
105
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]106static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
107{
108 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
109
110 /* Always fail to lock the cache */
111 vcpu_e500->l1csr0 |= L1CSR0_CUL;
112 return EMULATE_DONE;
113}
114
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]115static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
116 int rt)
117{
118 /* Expose one thread per vcpu */
119 if (get_tmrn(inst) == TMRN_TMCFG0) {
120 kvmppc_set_gpr(vcpu, rt,
121 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
122 return EMULATE_DONE;
123 }
124
125 return EMULATE_FAIL;
126}
127
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]128int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu,
129 unsigned int inst, int *advance)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]130{
131 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]132 int ra = get_ra(inst);
133 int rb = get_rb(inst);
134 int rt = get_rt(inst);
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]135 gva_t ea;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]136
137 switch (get_op(inst)) {
138 case 31:
139 switch (get_xop(inst)) {
140
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]141 case XOP_DCBTLS:
142 emulated = kvmppc_e500_emul_dcbtls(vcpu);
143 break;
144
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]145#ifdef CONFIG_KVM_E500MC
146 case XOP_MSGSND:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]147 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]148 break;
149
150 case XOP_MSGCLR:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]151 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]152 break;
153#endif
154
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]155 case XOP_TLBRE:
156 emulated = kvmppc_e500_emul_tlbre(vcpu);
157 break;
158
159 case XOP_TLBWE:
160 emulated = kvmppc_e500_emul_tlbwe(vcpu);
161 break;
162
163 case XOP_TLBSX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]164 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
165 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]166 break;
167
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]168 case XOP_TLBILX: {
169 int type = rt & 0x3;
170 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
171 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]172 break;
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]173 }
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]174
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]175 case XOP_TLBIVAX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]176 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
177 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]178 break;
179
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]180 case XOP_MFTMR:
181 emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
182 break;
183
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]184 case XOP_EHPRIV:
185 emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst,
186 advance);
187 break;
188
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]189 default:
190 emulated = EMULATE_FAIL;
191 }
192
193 break;
194
195 default:
196 emulated = EMULATE_FAIL;
197 }
198
199 if (emulated == EMULATE_FAIL)
200 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
201
202 return emulated;
203}
204
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]205int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]206{
207 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
208 int emulated = EMULATE_DONE;
209
210 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]211#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]212 case SPRN_PID:
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]213 kvmppc_set_pid(vcpu, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]214 break;
215 case SPRN_PID1:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]216 if (spr_val != 0)
217 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]218 vcpu_e500->pid[1] = spr_val;
219 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]220 case SPRN_PID2:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]221 if (spr_val != 0)
222 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]223 vcpu_e500->pid[2] = spr_val;
224 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]225 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]226 vcpu->arch.shared->mas0 = spr_val;
227 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]228 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]229 vcpu->arch.shared->mas1 = spr_val;
230 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]231 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]232 vcpu->arch.shared->mas2 = spr_val;
233 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]234 case SPRN_MAS3:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]235 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
236 vcpu->arch.shared->mas7_3 |= spr_val;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]237 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]238 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]239 vcpu->arch.shared->mas4 = spr_val;
240 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]241 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]242 vcpu->arch.shared->mas6 = spr_val;
243 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]244 case SPRN_MAS7:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]245 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
246 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]247 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]248#endif
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]249 case SPRN_L1CSR0:
250 vcpu_e500->l1csr0 = spr_val;
251 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
252 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]253 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]254 vcpu_e500->l1csr1 = spr_val;
Alexander Graf07fec1c2014-04-17 12:53:13 +0200[diff] [blame]255 vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]256 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]257 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]258 vcpu_e500->hid0 = spr_val;
259 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]260 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]261 vcpu_e500->hid1 = spr_val;
262 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]263
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]264 case SPRN_MMUCSR0:
265 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]266 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]267 break;
268
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]269 case SPRN_PWRMGTCR0:
270 /*
271 * Guest relies on host power management configurations
272 * Treat the request as a general store
273 */
274 vcpu->arch.pwrmgtcr0 = spr_val;
275 break;
276
Diana Craciun98518c42018-12-12 16:03:03 +0200[diff] [blame]277 case SPRN_BUCSR:
278 /*
279 * If we are here, it means that we have already flushed the
280 * branch predictor, so just return to guest.
281 */
282 break;
283
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]284 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]285#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]286 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]287 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]288 break;
289 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]290 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]291 break;
292 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]293 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]294 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]295#endif
296#ifdef CONFIG_ALTIVEC
297 case SPRN_IVOR32:
298 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
299 break;
300 case SPRN_IVOR33:
301 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
302 break;
303#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]304 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]305 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]306 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]307#ifdef CONFIG_KVM_BOOKE_HV
308 case SPRN_IVOR36:
309 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
310 break;
311 case SPRN_IVOR37:
312 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
313 break;
314#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]315 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]316 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]317 }
318
319 return emulated;
320}
321
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]322int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]323{
324 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
325 int emulated = EMULATE_DONE;
326
327 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]328#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]329 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]330 *spr_val = vcpu_e500->pid[0];
331 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]332 case SPRN_PID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]333 *spr_val = vcpu_e500->pid[1];
334 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]335 case SPRN_PID2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]336 *spr_val = vcpu_e500->pid[2];
337 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]338 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]339 *spr_val = vcpu->arch.shared->mas0;
340 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]341 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]342 *spr_val = vcpu->arch.shared->mas1;
343 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]344 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]345 *spr_val = vcpu->arch.shared->mas2;
346 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]347 case SPRN_MAS3:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]348 *spr_val = (u32)vcpu->arch.shared->mas7_3;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]349 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]350 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]351 *spr_val = vcpu->arch.shared->mas4;
352 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]353 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]354 *spr_val = vcpu->arch.shared->mas6;
355 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]356 case SPRN_MAS7:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]357 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]358 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]359#endif
Bharat Bhushan21bd0002012-05-20 23:21:23 +0000[diff] [blame]360 case SPRN_DECAR:
361 *spr_val = vcpu->arch.decar;
362 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]363 case SPRN_TLB0CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]364 *spr_val = vcpu->arch.tlbcfg[0];
365 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]366 case SPRN_TLB1CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]367 *spr_val = vcpu->arch.tlbcfg[1];
368 break;
Mihai Caraman307d9002013-04-11 00:03:10 +0000[diff] [blame]369 case SPRN_TLB0PS:
370 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
371 return EMULATE_FAIL;
372 *spr_val = vcpu->arch.tlbps[0];
373 break;
374 case SPRN_TLB1PS:
375 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
376 return EMULATE_FAIL;
377 *spr_val = vcpu->arch.tlbps[1];
378 break;
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]379 case SPRN_L1CSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]380 *spr_val = vcpu_e500->l1csr0;
381 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]382 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]383 *spr_val = vcpu_e500->l1csr1;
384 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]385 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]386 *spr_val = vcpu_e500->hid0;
387 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]388 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]389 *spr_val = vcpu_e500->hid1;
390 break;
Scott Wood90d34b02011-03-29 16:49:10 -0500[diff] [blame]391 case SPRN_SVR:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]392 *spr_val = vcpu_e500->svr;
393 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]394
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]395 case SPRN_MMUCSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]396 *spr_val = 0;
397 break;
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]398
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]399 case SPRN_MMUCFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]400 *spr_val = vcpu->arch.mmucfg;
401 break;
Mihai Caraman9a6061d2013-04-11 00:03:11 +0000[diff] [blame]402 case SPRN_EPTCFG:
403 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
404 return EMULATE_FAIL;
405 /*
406 * Legacy Linux guests access EPTCFG register even if the E.PT
407 * category is disabled in the VM. Give them a chance to live.
408 */
409 *spr_val = vcpu->arch.eptcfg;
410 break;
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]411
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]412 case SPRN_PWRMGTCR0:
413 *spr_val = vcpu->arch.pwrmgtcr0;
414 break;
415
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]416 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]417#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]418 case SPRN_IVOR32:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]419 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]420 break;
421 case SPRN_IVOR33:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]422 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]423 break;
424 case SPRN_IVOR34:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]425 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]426 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]427#endif
428#ifdef CONFIG_ALTIVEC
429 case SPRN_IVOR32:
430 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
431 break;
432 case SPRN_IVOR33:
433 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
434 break;
435#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]436 case SPRN_IVOR35:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]437 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]438 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]439#ifdef CONFIG_KVM_BOOKE_HV
440 case SPRN_IVOR36:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]441 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]442 break;
443 case SPRN_IVOR37:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]444 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]445 break;
446#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]447 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]448 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]449 }
450
451 return emulated;
452}
453