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Michael Bueschef1a6282008-08-27 18:53:02 +02001#ifndef LINUX_B43_PHY_COMMON_H_
2#define LINUX_B43_PHY_COMMON_H_
3
Johannes Bergf41f3f32009-06-07 12:30:34 -05004#include <linux/types.h>
Rafał Miłeckie5c407f2010-10-11 03:11:02 +02005#include <linux/nl80211.h>
Michael Bueschef1a6282008-08-27 18:53:02 +02006
7struct b43_wldev;
8
Rafał Miłecki98650452010-01-25 18:59:59 +01009/* Complex number using 2 32-bit signed integers */
10struct b43_c32 { s32 i, q; };
Michael Bueschef1a6282008-08-27 18:53:02 +020011
Rafał Miłecki6f98e622010-01-25 19:00:00 +010012#define CORDIC_CONVERT(value) (((value) >= 0) ? \
13 ((((value) >> 15) + 1) >> 1) : \
14 -((((-(value)) >> 15) + 1) >> 1))
15
Michael Bueschef1a6282008-08-27 18:53:02 +020016/* PHY register routing bits */
17#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
18#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
19#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
20#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
21#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
22
23/* CCK (B-PHY) registers. */
24#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
25/* N-PHY registers. */
26#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
27/* N-PHY BMODE registers. */
28#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
29/* OFDM (A-PHY) registers. */
30#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
31/* Extended G-PHY registers. */
32#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
33
34
35/* Masks for the PHY versioning registers. */
36#define B43_PHYVER_ANALOG 0xF000
37#define B43_PHYVER_ANALOG_SHIFT 12
38#define B43_PHYVER_TYPE 0x0F00
39#define B43_PHYVER_TYPE_SHIFT 8
40#define B43_PHYVER_VERSION 0x00FF
41
Rafał Miłecki15518082010-12-07 09:42:07 +010042/* PHY writes need to be flushed if we reach limit */
43#define B43_MAX_WRITES_IN_ROW 24
44
Michael Bueschef1a6282008-08-27 18:53:02 +020045/**
46 * enum b43_interference_mitigation - Interference Mitigation mode
47 *
48 * @B43_INTERFMODE_NONE: Disabled
49 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
50 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
51 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
52 */
53enum b43_interference_mitigation {
54 B43_INTERFMODE_NONE,
55 B43_INTERFMODE_NONWLAN,
56 B43_INTERFMODE_MANUALWLAN,
57 B43_INTERFMODE_AUTOWLAN,
58};
59
60/* Antenna identifiers */
61enum {
Gábor Stefanik64e368b2009-08-27 22:49:49 +020062 B43_ANTENNA0 = 0, /* Antenna 0 */
63 B43_ANTENNA1 = 1, /* Antenna 1 */
64 B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
65 B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
66 B43_ANTENNA2 = 4,
Michael Bueschef1a6282008-08-27 18:53:02 +020067 B43_ANTENNA3 = 8,
68
69 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
70 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
71};
72
73/**
Michael Buesch18c8ade2008-08-28 19:33:40 +020074 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
75 *
76 * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
77 * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
78 */
79enum b43_txpwr_result {
80 B43_TXPWR_RES_NEED_ADJUST,
81 B43_TXPWR_RES_DONE,
82};
83
84/**
Michael Bueschef1a6282008-08-27 18:53:02 +020085 * struct b43_phy_operations - Function pointers for PHY ops.
86 *
Michael Bueschfb111372008-09-02 13:00:34 +020087 * @allocate: Allocate and initialise the PHY data structures.
88 * Must not be NULL.
89 * @free: Destroy and free the PHY data structures.
90 * Must not be NULL.
91 *
92 * @prepare_structs: Prepare the PHY data structures.
93 * The data structures allocated in @allocate are
94 * initialized here.
95 * Must not be NULL.
96 * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
97 * do some early early PHY hardware init.
Michael Bueschef1a6282008-08-27 18:53:02 +020098 * Can be NULL, if not required.
99 * @init: Initialize the PHY.
100 * Must not be NULL.
Michael Bueschfb111372008-09-02 13:00:34 +0200101 * @exit: Shutdown the PHY.
Michael Bueschef1a6282008-08-27 18:53:02 +0200102 * Can be NULL, if not required.
103 *
104 * @phy_read: Read from a PHY register.
105 * Must not be NULL.
106 * @phy_write: Write to a PHY register.
107 * Must not be NULL.
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200108 * @phy_maskset: Maskset a PHY register, taking shortcuts.
109 * If it is NULL, a generic algorithm is used.
Michael Bueschef1a6282008-08-27 18:53:02 +0200110 * @radio_read: Read from a Radio register.
111 * Must not be NULL.
112 * @radio_write: Write to a Radio register.
113 * Must not be NULL.
114 *
115 * @supports_hwpctl: Returns a boolean whether Hardware Power Control
116 * is supported or not.
117 * If NULL, hwpctl is assumed to be never supported.
118 * @software_rfkill: Turn the radio ON or OFF.
119 * Possible state values are
120 * RFKILL_STATE_SOFT_BLOCKED or
121 * RFKILL_STATE_UNBLOCKED
122 * Must not be NULL.
Michael Bueschcb24f572008-09-03 12:12:20 +0200123 * @switch_analog: Turn the Analog on/off.
124 * Must not be NULL.
Michael Bueschef1a6282008-08-27 18:53:02 +0200125 * @switch_channel: Switch the radio to another channel.
126 * Must not be NULL.
127 * @get_default_chan: Just returns the default channel number.
128 * Must not be NULL.
129 * @set_rx_antenna: Set the antenna used for RX.
130 * Can be NULL, if not supported.
131 * @interf_mitigation: Switch the Interference Mitigation mode.
132 * Can be NULL, if not supported.
133 *
Michael Buesch18c8ade2008-08-28 19:33:40 +0200134 * @recalc_txpower: Recalculate the transmission power parameters.
135 * This callback has to recalculate the TX power settings,
136 * but does not need to write them to the hardware, yet.
137 * Returns enum b43_txpwr_result to indicate whether the hardware
138 * needs to be adjusted.
139 * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
140 * will be called later.
141 * If the parameter "ignore_tssi" is true, the TSSI values should
142 * be ignored and a recalculation of the power settings should be
143 * done even if the TSSI values did not change.
Michael Buesch36dbd952009-09-04 22:51:29 +0200144 * This function may sleep, but should not.
Michael Bueschef1a6282008-08-27 18:53:02 +0200145 * Must not be NULL.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200146 * @adjust_txpower: Write the previously calculated TX power settings
147 * (from @recalc_txpower) to the hardware.
148 * This function may sleep.
149 * Can be NULL, if (and ONLY if) @recalc_txpower _always_
150 * returns B43_TXPWR_RES_DONE.
Michael Bueschef1a6282008-08-27 18:53:02 +0200151 *
152 * @pwork_15sec: Periodic work. Called every 15 seconds.
153 * Can be NULL, if not required.
154 * @pwork_60sec: Periodic work. Called every 60 seconds.
155 * Can be NULL, if not required.
156 */
157struct b43_phy_operations {
158 /* Initialisation */
159 int (*allocate)(struct b43_wldev *dev);
Michael Bueschfb111372008-09-02 13:00:34 +0200160 void (*free)(struct b43_wldev *dev);
161 void (*prepare_structs)(struct b43_wldev *dev);
162 int (*prepare_hardware)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200163 int (*init)(struct b43_wldev *dev);
164 void (*exit)(struct b43_wldev *dev);
165
166 /* Register access */
167 u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
168 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200169 void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
Michael Bueschef1a6282008-08-27 18:53:02 +0200170 u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
171 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
172
173 /* Radio */
174 bool (*supports_hwpctl)(struct b43_wldev *dev);
Johannes Berg19d337d2009-06-02 13:01:37 +0200175 void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
Michael Bueschcb24f572008-09-03 12:12:20 +0200176 void (*switch_analog)(struct b43_wldev *dev, bool on);
Michael Bueschef1a6282008-08-27 18:53:02 +0200177 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
178 unsigned int (*get_default_chan)(struct b43_wldev *dev);
179 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
180 int (*interf_mitigation)(struct b43_wldev *dev,
181 enum b43_interference_mitigation new_mode);
182
183 /* Transmission power adjustment */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200184 enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
185 bool ignore_tssi);
186 void (*adjust_txpower)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200187
188 /* Misc */
189 void (*pwork_15sec)(struct b43_wldev *dev);
190 void (*pwork_60sec)(struct b43_wldev *dev);
191};
192
193struct b43_phy_a;
194struct b43_phy_g;
195struct b43_phy_n;
Michael Buesche63e4362008-08-30 10:55:48 +0200196struct b43_phy_lp;
Rafał Miłeckid7520b12011-06-13 16:20:06 +0200197struct b43_phy_ht;
Michael Bueschef1a6282008-08-27 18:53:02 +0200198
199struct b43_phy {
200 /* Hardware operation callbacks. */
201 const struct b43_phy_operations *ops;
202
203 /* Most hardware context information is stored in the standard-
204 * specific data structures pointed to by the pointers below.
205 * Only one of them is valid (the currently enabled PHY). */
206#ifdef CONFIG_B43_DEBUG
207 /* No union for debug build to force NULL derefs in buggy code. */
208 struct {
209#else
210 union {
211#endif
212 /* A-PHY specific information */
213 struct b43_phy_a *a;
214 /* G-PHY specific information */
215 struct b43_phy_g *g;
216 /* N-PHY specific information */
217 struct b43_phy_n *n;
Michael Buesche63e4362008-08-30 10:55:48 +0200218 /* LP-PHY specific information */
219 struct b43_phy_lp *lp;
Rafał Miłeckid7520b12011-06-13 16:20:06 +0200220 /* HT-PHY specific information */
221 struct b43_phy_ht *ht;
Michael Bueschef1a6282008-08-27 18:53:02 +0200222 };
223
224 /* Band support flags. */
225 bool supports_2ghz;
226 bool supports_5ghz;
227
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +0100228 /* HT info */
229 bool is_40mhz;
230
Michael Bueschef1a6282008-08-27 18:53:02 +0200231 /* GMODE bit enabled? */
232 bool gmode;
233
234 /* Analog Type */
235 u8 analog;
236 /* B43_PHYTYPE_ */
237 u8 type;
238 /* PHY revision number. */
239 u8 rev;
240
Rafał Miłecki15518082010-12-07 09:42:07 +0100241 /* Count writes since last read */
242 u8 writes_counter;
243
Michael Bueschef1a6282008-08-27 18:53:02 +0200244 /* Radio versioning */
245 u16 radio_manuf; /* Radio manufacturer */
246 u16 radio_ver; /* Radio version */
247 u8 radio_rev; /* Radio revision */
248
249 /* Software state of the radio */
250 bool radio_on;
251
252 /* Desired TX power level (in dBm).
253 * This is set by the user and adjusted in b43_phy_xmitpower(). */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200254 int desired_txpower;
Michael Bueschef1a6282008-08-27 18:53:02 +0200255
256 /* Hardware Power Control enabled? */
257 bool hardware_power_control;
258
Michael Buesch18c8ade2008-08-28 19:33:40 +0200259 /* The time (in absolute jiffies) when the next TX power output
260 * check is needed. */
261 unsigned long next_txpwr_check_time;
262
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200263 /* Current channel */
Michael Bueschef1a6282008-08-27 18:53:02 +0200264 unsigned int channel;
Rafał Miłecki204a6652010-10-14 19:33:34 +0200265 u16 channel_freq;
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200266 enum nl80211_channel_type channel_type;
Michael Bueschef1a6282008-08-27 18:53:02 +0200267
268 /* PHY TX errors counter. */
269 atomic_t txerr_cnt;
270
271#ifdef CONFIG_B43_DEBUG
Michael Buesch591f3dc2009-03-31 12:27:32 +0200272 /* PHY registers locked (w.r.t. firmware) */
Michael Bueschef1a6282008-08-27 18:53:02 +0200273 bool phy_locked;
Michael Buesch591f3dc2009-03-31 12:27:32 +0200274 /* Radio registers locked (w.r.t. firmware) */
275 bool radio_locked;
Michael Bueschef1a6282008-08-27 18:53:02 +0200276#endif /* B43_DEBUG */
277};
278
279
280/**
Michael Bueschfb111372008-09-02 13:00:34 +0200281 * b43_phy_allocate - Allocate PHY structs
282 * Allocate the PHY data structures, based on the current dev->phy.type
Michael Bueschef1a6282008-08-27 18:53:02 +0200283 */
Michael Bueschfb111372008-09-02 13:00:34 +0200284int b43_phy_allocate(struct b43_wldev *dev);
285
286/**
287 * b43_phy_free - Free PHY structs
288 */
289void b43_phy_free(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200290
291/**
292 * b43_phy_init - Initialise the PHY
293 */
294int b43_phy_init(struct b43_wldev *dev);
295
296/**
297 * b43_phy_exit - Cleanup PHY
298 */
299void b43_phy_exit(struct b43_wldev *dev);
300
301/**
302 * b43_has_hardware_pctl - Hardware Power Control supported?
303 * Returns a boolean, whether hardware power control is supported.
304 */
305bool b43_has_hardware_pctl(struct b43_wldev *dev);
306
307/**
308 * b43_phy_read - 16bit PHY register read access
309 */
310u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
311
312/**
313 * b43_phy_write - 16bit PHY register write access
314 */
315void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
316
317/**
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200318 * b43_phy_copy - copy contents of 16bit PHY register to another
319 */
320void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
321
322/**
Michael Bueschef1a6282008-08-27 18:53:02 +0200323 * b43_phy_mask - Mask a PHY register with a mask
324 */
325void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
326
327/**
328 * b43_phy_set - OR a PHY register with a bitmap
329 */
330void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
331
332/**
333 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
334 */
335void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
336
337/**
338 * b43_radio_read - 16bit Radio register read access
339 */
340u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
341#define b43_radio_read16 b43_radio_read /* DEPRECATED */
342
343/**
344 * b43_radio_write - 16bit Radio register write access
345 */
346void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
347#define b43_radio_write16 b43_radio_write /* DEPRECATED */
348
349/**
350 * b43_radio_mask - Mask a 16bit radio register with a mask
351 */
352void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
353
354/**
355 * b43_radio_set - OR a 16bit radio register with a bitmap
356 */
357void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
358
359/**
360 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
361 */
362void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
363
364/**
365 * b43_radio_lock - Lock firmware radio register access
366 */
367void b43_radio_lock(struct b43_wldev *dev);
368
369/**
370 * b43_radio_unlock - Unlock firmware radio register access
371 */
372void b43_radio_unlock(struct b43_wldev *dev);
373
374/**
375 * b43_phy_lock - Lock firmware PHY register access
376 */
377void b43_phy_lock(struct b43_wldev *dev);
378
379/**
380 * b43_phy_unlock - Unlock firmware PHY register access
381 */
382void b43_phy_unlock(struct b43_wldev *dev);
383
384/**
385 * b43_switch_channel - Switch to another channel
386 */
387int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
388/**
389 * B43_DEFAULT_CHANNEL - Switch to the default channel.
390 */
391#define B43_DEFAULT_CHANNEL UINT_MAX
392
393/**
394 * b43_software_rfkill - Turn the radio ON or OFF in software.
395 */
Johannes Berg19d337d2009-06-02 13:01:37 +0200396void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
Michael Bueschef1a6282008-08-27 18:53:02 +0200397
Michael Buesch18c8ade2008-08-28 19:33:40 +0200398/**
399 * b43_phy_txpower_check - Check TX power output.
400 *
401 * Compare the current TX power output to the desired power emission
402 * and schedule an adjustment in case it mismatches.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200403 *
404 * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
405 * See the docs below.
406 */
407void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
408/**
409 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
410 *
411 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
412 * the check now.
413 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
414 * TSSI did not change.
415 */
416enum b43_phy_txpower_check_flags {
417 B43_TXPWR_IGNORE_TIME = (1 << 0),
418 B43_TXPWR_IGNORE_TSSI = (1 << 1),
419};
420
421struct work_struct;
422void b43_phy_txpower_adjust_work(struct work_struct *work);
423
424/**
425 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
426 *
427 * @shm_offset: The SHM address to read the values from.
428 *
429 * Returns the average of the 4 TSSI values, or a negative error code.
430 */
431int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
432
Michael Bueschcb24f572008-09-03 12:12:20 +0200433/**
434 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
435 *
436 * It does the switching based on the PHY0 core register.
437 * Do _not_ call this directly. Only use it as a switch_analog callback
438 * for struct b43_phy_operations.
439 */
440void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
441
Rafał Miłeckiabc1f7c2010-12-07 21:55:58 +0100442bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type);
443
Rafał Miłecki98650452010-01-25 18:59:59 +0100444struct b43_c32 b43_cordic(int theta);
Michael Buesch18c8ade2008-08-28 19:33:40 +0200445
Michael Bueschef1a6282008-08-27 18:53:02 +0200446#endif /* LINUX_B43_PHY_COMMON_H_ */